[PATCH 1/2] drm/cirrus: Correct register values for 16bpp

Hi Dave, any chance to take a look at this problem? thanks, Takashi At Fri, 25 Jan 2013 17:21:54 +0100, Takashi Iwai wrote: > > When the mode is set with 16bpp on QEMU, the output gets totally > broken. The culprit is the bogus register values set for 16bpp, > which was likely copied from fr

Re: [PATCH 1/2] drm/cirrus: Correct register values for 16bpp

Hi Dave, any chance to take a look at this problem? thanks, Takashi At Fri, 25 Jan 2013 17:21:54 +0100, Takashi Iwai wrote: > > When the mode is set with 16bpp on QEMU, the output gets totally > broken. The culprit is the bogus register values set for 16bpp, > which was likely copied from fr

[PATCH 1/2] drm/cirrus: Correct register values for 16bpp

When the mode is set with 16bpp on QEMU, the output gets totally broken. The culprit is the bogus register values set for 16bpp, which was likely copied from from a wrong place. Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=799216 Cc: Signed-off-by: Takashi Iwai --- drivers/gpu/drm/ci

[PATCH 1/2] drm/cirrus: Correct register values for 16bpp

When the mode is set with 16bpp on QEMU, the output gets totally broken. The culprit is the bogus register values set for 16bpp, which was likely copied from from a wrong place. Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=799216 Cc: Signed-off-by: Takashi Iwai --- drivers/gpu/drm/ci