Add pinctrl settings for the configurable lcdc0 signals dclk, den, hsync
and vsync. The lcdc0 data pin configuration is not software controlable.

Signed-off-by: Heiko Stuebner <heiko at sntech.de>
---
 arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2c29a3e..e7e94f8 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -945,6 +945,15 @@
                        };
                };

+               lcdc0 {
+                       lcdc0_ctl: lcdc0-ctl {
+                               rockchip,pins = <1 24 RK_FUNC_1 
&pcfg_pull_none>,
+                                               <1 25 RK_FUNC_1 
&pcfg_pull_none>,
+                                               <1 26 RK_FUNC_1 
&pcfg_pull_none>,
+                                               <1 27 RK_FUNC_1 
&pcfg_pull_none>;
+                       };
+               };
+
                sdmmc {
                        sdmmc_clk: sdmmc-clk {
                                rockchip,pins = <6 20 RK_FUNC_1 
&pcfg_pull_none>;
-- 
2.1.4

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