2010/6/6 Rafa? Mi?ecki :
> Signed-off-by: Rafa? Mi?ecki
Good catch.
Signed-off-by: Alex Deucher
> ---
> This fixes FDO bug #28375, it's kind of regression, so quite important to have
> it for .35.
>
> V2: Fix on RV770+ as well. All other chipsets have only one clock mode per
> state.
>
> V3:
Signed-off-by: Rafa? Mi?ecki
---
This fixes FDO bug #28375, it's kind of regression, so quite important to have
it for .35.
V2: Fix on RV770+ as well. All other chipsets have only one clock mode per
state.
V3: I'm out of luck today. Grepped for voltage in r*.c and missed evergreen.
---
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
This fixes FDO bug #28375, it's kind of regression, so quite important to have
it for .35.
V2: Fix on RV770+ as well. All other chipsets have only one clock mode per
state.
V3: I'm out of luck today. Grepped for voltage in r*.c and missed
2010/6/6 Rafał Miłecki zaj...@gmail.com:
Signed-off-by: Rafał Miłecki zaj...@gmail.com
Good catch.
Signed-off-by: Alex Deucher alexdeuc...@gmail.com
---
This fixes FDO bug #28375, it's kind of regression, so quite important to have
it for .35.
V2: Fix on RV770+ as well. All other chipsets
