On Tue, Jul 02, 2019 at 09:10:26PM +0530, Jagan Teki wrote:
> On Tue, Jul 2, 2019 at 8:59 PM Maxime Ripard
> wrote:
> > On Tue, Jul 02, 2019 at 12:30:14AM +0530, Jagan Teki wrote:
> > > On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard
> > > wrote:
> > > > > > > > > > > BSP has tcon_div and
On Tue, Jul 2, 2019 at 8:59 PM Maxime Ripard wrote:
>
> On Tue, Jul 02, 2019 at 12:30:14AM +0530, Jagan Teki wrote:
> > On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard
> > wrote:
> > > > > > > > > > BSP has tcon_div and dsi_div. dsi_div is dynamic which
> > > > > > > > > > depends on
> > > > > >
On Tue, Jul 02, 2019 at 12:30:14AM +0530, Jagan Teki wrote:
> On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard
> wrote:
> > > > > > > > > BSP has tcon_div and dsi_div. dsi_div is dynamic which
> > > > > > > > > depends on
> > > > > > > > > bpp/lanes and it indeed depends on PLL computation (not
>
On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard wrote:
>
> On Mon, Jun 24, 2019 at 09:32:11PM +0530, Jagan Teki wrote:
> > On Mon, Jun 24, 2019 at 6:34 PM Maxime Ripard
> > wrote:
> > >
> > > On Fri, Jun 14, 2019 at 05:33:23PM +0530, Jagan Teki wrote:
> > > > On Thu, Jun 13, 2019 at 7:28 PM
On Mon, Jun 24, 2019 at 09:32:11PM +0530, Jagan Teki wrote:
> On Mon, Jun 24, 2019 at 6:34 PM Maxime Ripard
> wrote:
> >
> > On Fri, Jun 14, 2019 at 05:33:23PM +0530, Jagan Teki wrote:
> > > On Thu, Jun 13, 2019 at 7:28 PM Maxime Ripard
> > > wrote:
> > > >
> > > > On Wed, Jun 05, 2019 at
On Mon, Jun 24, 2019 at 6:34 PM Maxime Ripard wrote:
>
> On Fri, Jun 14, 2019 at 05:33:23PM +0530, Jagan Teki wrote:
> > On Thu, Jun 13, 2019 at 7:28 PM Maxime Ripard
> > wrote:
> > >
> > > On Wed, Jun 05, 2019 at 01:11:44PM +0530, Jagan Teki wrote:
> > > > On Tue, Jun 4, 2019 at 8:00 PM Maxime
On Fri, Jun 14, 2019 at 05:33:23PM +0530, Jagan Teki wrote:
> On Thu, Jun 13, 2019 at 7:28 PM Maxime Ripard
> wrote:
> >
> > On Wed, Jun 05, 2019 at 01:11:44PM +0530, Jagan Teki wrote:
> > > On Tue, Jun 4, 2019 at 8:00 PM Maxime Ripard
> > > wrote:
> > > >
> > > > On Fri, May 24, 2019 at
On Thu, Jun 13, 2019 at 7:28 PM Maxime Ripard wrote:
>
> On Wed, Jun 05, 2019 at 01:11:44PM +0530, Jagan Teki wrote:
> > On Tue, Jun 4, 2019 at 8:00 PM Maxime Ripard
> > wrote:
> > >
> > > On Fri, May 24, 2019 at 03:37:36PM +0530, Jagan Teki wrote:
> > > > On Fri, May 24, 2019 at 2:18 AM Maxime
On Wed, Jun 05, 2019 at 01:11:44PM +0530, Jagan Teki wrote:
> On Tue, Jun 4, 2019 at 8:00 PM Maxime Ripard
> wrote:
> >
> > On Fri, May 24, 2019 at 03:37:36PM +0530, Jagan Teki wrote:
> > > On Fri, May 24, 2019 at 2:18 AM Maxime Ripard
> > > wrote:
> > > >
> > > > On Mon, May 20, 2019 at
On Tue, Jun 4, 2019 at 8:00 PM Maxime Ripard wrote:
>
> On Fri, May 24, 2019 at 03:37:36PM +0530, Jagan Teki wrote:
> > On Fri, May 24, 2019 at 2:18 AM Maxime Ripard
> > wrote:
> > >
> > > On Mon, May 20, 2019 at 02:33:11PM +0530, Jagan Teki wrote:
> > > > pll-video => pll-mipi => tcon0 =>
On Fri, May 24, 2019 at 03:37:36PM +0530, Jagan Teki wrote:
> On Fri, May 24, 2019 at 2:18 AM Maxime Ripard
> wrote:
> >
> > On Mon, May 20, 2019 at 02:33:11PM +0530, Jagan Teki wrote:
> > > pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical
> > > MIPI clock topology in Allwinner
On Fri, May 24, 2019 at 2:18 AM Maxime Ripard wrote:
>
> On Mon, May 20, 2019 at 02:33:11PM +0530, Jagan Teki wrote:
> > pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical
> > MIPI clock topology in Allwinner DSI controller.
> >
> > TCON dotclock driver is computing the desired
On Mon, May 20, 2019 at 02:33:11PM +0530, Jagan Teki wrote:
> pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical
> MIPI clock topology in Allwinner DSI controller.
>
> TCON dotclock driver is computing the desired DCLK divider based on
> panel pixel clock along with input DCLK min,
pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical
MIPI clock topology in Allwinner DSI controller.
TCON dotclock driver is computing the desired DCLK divider based on
panel pixel clock along with input DCLK min, max divider values from
tcon driver and that would eventually set
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