Re: [PATCH v2] drm/dp: Fix off-by-one in register cache size

2022-02-04 Thread Kees Cook
Ping. This is a OOB read fix. Can something send this to Linus please? -Kees On Wed, Jan 05, 2022 at 09:33:10AM -0800, Kees Cook wrote: > The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the > math to calculate the max size. Found from a -Warray-bounds build: > > drivers/gpu/d

[PATCH v2] drm/dp: Fix off-by-one in register cache size

2022-01-05 Thread Kees Cook
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the math to calculate the max size. Found from a -Warray-bounds build: drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr': drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside array b