Re: [PATCH v2 3/8] drm/bridge: simplify bridge timing info

2018-09-14 Thread Laurent Pinchart
Hi Stefan, On Wednesday, 12 September 2018 21:32:17 EEST Stefan Agner wrote: > Bridges are typically connected to a parallel display signal with > pixel clock, sync signals and data lines. Parallel display signals > are also used in lower-end embedded display panels. For parallel > display panels

[PATCH v2 3/8] drm/bridge: simplify bridge timing info

2018-09-12 Thread Stefan Agner
Bridges are typically connected to a parallel display signal with pixel clock, sync signals and data lines. Parallel display signals are also used in lower-end embedded display panels. For parallel display panels we currently do not specify setup/hold times. From discussions on the mailing list it