Re: [PATCH v3] drm/msm/dp: add support of tps4 (training pattern 4) for HBR3

2022-01-06 Thread Stephen Boyd
Quoting Kuogee Hsieh (2022-01-06 09:14:56) > @@ -1189,12 +1190,20 @@ static int dp_ctrl_link_train_2(struct > dp_ctrl_private *ctrl, > > *training_step = DP_TRAINING_2; > > - if (drm_dp_tps3_supported(ctrl->panel->dpcd)) > + if (drm_dp_tps4_supported(ctrl->panel->dpcd)) { > +

Re: [PATCH v3] drm/msm/dp: add support of tps4 (training pattern 4) for HBR3

2022-01-06 Thread Stephen Boyd
Quoting Kuogee Hsieh (2022-01-06 09:14:56) > diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c > b/drivers/gpu/drm/msm/dp/dp_ctrl.c > index 39558a2..ba70387 100644 > --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c > +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c > @@ -1189,12 +1190,20 @@ static int

[PATCH v3] drm/msm/dp: add support of tps4 (training pattern 4) for HBR3

2022-01-06 Thread Kuogee Hsieh
From: Kuogee Hsieh Some DP sinkers prefer to use tps4 instead of tps3 during training #2. This patch will use tps4 to perform link training #2 if sinker's DPCD supports it. Changes in V2: -- replace dp_catalog_ctrl_set_pattern() with dp_catalog_ctrl_set_pattern_state_bit() Changes in V3: --