Re: [PATCH v3 10/27] drm/msm/dpu: clean up SRC addresses when setting up SSPP for solid fill

2023-02-03 Thread Abhinav Kumar
On 2/3/2023 10:21 AM, Dmitry Baryshkov wrote: Set SSPP_SRCn_ADDR registers to 0 while setting up solid fill, as we can not be sure that the previous address is still valid. Signed-off-by: Dmitry Baryshkov I am yet to confirm with HW team if programming 0 stride and 0 address is absolutely

[PATCH v3 10/27] drm/msm/dpu: clean up SRC addresses when setting up SSPP for solid fill

2023-02-03 Thread Dmitry Baryshkov
Set SSPP_SRCn_ADDR registers to 0 while setting up solid fill, as we can not be sure that the previous address is still valid. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dp