Looping back on this, after digging a bit deeper...
On Fri, Feb 14, 2020 at 9:38 AM Nick Fan (范哲維) wrote:
> [snip]
> > > Another thing that I'm not implementing is the dance that Mediatek
> > > does in their kbase driver when changing the clock (described in
> > > patch
> > > 2/7):
> > > ""
> >
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On Thu, Feb 13, 2020 at 3:57 PM Nicolas Boichat wrote:
> > > [snip]
> > > But then there's a slight problem: panfrost_devfreq uses a bunch of
> > > clk_get_rate calls, and the clock PLLs (at least on MTK platform) are
> > > never fully precise, so we get back 29955 for 300 Mhz and
> > >
On Wed, Feb 12, 2020 at 2:19 PM Nicolas Boichat wrote:
>
> +Viresh Kumar +Stephen Boyd for clock advice.
You missed adding us in the cc list of the email, fixed that now :)
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+Weiyi Lu +Nick Fan @MTK who may have more ideas.
On Thu, Feb 13, 2020 at 2:14 AM Rob Herring wrote:
>
> On Wed, Feb 12, 2020 at 2:49 AM Nicolas Boichat wrote:
> >
> > +Viresh Kumar +Stephen Boyd for clock advice.
> >
> > On Fri, Feb 7, 2020 at 1:27 PM Nicolas Boichat
> > wrote:
> > >
> > >
On Wed, Feb 12, 2020 at 2:49 AM Nicolas Boichat wrote:
>
> +Viresh Kumar +Stephen Boyd for clock advice.
>
> On Fri, Feb 7, 2020 at 1:27 PM Nicolas Boichat wrote:
> >
> > The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for
> > devfreq, and provides OPP table with 2 sets of voltages.
+Viresh Kumar +Stephen Boyd for clock advice.
On Fri, Feb 7, 2020 at 1:27 PM Nicolas Boichat wrote:
>
> The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for
> devfreq, and provides OPP table with 2 sets of voltages.
>
> TODO: This is incomplete as we'll need add support for setting
>
The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for
devfreq, and provides OPP table with 2 sets of voltages.
TODO: This is incomplete as we'll need add support for setting
a pair of voltages as well.
Signed-off-by: Nicolas Boichat
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c |
