MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
These sets coordinate and control the clock, power, and
register settings needed for the components of MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 44 +--
Hi Angelo,
On Tue, 2023-09-12 at 11:18 +0200, AngeloGioacchino Del Regno wrote:
> Il 12/09/23 09:57, Moudy Ho ha scritto:
> > MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
> > These sets coordinate and control the clock, power, and
> > register settings needed for the components of MDP3.
> >
>
Il 12/09/23 09:57, Moudy Ho ha scritto:
MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
These sets coordinate and control the clock, power, and
register settings needed for the components of MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 44