[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-12 Thread Krzysztof Kozlowski
On 12.10.2015 13:09, Yakir Yang wrote: > > > On 10/12/2015 11:51 AM, Krzysztof Kozlowski wrote: >> On 12.10.2015 11:43, Yakir Yang wrote: >>> On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote: On 12.10.2015 09:37, Yakir Yang wrote: > Hi Krzysztof, > > On 10/10/2015 11:46 PM,

[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-12 Thread Krzysztof Kozlowski
On 12.10.2015 11:43, Yakir Yang wrote: > > > On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote: >> On 12.10.2015 09:37, Yakir Yang wrote: >>> Hi Krzysztof, >>> >>> On 10/10/2015 11:46 PM, Yakir Yang wrote: Both hsync/vsync polarity and interlace mode can be parsed from drm display

[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-12 Thread Yakir Yang
On 10/12/2015 11:51 AM, Krzysztof Kozlowski wrote: > On 12.10.2015 11:43, Yakir Yang wrote: >> On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote: >>> On 12.10.2015 09:37, Yakir Yang wrote: Hi Krzysztof, On 10/10/2015 11:46 PM, Yakir Yang wrote: > Both hsync/vsync polarity and

[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-12 Thread Yakir Yang
On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote: > On 12.10.2015 09:37, Yakir Yang wrote: >> Hi Krzysztof, >> >> On 10/10/2015 11:46 PM, Yakir Yang wrote: >>> Both hsync/vsync polarity and interlace mode can be parsed from >>> drm display mode, and dynamic_range and ycbcr_coeff can be judge

[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-12 Thread Krzysztof Kozlowski
On 12.10.2015 09:37, Yakir Yang wrote: > Hi Krzysztof, > > On 10/10/2015 11:46 PM, Yakir Yang wrote: >> Both hsync/vsync polarity and interlace mode can be parsed from >> drm display mode, and dynamic_range and ycbcr_coeff can be judge >> by the video code. >> >> But presumably Exynos still

[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-12 Thread Yakir Yang
Hi Krzysztof, On 10/10/2015 11:46 PM, Yakir Yang wrote: > Both hsync/vsync polarity and interlace mode can be parsed from > drm display mode, and dynamic_range and ycbcr_coeff can be judge > by the video code. > > But presumably Exynos still relies on the DT properties, so take > good use of

[PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

2015-10-11 Thread Yakir Yang
Both hsync/vsync polarity and interlace mode can be parsed from drm display mode, and dynamic_range and ycbcr_coeff can be judge by the video code. But presumably Exynos still relies on the DT properties, so take good use of mode_fixup() in to achieve the compatibility hacks. Signed-off-by: