[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-21 Thread Thomas Hellstrom
On 12/18/2015 08:50 PM, Tiago Vignatti wrote: > On 12/17/2015 07:58 PM, Thomas Hellstrom wrote: >> On 12/16/2015 11:25 PM, Tiago Vignatti wrote: >>> From: Daniel Vetter >>> >>> The userspace might need some sort of cache coherency management >>> e.g. when CPU >>> and GPU domains are being accessed

[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-18 Thread Tiago Vignatti
On 12/17/2015 07:58 PM, Thomas Hellstrom wrote: > On 12/16/2015 11:25 PM, Tiago Vignatti wrote: >> From: Daniel Vetter >> >> The userspace might need some sort of cache coherency management e.g. when >> CPU >> and GPU domains are being accessed through dma-buf at the same time. To >> circumvent t

[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-18 Thread Tiago Vignatti
On 12/17/2015 04:19 PM, Alex Deucher wrote: > On Wed, Dec 16, 2015 at 5:25 PM, Tiago Vignatti > wrote: >> From: Daniel Vetter >> >> The userspace might need some sort of cache coherency management e.g. when >> CPU >> and GPU domains are being accessed through dma-buf at the same time. To >> circ

[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-18 Thread Daniel Vetter
On Thu, Dec 17, 2015 at 10:58:20PM +0100, Thomas Hellstrom wrote: > On 12/16/2015 11:25 PM, Tiago Vignatti wrote: > > From: Daniel Vetter > > > > The userspace might need some sort of cache coherency management e.g. when > > CPU > > and GPU domains are being accessed through dma-buf at the same t

[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-17 Thread Thomas Hellstrom
On 12/16/2015 11:25 PM, Tiago Vignatti wrote: > From: Daniel Vetter > > The userspace might need some sort of cache coherency management e.g. when CPU > and GPU domains are being accessed through dma-buf at the same time. To > circumvent this problem there are begin/end coherency markers, that for

[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-17 Thread Alex Deucher
On Wed, Dec 16, 2015 at 5:25 PM, Tiago Vignatti wrote: > From: Daniel Vetter > > The userspace might need some sort of cache coherency management e.g. when CPU > and GPU domains are being accessed through dma-buf at the same time. To > circumvent this problem there are begin/end coherency markers

[PATCH v6 3/5] dma-buf: Add ioctls to allow userspace to flush

2015-12-16 Thread Tiago Vignatti
From: Daniel Vetter The userspace might need some sort of cache coherency management e.g. when CPU and GPU domains are being accessed through dma-buf at the same time. To circumvent this problem there are begin/end coherency markers, that forward directly to existing dma-buf device drivers vfunc