From: Sven Van Asbroeck
We used an oscilloscope to observe the actual polarity of the
DI's pixel clock, and saw the following:
DI_GENERAL bit 17 is SET:
pixel data is stable on the pixel clock's FALLING edge
DI_GENERAL bit 17 is CLEAR:
pixel data is stable on the pixel clock's RI
On Thu, Oct 25, 2018 at 12:17:11PM -0400, thesve...@gmail.com wrote:
> From: Sven Van Asbroeck
>
> We used an oscilloscope to observe the actual polarity of the
> DI's pixel clock, and saw the following:
>
> DI_GENERAL bit 17 is SET:
> pixel data is stable on the pixel clock's FALLING edge