Enable and initilaize plane color features.
Signed-off-by: Uma Shankar <uma.shan...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 8 ++++++++
drivers/gpu/drm/i915/intel_color.c | 14 ++++++++++++++
drivers/gpu/drm/i915/intel_display.c | 4 ++++
drivers/gpu/drm/i915/intel_drv.h | 9 +++++++++
drivers/gpu/drm/i915/intel_sprite.c | 4 ++++
5 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1cc31a5..0d3e93f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -742,6 +742,9 @@ struct drm_i915_display_funcs {
void (*load_csc_matrix)(struct drm_crtc_state *crtc_state);
void (*load_luts)(struct drm_crtc_state *crtc_state);
+ /* Add Plane Color callbacks */
+ void (*load_plane_csc_matrix)(struct drm_plane_state *plane_state);
+ void (*load_plane_luts)(struct drm_plane_state *plane_state);
};
#define CSR_VERSION(major, minor) ((major) << 16 | (minor))
@@ -880,6 +883,11 @@ struct intel_device_info {
u16 degamma_lut_size;
u16 gamma_lut_size;
} color;
+
+ struct plane_color_luts {
+ u16 plane_degamma_lut_size;
+ u16 plane_gamma_lut_size;
+ } plane_color;
};
struct intel_display_error_state;
diff --git a/drivers/gpu/drm/i915/intel_color.c
b/drivers/gpu/drm/i915/intel_color.c
index ff9ecd2..b9042b6 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -643,6 +643,20 @@ int intel_color_check(struct drm_crtc *crtc,
return -EINVAL;
}
+void intel_plane_color_init(struct drm_plane *plane)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->dev);
+
+ drm_mode_plane_set_gamma_size(plane, 16);
+
+ /* Enable color management support when we have degamma & gamma LUTs. */
+ if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 &&
+ INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0)
+ drm_plane_enable_color_mgmt(plane,
+ INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size,
+ true, INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size);
+}
+
void intel_color_init(struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 524217d..b7af09a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13302,6 +13302,10 @@ static bool
intel_cursor_plane_format_mod_supported(struct drm_plane *plane,
DRM_MODE_ROTATE_0,
supported_rotations);
+ /* Add Plane Color properties */
+ if (INTEL_GEN(dev_priv) >= 9)
+ intel_plane_color_init(&primary->base);
+
drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
return primary;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3078076..740339a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -440,6 +440,14 @@ struct intel_plane_state {
*/
int scaler_id;
+ /*
+ * Use reduced/limited/broadcast rbg range, compressing from the full
+ * range fed into the crtcs.
+ */
+ bool limited_color_range;
+ /* Gamma mode programmed on the plane */
+ uint32_t gamma_mode;
+
struct drm_intel_sprite_colorkey ckey;
};
@@ -2000,6 +2008,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
int intel_color_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
void intel_color_set_csc(struct drm_crtc_state *crtc_state);
void intel_color_load_luts(struct drm_crtc_state *crtc_state);
+void intel_plane_color_init(struct drm_plane *plane);
/* intel_lspcon.c */
bool lspcon_init(struct intel_digital_port *intel_dig_port);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index b0d6e3e..13381d0 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1324,6 +1324,10 @@ struct intel_plane *
DRM_MODE_ROTATE_0,
supported_rotations);
+ /* Add Plane Color properties */
+ if (INTEL_GEN(dev_priv) >= 9)
+ intel_plane_color_init(&intel_plane->base);
+
drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
return intel_plane;
--
1.7.9.5
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