[deathsimple/drm-next-3.16][2/4] drm/radeon/hdmi: DCE3: clean ACR control

2014-05-15 Thread Alex Deucher
On Wed, May 14, 2014 at 5:27 PM, Rafa? Mi?ecki wrote: > What initially seemed to be a typo in fglrx (using register 0x740c > instead of 74dc) appeared to be a correct behavior. Without this > 0x740c reg operation DCE 3 doesn't work and it seems we got code for > that already in place. > Recent RE

[deathsimple/drm-next-3.16][2/4] drm/radeon/hdmi: DCE3: clean ACR control

2014-05-14 Thread Rafał Miłecki
What initially seemed to be a typo in fglrx (using register 0x740c instead of 74dc) appeared to be a correct behavior. Without this 0x740c reg operation DCE 3 doesn't work and it seems we got code for that already in place. Recent RE effors allowed to finally understand this magic: WREG32(HDMI0_AUD