Re: [PATCH v3 17/25] dt-bindings: panel: Add Bananapi S070WV20-CT16 ICN6211 MIPI-DSI to RGB bridge

2018-11-12 Thread Andrzej Hajda
On 10.11.2018 08:32, Jagan Teki wrote:
> On Wed, Nov 7, 2018 at 2:41 PM Andrzej Hajda  wrote:
>> On 06.11.2018 19:08, Jagan Teki wrote:
>>> On Wed, Oct 31, 2018 at 2:45 PM Andrzej Hajda  wrote:
 On 31.10.2018 09:58, Chen-Yu Tsai wrote:
> On Wed, Oct 31, 2018 at 4:53 PM Andrzej Hajda  wrote:
>> On 26.10.2018 16:43, Jagan Teki wrote:
>>> Bananapi S070WV20-CT16 ICN6211 is 800x480, 4-lane MIPI-DSI to RGB
>>> bridge panel, which is available on same PCB with 24-bit RGB interface.
>>>
>>> So, this patch adds DSI specific binding details on existing
>>> dt-bindings file.
>>>
>>> Signed-off-by: Jagan Teki 
>>> ---
>>> Changes for v3:
>>> - Use existing binding doc and update dsi details
>>> Changes for v2:
>>> - none
>>>
>>>  .../display/panel/bananapi,s070wv20-ct16.txt  | 31 +--
>>>  1 file changed, 29 insertions(+), 2 deletions(-)
>>>
>>> diff --git 
>>> a/Documentation/devicetree/bindings/display/panel/bananapi,s070wv20-ct16.txt
>>>  
>>> b/Documentation/devicetree/bindings/display/panel/bananapi,s070wv20-ct16.txt
>>> index 35bc0c839f49..b7855dc7c66f 100644
>>> --- 
>>> a/Documentation/devicetree/bindings/display/panel/bananapi,s070wv20-ct16.txt
>>> +++ 
>>> b/Documentation/devicetree/bindings/display/panel/bananapi,s070wv20-ct16.txt
>>> @@ -1,12 +1,39 @@
>>>  Banana Pi 7" (S070WV20-CT16) TFT LCD Panel
>>>
>>> +S070WV20-CT16 is 7" 800x480 panel connected through a 24-bit RGB 
>>> interface.
>>> +
>>> +Depending on the variant, the PCB attached to the panel module either
>>> +supports DSI, or DSI + 24-bit RGB. DSI is converted to 24-bit RGB via
>>> +an onboard ICN6211 MIPI DSI - RGB bridge chip, then fed to the panel
>>> +itself
>> As I understand this is display board, which contains 'pure' RGB panel
>> S070WV20-CT16 and optionally ICN6211 DSI->RGB bridge.
>> These are separate devices, just connected by vendor to simplify its
>> assembly. Why don't you create then bridge driver for ICN6211 and RGB
>> panel driver for S070WV20-CT16 - it looks more generic.
>> Then you can describe both in dts and voila.
>> Creating drivers for every combo of devices (panel + bridge), just
>> because some vendor sells them together seems incorrect - we have
>> devicetree for it.
> Rob suggested this, and also the opposite: using the same
> "bananapi,s070wv20-ct16"
> compatible string for both types of connections, and have the driver deal 
> with
> detecting the bus type.
>
> The thing about the bridge chip is that there's no available datasheet 
> that
> describes all the parts of the init sequence, in fact none at all. I 
> managed
> to work out some bits, but the others remain a mystery and must be 
> hard-coded
> to match the panel. That would work against having a generic bridge 
> driver.
 But it is common for many chips - 1st version of the driver is developed
 on one platform and it supports only one configuration, if next platform
 with the same cheap appears the driver is augmented if necessary.
>>> At-least few of the commands from panel initialization code, the
>>> respective opcode data values are based on panel timings and even
>>> clock value is different in DSI. I think it look hard to try bridge
>>> driver for these restrictions, do you have any suggestions?
>>
>> Where do you see an issue? Since panel is RGB it should have no
>> initialization sequence (beside regulator/gpio power on/off), so the
>> only thing to do is to figure out which regulators/gpios belongs to
>> which component - with publicly available specs it should be doable.
>>
>> The whole initialization sequence is for the bridge, so you put it into
>> bridge driver, for starters it can be hardcoded.
> Yes, I understand we can move regulators/gpio setup separately and
> though we hardcode the init sequence there is difference  in clock for
> DSI(which I mentioned in previous mail). DSI panel can't work with
> clock used by RGB panel-simple.


If you mean pixel clock from timings in next patch it seems incorrect.
Pixel clock should be always

htotal * vtotal * vrefresh, in case of drm_display_mode result should be
divided by 1000 (as .clock is in kHz).

With timings provided there you have: 928*525*60 = 29232000

So pixel clock should be 29232, if other timings are correct. DSI clock
is a different thing and it is private thing of DSI bridge/panel it
should not be exposed via drm_display_mode.


Regards

Andrzej


>
>> Then you can:
>>
>> 1. Try to find other users of this ICN6211 chip and compare
>> initialization sequences to guess purpose of registers.
>>
>> 2. Try to get specs of the chip (ask vendor, distributor, grep Internet).
> As we mentioned (even Chen-Yu), we are unable to find the proper spec
> for this panel, all we taken reference from AW BSP code.
>
>> 3. Do nothing 

[PATCH xf86-video-intel v8 2/2] sna: Added AYUV format support for textured and sprite video adapters.

2018-11-12 Thread Stanislav Lisovskiy
v2: Renamed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV.
Added comment about AYUV byte ordering in Gstreamer.

v3: Removed sna_composite_op flags related change to the separate patch.

v4: Fixed review comments, done code refactoring

v5: Fixed following review comments:
- Fixed comment in shader code for ayuv kernel.
- Fixed naming to VIDEO_AYUV_BT601/BT709 for ayuv kernels.
- Removed duplicate gen9_kernel parameter, left from previous patches
- Added colorspace handling for new AYUV kernel
- Fixed naming of sna_copy_packed_data_ayuv to sna_copy_ayuv_data
- Started using standard bswap_32 function for byte swapping in 
sna_copy_ayuv_data
- Removed redundant code in sna_copy_ayuv_data so that it looks more neat
- Fixed XVIMAGE_AYUV structure initialization to contain proper byte 
sequence for GST
- Fixed bogus comment about subsampling for DRM_FORMAT_XYUV
- Fixed AYUV advertisement for all platforms
- Removed unnecessary RGB888 declaration.

v6:
- Fixed surface format not to use alpha as supposed
- Now doing byte swapping always during copy
- Changed hack, required for GST to work to be at one place
- Fixed invalid sampling values for XVIMAGE_AYUV
- Fixed sprite format checking order and images_ayuv definition.

v7:
- Removed reverse_bytes bool parameter, now swapping bytes
  for XYUV unconditionally both for textured and sprite modes.

v8:
- Added gen9_images structure, in order to expose AYUV format to
  proper platforms.

Signed-off-by: Stanislav Lisovskiy 
---
 src/render_program/Makefile.am|  2 +
 .../exa_wm_src_sample_argb_ayuv.g8a   | 76 +++
 .../exa_wm_src_sample_argb_ayuv.g8b   |  8 ++
 src/sna/gen9_render.c | 24 +-
 src/sna/sna_render.h  |  3 +
 src/sna/sna_video.c   | 72 +-
 src/sna/sna_video.h   | 20 +
 src/sna/sna_video_sprite.c| 20 -
 src/sna/sna_video_textured.c  | 19 +
 9 files changed, 239 insertions(+), 5 deletions(-)
 create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8a
 create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8b

diff --git a/src/render_program/Makefile.am b/src/render_program/Makefile.am
index dc58138f..e35ffa52 100644
--- a/src/render_program/Makefile.am
+++ b/src/render_program/Makefile.am
@@ -196,6 +196,7 @@ INTEL_G7B = \
 INTEL_G8A =\
exa_wm_src_affine.g8a   \
exa_wm_src_sample_argb.g8a  \
+   exa_wm_src_sample_argb_ayuv.g8a \
exa_wm_src_sample_nv12.g8a  \
exa_wm_src_sample_planar.g8a\
exa_wm_write.g8a\
@@ -205,6 +206,7 @@ INTEL_G8A = \
 
 INTEL_G8B =\
exa_wm_src_affine.g8b   \
+   exa_wm_src_sample_argb_ayuv.g8b \
exa_wm_src_sample_argb.g8b  \
exa_wm_src_sample_nv12.g8b  \
exa_wm_src_sample_planar.g8b\
diff --git a/src/render_program/exa_wm_src_sample_argb_ayuv.g8a 
b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
new file mode 100644
index ..c0b84c2e
--- /dev/null
+++ b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
@@ -0,0 +1,76 @@
+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Wang Zhenyu 
+ *Keith Packard 
+ */
+
+/* Sample the src surface */
+
+include(`exa_wm.g4i')
+
+undefine(`src_msg')
+undefine(`src_msg_ind')
+
+define(`src_msg',   `g65')
+define(`src_msg_ind',   `65')
+
+/* prepare sampler read back gX register, which would be written back to 
output */
+
+/* use simd16 sampler, param 0 is u, param 1 is v. */
+/* 'payload' loading, assuming tex coord 

[PATCH xf86-video-intel v8 0/2] Added AYUV format support

2018-11-12 Thread Stanislav Lisovskiy
sna/gen9+: Added AYUV format support for textured and sprite video adapters.
Split out wm_kernel from the sna_composite_op flags

Stanislav Lisovskiy (2):
  sna/gen9+: Split out wm_kernel from the sna_composite_op flags
  sna: Added AYUV format support for textured and sprite video adapters.

 src/render_program/Makefile.am|  2 +
 .../exa_wm_src_sample_argb_ayuv.g8a   | 76 +++
 .../exa_wm_src_sample_argb_ayuv.g8b   |  8 ++
 src/sna/gen9_render.c | 59 ++
 src/sna/sna_render.h  |  4 +
 src/sna/sna_video.c   | 72 +-
 src/sna/sna_video.h   | 20 +
 src/sna/sna_video_sprite.c| 20 -
 src/sna/sna_video_textured.c  | 19 +
 9 files changed, 262 insertions(+), 18 deletions(-)
 create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8a
 create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8b

-- 
2.17.1

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[PATCH xf86-video-intel v8 1/2] sna/gen9+: Split out wm_kernel from the sna_composite_op flags

2018-11-12 Thread Stanislav Lisovskiy
With the extra video kernels we already ran out of bits in
the flags. To tackle that let's just split out the
wm_kernel to its own thing.

Signed-off-by: Stanislav Lisovskiy 
---
 src/sna/gen9_render.c | 35 ++-
 src/sna/sna_render.h  |  1 +
 2 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/src/sna/gen9_render.c b/src/sna/gen9_render.c
index 505b98af..eb22b642 100644
--- a/src/sna/gen9_render.c
+++ b/src/sna/gen9_render.c
@@ -226,19 +226,18 @@ static const struct blendinfo {
 
 #define COPY_SAMPLER 0
 #define COPY_VERTEX VERTEX_2s2s
-#define COPY_FLAGS(a) GEN9_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : 
CLEAR, GEN9_WM_KERNEL_NOMASK, COPY_VERTEX)
+#define COPY_FLAGS(a) GEN9_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : 
CLEAR, COPY_VERTEX)
 
 #define FILL_SAMPLER 1
 #define FILL_VERTEX VERTEX_2s2s
-#define FILL_FLAGS(op, format) GEN9_SET_FLAGS(FILL_SAMPLER, 
gen9_get_blend((op), false, (format)), GEN9_WM_KERNEL_NOMASK, FILL_VERTEX)
-#define FILL_FLAGS_NOBLEND GEN9_SET_FLAGS(FILL_SAMPLER, NO_BLEND, 
GEN9_WM_KERNEL_NOMASK, FILL_VERTEX)
+#define FILL_FLAGS(op, format) GEN9_SET_FLAGS(FILL_SAMPLER, 
gen9_get_blend((op), false, (format)), FILL_VERTEX)
+#define FILL_FLAGS_NOBLEND GEN9_SET_FLAGS(FILL_SAMPLER, NO_BLEND, FILL_VERTEX)
 
 #define GEN9_SAMPLER(f) (((f) >> 20) & 0xfff)
 #define GEN9_BLEND(f) (((f) >> 4) & 0x7ff)
 #define GEN9_READS_DST(f) (((f) >> 15) & 1)
-#define GEN9_KERNEL(f) (((f) >> 16) & 0xf)
 #define GEN9_VERTEX(f) (((f) >> 0) & 0xf)
-#define GEN9_SET_FLAGS(S, B, K, V)  ((S) << 20 | (K) << 16 | (B) | (V))
+#define GEN9_SET_FLAGS(S, B, V)  ((S) << 20 | (B) | (V))
 
 #define OUT_BATCH(v) batch_emit(sna, v)
 #define OUT_BATCH64(v) batch_emit64(sna, v)
@@ -1349,7 +1348,7 @@ gen9_emit_state(struct sna *sna,
gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
gen9_emit_sampler(sna, GEN9_SAMPLER(op->u.gen9.flags));
gen9_emit_sf(sna, GEN9_VERTEX(op->u.gen9.flags) >> 2);
-   gen9_emit_wm(sna, GEN9_KERNEL(op->u.gen9.flags));
+   gen9_emit_wm(sna, op->u.gen9.wm_kernel);
gen9_emit_vertex_elements(sna, op);
gen9_emit_binding_table(sna, wm_binding_table);
 
@@ -1618,7 +1617,7 @@ static int gen9_get_rectangles__flush(struct sna *sna,
if (gen9_magic_ca_pass(sna, op)) {
gen9_emit_pipe_invalidate(sna);
gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
-   gen9_emit_wm(sna, GEN9_KERNEL(op->u.gen9.flags));
+   gen9_emit_wm(sna, op->u.gen9.wm_kernel);
}
}
 
@@ -2548,11 +2547,11 @@ gen9_render_composite(struct sna *sna,
   gen9_get_blend(tmp->op,
  tmp->has_component_alpha,
  tmp->dst.format),
-  gen9_choose_composite_kernel(tmp->op,
-   tmp->mask.bo != 
NULL,
-   
tmp->has_component_alpha,
-   tmp->is_affine),
   gen4_choose_composite_emitter(sna, tmp));
+   tmp->u.gen9.wm_kernel = gen9_choose_composite_kernel(tmp->op,
+tmp->mask.bo != 
NULL,
+
tmp->has_component_alpha,
+tmp->is_affine);
 
tmp->blt   = gen9_render_composite_blt;
tmp->box   = gen9_render_composite_box;
@@ -2781,8 +2780,9 @@ gen9_render_composite_spans(struct sna *sna,
  SAMPLER_FILTER_NEAREST,
  SAMPLER_EXTEND_PAD),
   gen9_get_blend(tmp->base.op, false, 
tmp->base.dst.format),
-  GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine,
   gen4_choose_spans_emitter(sna, tmp));
+   tmp->base.u.gen9.wm_kernel =
+   GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine;
 
tmp->box   = gen9_render_composite_spans_box;
tmp->boxes = gen9_render_composite_spans_boxes;
@@ -3045,6 +3045,7 @@ fallback_blt:
tmp.need_magic_ca_pass = 0;
 
tmp.u.gen9.flags = COPY_FLAGS(alu);
+   tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
kgem_set_mode(>kgem, KGEM_RENDER, tmp.dst.bo);
if (!kgem_check_bo(>kgem, tmp.dst.bo, tmp.src.bo, NULL)) {
@@ -3214,6 +3215,7 @@ fallback:
op->base.floats_per_rect = 6;
 
op->base.u.gen9.flags = COPY_FLAGS(alu);
+   op->base.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
kgem_set_mode(>kgem, KGEM_RENDER, dst_bo);
if (!kgem_check_bo(>kgem, dst_bo, src_bo, NULL)) {
@@ -3366,6 +3368,7 @@ gen9_render_fill_boxes(struct sna *sna,

Re: [PATCH 2/2] drm: Revert syncobj timeline changes.

2018-11-12 Thread zhoucm1



On 2018年11月12日 18:16, Christian König wrote:

Am 09.11.18 um 23:26 schrieb Eric Anholt:

Eric Anholt  writes:


[ Unknown signature status ]
zhoucm1  writes:


On 2018年11月09日 00:52, Christian König wrote:

Am 08.11.18 um 17:07 schrieb Koenig, Christian:

Am 08.11.18 um 17:04 schrieb Eric Anholt:

Daniel suggested I submit this, since we're still seeing regressions
from it.  This is a revert to before 48197bc564c7 ("drm: add syncobj
timeline support v9") and its followon fixes.

This is a harmless false positive from lockdep, Chouming and I are
already working on a fix.

On the other hand we had enough trouble with that patch, so if it
really bothers you feel free to add my Acked-by: Christian König
  and push it.

NAK, please no, I don't think this needed, the Warning totally isn't
related to syncobj timeline, but fence-array implementation flaw, just
exposed by syncobj.
In addition, Christian already has a fix for this Warning, I've tested.
Please Christian send to public review.

I backed out my revert of #2 (#1 still necessary) after adding the
lockdep regression fix, and now my CTS run got oomkilled after just a
few hours, with these notable lines in the unreclaimable slab info list:

[ 6314.373099] drm_sched_fence69095KB  69095KB
[ 6314.373653] kmemleak_object   428249KB 428384KB
[ 6314.373736] kmalloc-262144   256KB256KB
[ 6314.373743] kmalloc-131072   128KB128KB
[ 6314.373750] kmalloc-65536 64KB 64KB
[ 6314.373756] kmalloc-32768   1472KB   1728KB
[ 6314.373763] kmalloc-16384 64KB 64KB
[ 6314.373770] kmalloc-8192 208KB208KB
[ 6314.373778] kmalloc-40962408KB   2408KB
[ 6314.373784] kmalloc-2048 288KB336KB
[ 6314.373792] kmalloc-10241457KB   1512KB
[ 6314.373800] kmalloc-512  854KB   1048KB
[ 6314.373808] kmalloc-256  188KB268KB
[ 6314.373817] kmalloc-19269141KB  69142KB
[ 6314.373824] kmalloc-64 47703KB  47704KB
[ 6314.373886] kmalloc-12846396KB  46396KB
[ 6314.373894] kmem_cache31KB 35KB

No results from kmemleak, though.

OK, it looks like the #2 revert probably isn't related to the OOM issue.
Running a single job on otherwise unused DRM, watching /proc/slabinfo
every second for drm_sched_fence, I get:

drm_sched_fence0  0192   211 : tunables   32   168 : 
slabdata  0  0  0 : globalstat   0  0 0000  
  000 : cpustat  0  0  0  0
drm_sched_fence   16 21192   211 : tunables   32   168 : 
slabdata  1  1  0 : globalstat  16 16 1000  
  000 : cpustat  5  1  6  0
drm_sched_fence   13 21192   211 : tunables   32   168 : 
slabdata  1  1  0 : globalstat  16 16 1000  
  000 : cpustat  5  1  6  0
drm_sched_fence6 21192   211 : tunables   32   168 : 
slabdata  1  1  0 : globalstat  16 16 1000  
  000 : cpustat  5  1  6  0
drm_sched_fence4 21192   211 : tunables   32   168 : 
slabdata  1  1  0 : globalstat  16 16 1000  
  000 : cpustat  5  1  6  0
drm_sched_fence2 21192   211 : tunables   32   168 : 
slabdata  1  1  0 : globalstat  16 16 1000  
  000 : cpustat  5  1  6  0
drm_sched_fence0 21192   211 : tunables   32   168 : 
slabdata  0  1  0 : globalstat  16 16 1000  
  000 : cpustat  5  1  6  0

So we generate a ton of fences, and I guess free them slowly because of
RCU?  And presumably kmemleak was sucking up lots of memory because of
how many of these objects were laying around.

Hi Eric,
Thanks for testing, I checked the code, we could forget signal 
fence-array immediately after many reviews without callback for 
fence-array, everything is waiting fence_wait or syncobj free, that's 
why you see "free them slowly".
Maybe we just need one line change as attahced, Could you please have a 
try with it on your tests?


btw,  I also didn't find there is fence-leak, or you can point me.

Thanks,
David


That is certainly possible. Another possibility is that we don't drop 
the reference in dma-fence-array early enough.


E.g. the dma-fence-array will keep the reference to its fences until 
it is destroyed, which is a bit late when you chain multiple 
dma-fence-array objects together.


David can you take a look at this and propose a fix? That would 
probably be good to have fixed in dma-fence-array separately to the 
timeline work.


Thanks,
Christian.




Re: [PATCH 2/2] drm: Revert syncobj timeline changes.

2018-11-12 Thread zhoucm1



On 2018年11月12日 18:48, Chris Wilson wrote:

Quoting Christian König (2018-11-12 10:16:01)

Am 09.11.18 um 23:26 schrieb Eric Anholt:

 Eric Anholt  writes:


 [ Unknown signature status ]
 zhoucm1  writes:


 On 2018年11月09日 00:52, Christian König wrote:

 Am 08.11.18 um 17:07 schrieb Koenig, Christian:

 Am 08.11.18 um 17:04 schrieb Eric Anholt:

 Daniel suggested I submit this, since we're still 
seeing regressions
 from it.  This is a revert to before 48197bc564c7 
("drm: add syncobj
 timeline support v9") and its followon fixes.

 This is a harmless false positive from lockdep, Chouming 
and I are
 already working on a fix.

 On the other hand we had enough trouble with that patch, so if 
it
 really bothers you feel free to add my Acked-by: Christian 
König
  and push it.

 NAK, please no, I don't think this needed, the Warning totally 
isn't
 related to syncobj timeline, but fence-array implementation flaw, 
just
 exposed by syncobj.
 In addition, Christian already has a fix for this Warning, I've 
tested.
 Please Christian send to public review.

 I backed out my revert of #2 (#1 still necessary) after adding the
 lockdep regression fix, and now my CTS run got oomkilled after just a
 few hours, with these notable lines in the unreclaimable slab info 
list:

 [ 6314.373099] drm_sched_fence69095KB  69095KB
 [ 6314.373653] kmemleak_object   428249KB 428384KB
 [ 6314.373736] kmalloc-262144   256KB256KB
 [ 6314.373743] kmalloc-131072   128KB128KB
 [ 6314.373750] kmalloc-65536 64KB 64KB
 [ 6314.373756] kmalloc-32768   1472KB   1728KB
 [ 6314.373763] kmalloc-16384 64KB 64KB
 [ 6314.373770] kmalloc-8192 208KB208KB
 [ 6314.373778] kmalloc-40962408KB   2408KB
 [ 6314.373784] kmalloc-2048 288KB336KB
 [ 6314.373792] kmalloc-10241457KB   1512KB
 [ 6314.373800] kmalloc-512  854KB   1048KB
 [ 6314.373808] kmalloc-256  188KB268KB
 [ 6314.373817] kmalloc-19269141KB  69142KB
 [ 6314.373824] kmalloc-64 47703KB  47704KB
 [ 6314.373886] kmalloc-12846396KB  46396KB
 [ 6314.373894] kmem_cache31KB 35KB

 No results from kmemleak, though.

 OK, it looks like the #2 revert probably isn't related to the OOM issue.
 Running a single job on otherwise unused DRM, watching /proc/slabinfo
 every second for drm_sched_fence, I get:

 drm_sched_fence0  0192   211 : tunables   32   168 
: slabdata  0  0  0 : globalstat   0  0 000
0000 : cpustat  0  0  0  0
 drm_sched_fence   16 21192   211 : tunables   32   168 
: slabdata  1  1  0 : globalstat  16 16 100
0000 : cpustat  5  1  6  0
 drm_sched_fence   13 21192   211 : tunables   32   168 
: slabdata  1  1  0 : globalstat  16 16 100
0000 : cpustat  5  1  6  0
 drm_sched_fence6 21192   211 : tunables   32   168 
: slabdata  1  1  0 : globalstat  16 16 100
0000 : cpustat  5  1  6  0
 drm_sched_fence4 21192   211 : tunables   32   168 
: slabdata  1  1  0 : globalstat  16 16 100
0000 : cpustat  5  1  6  0
 drm_sched_fence2 21192   211 : tunables   32   168 
: slabdata  1  1  0 : globalstat  16 16 100
0000 : cpustat  5  1  6  0
 drm_sched_fence0 21192   211 : tunables   32   168 
: slabdata  0  1  0 : globalstat  16 16 100
0000 : cpustat  5  1  6  0

 So we generate a ton of fences, and I guess free them slowly because of
 RCU?  And presumably kmemleak was sucking up lots of memory because of
 how many of these objects were laying around.


That is certainly possible. Another possibility is that we don't drop the
reference in dma-fence-array early enough.

E.g. the dma-fence-array will keep the reference to its fences until it is
destroyed, which is a bit late when you chain multiple dma-fence-array objects
together.

[PATCH AUTOSEL 4.9 08/17] drm/edid: Add 6 bpc quirk for BOE panel.

2018-11-12 Thread Sasha Levin
From: "Lee, Shawn C" 

[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]

BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.

Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.

Cc: Jani Nikula 
Cc: Maarten Lankhorst 
Cc: Gustavo Padovan 
Cc: Cooper Chiou 
Signed-off-by: Lee, Shawn C >
Signed-off-by: Daniel Vetter 
Link: 
https://patchwork.freedesktop.org/patch/msgid/1540792173-7288-1-git-send-email-shawn.c@intel.com
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/drm_edid.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 83d2f43b5a2f..c93dcfedc219 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -116,6 +116,9 @@ static const struct edid_quirk {
/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
{ "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
 
+   /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
+   { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
+
/* Belinea 10 15 55 */
{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
-- 
2.17.1

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[PATCH AUTOSEL 4.14 13/26] drm/edid: Add 6 bpc quirk for BOE panel.

2018-11-12 Thread Sasha Levin
From: "Lee, Shawn C" 

[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]

BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.

Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.

Cc: Jani Nikula 
Cc: Maarten Lankhorst 
Cc: Gustavo Padovan 
Cc: Cooper Chiou 
Signed-off-by: Lee, Shawn C >
Signed-off-by: Daniel Vetter 
Link: 
https://patchwork.freedesktop.org/patch/msgid/1540792173-7288-1-git-send-email-shawn.c@intel.com
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/drm_edid.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index d1191ebed072..ed01e3aae0e8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -120,6 +120,9 @@ static const struct edid_quirk {
/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
{ "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
 
+   /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
+   { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
+
/* Belinea 10 15 55 */
{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
-- 
2.17.1

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[PATCH AUTOSEL 4.18 19/39] drm/edid: Add 6 bpc quirk for BOE panel.

2018-11-12 Thread Sasha Levin
From: "Lee, Shawn C" 

[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]

BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.

Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.

Cc: Jani Nikula 
Cc: Maarten Lankhorst 
Cc: Gustavo Padovan 
Cc: Cooper Chiou 
Signed-off-by: Lee, Shawn C >
Signed-off-by: Daniel Vetter 
Link: 
https://patchwork.freedesktop.org/patch/msgid/1540792173-7288-1-git-send-email-shawn.c@intel.com
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/drm_edid.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index d74d9a8cde2a..e20bfbc50ade 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -122,6 +122,9 @@ static const struct edid_quirk {
/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
{ "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
 
+   /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
+   { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
+
/* Belinea 10 15 55 */
{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
-- 
2.17.1

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[PATCH AUTOSEL 4.19 21/44] drm/edid: Add 6 bpc quirk for BOE panel.

2018-11-12 Thread Sasha Levin
From: "Lee, Shawn C" 

[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]

BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.

Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.

Cc: Jani Nikula 
Cc: Maarten Lankhorst 
Cc: Gustavo Padovan 
Cc: Cooper Chiou 
Signed-off-by: Lee, Shawn C >
Signed-off-by: Daniel Vetter 
Link: 
https://patchwork.freedesktop.org/patch/msgid/1540792173-7288-1-git-send-email-shawn.c@intel.com
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/drm_edid.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ff0bfc65a8c1..b506e3622b08 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -122,6 +122,9 @@ static const struct edid_quirk {
/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
{ "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
 
+   /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
+   { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
+
/* Belinea 10 15 55 */
{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
-- 
2.17.1

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Re: [PATCH 12/12] drm/msm: dpu: Move crtc runtime resume to encoder

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

The crtc runtime resume doesn't actually operate on the crtc, but 
rather

its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be called while holding the modeset locks (although
it sometimes is), this presents a race condition.

Now that we have ->enabled on the virtual encoders, and a lock to
protect it, just call resume on each encoder and only restore the ones
that are enabled.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 24 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h|  6 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h |  4 ++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  6 +++---
 5 files changed, 15 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index d8f58caf2772..9be24907f8c1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -841,30 +841,6 @@ static struct drm_crtc_state
*dpu_crtc_duplicate_state(struct drm_crtc *crtc)
return >base;
 }

-void dpu_crtc_runtime_resume(struct drm_crtc *crtc)
-{
-   struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
-   struct drm_encoder *encoder;
-
-   mutex_lock(_crtc->crtc_lock);
-
-   if (!dpu_crtc->enabled)
-   goto end;
-
-   trace_dpu_crtc_runtime_resume(DRMID(crtc));
-
-   /* restore encoder; crtc will be programmed during commit */
-   drm_for_each_encoder(encoder, crtc->dev) {
-   if (encoder->crtc != crtc)
-   continue;
-
-   dpu_encoder_virt_restore(encoder);
-   }
I agree the patch provides a cleaner solution. Just for the 
understanding,

won't the race condition be addressed if we acquire the
modeset lock here and iterate through crtc->state->encoder_mask?

Thanks and Regards,
Jeykumar S.

-
-end:
-   mutex_unlock(_crtc->crtc_lock);
-}
-
 static void dpu_crtc_disable(struct drm_crtc *crtc)
 {
struct dpu_crtc *dpu_crtc;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 1dca91d1210f..93d21a61a040 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -329,10 +329,4 @@ static inline bool dpu_crtc_is_enabled(struct
drm_crtc *crtc)
return crtc ? crtc->enabled : false;
 }

-/**
- * dpu_crtc_runtime_resume - called by the top-level on 
pm_runtime_resume

- * @crtc: CRTC to resume
- */
-void dpu_crtc_runtime_resume(struct drm_crtc *crtc);
-
 #endif /* _DPU_CRTC_H_ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 3daa86220d47..d89ac520f7e6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1089,28 +1089,24 @@ static void 
_dpu_encoder_virt_enable_helper(struct

drm_encoder *drm_enc)
_dpu_encoder_update_vsync_source(dpu_enc, _enc->disp_info);
 }

-void dpu_encoder_virt_restore(struct drm_encoder *drm_enc)
+void dpu_encoder_virt_runtime_resume(struct drm_encoder *drm_enc)
 {
-   struct dpu_encoder_virt *dpu_enc = NULL;
-   int i;
-
-   if (!drm_enc) {
-   DPU_ERROR("invalid encoder\n");
-   return;
-   }
-   dpu_enc = to_dpu_encoder_virt(drm_enc);
+   struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);

-   for (i = 0; i < dpu_enc->num_phys_encs; i++) {
-   struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
+   mutex_lock(_enc->enc_lock);

-   if (phys && (phys != dpu_enc->cur_master) &&
phys->ops.restore)
-   phys->ops.restore(phys);
-   }
+   if (!dpu_enc->enabled)
+   goto out;

+   if (dpu_enc->cur_slave && dpu_enc->cur_slave->ops.restore)
+   dpu_enc->cur_slave->ops.restore(dpu_enc->cur_slave);
if (dpu_enc->cur_master && dpu_enc->cur_master->ops.restore)
dpu_enc->cur_master->ops.restore(dpu_enc->cur_master);

_dpu_encoder_virt_enable_helper(drm_enc);
+
+out:
+   mutex_unlock(_enc->enc_lock);
 }

 static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index 9dbf38f446d9..aa4f135218fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -126,10 +126,10 @@ int dpu_encoder_wait_for_event(struct drm_encoder
*drm_encoder,
 enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder
*encoder);

 /**
- * dpu_encoder_virt_restore - restore the encoder configs
+ * dpu_encoder_virt_runtime_resume - pm runtime resume the encoder
configs
  * 

Re: [PATCH 11/12] drm/msm: dpu: Add ->enabled to dpu_encoder_virt

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27 +
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 10a0676d1dcf..3daa86220d47 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -132,6 +132,7 @@ enum dpu_enc_rc_states {
  * @base:  drm_encoder base class for registration with DRM
  * @enc_spinlock:  Virtual-Encoder-Wide Spin Lock for IRQ purposes
  * @bus_scaling_client:Client handle to the bus scaling interface
+ * @enabled:   True if the encoder is active, protected by
enc_lock
  * @num_phys_encs: Actual number of physical encoders contained.
  * @phys_encs: Container of physical encoders managed.
  * @cur_master:Pointer to the current master in this
mode. Optimization
@@ -148,8 +149,8 @@ enum dpu_enc_rc_states {
  * all CTL paths
  * @crtc_kickoff_cb_data:  Opaque user data given to crtc_kickoff_cb
  * @debugfs_root:  Debug file system root file node
- * @enc_lock:  Lock around physical encoder
create/destroy and
-   access.
+ * @enc_lock:  Lock around physical encoder
+ * create/destroy/enable/disable
  * @frame_busy_mask:   Bitmask tracking which phys_enc we are
still
  * busy processing current command.
  * Bit0 = phys_encs[0] etc.
@@ -175,6 +176,8 @@ struct dpu_encoder_virt {
spinlock_t enc_spinlock;
uint32_t bus_scaling_client;

+   bool enabled;
+
unsigned int num_phys_encs;
struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
struct dpu_encoder_phys *cur_master;
@@ -1121,6 +1124,8 @@ static void dpu_encoder_virt_enable(struct
drm_encoder *drm_enc)
return;
}
dpu_enc = to_dpu_encoder_virt(drm_enc);
+
+   mutex_lock(_enc->enc_lock);
cur_mode = _enc->base.crtc->state->adjusted_mode;

trace_dpu_enc_enable(DRMID(drm_enc), cur_mode->hdisplay,
@@ -1137,10 +1142,15 @@ static void dpu_encoder_virt_enable(struct
drm_encoder *drm_enc)
if (ret) {
DPU_ERROR_ENC(dpu_enc, "dpu resource control failed:
%d\n",
ret);
-   return;
+   goto out;
}

_dpu_encoder_virt_enable_helper(drm_enc);
+
+   dpu_enc->enabled = true;
+
+out:
+   mutex_unlock(_enc->enc_lock);
 }

 static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
@@ -1162,11 +1172,14 @@ static void dpu_encoder_virt_disable(struct
drm_encoder *drm_enc)
return;
}

-   mode = _enc->crtc->state->adjusted_mode;
-
dpu_enc = to_dpu_encoder_virt(drm_enc);
DPU_DEBUG_ENC(dpu_enc, "\n");

+   mutex_lock(_enc->enc_lock);

Where do you expect it to go wrong if enable/disable
is not protected using enc_lock?

Thanks and Regards,
Jeykumar S.

+   dpu_enc->enabled = false;
+
+   mode = _enc->crtc->state->adjusted_mode;
+
priv = drm_enc->dev->dev_private;
dpu_kms = to_dpu_kms(priv->kms);

@@ -1200,6 +1213,8 @@ static void dpu_encoder_virt_disable(struct
drm_encoder *drm_enc)
DPU_DEBUG_ENC(dpu_enc, "encoder disabled\n");

dpu_rm_release(_kms->rm, drm_enc);
+
+   mutex_unlock(_enc->enc_lock);
 }

 static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg 
*catalog,

@@ -2233,6 +2248,8 @@ struct drm_encoder *dpu_encoder_init(struct
drm_device *dev,

drm_encoder_helper_add(_enc->base, _encoder_helper_funcs);

+   dpu_enc->enabled = false;
+
return _enc->base;
 }


--
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Re: [PATCH 10/12] drm/msm: dpu: Fix typo in dpu_encoder

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

enc_spinlock instead of enc_spin_lock.

Signed-off-by: Sean Paul 
---


Reviewed-by: Jeykumar Sankaran 


 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 82c55efb500f..10a0676d1dcf 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -130,7 +130,7 @@ enum dpu_enc_rc_states {
  * Virtual encoder defers as much as possible to the physical
encoders.
  * Virtual encoder registers itself with the DRM Framework as the
encoder.
  * @base:  drm_encoder base class for registration with DRM
- * @enc_spin_lock: Virtual-Encoder-Wide Spin Lock for IRQ purposes
+ * @enc_spinlock:  Virtual-Encoder-Wide Spin Lock for IRQ purposes
  * @bus_scaling_client:Client handle to the bus scaling interface
  * @num_phys_encs: Actual number of physical encoders contained.
  * @phys_encs: Container of physical encoders managed.


--
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Re: [PATCH 04/12] drm/msm: dpu: Don't use power_event for vbif_init_memtypes

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 17:06, Jeykumar Sankaran wrote:

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h |  1 -
 2 files changed, 3 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 23094d108e81..ae2bbaae923d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -651,10 +651,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms
*dpu_kms)
dpu_hw_intr_destroy(dpu_kms->hw_intr);
dpu_kms->hw_intr = NULL;

-   if (dpu_kms->power_event)
-   dpu_power_handle_unregister_event(
-   _kms->phandle, dpu_kms->power_event);
-
/* safe to call these more than once during shutdown */
_dpu_debugfs_destroy(dpu_kms);
_dpu_kms_mmu_destroy(dpu_kms);
@@ -832,16 +828,6 @@ u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms,
char *clock_name)
return clk_get_rate(clk->clk);
 }

-static void dpu_kms_handle_power_event(u32 event_type, void *usr)
-{
-   struct dpu_kms *dpu_kms = usr;
-
-   if (!dpu_kms)
-   return;
-
-   dpu_vbif_init_memtypes(dpu_kms);
-}
-
 static int dpu_kms_hw_init(struct msm_kms *kms)
 {
struct dpu_kms *dpu_kms;
@@ -1015,10 +1001,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
/*
 * Handle (re)initializations during power enable
 */
-   dpu_kms_handle_power_event(DPU_POWER_EVENT_ENABLE, dpu_kms);
-   dpu_kms->power_event = dpu_power_handle_register_event(
-   _kms->phandle, DPU_POWER_EVENT_ENABLE,
-   dpu_kms_handle_power_event, dpu_kms, "kms");
+   dpu_vbif_init_memtypes(dpu_kms);

pm_runtime_put_sync(_kms->pdev->dev);

@@ -1172,6 +1155,8 @@ static int __maybe_unused 
dpu_runtime_resume(struct

device *dev)
return rc;
}

+   dpu_vbif_init_memtypes(dpu_kms);
+
rc = dpu_power_resource_enable(_kms->phandle, true);
if (rc)
DPU_ERROR("resource enable failed: %d\n", rc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index f2c78deb0854..5f08be187c86 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -114,7 +114,6 @@ struct dpu_kms {
struct dpu_mdss_cfg *catalog;

struct dpu_power_handle phandle;


You can get rid of the handle and header inclusions here itself
to clean up KMS from power_handle stuff!


nvm. I see you are taking care of this in patch 9/12.



-   struct dpu_power_event *power_event;

/* directory entry for debugfs */
struct dentry *debugfs_root;


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Re: [PATCH 09/12] drm/msm: dpu: Remove dpu_power_handle

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

Now that we don't have any event handlers, remove dpu_power_handle!

Signed-off-by: Sean Paul 


Reviewed-by: Jeykumar Sankaran 


---
 drivers/gpu/drm/msm/Makefile  |   1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   |  11 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h   |   3 -
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c  | 136 --
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 113 ---
 5 files changed, 264 deletions(-)
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h

diff --git a/drivers/gpu/drm/msm/Makefile 
b/drivers/gpu/drm/msm/Makefile

index 19ab521d4c3a..7d02ef3655b5 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -72,7 +72,6 @@ msm-y := \
disp/dpu1/dpu_kms.o \
disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
-   disp/dpu1/dpu_power_handle.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
msm_atomic.o \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index bae7e86b2913..e42685a1d928 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1063,8 +1063,6 @@ static int dpu_bind(struct device *dev, struct
device *master, void *data)
return ret;
}

-   dpu_power_resource_init(pdev, _kms->phandle);
-
platform_set_drvdata(pdev, dpu_kms);

msm_kms_init(_kms->base, _funcs);
@@ -1084,7 +1082,6 @@ static void dpu_unbind(struct device *dev, struct
device *master, void *data)
struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
struct dss_module_power *mp = _kms->mp;

-   dpu_power_resource_deinit(pdev, _kms->phandle);
msm_dss_put_clk(mp->clk_config, mp->num_clk);
devm_kfree(>dev, mp->clk_config);
mp->num_clk = 0;
@@ -1123,10 +1120,6 @@ static int __maybe_unused
dpu_runtime_suspend(struct device *dev)
return rc;
}

-   rc = dpu_power_resource_enable(_kms->phandle, false);
-   if (rc)
-   DPU_ERROR("resource disable failed: %d\n", rc);
-
rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, false);
if (rc)
DPU_ERROR("clock disable failed rc:%d\n", rc);
@@ -1160,10 +1153,6 @@ static int __maybe_unused 
dpu_runtime_resume(struct

device *dev)
drm_for_each_crtc(crtc, ddev)
dpu_crtc_runtime_resume(crtc);

-   rc = dpu_power_resource_enable(_kms->phandle, true);
-   if (rc)
-   DPU_ERROR("resource enable failed: %d\n", rc);
-
return rc;
 }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 4e5acacb3065..59e18e2d3c59 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -31,7 +31,6 @@
 #include "dpu_hw_top.h"
 #include "dpu_io_util.h"
 #include "dpu_rm.h"
-#include "dpu_power_handle.h"
 #include "dpu_irq.h"
 #include "dpu_core_perf.h"

@@ -114,8 +113,6 @@ struct dpu_kms {
int core_rev;
struct dpu_mdss_cfg *catalog;

-   struct dpu_power_handle phandle;
-
/* directory entry for debugfs */
struct dentry *debugfs_root;
struct dentry *debugfs_danger;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
deleted file mode 100644
index 8e64f0a52147..
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or 
modify

- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#define pr_fmt(fmt)"[drm:%s:%d]: " fmt, __func__, __LINE__
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "dpu_power_handle.h"
-#include "dpu_trace.h"
-
-static void dpu_power_event_trigger_locked(struct dpu_power_handle
*phandle,
-   u32 event_type)
-{
-   struct dpu_power_event *event;
-
-   list_for_each_entry(event, >event_list, list) {
-   if (event->event_type & event_type)
-   event->cb_fnc(event_type, event->usr);
-   }
-}
-
-void dpu_power_resource_init(struct platform_device *pdev,
-   struct dpu_power_handle *phandle)
-{
-   phandle->dev = >dev;
-
-   INIT_LIST_HEAD(>event_list);
-
-   mutex_init(>phandle_lock);
-}
-
-void 

Re: [PATCH 08/12] drm/msm: dpu: Move DPU_POWER_HANDLE_DBUS_ID to core_perf

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

It's only used in core_perf, so stick it there (and change the name to
reflect that).

Signed-off-by: Sean Paul 
---


Reviewed-by: Jeykumar Sankaran 


 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 34 +--
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 17 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  |  4 +--
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 13 ---
 4 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index ef6dd43f8bec..bffc51e496e7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -95,20 +95,20 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms
*kms,
memset(perf, 0, sizeof(struct dpu_core_perf_params));

if (!dpu_cstate->bw_control) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
perf->bw_ctl[i] = kms->catalog->perf.max_bw_high *
1000ULL;
perf->max_per_pipe_ib[i] = perf->bw_ctl[i];
}
perf->core_clk_rate = kms->perf.max_core_clk_rate;
} else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
perf->bw_ctl[i] = 0;
perf->max_per_pipe_ib[i] = 0;
}
perf->core_clk_rate = 0;
} else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
perf->bw_ctl[i] = kms->perf.fix_core_ab_vote;
perf->max_per_pipe_ib[i] =
kms->perf.fix_core_ib_vote;
}
@@ -118,12 +118,12 @@ static void _dpu_core_perf_calc_crtc(struct 
dpu_kms

*kms,
DPU_DEBUG(
"crtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu
llcc_ib=%llu llcc_ab=%llu mem_ib=%llu mem_ab=%llu\n",
crtc->base.id, perf->core_clk_rate,
-
perf->max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_MNOC],
-   perf->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_MNOC],
-
perf->max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_LLCC],
-   perf->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_LLCC],
-
perf->max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_EBI],
-   perf->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_EBI]);
+
perf->max_per_pipe_ib[DPU_CORE_PERF_DATA_BUS_ID_MNOC],
+   perf->bw_ctl[DPU_CORE_PERF_DATA_BUS_ID_MNOC],
+
perf->max_per_pipe_ib[DPU_CORE_PERF_DATA_BUS_ID_LLCC],
+   perf->bw_ctl[DPU_CORE_PERF_DATA_BUS_ID_LLCC],
+
perf->max_per_pipe_ib[DPU_CORE_PERF_DATA_BUS_ID_EBI],
+   perf->bw_ctl[DPU_CORE_PERF_DATA_BUS_ID_EBI]);
 }

 int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
@@ -158,8 +158,8 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
/* obtain new values */
_dpu_core_perf_calc_crtc(kms, crtc, state, _cstate->new_perf);

-   for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC;
-   i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = DPU_CORE_PERF_DATA_BUS_ID_MNOC;
+   i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
bw_sum_of_intfs = dpu_cstate->new_perf.bw_ctl[i];
curr_client_type = dpu_crtc_get_client_type(crtc);

@@ -290,7 +290,7 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc
*crtc)
if (kms->perf.enable_bw_release) {
trace_dpu_cmd_release_bw(crtc->base.id);
DPU_DEBUG("Release BW crtc=%d\n", crtc->base.id);
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
dpu_crtc->cur_perf.bw_ctl[i] = 0;
_dpu_core_perf_crtc_update_bus(kms, crtc, i);
}
@@ -367,7 +367,7 @@ int dpu_core_perf_crtc_update(struct drm_crtc 
*crtc,

new = _cstate->new_perf;

if (_dpu_core_perf_crtc_is_power_on(crtc) && !stop_req) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
/*
 * cases for bus bandwidth update.
 * 1. new bandwidth vote - "ab or ib vote" is
higher
@@ -409,13 +409,13 @@ int dpu_core_perf_crtc_update(struct drm_crtc 
*crtc,

update_clk = 1;
}
trace_dpu_perf_crtc_update(crtc->base.id,
-
new->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_MNOC],
-

Re: [PATCH 07/12] drm/msm: dpu: Include dpu_io_util.h directly in dpu_kms.h

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h

Signed-off-by: Sean Paul 
---


Reviewed-by: Jeykumar Sankaran 


 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 5f08be187c86..4e5acacb3065 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -29,6 +29,7 @@
 #include "dpu_hw_lm.h"
 #include "dpu_hw_interrupts.h"
 #include "dpu_hw_top.h"
+#include "dpu_io_util.h"
 #include "dpu_rm.h"
 #include "dpu_power_handle.h"
 #include "dpu_irq.h"


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Re: [PATCH 06/12] drm/msm: dpu: Remove power_handle from core_perf

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

It's unused

Signed-off-by: Sean Paul 
---


Reviewed-by: Jeykumar Sankaran 


 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 ---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 5 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   | 1 -
 3 files changed, 9 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 22e84b3d7f98..ef6dd43f8bec 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -605,7 +605,6 @@ void dpu_core_perf_destroy(struct dpu_core_perf 
*perf)

dpu_core_perf_debugfs_destroy(perf);
perf->max_core_clk_rate = 0;
perf->core_clk = NULL;
-   perf->phandle = NULL;
perf->catalog = NULL;
perf->dev = NULL;
 }
@@ -613,12 +612,10 @@ void dpu_core_perf_destroy(struct dpu_core_perf
*perf)
 int dpu_core_perf_init(struct dpu_core_perf *perf,
struct drm_device *dev,
struct dpu_mdss_cfg *catalog,
-   struct dpu_power_handle *phandle,
struct dss_clk *core_clk)
 {
perf->dev = dev;
perf->catalog = catalog;
-   perf->phandle = phandle;
perf->core_clk = core_clk;

perf->max_core_clk_rate = core_clk->max_rate;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
index fbcbe0c7527a..68b84d85eb8f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
@@ -19,7 +19,6 @@
 #include 

 #include "dpu_hw_catalog.h"
-#include "dpu_power_handle.h"

 #defineDPU_PERF_DEFAULT_MAX_CORE_CLK_RATE  41250

@@ -52,7 +51,6 @@ struct dpu_core_perf_tune {
  * @dev: Pointer to drm device
  * @debugfs_root: top level debug folder
  * @catalog: Pointer to catalog configuration
- * @phandle: Pointer to power handler
  * @core_clk: Pointer to core clock structure
  * @core_clk_rate: current core clock rate
  * @max_core_clk_rate: maximum allowable core clock rate
@@ -66,7 +64,6 @@ struct dpu_core_perf {
struct drm_device *dev;
struct dentry *debugfs_root;
struct dpu_mdss_cfg *catalog;
-   struct dpu_power_handle *phandle;
struct dss_clk *core_clk;
u64 core_clk_rate;
u64 max_core_clk_rate;
@@ -113,13 +110,11 @@ void dpu_core_perf_destroy(struct dpu_core_perf
*perf);
  * @perf: Pointer to core performance context
  * @dev: Pointer to drm device
  * @catalog: Pointer to catalog
- * @phandle: Pointer to power handle
  * @core_clk: pointer to core clock
  */
 int dpu_core_perf_init(struct dpu_core_perf *perf,
struct drm_device *dev,
struct dpu_mdss_cfg *catalog,
-   struct dpu_power_handle *phandle,
struct dss_clk *core_clk);

 /**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 62a02c606811..bae7e86b2913 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -957,7 +957,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
}

rc = dpu_core_perf_init(_kms->perf, dev, dpu_kms->catalog,
-   _kms->phandle,
_dpu_kms_get_clk(dpu_kms, "core"));
if (rc) {
DPU_ERROR("failed to init perf %d\n", rc);


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Re: [PATCH 05/12] drm/msm: dpu: Handle crtc pm_runtime_resume() directly

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 23 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h  | 10 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   |  4 
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h |  8 
 4 files changed, 20 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e09209d6c469..c55cb751e2b4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -33,7 +33,6 @@
 #include "dpu_plane.h"
 #include "dpu_encoder.h"
 #include "dpu_vbif.h"
-#include "dpu_power_handle.h"
 #include "dpu_core_perf.h"
 #include "dpu_trace.h"

@@ -69,8 +68,6 @@ static void dpu_crtc_destroy(struct drm_crtc *crtc)
if (!crtc)
return;

-   dpu_crtc->phandle = NULL;
-
drm_crtc_cleanup(crtc);
mutex_destroy(_crtc->crtc_lock);
kfree(dpu_crtc);
@@ -844,15 +841,17 @@ static struct drm_crtc_state
*dpu_crtc_duplicate_state(struct drm_crtc *crtc)
return >base;
 }

-static void dpu_crtc_handle_power_event(u32 event_type, void *arg)
+void dpu_crtc_runtime_resume(struct drm_crtc *crtc)
 {
-   struct drm_crtc *crtc = arg;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
struct drm_encoder *encoder;

mutex_lock(_crtc->crtc_lock);

-   trace_dpu_crtc_handle_power_event(DRMID(crtc), event_type);
+   if (!dpu_crtc->enabled)
+   goto end;
+
+   trace_dpu_crtc_runtime_resume(DRMID(crtc));

/* restore encoder; crtc will be programmed during commit */
drm_for_each_encoder(encoder, crtc->dev) {
@@ -862,6 +861,7 @@ static void dpu_crtc_handle_power_event(u32
event_type, void *arg)
dpu_encoder_virt_restore(encoder);
}

+end:
mutex_unlock(_crtc->crtc_lock);
 }

@@ -917,10 +917,6 @@ static void dpu_crtc_disable(struct drm_crtc 
*crtc)

dpu_encoder_register_frame_event_callback(encoder, NULL,
NULL);
}

-   if (dpu_crtc->power_event)
-   dpu_power_handle_unregister_event(dpu_crtc->phandle,
-   dpu_crtc->power_event);
-
memset(cstate->mixers, 0, sizeof(cstate->mixers));
cstate->num_mixers = 0;

@@ -972,11 +968,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,

/* Enable/restore vblank irq handling */
drm_crtc_vblank_on(crtc);
-
-   dpu_crtc->power_event = dpu_power_handle_register_event(
-   dpu_crtc->phandle, DPU_POWER_EVENT_ENABLE,
-   dpu_crtc_handle_power_event, crtc, dpu_crtc->name);
-
 }

 struct plane_state {
@@ -1522,8 +1513,6 @@ struct drm_crtc *dpu_crtc_init(struct drm_device
*dev, struct drm_plane *plane,
/* initialize event handling */
spin_lock_init(_crtc->event_lock);

If this is for synchronizing power events, we can get rid of this too.

Thanks,
Jeykumar S.


-   dpu_crtc->phandle = >phandle;
-
DPU_DEBUG("%s: successfully initialized crtc\n", dpu_crtc->name);
return crtc;
 }
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 4822602402f9..1dca91d1210f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -151,7 +151,6 @@ struct dpu_crtc_frame_event {
  * @event_worker  : Event worker queue
  * @event_lock: Spinlock around event handling code
  * @phandle: Pointer to power handler
- * @power_event   : registered power event handle
  * @cur_perf  : current performance committed to clock/bandwidth
driver
  */
 struct dpu_crtc {
@@ -187,9 +186,6 @@ struct dpu_crtc {
/* for handling internal event thread */
spinlock_t event_lock;

-   struct dpu_power_handle *phandle;
-   struct dpu_power_event *power_event;
-
struct dpu_core_perf_params cur_perf;

struct dpu_crtc_smmu_state_data smmu_state;
@@ -333,4 +329,10 @@ static inline bool dpu_crtc_is_enabled(struct
drm_crtc *crtc)
return crtc ? crtc->enabled : false;
 }

+/**
+ * dpu_crtc_runtime_resume - called by the top-level on 
pm_runtime_resume

+ * @crtc: CRTC to resume
+ */
+void dpu_crtc_runtime_resume(struct drm_crtc *crtc);
+
 #endif /* _DPU_CRTC_H_ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index ae2bbaae923d..62a02c606811 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1140,6 +1140,7 @@ static int __maybe_unused 
dpu_runtime_resume(struct

device *dev)
int rc = -1;
struct platform_device *pdev = to_platform_device(dev);
struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+   struct drm_crtc *crtc;

Re: [PATCH 04/12] drm/msm: dpu: Don't use power_event for vbif_init_memtypes

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h |  1 -
 2 files changed, 3 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 23094d108e81..ae2bbaae923d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -651,10 +651,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms
*dpu_kms)
dpu_hw_intr_destroy(dpu_kms->hw_intr);
dpu_kms->hw_intr = NULL;

-   if (dpu_kms->power_event)
-   dpu_power_handle_unregister_event(
-   _kms->phandle, dpu_kms->power_event);
-
/* safe to call these more than once during shutdown */
_dpu_debugfs_destroy(dpu_kms);
_dpu_kms_mmu_destroy(dpu_kms);
@@ -832,16 +828,6 @@ u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms,
char *clock_name)
return clk_get_rate(clk->clk);
 }

-static void dpu_kms_handle_power_event(u32 event_type, void *usr)
-{
-   struct dpu_kms *dpu_kms = usr;
-
-   if (!dpu_kms)
-   return;
-
-   dpu_vbif_init_memtypes(dpu_kms);
-}
-
 static int dpu_kms_hw_init(struct msm_kms *kms)
 {
struct dpu_kms *dpu_kms;
@@ -1015,10 +1001,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
/*
 * Handle (re)initializations during power enable
 */
-   dpu_kms_handle_power_event(DPU_POWER_EVENT_ENABLE, dpu_kms);
-   dpu_kms->power_event = dpu_power_handle_register_event(
-   _kms->phandle, DPU_POWER_EVENT_ENABLE,
-   dpu_kms_handle_power_event, dpu_kms, "kms");
+   dpu_vbif_init_memtypes(dpu_kms);

pm_runtime_put_sync(_kms->pdev->dev);

@@ -1172,6 +1155,8 @@ static int __maybe_unused 
dpu_runtime_resume(struct

device *dev)
return rc;
}

+   dpu_vbif_init_memtypes(dpu_kms);
+
rc = dpu_power_resource_enable(_kms->phandle, true);
if (rc)
DPU_ERROR("resource enable failed: %d\n", rc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index f2c78deb0854..5f08be187c86 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -114,7 +114,6 @@ struct dpu_kms {
struct dpu_mdss_cfg *catalog;

struct dpu_power_handle phandle;


You can get rid of the handle and header inclusions here itself
to clean up KMS from power_handle stuff!


-   struct dpu_power_event *power_event;

/* directory entry for debugfs */
struct dentry *debugfs_root;


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Re: [PATCH 04/12] drm/msm: dpu: Don't use power_event for vbif_init_memtypes

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h |  1 -
 2 files changed, 3 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 23094d108e81..ae2bbaae923d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -651,10 +651,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms
*dpu_kms)
dpu_hw_intr_destroy(dpu_kms->hw_intr);
dpu_kms->hw_intr = NULL;

-   if (dpu_kms->power_event)
-   dpu_power_handle_unregister_event(
-   _kms->phandle, dpu_kms->power_event);
-
/* safe to call these more than once during shutdown */
_dpu_debugfs_destroy(dpu_kms);
_dpu_kms_mmu_destroy(dpu_kms);
@@ -832,16 +828,6 @@ u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms,
char *clock_name)
return clk_get_rate(clk->clk);
 }

-static void dpu_kms_handle_power_event(u32 event_type, void *usr)
-{
-   struct dpu_kms *dpu_kms = usr;
-
-   if (!dpu_kms)
-   return;
-
-   dpu_vbif_init_memtypes(dpu_kms);
-}
-
 static int dpu_kms_hw_init(struct msm_kms *kms)
 {
struct dpu_kms *dpu_kms;
@@ -1015,10 +1001,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
/*
 * Handle (re)initializations during power enable
 */


Is this comment valid anymore?


-   dpu_kms_handle_power_event(DPU_POWER_EVENT_ENABLE, dpu_kms);
-   dpu_kms->power_event = dpu_power_handle_register_event(
-   _kms->phandle, DPU_POWER_EVENT_ENABLE,
-   dpu_kms_handle_power_event, dpu_kms, "kms");
+   dpu_vbif_init_memtypes(dpu_kms);

pm_runtime_put_sync(_kms->pdev->dev);

@@ -1172,6 +1155,8 @@ static int __maybe_unused 
dpu_runtime_resume(struct

device *dev)
return rc;
}

+   dpu_vbif_init_memtypes(dpu_kms);
+
rc = dpu_power_resource_enable(_kms->phandle, true);
if (rc)
DPU_ERROR("resource enable failed: %d\n", rc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index f2c78deb0854..5f08be187c86 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -114,7 +114,6 @@ struct dpu_kms {
struct dpu_mdss_cfg *catalog;

struct dpu_power_handle phandle;
-   struct dpu_power_event *power_event;

/* directory entry for debugfs */
struct dentry *debugfs_root;


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Re: [PATCH 03/12] drm/msm: dpu: Remove dpu_power_client

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

There's only one client -- core, and it's only used for runtime pm 
which

is already refcounted.

Signed-off-by: Sean Paul 


Reviewed-by: Jeykumar Sankaran 


---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   | 22 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h   |  1 -
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c  | 96 +--
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 86 +
 4 files changed, 6 insertions(+), 199 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 985c855796ae..23094d108e81 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -676,11 +676,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms
*dpu_kms)
dpu_hw_catalog_deinit(dpu_kms->catalog);
dpu_kms->catalog = NULL;

-   if (dpu_kms->core_client)
-   dpu_power_client_destroy(_kms->phandle,
-   dpu_kms->core_client);
-   dpu_kms->core_client = NULL;
-
if (dpu_kms->vbif[VBIF_NRT])
devm_iounmap(_kms->pdev->dev,
dpu_kms->vbif[VBIF_NRT]);
dpu_kms->vbif[VBIF_NRT] = NULL;
@@ -913,17 +908,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
dpu_kms->reg_dma_len = dpu_iomap_size(dpu_kms->pdev,
"regdma");
}

-   dpu_kms->core_client = dpu_power_client_create(_kms->phandle,
-   "core");
-   if (IS_ERR_OR_NULL(dpu_kms->core_client)) {
-   rc = PTR_ERR(dpu_kms->core_client);
-   if (!dpu_kms->core_client)
-   rc = -EINVAL;
-   DPU_ERROR("dpu power client create failed: %d\n", rc);
-   dpu_kms->core_client = NULL;
-   goto error;
-   }
-
pm_runtime_get_sync(_kms->pdev->dev);

_dpu_kms_core_hw_rev_init(dpu_kms);
@@ -1157,8 +1141,7 @@ static int __maybe_unused 
dpu_runtime_suspend(struct

device *dev)
return rc;
}

-   rc = dpu_power_resource_enable(_kms->phandle,
-   dpu_kms->core_client, false);
+   rc = dpu_power_resource_enable(_kms->phandle, false);
if (rc)
DPU_ERROR("resource disable failed: %d\n", rc);

@@ -1189,8 +1172,7 @@ static int __maybe_unused 
dpu_runtime_resume(struct

device *dev)
return rc;
}

-   rc = dpu_power_resource_enable(_kms->phandle,
-   dpu_kms->core_client, true);
+   rc = dpu_power_resource_enable(_kms->phandle, true);
if (rc)
DPU_ERROR("resource enable failed: %d\n", rc);

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 2a3625eef6d3..f2c78deb0854 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -114,7 +114,6 @@ struct dpu_kms {
struct dpu_mdss_cfg *catalog;

struct dpu_power_handle phandle;
-   struct dpu_power_client *core_client;
struct dpu_power_event *power_event;

/* directory entry for debugfs */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
index 8c6f92aaaf87..8e64f0a52147 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
@@ -35,59 +35,11 @@ static void dpu_power_event_trigger_locked(struct
dpu_power_handle *phandle,
}
 }

-struct dpu_power_client *dpu_power_client_create(
-   struct dpu_power_handle *phandle, char *client_name)
-{
-   struct dpu_power_client *client;
-   static u32 id;
-
-   if (!client_name || !phandle) {
-   pr_err("client name is null or invalid power data\n");
-   return ERR_PTR(-EINVAL);
-   }
-
-   client = kzalloc(sizeof(struct dpu_power_client), GFP_KERNEL);
-   if (!client)
-   return ERR_PTR(-ENOMEM);
-
-   mutex_lock(>phandle_lock);
-   strlcpy(client->name, client_name, MAX_CLIENT_NAME_LEN);
-   client->usecase_ndx = VOTE_INDEX_DISABLE;
-   client->id = id;
-   client->active = true;
-   pr_debug("client %s created:%pK id :%d\n", client_name,
-   client, id);
-   id++;
-   list_add(>list, >power_client_clist);
-   mutex_unlock(>phandle_lock);
-
-   return client;
-}
-
-void dpu_power_client_destroy(struct dpu_power_handle *phandle,
-   struct dpu_power_client *client)
-{
-   if (!client  || !phandle) {
-   pr_err("reg bus vote: invalid client handle\n");
-   } else if (!client->active) {
-   pr_err("dpu power deinit already done\n");
-   kfree(client);
-   } else {
-   pr_debug("bus vote client %s destroyed:%pK id:%u\n",
-   client->name, client, client->id);
-   

Re: [PATCH 02/12] drm/msm: dpu: Remove unused trace_dpu_perf_update_bus()

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

Signed-off-by: Sean Paul 
---


Reviewed-by: Jeykumar Sankaran 


 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 -
 1 file changed, 21 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 0c122e173892..7ab0ba8224f6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -99,27 +99,6 @@ TRACE_EVENT(dpu_perf_set_ot,
__entry->vbif_idx)
 )

-TRACE_EVENT(dpu_perf_update_bus,
-   TP_PROTO(int client, unsigned long long ab_quota,
-   unsigned long long ib_quota),
-   TP_ARGS(client, ab_quota, ib_quota),
-   TP_STRUCT__entry(
-   __field(int, client)
-   __field(u64, ab_quota)
-   __field(u64, ib_quota)
-   ),
-   TP_fast_assign(
-   __entry->client = client;
-   __entry->ab_quota = ab_quota;
-   __entry->ib_quota = ib_quota;
-   ),
-   TP_printk("Request client:%d ab=%llu ib=%llu",
-   __entry->client,
-   __entry->ab_quota,
-   __entry->ib_quota)
-)
-
-
 TRACE_EVENT(dpu_cmd_release_bw,
TP_PROTO(u32 crtc_id),
TP_ARGS(crtc_id),


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Re: [PATCH 01/12] drm/msm: dpu: Remove dpu_power_handle_get_dbus_name()

2018-11-12 Thread Jeykumar Sankaran

On 2018-11-12 11:42, Sean Paul wrote:

From: Sean Paul 

It's only used for debugfs, so just output the enum value instead.

Signed-off-by: Sean Paul 
---


Reviewed-by: Jeykumar Sankaran 


 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c |  6 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 14 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h |  7 ---
 3 files changed, 2 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index ed84cf44a222..e09209d6c469 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1381,11 +1381,9 @@ static int dpu_crtc_debugfs_state_show(struct
seq_file *s, void *v)
dpu_crtc->cur_perf.core_clk_rate);
for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC;
i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
-   seq_printf(s, "bw_ctl[%s]: %llu\n",
-   dpu_power_handle_get_dbus_name(i),
+   seq_printf(s, "bw_ctl[%d]: %llu\n", i,
dpu_crtc->cur_perf.bw_ctl[i]);
-   seq_printf(s, "max_per_pipe_ib[%s]: %llu\n",
-   dpu_power_handle_get_dbus_name(i),
+   seq_printf(s, "max_per_pipe_ib[%d]: %llu\n", i,
dpu_crtc->cur_perf.max_per_pipe_ib[i]);
}

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
index fc14116789f2..8c6f92aaaf87 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
@@ -24,20 +24,6 @@
 #include "dpu_power_handle.h"
 #include "dpu_trace.h"

-static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = {
-   [DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus",
-   [DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus",
-   [DPU_POWER_HANDLE_DBUS_ID_EBI] = "qcom,dpu-ebi-bus",
-};
-
-const char *dpu_power_handle_get_dbus_name(u32 bus_id)
-{
-   if (bus_id < DPU_POWER_HANDLE_DBUS_ID_MAX)
-   return data_bus_name[bus_id];
-
-   return NULL;
-}
-
 static void dpu_power_event_trigger_locked(struct dpu_power_handle
*phandle,
u32 event_type)
 {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
index a65b7a297f21..f627ae28ec68 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
@@ -207,11 +207,4 @@ struct dpu_power_event
*dpu_power_handle_register_event(
 void dpu_power_handle_unregister_event(struct dpu_power_handle 
*phandle,

struct dpu_power_event *event);

-/**
- * dpu_power_handle_get_dbus_name - get name of given data bus 
identifier

- * @bus_id:data bus identifier
- * Return: Pointer to name string if success; NULL otherwise
- */
-const char *dpu_power_handle_get_dbus_name(u32 bus_id);
-
 #endif /* _DPU_POWER_HANDLE_H_ */


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Re: [PATCH 1/3] dt-bindings: backlight: fix vendor prefix for ArcticSand arcxcnn driver bindings

2018-11-12 Thread Rob Herring
On Wed, Nov 07, 2018 at 07:10:38AM -0500, Brian Dodge wrote:
> The vendor-prefixes.txt file properly refers to ArcticSand
> as arctic but the driver bindings improperly abbreviated the
> prefix to arc. This was a mistake in the original patch
> 

Are there any users and are they okay with this changing?

> Signed-off-by: Brian Dodge 
> ---
>  .../bindings/leds/backlight/arcxcnn_bl.txt   | 20 
> ++--
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt 
> b/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt
> index 230abde..dcaa239 100644
> --- a/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt
> +++ b/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt
> @@ -1,8 +1,8 @@
> -Binding for ArcticSand arc2c0608 LED driver
> +Binding for ArcticSand arc family LED drivers
> 
>  Required properties:
> -- compatible:should be "arc,arc2c0608"
> -- reg:   slave address
> +- compatible:"arctic,arc1c0608", "arctic,arc2c0608", 
> "arctic,arc3c0845"

Format one per line please.

> +- reg:   slave address
> 
>  Optional properties:
>  - default-brightness:brightness value on boot, value from: 0-4095
> @@ -11,19 +11,19 @@ Optional properties:
>  - led-sources:   List of enabled channels from 0 to 5.
>   See Documentation/devicetree/bindings/leds/common.txt
> 
> -- arc,led-config-0:  setting for register ILED_CONFIG_0
> -- arc,led-config-1:  setting for register ILED_CONFIG_1
> -- arc,dim-freq:  PWM mode frequence setting (bits [3:0] used)
> -- arc,comp-config:   setting for register CONFIG_COMP
> -- arc,filter-config: setting for register FILTER_CONFIG
> -- arc,trim-config:   setting for register IMAXTUNE
> +- arctic,led-config-0:   setting for register ILED_CONFIG_0
> +- arctic,led-config-1:   setting for register ILED_CONFIG_1
> +- arctic,dim-freq:   PWM mode frequence setting (bits [3:0] used)
> +- arctic,comp-config:setting for register CONFIG_COMP
> +- arctic,filter-config:  setting for register FILTER_CONFIG
> +- arctic,trim-config:setting for register IMAXTUNE
> 
>  Note: Optional properties not specified will default to values in IC EPROM
> 
>  Example:
> 
>  arc2c0608@30 {
> - compatible = "arc,arc2c0608";
> + compatible = "arctic,arc2c0608";
>   reg = <0x30>;
>   default-brightness = <500>;
>   label = "lcd-backlight";
> --
> 2.7.4
> 

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Re: [PATCH v3 4/8] dt-bindings: Add vendor prefix for LeMaker

2018-11-12 Thread Rob Herring
On Wed,  7 Nov 2018 19:18:39 +0100, Paul Kocialkowski wrote:
> This introduces a new device-tree binding vendor prefix for Shenzhen
> LeMaker Technology Co., Ltd.
> 
> This vendor was already in use but it was not documented until now.
> 
> Signed-off-by: Paul Kocialkowski 
> Reviewed-by: Rob Hering 
> ---
>  Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Rob Herring 

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Re: [PATCH 08/10] dt-bindings: panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel

2018-11-12 Thread Rob Herring
On Sat,  3 Nov 2018 15:38:58 +0530, Jagan Teki wrote:
> Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel.
> 
> Add dt-bingings for it.
> 
> Signed-off-by: Jagan Teki 
> ---
>  .../display/panel/feiyang,fy07024di26a30d.txt | 20 +++
>  1 file changed, 20 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
> 

Reviewed-by: Rob Herring 

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Re: [PATCH v3 5/8] dt-bindings: Add bindings for the LeMaker BL035-RGB-002 LCD panel

2018-11-12 Thread Rob Herring
On Wed,  7 Nov 2018 19:18:40 +0100, Paul Kocialkowski wrote:
> This adds the device-tree bindings for the LeMaker BL035-RGB-002 3.5"
> QVGA TFT LCD panel, compatible with simple-panel.
> 
> Signed-off-by: Paul Kocialkowski 
> ---
>  .../bindings/display/panel/lemaker,bl035-rgb-002.txt | 12 
>  1 file changed, 12 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/panel/lemaker,bl035-rgb-002.txt
> 

Reviewed-by: Rob Herring 

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Re: [PATCH 1/2] dt-bindings: display: amlogic, meson-vpu: Add optional canvas provider node

2018-11-12 Thread Rob Herring
On Mon,  5 Nov 2018 11:45:07 +0100, Maxime Jourdan wrote:
> Allows using the new canvas provider module if present.
> 
> Signed-off-by: Maxime Jourdan 
> ---
>  Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 

Reviewed-by: Rob Herring 

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[Bug 108718] Raven Ridge: ring sdma0 timeout on heavy CSS website with Firefox WebRender

2018-11-12 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108718

Bug ID: 108718
   Summary: Raven Ridge: ring sdma0 timeout on heavy CSS website
with Firefox WebRender
   Product: DRI
   Version: XOrg git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: DRM/AMDgpu
  Assignee: dri-devel@lists.freedesktop.org
  Reporter: samant...@posteo.net

Created attachment 142451
  --> https://bugs.freedesktop.org/attachment.cgi?id=142451=edit
dmesg log

This can replicated every time.
System: Lenovo A485 with 2700U APU
Kernel: 4.20.0-rc2

Steps to replicate:
1. Download Firefox Nightly from nightly.mozilla.org
2. Open Firefox Nightly
3. Type about:config in the address bar and press enter
4. Search for gfx.webrender.all in the config search box and double click the
"gfx.webrender.all" entry enable it (will show enabled after double clicking)
5. Restart Firefox Nightly
6. Browse to http://diana-adrianne.com/purecss-francine/ in Firefox Nightly
7. Screen should stop responding within a few seconds after zooming/scrolling a
bit

Result: Screen will stop responding, though the mouse cursor still moves.

dmesg output:
nov 12 14:42:15 kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring sdma0
timeout, signaled seq=20166, emitted seq=20168
nov 12 14:42:15 kernel: [drm] GPU recovery disabled.
nov 12 14:42:35 kernel: [TTM] Buffer eviction failed

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[PATCH 2/3] drm/msm: dpu: Stop using encoder->crtc pointer

2018-11-12 Thread Sean Paul
From: Sean Paul 

It's for legacy drivers, for atomic drivers crtc->state->encoder_mask
should be used to map encoder to crtc.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 46 
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c  | 19 +++---
 2 files changed, 29 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 6e636f373950..bf541a942da8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -287,9 +287,9 @@ enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc 
*crtc)
return INTF_MODE_NONE;
}
 
-   drm_for_each_encoder(encoder, crtc->dev)
-   if (encoder->crtc == crtc)
-   return dpu_encoder_get_intf_mode(encoder);
+   /* TODO: Returns the first INTF_MODE, could there be multiple values? */
+   drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
+   return dpu_encoder_get_intf_mode(encoder);
 
return INTF_MODE_NONE;
 }
@@ -554,13 +554,9 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc,
spin_unlock_irqrestore(>event_lock, flags);
}
 
-   list_for_each_entry(encoder, >mode_config.encoder_list, head) {
-   if (encoder->crtc != crtc)
-   continue;
-
-   /* encoder will trigger pending mask now */
+   /* encoder will trigger pending mask now */
+   drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
dpu_encoder_trigger_kickoff_pending(encoder);
-   }
 
/*
 * If no mixers have been allocated in dpu_crtc_atomic_check(),
@@ -707,7 +703,6 @@ static int _dpu_crtc_wait_for_frame_done(struct drm_crtc 
*crtc)
 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc)
 {
struct drm_encoder *encoder;
-   struct drm_device *dev = crtc->dev;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);
struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);
@@ -723,16 +718,13 @@ void dpu_crtc_commit_kickoff(struct drm_crtc *crtc)
 
DPU_ATRACE_BEGIN("crtc_commit");
 
-   list_for_each_entry(encoder, >mode_config.encoder_list, head) {
+   /*
+* Encoder will flush/start now, unless it has a tx pending. If so, it
+* may delay and flush at an irq event (e.g. ppdone)
+*/
+   drm_for_each_encoder_mask(encoder, crtc->dev,
+ crtc->state->encoder_mask) {
struct dpu_encoder_kickoff_params params = { 0 };
-
-   if (encoder->crtc != crtc)
-   continue;
-
-   /*
-* Encoder will flush/start now, unless it has a tx pending.
-* If so, it may delay and flush at an irq event (e.g. ppdone)
-*/
dpu_encoder_prepare_for_kickoff(encoder, );
}
 
@@ -757,12 +749,8 @@ void dpu_crtc_commit_kickoff(struct drm_crtc *crtc)
 
dpu_vbif_clear_errors(dpu_kms);
 
-   list_for_each_entry(encoder, >mode_config.encoder_list, head) {
-   if (encoder->crtc != crtc)
-   continue;
-
+   drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
dpu_encoder_kickoff(encoder);
-   }
 
 end:
reinit_completion(_crtc->frame_done_comp);
@@ -913,11 +901,8 @@ static void dpu_crtc_disable(struct drm_crtc *crtc)
 
dpu_core_perf_crtc_update(crtc, 0, true);
 
-   drm_for_each_encoder(encoder, crtc->dev) {
-   if (encoder->crtc != crtc)
-   continue;
+   drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
dpu_encoder_register_frame_event_callback(encoder, NULL, NULL);
-   }
 
if (dpu_crtc->power_event)
dpu_power_handle_unregister_event(dpu_crtc->phandle,
@@ -956,12 +941,9 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
DRM_DEBUG_KMS("crtc%d\n", crtc->base.id);
dpu_crtc = to_dpu_crtc(crtc);
 
-   drm_for_each_encoder(encoder, crtc->dev) {
-   if (encoder->crtc != crtc)
-   continue;
+   drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
dpu_encoder_register_frame_event_callback(encoder,
dpu_crtc_frame_event_cb, (void *)crtc);
-   }
 
mutex_lock(_crtc->crtc_lock);
trace_dpu_crtc_enable(DRMID(crtc), true, dpu_crtc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 985c855796ae..78709699fe1e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -320,7 +320,10 @@ static void dpu_kms_prepare_commit(struct msm_kms *kms,

[PATCH 1/3] drm/msm: dpu: Grab the modeset locks in frame_event

2018-11-12 Thread Sean Paul
From: Sean Paul 

This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
since it digs into the state objects.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index ed84cf44a222..6e636f373950 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -338,7 +338,9 @@ static void dpu_crtc_frame_event_work(struct kthread_work 
*work)
/* release bandwidth and other resources */
trace_dpu_crtc_frame_event_done(DRMID(crtc),
fevent->event);
+   drm_modeset_lock_all(crtc->dev);
dpu_core_perf_crtc_release_bw(crtc);
+   drm_modeset_unlock_all(crtc->dev);
} else {
trace_dpu_crtc_frame_event_more_pending(DRMID(crtc),
fevent->event);
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 3/3] drm/msm: dpu: Add modeset lock checks where applicable

2018-11-12 Thread Sean Paul
From: Sean Paul 

Add modeset lock checks to functions that could be called outside the
core atomic stack.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c  | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index bf541a942da8..8c34fb3b9286 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -287,6 +287,8 @@ enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc 
*crtc)
return INTF_MODE_NONE;
}
 
+   WARN_ON(!drm_modeset_is_locked(>mutex));
+
/* TODO: Returns the first INTF_MODE, could there be multiple values? */
drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)
return dpu_encoder_get_intf_mode(encoder);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 78709699fe1e..aa32c353607b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -358,6 +358,7 @@ void dpu_kms_encoder_enable(struct drm_encoder *encoder)
if (funcs && funcs->commit)
funcs->commit(encoder);
 
+   WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
drm_for_each_crtc(crtc, dev) {
if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder)))
continue;
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Liviu Dudau
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>  drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>  drivers/gpu/drm/i915/intel_display.c  |  2 +-
>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>  drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>  drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>  drivers/gpu/drm/tegra/dc.c|  5 +--
>  drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>  drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>  include/drm/drm_atomic_state_helper.h |  2 ++
>  18 files changed, 56 insertions(+), 81 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 5064768642f3..770a71726cd1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2802,9 +2802,7 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
>   if (WARN_ON(!state))
>   return;
>  
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> -
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static struct drm_crtc_state *
> diff --git a/drivers/gpu/drm/arm/malidp_crtc.c 
> b/drivers/gpu/drm/arm/malidp_crtc.c
> index e1b72782848c..9a924ff27148 100644
> --- a/drivers/gpu/drm/arm/malidp_crtc.c
> +++ b/drivers/gpu/drm/arm/malidp_crtc.c
> @@ -474,10 +474,7 @@ static void malidp_crtc_reset(struct drm_crtc *crtc)
>  
>   kfree(state);
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static void malidp_crtc_destroy_state(struct drm_crtc *crtc,

For the malidp changes:
Acked-by: Liviu Dudau 

Best regards,
Liviu

> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index 96f4082671fe..8084d549c7d1 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> @@ -412,10 +412,7 @@ static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
>   }
>  
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static struct drm_crtc_state *
> diff 

[PATCH 12/12] drm/msm: dpu: Move crtc runtime resume to encoder

2018-11-12 Thread Sean Paul
From: Sean Paul 

The crtc runtime resume doesn't actually operate on the crtc, but rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be called while holding the modeset locks (although
it sometimes is), this presents a race condition.

Now that we have ->enabled on the virtual encoders, and a lock to
protect it, just call resume on each encoder and only restore the ones
that are enabled.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 24 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h|  6 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h |  4 ++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  6 +++---
 5 files changed, 15 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index d8f58caf2772..9be24907f8c1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -841,30 +841,6 @@ static struct drm_crtc_state 
*dpu_crtc_duplicate_state(struct drm_crtc *crtc)
return >base;
 }
 
-void dpu_crtc_runtime_resume(struct drm_crtc *crtc)
-{
-   struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
-   struct drm_encoder *encoder;
-
-   mutex_lock(_crtc->crtc_lock);
-
-   if (!dpu_crtc->enabled)
-   goto end;
-
-   trace_dpu_crtc_runtime_resume(DRMID(crtc));
-
-   /* restore encoder; crtc will be programmed during commit */
-   drm_for_each_encoder(encoder, crtc->dev) {
-   if (encoder->crtc != crtc)
-   continue;
-
-   dpu_encoder_virt_restore(encoder);
-   }
-
-end:
-   mutex_unlock(_crtc->crtc_lock);
-}
-
 static void dpu_crtc_disable(struct drm_crtc *crtc)
 {
struct dpu_crtc *dpu_crtc;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 1dca91d1210f..93d21a61a040 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -329,10 +329,4 @@ static inline bool dpu_crtc_is_enabled(struct drm_crtc 
*crtc)
return crtc ? crtc->enabled : false;
 }
 
-/**
- * dpu_crtc_runtime_resume - called by the top-level on pm_runtime_resume
- * @crtc: CRTC to resume
- */
-void dpu_crtc_runtime_resume(struct drm_crtc *crtc);
-
 #endif /* _DPU_CRTC_H_ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 3daa86220d47..d89ac520f7e6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1089,28 +1089,24 @@ static void _dpu_encoder_virt_enable_helper(struct 
drm_encoder *drm_enc)
_dpu_encoder_update_vsync_source(dpu_enc, _enc->disp_info);
 }
 
-void dpu_encoder_virt_restore(struct drm_encoder *drm_enc)
+void dpu_encoder_virt_runtime_resume(struct drm_encoder *drm_enc)
 {
-   struct dpu_encoder_virt *dpu_enc = NULL;
-   int i;
-
-   if (!drm_enc) {
-   DPU_ERROR("invalid encoder\n");
-   return;
-   }
-   dpu_enc = to_dpu_encoder_virt(drm_enc);
+   struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
 
-   for (i = 0; i < dpu_enc->num_phys_encs; i++) {
-   struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
+   mutex_lock(_enc->enc_lock);
 
-   if (phys && (phys != dpu_enc->cur_master) && phys->ops.restore)
-   phys->ops.restore(phys);
-   }
+   if (!dpu_enc->enabled)
+   goto out;
 
+   if (dpu_enc->cur_slave && dpu_enc->cur_slave->ops.restore)
+   dpu_enc->cur_slave->ops.restore(dpu_enc->cur_slave);
if (dpu_enc->cur_master && dpu_enc->cur_master->ops.restore)
dpu_enc->cur_master->ops.restore(dpu_enc->cur_master);
 
_dpu_encoder_virt_enable_helper(drm_enc);
+
+out:
+   mutex_unlock(_enc->enc_lock);
 }
 
 static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index 9dbf38f446d9..aa4f135218fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -126,10 +126,10 @@ int dpu_encoder_wait_for_event(struct drm_encoder 
*drm_encoder,
 enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder);
 
 /**
- * dpu_encoder_virt_restore - restore the encoder configs
+ * dpu_encoder_virt_runtime_resume - pm runtime resume the encoder configs
  * @encoder:   encoder pointer
  */
-void dpu_encoder_virt_restore(struct drm_encoder *encoder);
+void dpu_encoder_virt_runtime_resume(struct drm_encoder *encoder);
 
 /**
  * dpu_encoder_init - initialize virtual encoder object
diff --git 

[PATCH 11/12] drm/msm: dpu: Add ->enabled to dpu_encoder_virt

2018-11-12 Thread Sean Paul
From: Sean Paul 

Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27 +
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 10a0676d1dcf..3daa86220d47 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -132,6 +132,7 @@ enum dpu_enc_rc_states {
  * @base:  drm_encoder base class for registration with DRM
  * @enc_spinlock:  Virtual-Encoder-Wide Spin Lock for IRQ purposes
  * @bus_scaling_client:Client handle to the bus scaling interface
+ * @enabled:   True if the encoder is active, protected by enc_lock
  * @num_phys_encs: Actual number of physical encoders contained.
  * @phys_encs: Container of physical encoders managed.
  * @cur_master:Pointer to the current master in this mode. 
Optimization
@@ -148,8 +149,8 @@ enum dpu_enc_rc_states {
  * all CTL paths
  * @crtc_kickoff_cb_data:  Opaque user data given to crtc_kickoff_cb
  * @debugfs_root:  Debug file system root file node
- * @enc_lock:  Lock around physical encoder create/destroy and
-   access.
+ * @enc_lock:  Lock around physical encoder
+ * create/destroy/enable/disable
  * @frame_busy_mask:   Bitmask tracking which phys_enc we are still
  * busy processing current command.
  * Bit0 = phys_encs[0] etc.
@@ -175,6 +176,8 @@ struct dpu_encoder_virt {
spinlock_t enc_spinlock;
uint32_t bus_scaling_client;
 
+   bool enabled;
+
unsigned int num_phys_encs;
struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
struct dpu_encoder_phys *cur_master;
@@ -1121,6 +1124,8 @@ static void dpu_encoder_virt_enable(struct drm_encoder 
*drm_enc)
return;
}
dpu_enc = to_dpu_encoder_virt(drm_enc);
+
+   mutex_lock(_enc->enc_lock);
cur_mode = _enc->base.crtc->state->adjusted_mode;
 
trace_dpu_enc_enable(DRMID(drm_enc), cur_mode->hdisplay,
@@ -1137,10 +1142,15 @@ static void dpu_encoder_virt_enable(struct drm_encoder 
*drm_enc)
if (ret) {
DPU_ERROR_ENC(dpu_enc, "dpu resource control failed: %d\n",
ret);
-   return;
+   goto out;
}
 
_dpu_encoder_virt_enable_helper(drm_enc);
+
+   dpu_enc->enabled = true;
+
+out:
+   mutex_unlock(_enc->enc_lock);
 }
 
 static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
@@ -1162,11 +1172,14 @@ static void dpu_encoder_virt_disable(struct drm_encoder 
*drm_enc)
return;
}
 
-   mode = _enc->crtc->state->adjusted_mode;
-
dpu_enc = to_dpu_encoder_virt(drm_enc);
DPU_DEBUG_ENC(dpu_enc, "\n");
 
+   mutex_lock(_enc->enc_lock);
+   dpu_enc->enabled = false;
+
+   mode = _enc->crtc->state->adjusted_mode;
+
priv = drm_enc->dev->dev_private;
dpu_kms = to_dpu_kms(priv->kms);
 
@@ -1200,6 +1213,8 @@ static void dpu_encoder_virt_disable(struct drm_encoder 
*drm_enc)
DPU_DEBUG_ENC(dpu_enc, "encoder disabled\n");
 
dpu_rm_release(_kms->rm, drm_enc);
+
+   mutex_unlock(_enc->enc_lock);
 }
 
 static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
@@ -2233,6 +2248,8 @@ struct drm_encoder *dpu_encoder_init(struct drm_device 
*dev,
 
drm_encoder_helper_add(_enc->base, _encoder_helper_funcs);
 
+   dpu_enc->enabled = false;
+
return _enc->base;
 }
 
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 09/12] drm/msm: dpu: Remove dpu_power_handle

2018-11-12 Thread Sean Paul
From: Sean Paul 

Now that we don't have any event handlers, remove dpu_power_handle!

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/Makefile  |   1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   |  11 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h   |   3 -
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c  | 136 --
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 113 ---
 5 files changed, 264 deletions(-)
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h

diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 19ab521d4c3a..7d02ef3655b5 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -72,7 +72,6 @@ msm-y := \
disp/dpu1/dpu_kms.o \
disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
-   disp/dpu1/dpu_power_handle.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
msm_atomic.o \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index bae7e86b2913..e42685a1d928 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1063,8 +1063,6 @@ static int dpu_bind(struct device *dev, struct device 
*master, void *data)
return ret;
}
 
-   dpu_power_resource_init(pdev, _kms->phandle);
-
platform_set_drvdata(pdev, dpu_kms);
 
msm_kms_init(_kms->base, _funcs);
@@ -1084,7 +1082,6 @@ static void dpu_unbind(struct device *dev, struct device 
*master, void *data)
struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
struct dss_module_power *mp = _kms->mp;
 
-   dpu_power_resource_deinit(pdev, _kms->phandle);
msm_dss_put_clk(mp->clk_config, mp->num_clk);
devm_kfree(>dev, mp->clk_config);
mp->num_clk = 0;
@@ -1123,10 +1120,6 @@ static int __maybe_unused dpu_runtime_suspend(struct 
device *dev)
return rc;
}
 
-   rc = dpu_power_resource_enable(_kms->phandle, false);
-   if (rc)
-   DPU_ERROR("resource disable failed: %d\n", rc);
-
rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, false);
if (rc)
DPU_ERROR("clock disable failed rc:%d\n", rc);
@@ -1160,10 +1153,6 @@ static int __maybe_unused dpu_runtime_resume(struct 
device *dev)
drm_for_each_crtc(crtc, ddev)
dpu_crtc_runtime_resume(crtc);
 
-   rc = dpu_power_resource_enable(_kms->phandle, true);
-   if (rc)
-   DPU_ERROR("resource enable failed: %d\n", rc);
-
return rc;
 }
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 4e5acacb3065..59e18e2d3c59 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -31,7 +31,6 @@
 #include "dpu_hw_top.h"
 #include "dpu_io_util.h"
 #include "dpu_rm.h"
-#include "dpu_power_handle.h"
 #include "dpu_irq.h"
 #include "dpu_core_perf.h"
 
@@ -114,8 +113,6 @@ struct dpu_kms {
int core_rev;
struct dpu_mdss_cfg *catalog;
 
-   struct dpu_power_handle phandle;
-
/* directory entry for debugfs */
struct dentry *debugfs_root;
struct dentry *debugfs_danger;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
deleted file mode 100644
index 8e64f0a52147..
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#define pr_fmt(fmt)"[drm:%s:%d]: " fmt, __func__, __LINE__
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "dpu_power_handle.h"
-#include "dpu_trace.h"
-
-static void dpu_power_event_trigger_locked(struct dpu_power_handle *phandle,
-   u32 event_type)
-{
-   struct dpu_power_event *event;
-
-   list_for_each_entry(event, >event_list, list) {
-   if (event->event_type & event_type)
-   event->cb_fnc(event_type, event->usr);
-   }
-}
-
-void dpu_power_resource_init(struct platform_device *pdev,
-   struct dpu_power_handle *phandle)
-{
-   phandle->dev = >dev;
-
-   INIT_LIST_HEAD(>event_list);
-
-   mutex_init(>phandle_lock);
-}
-
-void dpu_power_resource_deinit(struct platform_device *pdev,
-   struct 

[PATCH 10/12] drm/msm: dpu: Fix typo in dpu_encoder

2018-11-12 Thread Sean Paul
From: Sean Paul 

enc_spinlock instead of enc_spin_lock.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 82c55efb500f..10a0676d1dcf 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -130,7 +130,7 @@ enum dpu_enc_rc_states {
  * Virtual encoder defers as much as possible to the physical encoders.
  * Virtual encoder registers itself with the DRM Framework as the encoder.
  * @base:  drm_encoder base class for registration with DRM
- * @enc_spin_lock: Virtual-Encoder-Wide Spin Lock for IRQ purposes
+ * @enc_spinlock:  Virtual-Encoder-Wide Spin Lock for IRQ purposes
  * @bus_scaling_client:Client handle to the bus scaling interface
  * @num_phys_encs: Actual number of physical encoders contained.
  * @phys_encs: Container of physical encoders managed.
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 08/12] drm/msm: dpu: Move DPU_POWER_HANDLE_DBUS_ID to core_perf

2018-11-12 Thread Sean Paul
From: Sean Paul 

It's only used in core_perf, so stick it there (and change the name to
reflect that).

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 34 +--
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 17 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  |  4 +--
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 13 ---
 4 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index ef6dd43f8bec..bffc51e496e7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -95,20 +95,20 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
memset(perf, 0, sizeof(struct dpu_core_perf_params));
 
if (!dpu_cstate->bw_control) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
perf->bw_ctl[i] = kms->catalog->perf.max_bw_high *
1000ULL;
perf->max_per_pipe_ib[i] = perf->bw_ctl[i];
}
perf->core_clk_rate = kms->perf.max_core_clk_rate;
} else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
perf->bw_ctl[i] = 0;
perf->max_per_pipe_ib[i] = 0;
}
perf->core_clk_rate = 0;
} else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
perf->bw_ctl[i] = kms->perf.fix_core_ab_vote;
perf->max_per_pipe_ib[i] = kms->perf.fix_core_ib_vote;
}
@@ -118,12 +118,12 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
DPU_DEBUG(
"crtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu llcc_ib=%llu 
llcc_ab=%llu mem_ib=%llu mem_ab=%llu\n",
crtc->base.id, perf->core_clk_rate,
-   perf->max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_MNOC],
-   perf->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_MNOC],
-   perf->max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_LLCC],
-   perf->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_LLCC],
-   perf->max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_EBI],
-   perf->bw_ctl[DPU_POWER_HANDLE_DBUS_ID_EBI]);
+   perf->max_per_pipe_ib[DPU_CORE_PERF_DATA_BUS_ID_MNOC],
+   perf->bw_ctl[DPU_CORE_PERF_DATA_BUS_ID_MNOC],
+   perf->max_per_pipe_ib[DPU_CORE_PERF_DATA_BUS_ID_LLCC],
+   perf->bw_ctl[DPU_CORE_PERF_DATA_BUS_ID_LLCC],
+   perf->max_per_pipe_ib[DPU_CORE_PERF_DATA_BUS_ID_EBI],
+   perf->bw_ctl[DPU_CORE_PERF_DATA_BUS_ID_EBI]);
 }
 
 int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
@@ -158,8 +158,8 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
/* obtain new values */
_dpu_core_perf_calc_crtc(kms, crtc, state, _cstate->new_perf);
 
-   for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC;
-   i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = DPU_CORE_PERF_DATA_BUS_ID_MNOC;
+   i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
bw_sum_of_intfs = dpu_cstate->new_perf.bw_ctl[i];
curr_client_type = dpu_crtc_get_client_type(crtc);
 
@@ -290,7 +290,7 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc)
if (kms->perf.enable_bw_release) {
trace_dpu_cmd_release_bw(crtc->base.id);
DPU_DEBUG("Release BW crtc=%d\n", crtc->base.id);
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
dpu_crtc->cur_perf.bw_ctl[i] = 0;
_dpu_core_perf_crtc_update_bus(kms, crtc, i);
}
@@ -367,7 +367,7 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
new = _cstate->new_perf;
 
if (_dpu_core_perf_crtc_is_power_on(crtc) && !stop_req) {
-   for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
+   for (i = 0; i < DPU_CORE_PERF_DATA_BUS_ID_MAX; i++) {
/*
 * cases for bus bandwidth update.
 * 1. new bandwidth vote - "ab or ib vote" is higher
@@ -409,13 +409,13 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
update_clk = 1;
}
trace_dpu_perf_crtc_update(crtc->base.id,
-  

[PATCH 07/12] drm/msm: dpu: Include dpu_io_util.h directly in dpu_kms.h

2018-11-12 Thread Sean Paul
From: Sean Paul 

It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 5f08be187c86..4e5acacb3065 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -29,6 +29,7 @@
 #include "dpu_hw_lm.h"
 #include "dpu_hw_interrupts.h"
 #include "dpu_hw_top.h"
+#include "dpu_io_util.h"
 #include "dpu_rm.h"
 #include "dpu_power_handle.h"
 #include "dpu_irq.h"
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 06/12] drm/msm: dpu: Remove power_handle from core_perf

2018-11-12 Thread Sean Paul
From: Sean Paul 

It's unused

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 ---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 5 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   | 1 -
 3 files changed, 9 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 22e84b3d7f98..ef6dd43f8bec 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -605,7 +605,6 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
dpu_core_perf_debugfs_destroy(perf);
perf->max_core_clk_rate = 0;
perf->core_clk = NULL;
-   perf->phandle = NULL;
perf->catalog = NULL;
perf->dev = NULL;
 }
@@ -613,12 +612,10 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
 int dpu_core_perf_init(struct dpu_core_perf *perf,
struct drm_device *dev,
struct dpu_mdss_cfg *catalog,
-   struct dpu_power_handle *phandle,
struct dss_clk *core_clk)
 {
perf->dev = dev;
perf->catalog = catalog;
-   perf->phandle = phandle;
perf->core_clk = core_clk;
 
perf->max_core_clk_rate = core_clk->max_rate;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
index fbcbe0c7527a..68b84d85eb8f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
@@ -19,7 +19,6 @@
 #include 
 
 #include "dpu_hw_catalog.h"
-#include "dpu_power_handle.h"
 
 #defineDPU_PERF_DEFAULT_MAX_CORE_CLK_RATE  41250
 
@@ -52,7 +51,6 @@ struct dpu_core_perf_tune {
  * @dev: Pointer to drm device
  * @debugfs_root: top level debug folder
  * @catalog: Pointer to catalog configuration
- * @phandle: Pointer to power handler
  * @core_clk: Pointer to core clock structure
  * @core_clk_rate: current core clock rate
  * @max_core_clk_rate: maximum allowable core clock rate
@@ -66,7 +64,6 @@ struct dpu_core_perf {
struct drm_device *dev;
struct dentry *debugfs_root;
struct dpu_mdss_cfg *catalog;
-   struct dpu_power_handle *phandle;
struct dss_clk *core_clk;
u64 core_clk_rate;
u64 max_core_clk_rate;
@@ -113,13 +110,11 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf);
  * @perf: Pointer to core performance context
  * @dev: Pointer to drm device
  * @catalog: Pointer to catalog
- * @phandle: Pointer to power handle
  * @core_clk: pointer to core clock
  */
 int dpu_core_perf_init(struct dpu_core_perf *perf,
struct drm_device *dev,
struct dpu_mdss_cfg *catalog,
-   struct dpu_power_handle *phandle,
struct dss_clk *core_clk);
 
 /**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 62a02c606811..bae7e86b2913 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -957,7 +957,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
}
 
rc = dpu_core_perf_init(_kms->perf, dev, dpu_kms->catalog,
-   _kms->phandle,
_dpu_kms_get_clk(dpu_kms, "core"));
if (rc) {
DPU_ERROR("failed to init perf %d\n", rc);
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 05/12] drm/msm: dpu: Handle crtc pm_runtime_resume() directly

2018-11-12 Thread Sean Paul
From: Sean Paul 

Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 23 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h  | 10 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   |  4 
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h |  8 
 4 files changed, 20 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e09209d6c469..c55cb751e2b4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -33,7 +33,6 @@
 #include "dpu_plane.h"
 #include "dpu_encoder.h"
 #include "dpu_vbif.h"
-#include "dpu_power_handle.h"
 #include "dpu_core_perf.h"
 #include "dpu_trace.h"
 
@@ -69,8 +68,6 @@ static void dpu_crtc_destroy(struct drm_crtc *crtc)
if (!crtc)
return;
 
-   dpu_crtc->phandle = NULL;
-
drm_crtc_cleanup(crtc);
mutex_destroy(_crtc->crtc_lock);
kfree(dpu_crtc);
@@ -844,15 +841,17 @@ static struct drm_crtc_state 
*dpu_crtc_duplicate_state(struct drm_crtc *crtc)
return >base;
 }
 
-static void dpu_crtc_handle_power_event(u32 event_type, void *arg)
+void dpu_crtc_runtime_resume(struct drm_crtc *crtc)
 {
-   struct drm_crtc *crtc = arg;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
struct drm_encoder *encoder;
 
mutex_lock(_crtc->crtc_lock);
 
-   trace_dpu_crtc_handle_power_event(DRMID(crtc), event_type);
+   if (!dpu_crtc->enabled)
+   goto end;
+
+   trace_dpu_crtc_runtime_resume(DRMID(crtc));
 
/* restore encoder; crtc will be programmed during commit */
drm_for_each_encoder(encoder, crtc->dev) {
@@ -862,6 +861,7 @@ static void dpu_crtc_handle_power_event(u32 event_type, 
void *arg)
dpu_encoder_virt_restore(encoder);
}
 
+end:
mutex_unlock(_crtc->crtc_lock);
 }
 
@@ -917,10 +917,6 @@ static void dpu_crtc_disable(struct drm_crtc *crtc)
dpu_encoder_register_frame_event_callback(encoder, NULL, NULL);
}
 
-   if (dpu_crtc->power_event)
-   dpu_power_handle_unregister_event(dpu_crtc->phandle,
-   dpu_crtc->power_event);
-
memset(cstate->mixers, 0, sizeof(cstate->mixers));
cstate->num_mixers = 0;
 
@@ -972,11 +968,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
 
/* Enable/restore vblank irq handling */
drm_crtc_vblank_on(crtc);
-
-   dpu_crtc->power_event = dpu_power_handle_register_event(
-   dpu_crtc->phandle, DPU_POWER_EVENT_ENABLE,
-   dpu_crtc_handle_power_event, crtc, dpu_crtc->name);
-
 }
 
 struct plane_state {
@@ -1522,8 +1513,6 @@ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, 
struct drm_plane *plane,
/* initialize event handling */
spin_lock_init(_crtc->event_lock);
 
-   dpu_crtc->phandle = >phandle;
-
DPU_DEBUG("%s: successfully initialized crtc\n", dpu_crtc->name);
return crtc;
 }
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 4822602402f9..1dca91d1210f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -151,7 +151,6 @@ struct dpu_crtc_frame_event {
  * @event_worker  : Event worker queue
  * @event_lock: Spinlock around event handling code
  * @phandle: Pointer to power handler
- * @power_event   : registered power event handle
  * @cur_perf  : current performance committed to clock/bandwidth driver
  */
 struct dpu_crtc {
@@ -187,9 +186,6 @@ struct dpu_crtc {
/* for handling internal event thread */
spinlock_t event_lock;
 
-   struct dpu_power_handle *phandle;
-   struct dpu_power_event *power_event;
-
struct dpu_core_perf_params cur_perf;
 
struct dpu_crtc_smmu_state_data smmu_state;
@@ -333,4 +329,10 @@ static inline bool dpu_crtc_is_enabled(struct drm_crtc 
*crtc)
return crtc ? crtc->enabled : false;
 }
 
+/**
+ * dpu_crtc_runtime_resume - called by the top-level on pm_runtime_resume
+ * @crtc: CRTC to resume
+ */
+void dpu_crtc_runtime_resume(struct drm_crtc *crtc);
+
 #endif /* _DPU_CRTC_H_ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index ae2bbaae923d..62a02c606811 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1140,6 +1140,7 @@ static int __maybe_unused dpu_runtime_resume(struct 
device *dev)
int rc = -1;
struct platform_device *pdev = to_platform_device(dev);
struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+   struct drm_crtc *crtc;
struct drm_device *ddev;
struct dss_module_power *mp = _kms->mp;
 
@@ -1157,6 +1158,9 @@ static int 

[PATCH 04/12] drm/msm: dpu: Don't use power_event for vbif_init_memtypes

2018-11-12 Thread Sean Paul
From: Sean Paul 

power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h |  1 -
 2 files changed, 3 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 23094d108e81..ae2bbaae923d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -651,10 +651,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
dpu_hw_intr_destroy(dpu_kms->hw_intr);
dpu_kms->hw_intr = NULL;
 
-   if (dpu_kms->power_event)
-   dpu_power_handle_unregister_event(
-   _kms->phandle, dpu_kms->power_event);
-
/* safe to call these more than once during shutdown */
_dpu_debugfs_destroy(dpu_kms);
_dpu_kms_mmu_destroy(dpu_kms);
@@ -832,16 +828,6 @@ u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms, char 
*clock_name)
return clk_get_rate(clk->clk);
 }
 
-static void dpu_kms_handle_power_event(u32 event_type, void *usr)
-{
-   struct dpu_kms *dpu_kms = usr;
-
-   if (!dpu_kms)
-   return;
-
-   dpu_vbif_init_memtypes(dpu_kms);
-}
-
 static int dpu_kms_hw_init(struct msm_kms *kms)
 {
struct dpu_kms *dpu_kms;
@@ -1015,10 +1001,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
/*
 * Handle (re)initializations during power enable
 */
-   dpu_kms_handle_power_event(DPU_POWER_EVENT_ENABLE, dpu_kms);
-   dpu_kms->power_event = dpu_power_handle_register_event(
-   _kms->phandle, DPU_POWER_EVENT_ENABLE,
-   dpu_kms_handle_power_event, dpu_kms, "kms");
+   dpu_vbif_init_memtypes(dpu_kms);
 
pm_runtime_put_sync(_kms->pdev->dev);
 
@@ -1172,6 +1155,8 @@ static int __maybe_unused dpu_runtime_resume(struct 
device *dev)
return rc;
}
 
+   dpu_vbif_init_memtypes(dpu_kms);
+
rc = dpu_power_resource_enable(_kms->phandle, true);
if (rc)
DPU_ERROR("resource enable failed: %d\n", rc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index f2c78deb0854..5f08be187c86 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -114,7 +114,6 @@ struct dpu_kms {
struct dpu_mdss_cfg *catalog;
 
struct dpu_power_handle phandle;
-   struct dpu_power_event *power_event;
 
/* directory entry for debugfs */
struct dentry *debugfs_root;
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 03/12] drm/msm: dpu: Remove dpu_power_client

2018-11-12 Thread Sean Paul
From: Sean Paul 

There's only one client -- core, and it's only used for runtime pm which
is already refcounted.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   | 22 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h   |  1 -
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c  | 96 +--
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 86 +
 4 files changed, 6 insertions(+), 199 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 985c855796ae..23094d108e81 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -676,11 +676,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
dpu_hw_catalog_deinit(dpu_kms->catalog);
dpu_kms->catalog = NULL;
 
-   if (dpu_kms->core_client)
-   dpu_power_client_destroy(_kms->phandle,
-   dpu_kms->core_client);
-   dpu_kms->core_client = NULL;
-
if (dpu_kms->vbif[VBIF_NRT])
devm_iounmap(_kms->pdev->dev, dpu_kms->vbif[VBIF_NRT]);
dpu_kms->vbif[VBIF_NRT] = NULL;
@@ -913,17 +908,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
dpu_kms->reg_dma_len = dpu_iomap_size(dpu_kms->pdev, "regdma");
}
 
-   dpu_kms->core_client = dpu_power_client_create(_kms->phandle,
-   "core");
-   if (IS_ERR_OR_NULL(dpu_kms->core_client)) {
-   rc = PTR_ERR(dpu_kms->core_client);
-   if (!dpu_kms->core_client)
-   rc = -EINVAL;
-   DPU_ERROR("dpu power client create failed: %d\n", rc);
-   dpu_kms->core_client = NULL;
-   goto error;
-   }
-
pm_runtime_get_sync(_kms->pdev->dev);
 
_dpu_kms_core_hw_rev_init(dpu_kms);
@@ -1157,8 +1141,7 @@ static int __maybe_unused dpu_runtime_suspend(struct 
device *dev)
return rc;
}
 
-   rc = dpu_power_resource_enable(_kms->phandle,
-   dpu_kms->core_client, false);
+   rc = dpu_power_resource_enable(_kms->phandle, false);
if (rc)
DPU_ERROR("resource disable failed: %d\n", rc);
 
@@ -1189,8 +1172,7 @@ static int __maybe_unused dpu_runtime_resume(struct 
device *dev)
return rc;
}
 
-   rc = dpu_power_resource_enable(_kms->phandle,
-   dpu_kms->core_client, true);
+   rc = dpu_power_resource_enable(_kms->phandle, true);
if (rc)
DPU_ERROR("resource enable failed: %d\n", rc);
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 2a3625eef6d3..f2c78deb0854 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -114,7 +114,6 @@ struct dpu_kms {
struct dpu_mdss_cfg *catalog;
 
struct dpu_power_handle phandle;
-   struct dpu_power_client *core_client;
struct dpu_power_event *power_event;
 
/* directory entry for debugfs */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
index 8c6f92aaaf87..8e64f0a52147 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
@@ -35,59 +35,11 @@ static void dpu_power_event_trigger_locked(struct 
dpu_power_handle *phandle,
}
 }
 
-struct dpu_power_client *dpu_power_client_create(
-   struct dpu_power_handle *phandle, char *client_name)
-{
-   struct dpu_power_client *client;
-   static u32 id;
-
-   if (!client_name || !phandle) {
-   pr_err("client name is null or invalid power data\n");
-   return ERR_PTR(-EINVAL);
-   }
-
-   client = kzalloc(sizeof(struct dpu_power_client), GFP_KERNEL);
-   if (!client)
-   return ERR_PTR(-ENOMEM);
-
-   mutex_lock(>phandle_lock);
-   strlcpy(client->name, client_name, MAX_CLIENT_NAME_LEN);
-   client->usecase_ndx = VOTE_INDEX_DISABLE;
-   client->id = id;
-   client->active = true;
-   pr_debug("client %s created:%pK id :%d\n", client_name,
-   client, id);
-   id++;
-   list_add(>list, >power_client_clist);
-   mutex_unlock(>phandle_lock);
-
-   return client;
-}
-
-void dpu_power_client_destroy(struct dpu_power_handle *phandle,
-   struct dpu_power_client *client)
-{
-   if (!client  || !phandle) {
-   pr_err("reg bus vote: invalid client handle\n");
-   } else if (!client->active) {
-   pr_err("dpu power deinit already done\n");
-   kfree(client);
-   } else {
-   pr_debug("bus vote client %s destroyed:%pK id:%u\n",
-   client->name, client, client->id);
-   mutex_lock(>phandle_lock);
-   list_del_init(>list);
-   

[PATCH 00/12] drm/msm: dpu: Clean up runtime power handling

2018-11-12 Thread Sean Paul
From: Sean Paul 

I started pulling a thread last week when looking at dpu locking. It led
me into the power_handle code and eventually runtime suspend/resume.

This set removes the power_handle stuff entirely. I'm sure it's more
useful when there are multiple clients/handles/events, but for our case
with one handle/client/event, it's just overcomplicating things.

Once the power_handle code is out of the way, I added a few patches on
the end that move the runtime resume code out of crtc and into encoder.
The benefit of this is to avoid inspecting crtc->state without holding
the modeset lock.

There's also a few trivial changes sprinkled through the series.

PTAL,

Sean


Sean Paul (12):
  drm/msm: dpu: Remove dpu_power_handle_get_dbus_name()
  drm/msm: dpu: Remove unused trace_dpu_perf_update_bus()
  drm/msm: dpu: Remove dpu_power_client
  drm/msm: dpu: Don't use power_event for vbif_init_memtypes
  drm/msm: dpu: Handle crtc pm_runtime_resume() directly
  drm/msm: dpu: Remove power_handle from core_perf
  drm/msm: dpu: Include dpu_io_util.h directly in dpu_kms.h
  drm/msm: dpu: Move DPU_POWER_HANDLE_DBUS_ID to core_perf
  drm/msm: dpu: Remove dpu_power_handle
  drm/msm: dpu: Fix typo in dpu_encoder
  drm/msm: dpu: Add ->enabled to dpu_encoder_virt
  drm/msm: dpu: Move crtc runtime resume to encoder

 drivers/gpu/drm/msm/Makefile  |   1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c |  37 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h |  22 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  |  45 +---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h  |   4 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c   |  53 ++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h   |   4 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   |  53 +---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h   |   6 +-
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c  | 240 --
 .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h  | 217 
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h |  29 +--
 12 files changed, 82 insertions(+), 629 deletions(-)
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h

-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 02/12] drm/msm: dpu: Remove unused trace_dpu_perf_update_bus()

2018-11-12 Thread Sean Paul
From: Sean Paul 

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 -
 1 file changed, 21 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 0c122e173892..7ab0ba8224f6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -99,27 +99,6 @@ TRACE_EVENT(dpu_perf_set_ot,
__entry->vbif_idx)
 )
 
-TRACE_EVENT(dpu_perf_update_bus,
-   TP_PROTO(int client, unsigned long long ab_quota,
-   unsigned long long ib_quota),
-   TP_ARGS(client, ab_quota, ib_quota),
-   TP_STRUCT__entry(
-   __field(int, client)
-   __field(u64, ab_quota)
-   __field(u64, ib_quota)
-   ),
-   TP_fast_assign(
-   __entry->client = client;
-   __entry->ab_quota = ab_quota;
-   __entry->ib_quota = ib_quota;
-   ),
-   TP_printk("Request client:%d ab=%llu ib=%llu",
-   __entry->client,
-   __entry->ab_quota,
-   __entry->ib_quota)
-)
-
-
 TRACE_EVENT(dpu_cmd_release_bw,
TP_PROTO(u32 crtc_id),
TP_ARGS(crtc_id),
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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[PATCH 01/12] drm/msm: dpu: Remove dpu_power_handle_get_dbus_name()

2018-11-12 Thread Sean Paul
From: Sean Paul 

It's only used for debugfs, so just output the enum value instead.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c |  6 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 14 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h |  7 ---
 3 files changed, 2 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index ed84cf44a222..e09209d6c469 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1381,11 +1381,9 @@ static int dpu_crtc_debugfs_state_show(struct seq_file 
*s, void *v)
dpu_crtc->cur_perf.core_clk_rate);
for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC;
i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
-   seq_printf(s, "bw_ctl[%s]: %llu\n",
-   dpu_power_handle_get_dbus_name(i),
+   seq_printf(s, "bw_ctl[%d]: %llu\n", i,
dpu_crtc->cur_perf.bw_ctl[i]);
-   seq_printf(s, "max_per_pipe_ib[%s]: %llu\n",
-   dpu_power_handle_get_dbus_name(i),
+   seq_printf(s, "max_per_pipe_ib[%d]: %llu\n", i,
dpu_crtc->cur_perf.max_per_pipe_ib[i]);
}
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
index fc14116789f2..8c6f92aaaf87 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
@@ -24,20 +24,6 @@
 #include "dpu_power_handle.h"
 #include "dpu_trace.h"
 
-static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = {
-   [DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus",
-   [DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus",
-   [DPU_POWER_HANDLE_DBUS_ID_EBI] = "qcom,dpu-ebi-bus",
-};
-
-const char *dpu_power_handle_get_dbus_name(u32 bus_id)
-{
-   if (bus_id < DPU_POWER_HANDLE_DBUS_ID_MAX)
-   return data_bus_name[bus_id];
-
-   return NULL;
-}
-
 static void dpu_power_event_trigger_locked(struct dpu_power_handle *phandle,
u32 event_type)
 {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
index a65b7a297f21..f627ae28ec68 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
@@ -207,11 +207,4 @@ struct dpu_power_event *dpu_power_handle_register_event(
 void dpu_power_handle_unregister_event(struct dpu_power_handle *phandle,
struct dpu_power_event *event);
 
-/**
- * dpu_power_handle_get_dbus_name - get name of given data bus identifier
- * @bus_id:data bus identifier
- * Return: Pointer to name string if success; NULL otherwise
- */
-const char *dpu_power_handle_get_dbus_name(u32 bus_id);
-
 #endif /* _DPU_POWER_HANDLE_H_ */
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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Re: Performance regression in ast drm driver

2018-11-12 Thread Thomas Zimmermann
Hi Jean

Am 12.11.18 um 15:36 schrieb Jean Delvare:
> Hi David,
> 
> On Fri, 2018-11-09 at 10:04 +1000, David Airlie wrote:
>> On Thu, Nov 8, 2018 at 10:05 PM Jean Delvare  wrote:
>>>
>>> On Thu, 1 Nov 2018 16:27:07 +0100, Jean Delvare wrote:
 Hi David,

 The following commit:

 commit 7cf321d118a825c1541b43ca45294126fd474efa
 Author: Dave Airlie
 Date:   Mon Oct 24 15:37:48 2016 +1000

 drm/drivers: add support for using the arch wc mapping API.

 is causing a huge performance regression for the ast drm driver. In a
 text console, if I call "cat" on a large text file, it takes almost
 twice as much time to be displayed and scrolled completely.

 Can you please check that the ast driver portion of that commit is both
 correct and complete?
>>>
>>> And in the meantime, what bad will happen if we just revert the ast
>>> portion of that commit?
>>
>> This seems likely to be a hw problem with PCI writes to the AST "GPU",
>> since it's just some sort of RAM + ARM on the end of a PCIE bus, we've
>> definitely seen possible issues in the past with write combining
>> around some of the mga GPUs with some CPUs.
> 
> Takashi asked me to compare the contents of
> /sys/kernel/debug/x86/pat_memtype_list before and after the commit
> above. Before the commit, we have:
> 
> uncached-minus @ 0xfafe-0xfb00
> uncached-minus @ 0xfb00-0xfb005000
> write-combining @ 0xfb005000-0xfb584000
> 
> After the commit, we have:
> 
> uncached-minus @ 0xfafe-0xfb00
> uncached-minus @ 0xfb00-0xfb005000
> uncached-minus @ 0xfb00-0xfb80
> uncached-minus @ 0xfb005000-0xfb584000
> 
> The corresponding lines in /proc/iomem are:
> 
> f000-fed8 : PCI Bus :00
>   faf0-fb7f : PCI Bus :01
> fafe-faff : :01:01.0
> fb00-fb7f : :01:01.0
> 
> Does it help? Is the change of type expected? Is it not a problem that
> one of the ranges is overlapping with 2 other ranges?
> 

I debugged this problem with an AST 2000. What happens is that the
vesafb driver attaches first to the graphics device. It disables
write-combining and falls back to uncached access; unless the kernel has
been booted with video=vesafb:mtrr:3. Then it will set-up WC correctly.
The respective code is at [1].

Best regards
Thomas

[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/video/fbdev/vesafb.c?h=v4.20-rc2#n415

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Linux GmbH, Maxfeldstr. 5, D-90409 Nürnberg
Tel: +49-911-74053-0; Fax: +49-911-7417755;  https://www.suse.com/
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard,
Graham Norton, HRB 21284 (AG Nürnberg)



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[Bug 99923] HITMAN (2016) having lighting and artefacting, and overly light room.

2018-11-12 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=99923

--- Comment #45 from Gregor Münch  ---
Thats very good news. Thx for the effort!
I just checked that with Vulkan the game works but standard opengl crash on
start. Will contact support.

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Re: [Intel-gfx] [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Ville Syrjälä
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>  drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>  drivers/gpu/drm/i915/intel_display.c  |  2 +-
>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>  drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>  drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>  drivers/gpu/drm/tegra/dc.c|  5 +--
>  drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>  drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>  include/drm/drm_atomic_state_helper.h |  2 ++
>  18 files changed, 56 insertions(+), 81 deletions(-)
> 

> diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
> b/drivers/gpu/drm/drm_atomic_state_helper.c
> index 3ba996069d69..3eee1ca33fc5 100644
> --- a/drivers/gpu/drm/drm_atomic_state_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_state_helper.c
> @@ -55,6 +55,29 @@
>   * for these functions.
>   */
>  
> +/**
> + * __drm_atomic_helper_crtc_reset - reset state on CRTC
> + * @crtc: drm CRTC
> + * @crtc_state: CRTC state to assign
> + *
> + * Initializes the newly allocated @crtc_state and assigns it to
> + * the _conector->state pointer of @crtc, usually required when
> + * initializing the drivers or when called from the _crtc_funcs.reset
> + * hook.
> + *
> + * This is useful for drivers that subclass the CRTC state.
> + */
> +void
> +__drm_atomic_helper_crtc_reset(struct drm_crtc *crtc,
> +struct drm_crtc_state *crtc_state)
> +{
> + if (crtc_state)
> + crtc_state->crtc = crtc;

So apparently crtc and connector reset expect a NULL state, but plane
reset does not. That seems a bit inconsistent. Migth be nice to get
them all to agree on what is the correct behaviour.

> +
> + crtc->state = crtc_state;
> +}
> +EXPORT_SYMBOL(__drm_atomic_helper_crtc_reset);
> +
>  /**
>   * drm_atomic_helper_crtc_reset - default _crtc_funcs.reset hook for 
> CRTCs
>   * @crtc: drm CRTC
> @@ -64,14 +87,14 @@
>   */
>  void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)
>  {
> + struct drm_crtc_state *crtc_state =
> + kzalloc(sizeof(*crtc->state), GFP_KERNEL);
> +
>   if (crtc->state)
>   __drm_atomic_helper_crtc_destroy_state(crtc->state);
>  
>   kfree(crtc->state);
> - crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL);
> -
> - if (crtc->state)
> - crtc->state->crtc = crtc;
> + __drm_atomic_helper_crtc_reset(crtc, crtc_state);
>  }
>  

[PATCH] drm/panel: simple: fix AUO g185han01 horizontal blanking

2018-11-12 Thread Lucas Stach
The horizontal blanking periods are too short, as the values are
specified for a single LVDS channel. Since this panel is dual LVDS
they need to be doubled. With this change the panel reaches its
nominal vrefresh rate of 60Fps, instead of the 64Fps with the
current wrong blanking.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/panel/panel-simple.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index 97964f7f2ace..2c89792e91e2 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -663,9 +663,9 @@ static const struct panel_desc auo_g133han01 = {
 static const struct display_timing auo_g185han01_timings = {
.pixelclock = { 12000, 14400, 17500 },
.hactive = { 1920, 1920, 1920 },
-   .hfront_porch = { 18, 60, 74 },
-   .hback_porch = { 12, 44, 54 },
-   .hsync_len = { 10, 24, 32 },
+   .hfront_porch = { 36, 120, 148 },
+   .hback_porch = { 24, 88, 108 },
+   .hsync_len = { 20, 48, 64 },
.vactive = { 1080, 1080, 1080 },
.vfront_porch = { 6, 10, 40 },
.vback_porch = { 2, 5, 20 },
-- 
2.19.1

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Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Maarten Lankhorst
Op 12-11-18 om 17:11 schreef Sean Paul:
> On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
>> We already have __drm_atomic_helper_connector_reset() and
>> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>>
>> Most drivers already have a gpu reset hook, correct it.
>> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
>> convert it to the common one.
>>
>> Signed-off-by: Maarten Lankhorst 
>> Cc: Harry Wentland 
>> Cc: Leo Li 
>> Cc: Alex Deucher 
>> Cc: "Christian König" 
>> Cc: "David (ChunMing) Zhou" 
>> Cc: David Airlie 
>> Cc: Liviu Dudau 
>> Cc: Brian Starkey 
>> Cc: Mali DP Maintainers 
>> Cc: Boris Brezillon 
>> Cc: Nicolas Ferre 
>> Cc: Alexandre Belloni 
>> Cc: Ludovic Desroches 
>> Cc: Maarten Lankhorst 
>> Cc: Maxime Ripard 
>> Cc: Sean Paul 
>> Cc: Jani Nikula 
>> Cc: Joonas Lahtinen 
>> Cc: Rodrigo Vivi 
>> Cc: Philipp Zabel 
>> Cc: CK Hu 
>> Cc: Matthias Brugger 
>> Cc: Rob Clark 
>> Cc: Ben Skeggs 
>> Cc: Tomi Valkeinen 
>> Cc: Laurent Pinchart 
>> Cc: Kieran Bingham 
>> Cc: Sandy Huang 
>> Cc: "Heiko Stübner" 
>> Cc: Thierry Reding 
>> Cc: Jonathan Hunter 
>> Cc: Eric Anholt 
>> Cc: VMware Graphics 
>> Cc: Sinclair Yeh 
>> Cc: Thomas Hellstrom 
>> Cc: Tony Cheng 
>> Cc: Shirish S 
>> Cc: Mikita Lipski 
>> Cc: Bhawanpreet Lakha 
>> Cc: David Francis 
>> Cc: Anthony Koo 
>> Cc: Jeykumar Sankaran 
>> Cc: Jordan Crouse 
>> Cc: Bruce Wang 
>> Cc: Sravanthi Kollukuduru 
>> Cc: Archit Taneja 
>> Cc: Steve Kowalik 
>> Cc: Carsten Behling 
>> Cc: Haneen Mohammed 
>> Cc: Daniel Vetter 
>> Cc: Rodrigo Siqueira 
>> Cc: Mahesh Kumar 
>> Cc: amd-...@lists.freedesktop.org
>> Cc: dri-devel@lists.freedesktop.org
>> Cc: linux-ker...@vger.kernel.org
>> Cc: linux-arm-ker...@lists.infradead.org
>> Cc: intel-...@lists.freedesktop.org
>> Cc: linux-media...@lists.infradead.org
>> Cc: linux-arm-...@vger.kernel.org
>> Cc: freedr...@lists.freedesktop.org
>> Cc: nouv...@lists.freedesktop.org
>> Cc: linux-renesas-...@vger.kernel.org
>> Cc: linux-rockc...@lists.infradead.org
>> Cc: linux-te...@vger.kernel.org
>> ---
>>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>>  drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>>  drivers/gpu/drm/i915/intel_display.c  |  2 +-
>>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>>  drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>>  drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>>  drivers/gpu/drm/tegra/dc.c|  5 +--
>>  drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>>  drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>>  include/drm/drm_atomic_state_helper.h |  2 ++
>>  18 files changed, 56 insertions(+), 81 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> index 5064768642f3..770a71726cd1 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> @@ -2802,9 +2802,7 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
>>  if (WARN_ON(!state))
> Can you give this the same treatment as the other allocation checks?

Yeah sure, the reason I didn't was because all of the amdgpu  reset functions 
worked like that. I'll send a preparation patch to fix that up.

~Maarten

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Re: [PATCH v7 3/5] drm: Document variable refresh properties

2018-11-12 Thread Kazlauskas, Nicholas
On 11/12/18 11:12 AM, Wentland, Harry wrote:
> On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote:
>> These include the drm_connector 'vrr_capable' and the drm_crtc
>> 'vrr_enabled' properties.
>>
>> Signed-off-by: Nicholas Kazlauskas 
>> Cc: Harry Wentland 
>> Cc: Manasi Navare 
>> Cc: Pekka Paalanen 
>> Cc: Ville Syrjälä 
>> Cc: Michel Dänzer 
> 
> Looks good. Whole series is
> Reviewed-by: Harry Wentland 
> 
> How are we with the userspace patches? We should probably hold off pushing 
> the kernel patches until the userspace work is all reviewed.
> 
> Harry

Thanks for the review.

The xf86-video-amdgpu patches have been reviewed and the mesa patches 
have been partially reviewed.

Nicholas Kazlauskas

> 
>> ---
>>   Documentation/gpu/drm-kms.rst   |  7 
>>   drivers/gpu/drm/drm_connector.c | 68 +
>>   2 files changed, 75 insertions(+)
>>
>> diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
>> index 4b1501b4835b..8da2a178cf85 100644
>> --- a/Documentation/gpu/drm-kms.rst
>> +++ b/Documentation/gpu/drm-kms.rst
>> @@ -575,6 +575,13 @@ Explicit Fencing Properties
>>   .. kernel-doc:: drivers/gpu/drm/drm_atomic_uapi.c
>>  :doc: explicit fencing properties
>>   
>> +
>> +Variable Refresh Properties
>> +---
>> +
>> +.. kernel-doc:: drivers/gpu/drm/drm_connector.c
>> +   :doc: Variable refresh properties
>> +
>>   Existing KMS Properties
>>   ---
>>   
>> diff --git a/drivers/gpu/drm/drm_connector.c 
>> b/drivers/gpu/drm/drm_connector.c
>> index 49290060ab7b..0e4287461997 100644
>> --- a/drivers/gpu/drm/drm_connector.c
>> +++ b/drivers/gpu/drm/drm_connector.c
>> @@ -1255,6 +1255,74 @@ int drm_mode_create_scaling_mode_property(struct 
>> drm_device *dev)
>>   }
>>   EXPORT_SYMBOL(drm_mode_create_scaling_mode_property);
>>   
>> +/**
>> + * DOC: Variable refresh properties
>> + *
>> + * Variable refresh rate capable displays can dynamically adjust their
>> + * refresh rate by extending the duration of their vertical front porch
>> + * until page flip or timeout occurs. This can reduce or remove stuttering
>> + * and latency in scenarios where the page flip does not align with the
>> + * vblank interval.
>> + *
>> + * An example scenario would be an application flipping at a constant rate
>> + * of 48Hz on a 60Hz display. The page flip will frequently miss the vblank
>> + * interval and the same contents will be displayed twice. This can be
>> + * observed as stuttering for content with motion.
>> + *
>> + * If variable refresh rate was active on a display that supported a
>> + * variable refresh range from 35Hz to 60Hz no stuttering would be 
>> observable
>> + * for the example scenario. The minimum supported variable refresh rate of
>> + * 35Hz is below the page flip frequency and the vertical front porch can
>> + * be extended until the page flip occurs. The vblank interval will be
>> + * directly aligned to the page flip rate.
>> + *
>> + * Not all userspace content is suitable for use with variable refresh rate.
>> + * Large and frequent changes in vertical front porch duration may worsen
>> + * perceived stuttering for input sensitive applications.
>> + *
>> + * Panel brightness will also vary with vertical front porch duration. Some
>> + * panels may have noticeable differences in brightness between the minimum
>> + * vertical front porch duration and the maximum vertical front porch 
>> duration.
>> + * Large and frequent changes in vertical front porch duration may produce
>> + * observable flickering for such panels.
>> + *
>> + * Userspace control for variable refresh rate is supported via properties
>> + * on the _connector and _crtc objects.
>> + *
>> + * "vrr_capable":
>> + *  Optional _connector boolean property that drivers should attach
>> + *  with drm_connector_attach_vrr_capable_property() on connectors that
>> + *  could support variable refresh rates. Drivers should update the
>> + *  property value by calling drm_connector_set_vrr_capable_property().
>> + *
>> + *  Absence of the property should indicate absence of support.
>> + *
>> + * "vrr_enabled":
>> + *  Default _crtc boolean property that notifies the driver that the
>> + *  content on the CRTC is suitable for variable refresh rate presentation.
>> + *  The driver will take this property as a hint to enable variable
>> + *  refresh rate support if the receiver supports it, ie. if the
>> + *  "vrr_capable" property is true on the _connector object. The
>> + *  vertical front porch duration will be extended until page-flip or
>> + *  timeout when enabled.
>> + *
>> + *  The minimum vertical front porch duration is defined as the vertical
>> + *  front porch duration for the current mode.
>> + *
>> + *  The maximum vertical front porch duration is greater than or equal to
>> + *  the minimum vertical front porch duration. The duration is derived
>> + *  from the minimum supported variable refresh rate for the connector.
>> + *

[PATCH 14/15] drm/i915/tv: Fix >1024 modes on gen3

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

On gen3 we must disable the TV encoder vertical filter for >1024
pixel wide sources. Once that's done all we can is try to center
the image on the screen. Naturally the TV mode vertical resolution
must be equal or larger than the user mode vertical resolution
or else we'd have to cut off part of the user mode.

And while we may not be able to respect the user's choice of
top and bottom borders exactly (or we'd have to reject he mode
most likely), we can try to maintain the relative sizes of the
top and bottom border with respect to each orher.

Additionally we must configure the pipe as interlaced if the
TV mode is interlaced.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 100 +---
 1 file changed, 92 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 75126fce655d..7099d837e31a 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -861,6 +861,44 @@ static const struct tv_mode tv_modes[] = {
},
 };
 
+struct intel_tv_connector_state {
+   struct drm_connector_state base;
+
+   /*
+* May need to override the user margins for
+* gen3 >1024 wide source vertical centering.
+*/
+   struct {
+   u16 top, bottom;
+   } margins;
+
+   bool bypass_vfilter;
+};
+
+#define to_intel_tv_connector_state(x) container_of(x, struct 
intel_tv_connector_state, base)
+
+/**
+ * intel_digital_connector_duplicate_state - duplicate connector state
+ * @connector: digital connector
+ *
+ * Allocates and returns a copy of the connector state (both common and
+ * digital connector specific) for the specified connector.
+ *
+ * Returns: The newly allocated connector state, or NULL on failure.
+ */
+struct drm_connector_state *
+intel_tv_connector_duplicate_state(struct drm_connector *connector)
+{
+   struct intel_tv_connector_state *state;
+
+   state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
+   if (!state)
+   return NULL;
+
+   __drm_atomic_helper_connector_duplicate_state(connector, >base);
+   return >base;
+}
+
 static struct intel_tv *enc_to_tv(struct intel_encoder *encoder)
 {
return container_of(encoder, struct intel_tv, base);
@@ -1129,6 +1167,9 @@ intel_tv_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
 {
+   struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+   struct intel_tv_connector_state *tv_conn_state =
+   to_intel_tv_connector_state(conn_state);
const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
struct drm_display_mode *adjusted_mode =
_config->base.adjusted_mode;
@@ -1149,6 +1190,43 @@ intel_tv_compute_config(struct intel_encoder *encoder,
pipe_config->port_clock = tv_mode->clock;
 
intel_tv_mode_to_mode(adjusted_mode, tv_mode);
+   drm_mode_set_crtcinfo(adjusted_mode, 0);
+
+   if (IS_GEN3(dev_priv) && hdisplay > 1024) {
+   int extra, top, bottom;
+
+   extra = adjusted_mode->crtc_vdisplay - vdisplay;
+
+   if (extra < 0) {
+   DRM_DEBUG_KMS("No vertical scaling for >1024 pixel wide 
modes\n");
+   return false;
+   }
+
+   /* Need to turn off the vertical filter and center the image */
+
+   /* Attempt to maintain the relative sizes of the margins */
+   top = conn_state->tv.margins.top;
+   bottom = conn_state->tv.margins.bottom;
+
+   if (top + bottom)
+   top = extra * top / (top + bottom);
+   else
+   top = extra / 2;
+   bottom = extra - top;
+
+   tv_conn_state->margins.top = top;
+   tv_conn_state->margins.bottom = bottom;
+
+   tv_conn_state->bypass_vfilter = true;
+
+   if (!tv_mode->progressive)
+   adjusted_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+   } else {
+   tv_conn_state->margins.top = conn_state->tv.margins.top;
+   tv_conn_state->margins.bottom = conn_state->tv.margins.bottom;
+
+   tv_conn_state->bypass_vfilter = false;
+   }
 
DRM_DEBUG_KMS("TV mode:\n");
drm_mode_debug_printmodeline(adjusted_mode);
@@ -1222,8 +1300,8 @@ intel_tv_compute_config(struct intel_encoder *encoder,
  conn_state->tv.margins.left,
  conn_state->tv.margins.right);
intel_tv_scale_mode_vert(adjusted_mode, vdisplay,
-conn_state->tv.margins.top,
-conn_state->tv.margins.bottom);
+tv_conn_state->margins.top,
+ 

[PATCH 15/15] drm/i915/tv: Filter out >1024 wide modes that would need vertical scaling on gen3

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Since gen3 can't handle >1024 wide sources with vertical scaling
let's not advertize such modes in the mode list. Less tempetation
to the user to try out things that won't work.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 7099d837e31a..89c537839273 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1738,6 +1738,7 @@ intel_tv_set_mode_type(struct drm_display_mode *mode,
 static int
 intel_tv_get_modes(struct drm_connector *connector)
 {
+   struct drm_i915_private *dev_priv = to_i915(connector->dev);
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
int i, count = 0;
 
@@ -1750,6 +1751,11 @@ intel_tv_get_modes(struct drm_connector *connector)
!tv_mode->component_only)
continue;
 
+   /* no vertical scaling with wide sources on gen3 */
+   if (IS_GEN3(dev_priv) && input->w > 1024 &&
+   input->h > intel_tv_mode_vdisplay(tv_mode))
+   continue;
+
mode = drm_mode_create(connector->dev);
if (!mode)
continue;
-- 
2.18.1

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[PATCH 10/15] drm/i915/tv: Make TV mode autoselection actually useable

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

The current code insists on picking a new TV mode when
switching between component and non-component cables.
That's super annoying. Let's just keep the current TV
mode unless the new cable type actually disagrees with it.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 433f538261c1..32a8786fe0da 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1253,16 +1253,18 @@ static void intel_tv_find_better_format(struct 
drm_connector *connector)
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
int i;
 
-   if ((intel_tv->type == DRM_MODE_CONNECTOR_Component) ==
-   tv_mode->component_only)
+   /* Component supports everything so we can keep the current mode */
+   if (intel_tv->type == DRM_MODE_CONNECTOR_Component)
return;
 
+   /* If the current mode is fine don't change it */
+   if (!tv_mode->component_only)
+   return;
 
for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
-   tv_mode = tv_modes + i;
+   tv_mode = _modes[i];
 
-   if ((intel_tv->type == DRM_MODE_CONNECTOR_Component) ==
-   tv_mode->component_only)
+   if (!tv_mode->component_only)
break;
}
 
-- 
2.18.1

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[PATCH 13/15] drm/i915/tv: Generate better pipe timings for TV encoder

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

To make vblank timestamps work better with the TV encoder let's
scale the pipe timings such that the relationship between the
TV active and TV blanking periods is mirrored in the
corresponding pipe timings.

Note that in reality the pipe runs at a faster speed during the
TV vblank, and correspondigly there are periods when the pipe
is enitrely stopped. We pretend that this isn't the case and
as such we incur some error in the vblank timestamps during
the TV vblank. Further explanation of the issues in a big
comment in the code.

This makes the vblank timestamps good enough to make
i965gm (which doesn't have a working frame counter with
the TV encoder) report correct frame numbers. Previously
you could get all kinds of nonsense which resulted in
eg. glxgears reporting that it's running at twice the
actual framerate in most cases.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_reg.h |   1 +
 drivers/gpu/drm/i915/intel_tv.c | 322 +++-
 2 files changed, 278 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fe4b913e46ac..10813ae7bee7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4848,6 +4848,7 @@ enum {
 # define TV_OVERSAMPLE_NONE(2 << 18)
 /* Selects 8x oversampling */
 # define TV_OVERSAMPLE_8X  (3 << 18)
+# define TV_OVERSAMPLE_MASK(3 << 18)
 /* Selects progressive mode rather than interlaced */
 # define TV_PROGRESSIVE(1 << 17)
 /* Sets the colorburst to PAL mode.  Required for non-M PAL modes. */
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 216525dd144a..75126fce655d 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -340,7 +340,6 @@ struct tv_mode {
const struct video_levels *composite_levels, *svideo_levels;
const struct color_conversion *composite_color, *svideo_color;
const u32 *filter_table;
-   u16 max_srcw;
 };
 
 
@@ -729,7 +728,6 @@ static const struct tv_mode tv_modes[] = {
.burst_ena  = false,
 
.filter_table = filter_table,
-   .max_srcw = 800
},
{
.name   = "1080i@50Hz",
@@ -947,13 +945,183 @@ intel_tv_mode_vdisplay(const struct tv_mode *tv_mode)
return 2 * (tv_mode->nbr_end + 1);
 }
 
+static void
+intel_tv_mode_to_mode(struct drm_display_mode *mode,
+ const struct tv_mode *tv_mode)
+{
+   mode->clock = tv_mode->clock /
+   (tv_mode->oversample >> !tv_mode->progressive);
+
+   /*
+* tv_mode horizontal timings:
+*
+* hsync_end
+*| hblank_end
+*|| hblank_start
+*||   | htotal
+*| ___|
+* /   \___
+* \__/\
+*/
+   mode->hdisplay =
+   tv_mode->hblank_start - tv_mode->hblank_end;
+   mode->hsync_start = mode->hdisplay +
+   tv_mode->htotal - tv_mode->hblank_start;
+   mode->hsync_end = mode->hsync_start +
+   tv_mode->hsync_end;
+   mode->htotal = tv_mode->htotal + 1;
+
+   /*
+* tv_mode vertical timings:
+*
+* vsync_start
+*| vsync_end
+*|  | vi_end nbr_end
+*|  ||   |
+*|  | ___
+* \__/   \
+*\__/
+*/
+   mode->vdisplay = intel_tv_mode_vdisplay(tv_mode);
+   if (tv_mode->progressive) {
+   mode->vsync_start = mode->vdisplay +
+   tv_mode->vsync_start_f1 + 1;
+   mode->vsync_end = mode->vsync_start +
+   tv_mode->vsync_len;
+   mode->vtotal = mode->vdisplay +
+   tv_mode->vi_end_f1 + 1;
+   } else {
+   mode->vsync_start = mode->vdisplay +
+   tv_mode->vsync_start_f1 + 1 +
+   tv_mode->vsync_start_f2 + 1;
+   mode->vsync_end = mode->vsync_start +
+   2 * tv_mode->vsync_len;
+   mode->vtotal = mode->vdisplay +
+   tv_mode->vi_end_f1 + 1 +
+   tv_mode->vi_end_f2 + 1;
+   }
+
+   /* TV has it's own notion of sync and other mode flags, so clear them. 
*/
+   mode->flags = 0;
+
+   mode->vrefresh = 0;
+   mode->vrefresh = drm_mode_vrefresh(mode);
+
+   snprintf(mode->name, sizeof(mode->name),
+"%dx%d%c (%s)",
+mode->hdisplay, mode->vdisplay,
+tv_mode->progressive ? 'p' : 'i',
+tv_mode->name);
+}
+
+static void intel_tv_scale_mode_horiz(struct drm_display_mode *mode,
+ int hdisplay, int left_margin,
+ int 

[PATCH 12/15] drm/i915/tv: Add 1080p30/50/60 TV modes

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Add the missing 1080p TV modes. On gen4 all of them work just fine,
whereas on gen3 only the 30Hz mode actually works correctly.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 90 +++--
 1 file changed, 86 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index c39e9a5b43db..216525dd144a 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -783,6 +783,84 @@ static const struct tv_mode tv_modes[] = {
 
.filter_table = filter_table,
},
+
+   {
+   .name   = "1080p@30Hz",
+   .clock  = 148500,
+   .refresh= 3,
+   .oversample = 2,
+   .component_only = true,
+
+   .hsync_end  = 88,   .hblank_end = 235,
+   .hblank_start   = 2155, .htotal = 2199,
+
+   .progressive= true, .trilevel_sync = true,
+
+   .vsync_start_f1 = 8,   .vsync_start_f2 = 8,
+   .vsync_len  = 10,
+
+   .veq_ena= false,.veq_start_f1   = 0,
+   .veq_start_f2   = 0,.veq_len= 0,
+
+   .vi_end_f1  = 44,   .vi_end_f2  = 44,
+   .nbr_end= 1079,
+
+   .burst_ena  = false,
+
+   .filter_table = filter_table,
+   },
+
+   {
+   .name   = "1080p@50Hz",
+   .clock  = 148500,
+   .refresh= 5,
+   .oversample = 1,
+   .component_only = true,
+
+   .hsync_end  = 88,   .hblank_end = 235,
+   .hblank_start   = 2155, .htotal = 2639,
+
+   .progressive= true, .trilevel_sync = true,
+
+   .vsync_start_f1 = 8,   .vsync_start_f2 = 8,
+   .vsync_len  = 10,
+
+   .veq_ena= false,.veq_start_f1   = 0,
+   .veq_start_f2   = 0,.veq_len= 0,
+
+   .vi_end_f1  = 44,   .vi_end_f2  = 44,
+   .nbr_end= 1079,
+
+   .burst_ena  = false,
+
+   .filter_table = filter_table,
+   },
+
+   {
+   .name   = "1080p@60Hz",
+   .clock  = 148500,
+   .refresh= 6,
+   .oversample = 1,
+   .component_only = true,
+
+   .hsync_end  = 88,   .hblank_end = 235,
+   .hblank_start   = 2155, .htotal = 2199,
+
+   .progressive= true, .trilevel_sync = true,
+
+   .vsync_start_f1 = 8,   .vsync_start_f2 = 8,
+   .vsync_len  = 10,
+
+   .veq_ena= false,.veq_start_f1   
= 0,
+   .veq_start_f2   = 0,.veq_len= 0,
+
+   .vi_end_f1  = 44,   .vi_end_f2  = 44,
+   .nbr_end= 1079,
+
+   .burst_ena  = false,
+
+   .filter_table = filter_table,
+   },
 };
 
 static struct intel_tv *enc_to_tv(struct intel_encoder *encoder)
@@ -1538,11 +1616,15 @@ intel_tv_init(struct drm_i915_private *dev_priv)
connector->doublescan_allowed = false;
 
/* Create TV properties then attach current values */
-   for (i = 0; i < ARRAY_SIZE(tv_modes); i++)
+   for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
+   /* 1080p50/1080p60 not supported on gen3 */
+   if (IS_GEN3(dev_priv) &&
+   tv_modes[i].oversample == 1)
+   break;
+
tv_format_names[i] = tv_modes[i].name;
-   drm_mode_create_tv_properties(dev,
- ARRAY_SIZE(tv_modes),
- tv_format_names);
+   }
+   drm_mode_create_tv_properties(dev, i, tv_format_names);
 
drm_object_attach_property(>base, 
dev->mode_config.tv_mode_property,
   state->tv.mode);
-- 
2.18.1

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[PATCH 08/15] drm/i915/tv: Deobfuscate preferred mode selection

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Rewrite the preferred mode selection to just check
whether the TV modes is HD or SD. For SD TV modes we
favor 480 line modes, for 720p we prefer 720 line modes,
and for 1080i/p we prefer 1080 line modes.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 50 -
 1 file changed, 30 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 97a82878359f..54189080cfb1 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -860,6 +860,14 @@ intel_tv_mode_valid(struct drm_connector *connector,
return MODE_CLOCK_RANGE;
 }
 
+static int
+intel_tv_mode_vdisplay(const struct tv_mode *tv_mode)
+{
+   if (tv_mode->progressive)
+   return tv_mode->nbr_end + 1;
+   else
+   return 2 * (tv_mode->nbr_end + 1);
+}
 
 static void
 intel_tv_get_config(struct intel_encoder *encoder,
@@ -1098,10 +1106,7 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
/* Filter ctl must be set before TV_WIN_SIZE */
I915_WRITE(TV_FILTER_CTL_1, TV_AUTO_SCALE);
xsize = tv_mode->hblank_start - tv_mode->hblank_end;
-   if (tv_mode->progressive)
-   ysize = tv_mode->nbr_end + 1;
-   else
-   ysize = 2 * (tv_mode->nbr_end + 1);
+   ysize = intel_tv_mode_vdisplay(tv_mode);
 
xpos = conn_state->tv.margins.left;
ypos = conn_state->tv.margins.top;
@@ -1320,22 +1325,28 @@ static const struct input_res {
{"1920x1080", 1920, 1080},
 };
 
-/*
- * Chose preferred mode  according to line number of TV format
- */
+/* Choose preferred mode according to line number of TV format */
+static bool
+intel_tv_is_preferred_mode(const struct drm_display_mode *mode,
+  const struct tv_mode *tv_mode)
+{
+   int vdisplay = intel_tv_mode_vdisplay(tv_mode);
+
+   /* prefer 480 line modes for all SD TV modes */
+   if (vdisplay <= 576)
+   vdisplay = 480;
+
+   return vdisplay == mode->vdisplay;
+}
+
 static void
-intel_tv_choose_preferred_modes(const struct tv_mode *tv_mode,
-  struct drm_display_mode *mode_ptr)
+intel_tv_set_mode_type(struct drm_display_mode *mode,
+  const struct tv_mode *tv_mode)
 {
-   if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480)
-   mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
-   else if (tv_mode->nbr_end > 480) {
-   if (tv_mode->progressive == true && tv_mode->nbr_end < 720) {
-   if (mode_ptr->vdisplay == 720)
-   mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
-   } else if (mode_ptr->vdisplay == 1080)
-   mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
-   }
+   mode->type = DRM_MODE_TYPE_DRIVER;
+
+   if (intel_tv_is_preferred_mode(mode, tv_mode))
+   mode->type |= DRM_MODE_TYPE_PREFERRED;
 }
 
 static int
@@ -1383,8 +1394,7 @@ intel_tv_get_modes(struct drm_connector *connector)
tmp = div_u64(tmp, 100);
mode_ptr->clock = (int) tmp;
 
-   mode_ptr->type = DRM_MODE_TYPE_DRIVER;
-   intel_tv_choose_preferred_modes(tv_mode, mode_ptr);
+   intel_tv_set_mode_type(mode_ptr, tv_mode);
drm_mode_probed_add(connector, mode_ptr);
count++;
}
-- 
2.18.1

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[PATCH 09/15] drm/i915/tv: Use drm_mode_set_name() to name TV modes

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

No point in storing the mode names in the array. drm_mode_set_name()
will give us the same names without wasting space for these string
constants.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 54189080cfb1..433f538261c1 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1313,16 +1313,15 @@ intel_tv_detect(struct drm_connector *connector,
 }
 
 static const struct input_res {
-   const char *name;
-   int w, h;
+   u16 w, h;
 } input_res_table[] = {
-   {"640x480", 640, 480},
-   {"800x600", 800, 600},
-   {"1024x768", 1024, 768},
-   {"1280x1024", 1280, 1024},
-   {"848x480", 848, 480},
-   {"1280x720", 1280, 720},
-   {"1920x1080", 1920, 1080},
+   { 640, 480 },
+   { 800, 600 },
+   { 1024, 768 },
+   { 1280, 1024 },
+   { 848, 480 },
+   { 1280, 720 },
+   { 1920, 1080 },
 };
 
 /* Choose preferred mode according to line number of TV format */
@@ -1373,7 +1372,6 @@ intel_tv_get_modes(struct drm_connector *connector)
mode_ptr = drm_mode_create(connector->dev);
if (!mode_ptr)
continue;
-   strlcpy(mode_ptr->name, input->name, DRM_DISPLAY_MODE_LEN);
 
mode_ptr->hdisplay = hactive_s;
mode_ptr->hsync_start = hactive_s + 1;
@@ -1395,6 +1393,9 @@ intel_tv_get_modes(struct drm_connector *connector)
mode_ptr->clock = (int) tmp;
 
intel_tv_set_mode_type(mode_ptr, tv_mode);
+
+   drm_mode_set_name(mode_ptr);
+
drm_mode_probed_add(connector, mode_ptr);
count++;
}
-- 
2.18.1

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Re: [PATCH v2 0/7] tda998x: allow use with bridge based devices

2018-11-12 Thread Russell King - ARM Linux
On Mon, Nov 12, 2018 at 04:50:37PM +, Peter Rosin wrote:
> On 2018-08-02 08:06, Peter Rosin wrote:
> > On 2018-08-01 11:35, Russell King - ARM Linux wrote:
> >> On Wed, Aug 01, 2018 at 11:01:12AM +0200, Peter Rosin wrote:
> >>> I don't think it's a problem with the atmel I2C driver. IIRC, the
> >>> tda998x driver issues the command a initiate the EDID read, but that
> >>> times out. So it appears to be the TDA19988 that fails to read the
> >>> EDID over the DDC bus? Which brings me to the double problem with the
> >>> scopes mentioned above...
> >>
> >> It sounds like it.
> >>
> >> It may be helpful to know that there are HDMI pass-through boards
> >> available that give access to all the HDMI signals:
> >>
> >> https://elabbay.myshopify.com/collections/camera
> >> https://elabbay.myshopify.com/collections/camera/products/hdmi-af-af-v1a-hdmi-type-a-female-to-hdmi-type-a-male-pass-through-adapter-breakout-board
> >>
> >> I've never bought from them, so please don't take this as a
> >> recommendation - the fact that there seems to be no company details
> >> on their site doesn't seem good, and as the whois for elabbay.com is
> >> obscured also doesn't give me any confidence to buy from them.
> > 
> > I still will not be able to inspect the DDC bus between the TDA19988
> > and the buffer circuit (IP4786), but the gadget seems useful enough and
> > it's not a shitload of money. We'll see how long it takes for it to get
> > here...
> > 
> > Thanks for the pointer! Maybe :-)
> 
> I got the pass-through board a while back, and that board works as expected
> and there was no problem with ordering etc. What I could see with that was
> that the TDA19988 was able to initiate a start condition (SDA -> low) but
> then nothing more happened.
> 
> Then last week, someone noticed that even though the TDA19988 is driven by
> 1.8V, it still needs the high signals of the DDC bus to be above 3V, which
> was unexpected and not catered for by the design. Changing VCC(SYS) of the
> buffer circuit in place (IP4786, pin 27) to 3.3V fixed the issue and EDID
> reading works, and this was confirmed earlier today.
> 
> So, the problem was that the TDA19988 only ever saw "low" DDC signals, and
> probably aborted when the bus appeared busy. Or something.

Thanks for following up on this issue.

Normally, if a master device sees that the I2C clock is being held low,
it assumes that a slave is "clock stretching" and it will wait until it
is raised.  I wonder if that's what is causing this issue here.

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[PATCH 11/15] drm/i915/tv: Nuke reported_modes[]

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Remove the silly reported_modes[] array. I suppse once upon a time
this actually had something to do with modes we reported to userspace.
Now it is just the placeholder for the mode we use for load detection.
We don't need it even for that, and instead we can just rely on
the fallback mode in intel_get_load_detect_pipe().

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 22 +-
 1 file changed, 1 insertion(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 32a8786fe0da..c39e9a5b43db 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1130,23 +1130,6 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
I915_WRITE(TV_CTL, tv_ctl);
 }
 
-static const struct drm_display_mode reported_modes[] = {
-   {
-   .name = "NTSC 480i",
-   .clock = 108000,
-   .hdisplay = 1280,
-   .hsync_start = 1368,
-   .hsync_end = 1496,
-   .htotal = 1712,
-
-   .vdisplay = 1024,
-   .vsync_start = 1027,
-   .vsync_end = 1034,
-   .vtotal = 1104,
-   .type = DRM_MODE_TYPE_DRIVER,
-   },
-};
-
 static int
 intel_tv_detect_type(struct intel_tv *intel_tv,
  struct drm_connector *connector)
@@ -1276,7 +1259,6 @@ intel_tv_detect(struct drm_connector *connector,
struct drm_modeset_acquire_ctx *ctx,
bool force)
 {
-   struct drm_display_mode mode;
struct intel_tv *intel_tv = intel_attached_tv(connector);
enum drm_connector_status status;
int type;
@@ -1285,13 +1267,11 @@ intel_tv_detect(struct drm_connector *connector,
  connector->base.id, connector->name,
  force);
 
-   mode = reported_modes[0];
-
if (force) {
struct intel_load_detect_pipe tmp;
int ret;
 
-   ret = intel_get_load_detect_pipe(connector, , , ctx);
+   ret = intel_get_load_detect_pipe(connector, NULL, , ctx);
if (ret < 0)
return ret;
 
-- 
2.18.1

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[PATCH 07/15] drm/i915/tv: Nuke silly 0 inittialization of xpos/ypos

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Just assign the margin values directly to xpos/ypos instead
of first initializing to zero and then adding the values.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 72de154b8627..97a82878359f 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -994,7 +994,7 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
const struct video_levels *video_levels;
const struct color_conversion *color_conversion;
bool burst_ena;
-   int xpos = 0x0, ypos = 0x0;
+   int xpos, ypos;
unsigned int xsize, ysize;
 
if (!tv_mode)
@@ -1103,8 +1103,8 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
else
ysize = 2 * (tv_mode->nbr_end + 1);
 
-   xpos += conn_state->tv.margins.left;
-   ypos += conn_state->tv.margins.top;
+   xpos = conn_state->tv.margins.left;
+   ypos = conn_state->tv.margins.top;
xsize -= (conn_state->tv.margins.left +
  conn_state->tv.margins.right);
ysize -= (conn_state->tv.margins.top +
-- 
2.18.1

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[PATCH 05/15] drm/i915/tv: Store the TV oversampling factor in the TV mode

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Store the oversampling factor as a number in the TV modes. We
shall want to arithmetic with this which is easier if it's
a number we can use directly.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 42 ++---
 1 file changed, 28 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index dea24ef88763..96257b29d07c 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -307,7 +307,7 @@ struct tv_mode {
 
u32 clock;
u16 refresh; /* in millihertz (for precision) */
-   u32 oversample;
+   u8 oversample;
u8 hsync_end;
u16 hblank_start, hblank_end, htotal;
bool progressive : 1, trilevel_sync : 1, component_only : 1;
@@ -379,7 +379,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "NTSC-M",
.clock  = 108000,
.refresh= 59940,
-   .oversample = TV_OVERSAMPLE_8X,
+   .oversample = 8,
.component_only = 0,
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
 
@@ -422,7 +422,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "NTSC-443",
.clock  = 108000,
.refresh= 59940,
-   .oversample = TV_OVERSAMPLE_8X,
+   .oversample = 8,
.component_only = 0,
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */
.hsync_end  = 64,   .hblank_end = 124,
@@ -464,7 +464,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "NTSC-J",
.clock  = 108000,
.refresh= 59940,
-   .oversample = TV_OVERSAMPLE_8X,
+   .oversample = 8,
.component_only = 0,
 
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
@@ -507,7 +507,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "PAL-M",
.clock  = 108000,
.refresh= 59940,
-   .oversample = TV_OVERSAMPLE_8X,
+   .oversample = 8,
.component_only = 0,
 
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
@@ -551,7 +551,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "PAL-N",
.clock  = 108000,
.refresh= 5,
-   .oversample = TV_OVERSAMPLE_8X,
+   .oversample = 8,
.component_only = 0,
 
.hsync_end  = 64,   .hblank_end = 128,
@@ -596,7 +596,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "PAL",
.clock  = 108000,
.refresh= 5,
-   .oversample = TV_OVERSAMPLE_8X,
+   .oversample = 8,
.component_only = 0,
 
.hsync_end  = 64,   .hblank_end = 142,
@@ -638,7 +638,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "480p",
.clock  = 108000,
.refresh= 59940,
-   .oversample = TV_OVERSAMPLE_4X,
+   .oversample = 4,
.component_only = 1,
 
.hsync_end  = 64,   .hblank_end = 122,
@@ -662,7 +662,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "576p",
.clock  = 108000,
.refresh= 5,
-   .oversample = TV_OVERSAMPLE_4X,
+   .oversample = 4,
.component_only = 1,
 
.hsync_end  = 64,   .hblank_end = 139,
@@ -686,7 +686,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "720p@60Hz",
.clock  = 148500,
.refresh= 6,
-   .oversample = TV_OVERSAMPLE_2X,
+   .oversample = 2,
.component_only = 1,
 
.hsync_end  = 80,   .hblank_end = 300,
@@ -710,7 +710,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "720p@50Hz",
.clock  = 148500,
.refresh= 5,
-   .oversample = TV_OVERSAMPLE_2X,
+   .oversample = 2,
.component_only = 1,
 
.hsync_end  = 80,   .hblank_end = 300,
@@ -735,7 +735,7 @@ static const struct tv_mode tv_modes[] = {
.name   = "1080i@50Hz",
.clock  = 

[PATCH 04/15] drm/i915/tv: Fix tv mode clocks

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

The oversample clock is always supposed to be either 108 MHz
or 148.5 MHz. Make it so.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 219a16d6dcc2..dea24ef88763 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -636,7 +636,7 @@ static const struct tv_mode tv_modes[] = {
},
{
.name   = "480p",
-   .clock  = 107520,
+   .clock  = 108000,
.refresh= 59940,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -660,7 +660,7 @@ static const struct tv_mode tv_modes[] = {
},
{
.name   = "576p",
-   .clock  = 107520,
+   .clock  = 108000,
.refresh= 5,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -684,7 +684,7 @@ static const struct tv_mode tv_modes[] = {
},
{
.name   = "720p@60Hz",
-   .clock  = 148800,
+   .clock  = 148500,
.refresh= 6,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -708,7 +708,7 @@ static const struct tv_mode tv_modes[] = {
},
{
.name   = "720p@50Hz",
-   .clock  = 148800,
+   .clock  = 148500,
.refresh= 5,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -733,7 +733,7 @@ static const struct tv_mode tv_modes[] = {
},
{
.name   = "1080i@50Hz",
-   .clock  = 148800,
+   .clock  = 148500,
.refresh= 5,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -759,7 +759,7 @@ static const struct tv_mode tv_modes[] = {
},
{
.name   = "1080i@60Hz",
-   .clock  = 148800,
+   .clock  = 148500,
.refresh= 6,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -1114,7 +1114,7 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
 static const struct drm_display_mode reported_modes[] = {
{
.name = "NTSC 480i",
-   .clock = 107520,
+   .clock = 108000,
.hdisplay = 1280,
.hsync_start = 1368,
.hsync_end = 1496,
-- 
2.18.1

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[PATCH 06/15] drm/i915/tv: Use bools where appropriate

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

'component_only' is a bool. Initialize it like a bool.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 96257b29d07c..72de154b8627 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -380,7 +380,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 59940,
.oversample = 8,
-   .component_only = 0,
+   .component_only = false,
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
 
.hsync_end  = 64,   .hblank_end = 124,
@@ -423,7 +423,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 59940,
.oversample = 8,
-   .component_only = 0,
+   .component_only = false,
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */
.hsync_end  = 64,   .hblank_end = 124,
.hblank_start   = 836,  .htotal = 857,
@@ -465,7 +465,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 59940,
.oversample = 8,
-   .component_only = 0,
+   .component_only = false,
 
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
.hsync_end  = 64,   .hblank_end = 124,
@@ -508,7 +508,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 59940,
.oversample = 8,
-   .component_only = 0,
+   .component_only = false,
 
/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
.hsync_end  = 64, .hblank_end   = 124,
@@ -552,7 +552,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 5,
.oversample = 8,
-   .component_only = 0,
+   .component_only = false,
 
.hsync_end  = 64,   .hblank_end = 128,
.hblank_start = 844,.htotal = 863,
@@ -597,7 +597,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 5,
.oversample = 8,
-   .component_only = 0,
+   .component_only = false,
 
.hsync_end  = 64,   .hblank_end = 142,
.hblank_start   = 844,  .htotal = 863,
@@ -639,7 +639,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 59940,
.oversample = 4,
-   .component_only = 1,
+   .component_only = true,
 
.hsync_end  = 64,   .hblank_end = 122,
.hblank_start   = 842,  .htotal = 857,
@@ -663,7 +663,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 108000,
.refresh= 5,
.oversample = 4,
-   .component_only = 1,
+   .component_only = true,
 
.hsync_end  = 64,   .hblank_end = 139,
.hblank_start   = 859,  .htotal = 863,
@@ -687,7 +687,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 148500,
.refresh= 6,
.oversample = 2,
-   .component_only = 1,
+   .component_only = true,
 
.hsync_end  = 80,   .hblank_end = 300,
.hblank_start   = 1580, .htotal = 1649,
@@ -711,7 +711,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 148500,
.refresh= 5,
.oversample = 2,
-   .component_only = 1,
+   .component_only = true,
 
.hsync_end  = 80,   .hblank_end = 300,
.hblank_start   = 1580, .htotal = 1979,
@@ -736,7 +736,7 @@ static const struct tv_mode tv_modes[] = {
.clock  = 148500,
.refresh= 5,
.oversample = 2,
-   .component_only = 1,
+   .component_only = true,
 
.hsync_end  = 88,  

[PATCH 07/15] drm/i915/tv: Nuke silly 0 initialzation of xpos/ypos

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Just assign the margin values directly to xpos/ypos instead
of first initializing to zero and then adding the values.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 72de154b8627..97a82878359f 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -994,7 +994,7 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
const struct video_levels *video_levels;
const struct color_conversion *color_conversion;
bool burst_ena;
-   int xpos = 0x0, ypos = 0x0;
+   int xpos, ypos;
unsigned int xsize, ysize;
 
if (!tv_mode)
@@ -1103,8 +1103,8 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
else
ysize = 2 * (tv_mode->nbr_end + 1);
 
-   xpos += conn_state->tv.margins.left;
-   ypos += conn_state->tv.margins.top;
+   xpos = conn_state->tv.margins.left;
+   ypos = conn_state->tv.margins.top;
xsize -= (conn_state->tv.margins.left +
  conn_state->tv.margins.right);
ysize -= (conn_state->tv.margins.top +
-- 
2.18.1

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[PATCH 03/15] drm/i915/tv: Fix interlaced ysize calculation

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Fix the calculation of the vertical active period for interlaced
TV modes.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_tv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 860f306a23ba..219a16d6dcc2 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1087,7 +1087,7 @@ static void intel_tv_pre_enable(struct intel_encoder 
*encoder,
if (tv_mode->progressive)
ysize = tv_mode->nbr_end + 1;
else
-   ysize = 2*tv_mode->nbr_end + 1;
+   ysize = 2 * (tv_mode->nbr_end + 1);
 
xpos += conn_state->tv.margins.left;
ypos += conn_state->tv.margins.top;
-- 
2.18.1

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[PATCH 00/15] drm/i915: Fix TV encoder support

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

Our TV encoder support isn't in the best shape. This series fixes
it up quite a bit.

The most important part is fixing the issues resulting from the
lack of frame counter on i965gm which causes nasty flip_done
timeouts when we attempt to do anything with the TV encoder 
(including load detection).

Dust off those component cables people! ;)

Entire series is available here:
git://github.com/vsyrjala/linux.git tvout_fixes

Ville Syrjälä (15):
  drm/vblank: Allow dynamic per-crtc max_vblank_count
  drm/i915: Don't try to use the hardware frame counter with i965gm TV
output
  drm/i915/tv: Fix interlaced ysize calculation
  drm/i915/tv: Fix tv mode clocks
  drm/i915/tv: Store the TV oversampling factor in the TV mode
  drm/i915/tv: Use bools where appropriate
  drm/i915/tv: Nuke silly 0 inittialization of xpos/ypos
  drm/i915/tv: Deobfuscate preferred mode selection
  drm/i915/tv: Use drm_mode_set_name() to name TV modes
  drm/i915/tv: Make TV mode autoselection actually useable
  drm/i915/tv: Nuke reported_modes[]
  drm/i915/tv: Add 1080p30/50/60 TV modes
  drm/i915/tv: Generate better pipe timings for TV encoder
  drm/i915/tv: Fix >1024 modes on gen3
  drm/i915/tv: Filter out >1024 wide modes that would need vertical
scaling on gen3

 drivers/gpu/drm/drm_vblank.c |  39 +-
 drivers/gpu/drm/i915/i915_irq.c  |  10 +-
 drivers/gpu/drm/i915/i915_reg.h  |   1 +
 drivers/gpu/drm/i915/intel_display.c |  40 +-
 drivers/gpu/drm/i915/intel_tv.c  | 695 +--
 include/drm/drm_vblank.h |   8 +
 6 files changed, 640 insertions(+), 153 deletions(-)

-- 
2.18.1

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[PATCH 02/15] drm/i915: Don't try to use the hardware frame counter with i965gm TV output

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

On i965gm the hardware frame counter does not work when
the TV encoder is active. So let's not try to consult
the hardware frame counter in that case. Instead we'll
fall back to the timestamp based guesstimation method
used on gen2.

Note that the pipe timings generated by the TV encoder
are also rather peculiar. Apparently the pipe wants to
run at a much higher speed (related to the oversample
clock somehow it seems) but during the vertical active
period the TV encoder stalls the pipe every few lines
to keep its speed in check. But once the vertical
blanking period is reached the pipe gets to run at full
speed. This means our vblank timestamp estimates are
suspect. Fixing all that would require quite a bit
more work. This simple fix at least avoids the nasty
vblank timeouts that are happening currently.

Curiously the frame counter works just fine on i945gm
and gm45. I don't really understand what kind of mishap
occurred with the hardware design on i965gm. Sadly
I wasn't able to find any chicken bits etc. that would
fix the frame counter :(

Cc: sta...@vger.kernel.org
Fixes: 51e31d49c890 ("drm/i915: Use generic vblank wait")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93782
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_irq.c  | 10 ++-
 drivers/gpu/drm/i915/intel_display.c | 40 +++-
 2 files changed, 43 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d447d7d508f4..019cb685986c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4843,8 +4843,16 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
dev->max_vblank_count = 0x; /* full 32 bit counter */
dev->driver->get_vblank_counter = g4x_get_vblank_counter;
} else {
+   /*
+* On i965gm the hardware frame counter reads zero
+* when the TV encoder is used. Hence we configure
+* max_vblank_count dynamically for each crtc.
+*/
+   if (IS_I965GM(dev_priv))
+   dev->max_vblank_count = 0;
+   else
+   dev->max_vblank_count = 0xff; /* only 24 bits of 
frame count */
dev->driver->get_vblank_counter = i915_get_vblank_counter;
-   dev->max_vblank_count = 0xff; /* only 24 bits of frame 
count */
}
 
/*
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 940577f8c041..2dccb3310ad2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5504,6 +5504,32 @@ static void intel_encoders_post_pll_disable(struct 
drm_crtc *crtc,
}
 }
 
+static u32 intel_crtc_max_vblank_count(const struct intel_crtc_state 
*crtc_state)
+{
+   struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
+   u32 max_vblank_count = dev_priv->drm.max_vblank_count;
+
+   /*
+* On i965gm the hardware frame counter always
+* reads zero when the TV encoder is used :(
+* Otherwise we get the 24 bit frame counter.
+*/
+   if (IS_I965GM(dev_priv) &&
+   (crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT)) == 0)
+   max_vblank_count = 0xff; /* only 24 bits of frame count */
+
+   return max_vblank_count;
+}
+
+static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
+{
+   struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+
+   drm_crtc_set_max_vblank_count(>base,
+ intel_crtc_max_vblank_count(crtc_state));
+   drm_crtc_vblank_on(>base);
+}
+
 static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
 struct drm_atomic_state *old_state)
 {
@@ -5577,7 +5603,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state 
*pipe_config,
ironlake_pch_enable(old_intel_state, pipe_config);
 
assert_vblank_disabled(crtc);
-   drm_crtc_vblank_on(crtc);
+   intel_crtc_vblank_on(pipe_config);
 
intel_encoders_enable(crtc, pipe_config, old_state);
 
@@ -5734,7 +5760,7 @@ static void haswell_crtc_enable(struct intel_crtc_state 
*pipe_config,
intel_ddi_set_vc_payload_alloc(pipe_config, true);
 
assert_vblank_disabled(crtc);
-   drm_crtc_vblank_on(crtc);
+   intel_crtc_vblank_on(pipe_config);
 
intel_encoders_enable(crtc, pipe_config, old_state);
 
@@ -6074,7 +6100,7 @@ static void valleyview_crtc_enable(struct 
intel_crtc_state *pipe_config,
intel_enable_pipe(pipe_config);
 
assert_vblank_disabled(crtc);
-   drm_crtc_vblank_on(crtc);
+   intel_crtc_vblank_on(pipe_config);
 
intel_encoders_enable(crtc, pipe_config, old_state);
 }
@@ -6133,7 +6159,7 @@ static void i9xx_crtc_enable(struct 

[PATCH 01/15] drm/vblank: Allow dynamic per-crtc max_vblank_count

2018-11-12 Thread Ville Syrjala
From: Ville Syrjälä 

On i965gm we need to adjust max_vblank_count dynamically
depending on whether the TV encoder is used or not. To
that end add a per-crtc max_vblank_count that takes
precedence over its device wide counterpart. The driver
can now call drm_crtc_set_max_vblank_count() to configure
the per-crtc value before calling drm_vblank_on().

Also looks like there was some discussion about exynos needing
similar treatment.

Cc: sta...@vger.kernel.org
Cc: Inki Dae 
Cc: Daniel Vetter 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_vblank.c | 39 
 include/drm/drm_vblank.h |  8 
 2 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index 98e091175921..c3abbdca8aba 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -105,13 +105,20 @@ static void store_vblank(struct drm_device *dev, unsigned 
int pipe,
write_sequnlock(>seqlock);
 }
 
+static u32 drm_max_vblank_count(struct drm_device *dev, unsigned int pipe)
+{
+   struct drm_vblank_crtc *vblank = >vblank[pipe];
+
+   return vblank->max_vblank_count ?: dev->max_vblank_count;
+}
+
 /*
  * "No hw counter" fallback implementation of .get_vblank_counter() hook,
  * if there is no useable hardware frame counter available.
  */
 static u32 drm_vblank_no_hw_counter(struct drm_device *dev, unsigned int pipe)
 {
-   WARN_ON_ONCE(dev->max_vblank_count != 0);
+   WARN_ON_ONCE(drm_max_vblank_count(dev, pipe) != 0);
return 0;
 }
 
@@ -198,6 +205,7 @@ static void drm_update_vblank_count(struct drm_device *dev, 
unsigned int pipe,
ktime_t t_vblank;
int count = DRM_TIMESTAMP_MAXRETRIES;
int framedur_ns = vblank->framedur_ns;
+   u32 max_vblank_count = drm_max_vblank_count(dev, pipe);
 
/*
 * Interrupts were disabled prior to this call, so deal with counter
@@ -216,9 +224,9 @@ static void drm_update_vblank_count(struct drm_device *dev, 
unsigned int pipe,
rc = drm_get_last_vbltimestamp(dev, pipe, _vblank, 
in_vblank_irq);
} while (cur_vblank != __get_vblank_counter(dev, pipe) && --count > 0);
 
-   if (dev->max_vblank_count != 0) {
+   if (max_vblank_count) {
/* trust the hw counter when it's around */
-   diff = (cur_vblank - vblank->last) & dev->max_vblank_count;
+   diff = (cur_vblank - vblank->last) & max_vblank_count;
} else if (rc && framedur_ns) {
u64 diff_ns = ktime_to_ns(ktime_sub(t_vblank, vblank->time));
 
@@ -258,7 +266,8 @@ static void drm_update_vblank_count(struct drm_device *dev, 
unsigned int pipe,
  pipe, vblank->count, diff, cur_vblank, vblank->last);
 
if (diff == 0) {
-   WARN_ON_ONCE(cur_vblank != vblank->last);
+   WARN_ON_ONCE(max_vblank_count &&
+cur_vblank != vblank->last);
return;
}
 
@@ -1204,6 +1213,28 @@ void drm_crtc_vblank_reset(struct drm_crtc *crtc)
 }
 EXPORT_SYMBOL(drm_crtc_vblank_reset);
 
+/**
+ * drm_crtc_set_max_vblank_count - configure the hw max vblank counter value
+ * @crtc: CRTC in question
+ * @max_vblank_count: max hardware vblank counter value
+ *
+ * Update the maximum hardware vblank counter value for @crtc. Useful
+ * for hardware where the operation of the hardware vblank counter
+ * depends on the active display configuration.
+ *
+ * If used, must be called before drm_vblank_on().
+ */
+void drm_crtc_set_max_vblank_count(struct drm_crtc *crtc,
+  u32 max_vblank_count)
+{
+   struct drm_device *dev = crtc->dev;
+   unsigned int pipe = drm_crtc_index(crtc);
+   struct drm_vblank_crtc *vblank = >vblank[pipe];
+
+   vblank->max_vblank_count = max_vblank_count;
+}
+EXPORT_SYMBOL(drm_crtc_set_max_vblank_count);
+
 /**
  * drm_crtc_vblank_on - enable vblank events on a CRTC
  * @crtc: CRTC in question
diff --git a/include/drm/drm_vblank.h b/include/drm/drm_vblank.h
index 6ad9630d4f48..ecb2cf9913e2 100644
--- a/include/drm/drm_vblank.h
+++ b/include/drm/drm_vblank.h
@@ -128,6 +128,12 @@ struct drm_vblank_crtc {
 * @last: Protected by _device.vbl_lock, used for wraparound 
handling.
 */
u32 last;
+   /**
+* @max_vblank_count: Maximum value of the hardware vblank counter.
+* If non-zero this takes precedence over _device.max_vblank_count
+* for this crtc. Otherwise _device.max_vblank_count is used.
+*/
+   u32 max_vblank_count;
/**
 * @inmodeset: Tracks whether the vblank is disabled due to a modeset.
 * For legacy driver bit 2 additionally tracks whether an additional
@@ -206,4 +212,6 @@ bool drm_calc_vbltimestamp_from_scanoutpos(struct 
drm_device *dev,
 void drm_calc_timestamping_constants(struct drm_crtc *crtc,
 const struct 

[PATCH v5 2/4] drm/virtio: add uapi for in and out explicit fences

2018-11-12 Thread Robert Foss
Add a new field called fence_fd that will be used by userspace to send
in-fences to the kernel and receive out-fences created by the kernel.

This uapi enables virtio to take advantage of explicit synchronization of
dma-bufs.

There are two new flags:

* VIRTGPU_EXECBUF_FENCE_FD_IN to be used when passing an in-fence fd.
* VIRTGPU_EXECBUF_FENCE_FD_OUT to be used when requesting an out-fence fd

The execbuffer IOCTL is now read-write to allow the userspace to read the
out-fence.

On error -1 should be returned in the fence_fd field.

Signed-off-by: Gustavo Padovan 
Signed-off-by: Robert Foss 
Reviewed-by: Emil Velikov 
---

Changes since v4:
 - Emil/Gerd: Improved commit message and fence_fd comment

Changes since v3:
 - Emil: Move fence_fd assignment to after sanity checks
 - Emil: Added r-b


 drivers/gpu/drm/virtio/virtgpu_ioctl.c |  5 +
 include/uapi/drm/virtgpu_drm.h | 13 ++---
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c 
b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
index d69fc356df0a..3d497835b0f5 100644
--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
@@ -119,6 +119,11 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
if (vgdev->has_virgl_3d == false)
return -ENOSYS;
 
+   if ((exbuf->flags & ~VIRTGPU_EXECBUF_FLAGS))
+   return -EINVAL;
+
+   exbuf->fence_fd = -1;
+
INIT_LIST_HEAD(_list);
if (exbuf->num_bo_handles) {
 
diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h
index 9a781f0611df..91062f4ac7c5 100644
--- a/include/uapi/drm/virtgpu_drm.h
+++ b/include/uapi/drm/virtgpu_drm.h
@@ -47,6 +47,13 @@ extern "C" {
 #define DRM_VIRTGPU_WAIT 0x08
 #define DRM_VIRTGPU_GET_CAPS  0x09
 
+#define VIRTGPU_EXECBUF_FENCE_FD_IN0x01
+#define VIRTGPU_EXECBUF_FENCE_FD_OUT   0x02
+#define VIRTGPU_EXECBUF_FLAGS  (\
+   VIRTGPU_EXECBUF_FENCE_FD_IN |\
+   VIRTGPU_EXECBUF_FENCE_FD_OUT |\
+   0)
+
 struct drm_virtgpu_map {
__u64 offset; /* use for mmap system call */
__u32 handle;
@@ -54,12 +61,12 @@ struct drm_virtgpu_map {
 };
 
 struct drm_virtgpu_execbuffer {
-   __u32   flags;  /* for future use */
+   __u32 flags;
__u32 size;
__u64 command; /* void* */
__u64 bo_handles;
__u32 num_bo_handles;
-   __u32 pad;
+   __s32 fence_fd;
 };
 
 #define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
@@ -137,7 +144,7 @@ struct drm_virtgpu_get_caps {
DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
 
 #define DRM_IOCTL_VIRTGPU_EXECBUFFER \
-   DRM_IOW(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
+   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
struct drm_virtgpu_execbuffer)
 
 #define DRM_IOCTL_VIRTGPU_GETPARAM \
-- 
2.17.1

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[PATCH v5 4/4] drm/virtio: bump driver version after explicit synchronization addition

2018-11-12 Thread Robert Foss
From: Gustavo Padovan 

To reflect the (backward compatible) changes in the uabi we are bumping
the driver's version.

Signed-off-by: Gustavo Padovan 
Signed-off-by: Robert Foss 
Reviewed-by: Emil Velikov 
---

Changes since v3:
 - Emil: Added r-b

 drivers/gpu/drm/virtio/virtgpu_drv.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h 
b/drivers/gpu/drm/virtio/virtgpu_drv.h
index acd130c58e33..4632bd7e1972 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.h
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.h
@@ -47,8 +47,8 @@
 #define DRIVER_DATE "0"
 
 #define DRIVER_MAJOR 0
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 1
+#define DRIVER_MINOR 1
+#define DRIVER_PATCHLEVEL 0
 
 /* virtgpu_drm_bus.c */
 int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
-- 
2.17.1

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[PATCH v5 1/4] drm/virtio: add virtio_gpu_alloc_fence()

2018-11-12 Thread Robert Foss
Refactor fence creation, add fences to relevant GPU
operations and add cursor helper functions.

This removes the potential for allocation failures from the
cmd_submit and atomic_commit paths.
Now a fence will be allocated first and only after that
will we proceed with the rest of the execution.

Signed-off-by: Gustavo Padovan 
Signed-off-by: Robert Foss 
Suggested-by: Rob Herring 
---

Changes since v3:
 - Gerd: Clarified and extended commit message
 - Emil: Fixed whitespace issue
 - Emil: Changed label name from fail_fence to fail_backoff
 - Emil: Remove special case for !fence->drv in virtio_gpu_fence_cleanup()

 drivers/gpu/drm/virtio/virtgpu_drv.h   |  4 +++
 drivers/gpu/drm/virtio/virtgpu_fence.c | 29 
 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 30 +++--
 drivers/gpu/drm/virtio/virtgpu_plane.c | 46 +++---
 drivers/gpu/drm/virtio/virtgpu_vq.c|  2 +-
 5 files changed, 96 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h 
b/drivers/gpu/drm/virtio/virtgpu_drv.h
index 6474e83cbf3d..acd130c58e33 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.h
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.h
@@ -131,6 +131,7 @@ struct virtio_gpu_framebuffer {
int x1, y1, x2, y2; /* dirty rect */
spinlock_t dirty_lock;
uint32_t hw_res_handle;
+   struct virtio_gpu_fence *fence;
 };
 #define to_virtio_gpu_framebuffer(x) \
container_of(x, struct virtio_gpu_framebuffer, base)
@@ -349,6 +350,9 @@ void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
 
 /* virtio_gpu_fence.c */
+struct virtio_gpu_fence *virtio_gpu_fence_alloc(
+   struct virtio_gpu_device *vgdev);
+void virtio_gpu_fence_cleanup(struct virtio_gpu_fence *fence);
 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
  struct virtio_gpu_ctrl_hdr *cmd_hdr,
  struct virtio_gpu_fence **fence);
diff --git a/drivers/gpu/drm/virtio/virtgpu_fence.c 
b/drivers/gpu/drm/virtio/virtgpu_fence.c
index 00c742a441bf..6b5d92215cfb 100644
--- a/drivers/gpu/drm/virtio/virtgpu_fence.c
+++ b/drivers/gpu/drm/virtio/virtgpu_fence.c
@@ -67,6 +67,28 @@ static const struct dma_fence_ops virtio_fence_ops = {
.timeline_value_str  = virtio_timeline_value_str,
 };
 
+struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device 
*vgdev)
+{
+   struct virtio_gpu_fence_driver *drv = >fence_drv;
+   struct virtio_gpu_fence *fence = kzalloc(sizeof(struct 
virtio_gpu_fence),
+   GFP_ATOMIC);
+   if (!fence)
+   return fence;
+
+   fence->drv = drv;
+   dma_fence_init(>f, _fence_ops, >lock, drv->context, 
0);
+
+   return fence;
+}
+
+void virtio_gpu_fence_cleanup(struct virtio_gpu_fence *fence)
+{
+   if (!fence)
+   return;
+
+   dma_fence_put(>f);
+}
+
 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
  struct virtio_gpu_ctrl_hdr *cmd_hdr,
  struct virtio_gpu_fence **fence)
@@ -74,15 +96,8 @@ int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
struct virtio_gpu_fence_driver *drv = >fence_drv;
unsigned long irq_flags;
 
-   *fence = kmalloc(sizeof(struct virtio_gpu_fence), GFP_ATOMIC);
-   if ((*fence) == NULL)
-   return -ENOMEM;
-
spin_lock_irqsave(>lock, irq_flags);
-   (*fence)->drv = drv;
(*fence)->seq = ++drv->sync_seq;
-   dma_fence_init(&(*fence)->f, _fence_ops, >lock,
-  drv->context, (*fence)->seq);
dma_fence_get(&(*fence)->f);
list_add_tail(&(*fence)->node, >fences);
spin_unlock_irqrestore(>lock, irq_flags);
diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c 
b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
index bc5afa4f906e..d69fc356df0a 100644
--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
@@ -168,6 +168,13 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
ret = PTR_ERR(buf);
goto out_unresv;
}
+
+   fence = virtio_gpu_fence_alloc(vgdev);
+   if (!fence) {
+   kfree(buf);
+   ret = -ENOMEM;
+   goto out_unresv;
+   }
virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
  vfpriv->ctx_id, );
 
@@ -283,11 +290,17 @@ static int virtio_gpu_resource_create_ioctl(struct 
drm_device *dev, void *data,
rc_3d.nr_samples = cpu_to_le32(rc->nr_samples);
rc_3d.flags = cpu_to_le32(rc->flags);
 
+   fence = virtio_gpu_fence_alloc(vgdev);
+   if (!fence) {
+   ret = -ENOMEM;
+   goto fail_backoff;
+   }
+
virtio_gpu_cmd_resource_create_3d(vgdev, qobj, _3d, NULL);
   

[PATCH v5 0/4] virgl: fence fd support

2018-11-12 Thread Robert Foss

This series implements fence support for drm/virtio and
has been tested using qemu, kmscube and the below branches.

Rob Herring solved a reference counting issue and
suggested a context check for the execbuf ioctl, his
changes have been included in the below commits to
keep the tree working at all commits.


The linux series can be found here:
https://gitlab.collabora.com/robertfoss/linux/commits/virtio_fences_v5

As for mesa, the branch can be found here:
https://gitlab.collabora.com/robertfoss/mesa/commits/virtio_fences_v3


Changes since v4:
 - drm/virtio: add uapi for in and out explicit fences
   - Emil/Gerd: Improved commit message and fence_fd comment

Changes since v3:
 - Rebased on drm-misc-next
 - drm/virtio: add virtio_gpu_alloc_fence()
   - Gerd: Clarified and extended commit message
   - Emil: Fixed whitespace issue
   - Emil: Changed label name from fail_fence to fail_backoff
   - Emil: Remove special case for !fence->drv in virtio_gpu_fence_cleanup()
 - drm/virtio: add uapi for in and out explicit fences
   - Emil: Added r-b
   - Emil: Move fence_fd assignment to after sanity checks
 - drm/virtio: add in-fences support for explicit synchronization
   - Move all in_fence handling to the same VIRTGPU_EXECBUF_FENCE_FD_IN block
   - Emil: Make sure to always call dma_fence_put()
   - Emil: Added r-b
 - drm/virtio: add out-fences support for explicit synchronization
   - Emil: Combine with in-fences patch
 -  drm/virtio: bump driver version after explicit synchronization addition
   - Emil: Added r-b

Changes since v2:
 - drm/virtio: add virtio_gpu_alloc_fence()
   - Forward port and fix compilation issues
 - drm/virtio: add uapi for in and out explicit fences
   - Check exbuf->flags for unsupported flags
 - drm/virtio: add in-fences support for explicit synchronization


Gustavo Padovan (1):
  drm/virtio: bump driver version after explicit synchronization
addition

Robert Foss (3):
  drm/virtio: add virtio_gpu_alloc_fence()
  drm/virtio: add uapi for in and out explicit fences
  drm/virtio: add in/out fence support for explicit synchronization

 drivers/gpu/drm/virtio/virtgpu_drv.h   |   8 +-
 drivers/gpu/drm/virtio/virtgpu_fence.c |  29 +--
 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 108 +
 drivers/gpu/drm/virtio/virtgpu_plane.c |  46 +--
 drivers/gpu/drm/virtio/virtgpu_vq.c|   2 +-
 include/uapi/drm/virtgpu_drm.h |  13 ++-
 6 files changed, 173 insertions(+), 33 deletions(-)

-- 
2.17.1

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[PATCH v5 3/4] drm/virtio: add in/out fence support for explicit synchronization

2018-11-12 Thread Robert Foss
When the execbuf call receives an in-fence it will get the dma_fence
related to that fence fd and wait on it before submitting the draw call.

On the out-fence side we get fence returned by the submitted draw call
and attach it to a sync_file and send the sync_file fd to userspace. On
error -1 is returned to userspace.

VIRTGPU_EXECBUF_FENCE_FD_IN & VIRTGPU_EXECBUF_FENCE_FD_OUT
are supported at the simultaneously and can be flagged
for simultaneously.

Signed-off-by: Gustavo Padovan 
Signed-off-by: Robert Foss 
Suggested-by: Rob Herring 
Reviewed-by: Emil Velikov 
---

Changes since v3:
 - Move all in_fence handling to the same VIRTGPU_EXECBUF_FENCE_FD_IN block
 - Emil: Make sure to always call dma_fence_put()
 - Emil: Added r-b


 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 81 --
 include/uapi/drm/virtgpu_drm.h |  2 +-
 2 files changed, 65 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c 
b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
index 3d497835b0f5..340f2513d829 100644
--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "virtgpu_drv.h"
 
@@ -105,7 +106,7 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
struct virtio_gpu_device *vgdev = dev->dev_private;
struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
struct drm_gem_object *gobj;
-   struct virtio_gpu_fence *fence;
+   struct virtio_gpu_fence *out_fence;
struct virtio_gpu_object *qobj;
int ret;
uint32_t *bo_handles = NULL;
@@ -114,6 +115,9 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
struct ttm_validate_buffer *buflist = NULL;
int i;
struct ww_acquire_ctx ticket;
+   struct sync_file *sync_file;
+   int in_fence_fd = exbuf->fence_fd;
+   int out_fence_fd = -1;
void *buf;
 
if (vgdev->has_virgl_3d == false)
@@ -124,6 +128,33 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
 
exbuf->fence_fd = -1;
 
+   if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_IN) {
+   struct dma_fence *in_fence;
+
+   in_fence = sync_file_get_fence(in_fence_fd);
+
+   if (!in_fence)
+   return -EINVAL;
+
+   /*
+* Wait if the fence is from a foreign context, or if the fence
+* array contains any fence from a foreign context.
+*/
+   ret = 0;
+   if (!dma_fence_match_context(in_fence, 
vgdev->fence_drv.context))
+   ret = dma_fence_wait(in_fence, true);
+
+   dma_fence_put(in_fence);
+   if (ret)
+   return ret;
+   }
+
+   if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_OUT) {
+   out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
+   if (out_fence_fd < 0)
+   return out_fence_fd;
+   }
+
INIT_LIST_HEAD(_list);
if (exbuf->num_bo_handles) {
 
@@ -133,26 +164,22 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
   sizeof(struct ttm_validate_buffer),
   GFP_KERNEL | __GFP_ZERO);
if (!bo_handles || !buflist) {
-   kvfree(bo_handles);
-   kvfree(buflist);
-   return -ENOMEM;
+   ret = -ENOMEM;
+   goto out_unused_fd;
}
 
user_bo_handles = (void __user *)(uintptr_t)exbuf->bo_handles;
if (copy_from_user(bo_handles, user_bo_handles,
   exbuf->num_bo_handles * sizeof(uint32_t))) {
ret = -EFAULT;
-   kvfree(bo_handles);
-   kvfree(buflist);
-   return ret;
+   goto out_unused_fd;
}
 
for (i = 0; i < exbuf->num_bo_handles; i++) {
gobj = drm_gem_object_lookup(drm_file, bo_handles[i]);
if (!gobj) {
-   kvfree(bo_handles);
-   kvfree(buflist);
-   return -ENOENT;
+   ret = -ENOENT;
+   goto out_unused_fd;
}
 
qobj = gem_to_virtio_gpu_obj(gobj);
@@ -161,6 +188,7 @@ static int virtio_gpu_execbuffer_ioctl(struct drm_device 
*dev, void *data,
list_add([i].head, _list);
}
kvfree(bo_handles);
+   bo_handles = NULL;
}
 
ret = virtio_gpu_object_list_validate(, _list);
@@ -174,28 +202,47 @@ static int 

Re: [PATCH v7 3/5] drm: Document variable refresh properties

2018-11-12 Thread Wentland, Harry
On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote:
> These include the drm_connector 'vrr_capable' and the drm_crtc
> 'vrr_enabled' properties.
> 
> Signed-off-by: Nicholas Kazlauskas 
> Cc: Harry Wentland 
> Cc: Manasi Navare 
> Cc: Pekka Paalanen 
> Cc: Ville Syrjälä 
> Cc: Michel Dänzer 

Looks good. Whole series is
Reviewed-by: Harry Wentland 

How are we with the userspace patches? We should probably hold off pushing the 
kernel patches until the userspace work is all reviewed.

Harry

> ---
>  Documentation/gpu/drm-kms.rst   |  7 
>  drivers/gpu/drm/drm_connector.c | 68 +
>  2 files changed, 75 insertions(+)
> 
> diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
> index 4b1501b4835b..8da2a178cf85 100644
> --- a/Documentation/gpu/drm-kms.rst
> +++ b/Documentation/gpu/drm-kms.rst
> @@ -575,6 +575,13 @@ Explicit Fencing Properties
>  .. kernel-doc:: drivers/gpu/drm/drm_atomic_uapi.c
> :doc: explicit fencing properties
>  
> +
> +Variable Refresh Properties
> +---
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_connector.c
> +   :doc: Variable refresh properties
> +
>  Existing KMS Properties
>  ---
>  
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 49290060ab7b..0e4287461997 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -1255,6 +1255,74 @@ int drm_mode_create_scaling_mode_property(struct 
> drm_device *dev)
>  }
>  EXPORT_SYMBOL(drm_mode_create_scaling_mode_property);
>  
> +/**
> + * DOC: Variable refresh properties
> + *
> + * Variable refresh rate capable displays can dynamically adjust their
> + * refresh rate by extending the duration of their vertical front porch
> + * until page flip or timeout occurs. This can reduce or remove stuttering
> + * and latency in scenarios where the page flip does not align with the
> + * vblank interval.
> + *
> + * An example scenario would be an application flipping at a constant rate
> + * of 48Hz on a 60Hz display. The page flip will frequently miss the vblank
> + * interval and the same contents will be displayed twice. This can be
> + * observed as stuttering for content with motion.
> + *
> + * If variable refresh rate was active on a display that supported a
> + * variable refresh range from 35Hz to 60Hz no stuttering would be observable
> + * for the example scenario. The minimum supported variable refresh rate of
> + * 35Hz is below the page flip frequency and the vertical front porch can
> + * be extended until the page flip occurs. The vblank interval will be
> + * directly aligned to the page flip rate.
> + *
> + * Not all userspace content is suitable for use with variable refresh rate.
> + * Large and frequent changes in vertical front porch duration may worsen
> + * perceived stuttering for input sensitive applications.
> + *
> + * Panel brightness will also vary with vertical front porch duration. Some
> + * panels may have noticeable differences in brightness between the minimum
> + * vertical front porch duration and the maximum vertical front porch 
> duration.
> + * Large and frequent changes in vertical front porch duration may produce
> + * observable flickering for such panels.
> + *
> + * Userspace control for variable refresh rate is supported via properties
> + * on the _connector and _crtc objects.
> + *
> + * "vrr_capable":
> + *   Optional _connector boolean property that drivers should attach
> + *   with drm_connector_attach_vrr_capable_property() on connectors that
> + *   could support variable refresh rates. Drivers should update the
> + *   property value by calling drm_connector_set_vrr_capable_property().
> + *
> + *   Absence of the property should indicate absence of support.
> + *
> + * "vrr_enabled":
> + *   Default _crtc boolean property that notifies the driver that the
> + *   content on the CRTC is suitable for variable refresh rate presentation.
> + *   The driver will take this property as a hint to enable variable
> + *   refresh rate support if the receiver supports it, ie. if the
> + *   "vrr_capable" property is true on the _connector object. The
> + *   vertical front porch duration will be extended until page-flip or
> + *   timeout when enabled.
> + *
> + *   The minimum vertical front porch duration is defined as the vertical
> + *   front porch duration for the current mode.
> + *
> + *   The maximum vertical front porch duration is greater than or equal to
> + *   the minimum vertical front porch duration. The duration is derived
> + *   from the minimum supported variable refresh rate for the connector.
> + *
> + *   The driver may place further restrictions within these minimum
> + *   and maximum bounds.
> + *
> + *   The semantics for the vertical blank timestamp differ when
> + *   variable refresh rate is active. The vertical blank timestamp
> + *   is defined to be an estimate using the current mode's fixed
> + 

Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Sean Paul
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>  drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>  drivers/gpu/drm/i915/intel_display.c  |  2 +-
>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>  drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>  drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>  drivers/gpu/drm/tegra/dc.c|  5 +--
>  drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>  drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>  include/drm/drm_atomic_state_helper.h |  2 ++
>  18 files changed, 56 insertions(+), 81 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 5064768642f3..770a71726cd1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2802,9 +2802,7 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
>   if (WARN_ON(!state))

Can you give this the same treatment as the other allocation checks?

>   return;
>  
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> -
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static struct drm_crtc_state *
> diff --git a/drivers/gpu/drm/arm/malidp_crtc.c 
> b/drivers/gpu/drm/arm/malidp_crtc.c
> index e1b72782848c..9a924ff27148 100644
> --- a/drivers/gpu/drm/arm/malidp_crtc.c
> +++ b/drivers/gpu/drm/arm/malidp_crtc.c
> @@ -474,10 +474,7 @@ static void malidp_crtc_reset(struct drm_crtc *crtc)
>  
>   kfree(state);
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }

You're changing behavior slightly here. If the allocation fails in the old code,
you just continue on (and presumably use-after-free on the next crtc->state
access). Whereas now you're going to just deref NULL. Neither one are really
desireable :)

So you probably want to continue checking the allocation and clear crtc->state
if it fails. After that you can call helper_crtc_reset with >base.

> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static void malidp_crtc_destroy_state(struct drm_crtc *crtc,
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index 96f4082671fe..8084d549c7d1 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ 

Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Wentland, Harry


On 2018-11-12 10:01 a.m., Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org

For amdgpu_dm and core changes
Reviewed-by: Harry Wentland 

Harry

> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>  drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>  drivers/gpu/drm/i915/intel_display.c  |  2 +-
>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>  drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>  drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>  drivers/gpu/drm/tegra/dc.c|  5 +--
>  drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>  drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>  include/drm/drm_atomic_state_helper.h |  2 ++
>  18 files changed, 56 insertions(+), 81 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 5064768642f3..770a71726cd1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2802,9 +2802,7 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
>   if (WARN_ON(!state))
>   return;
>  
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> -
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static struct drm_crtc_state *
> diff --git a/drivers/gpu/drm/arm/malidp_crtc.c 
> b/drivers/gpu/drm/arm/malidp_crtc.c
> index e1b72782848c..9a924ff27148 100644
> --- a/drivers/gpu/drm/arm/malidp_crtc.c
> +++ b/drivers/gpu/drm/arm/malidp_crtc.c
> @@ -474,10 +474,7 @@ static void malidp_crtc_reset(struct drm_crtc *crtc)
>  
>   kfree(state);
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static void malidp_crtc_destroy_state(struct drm_crtc *crtc,
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index 96f4082671fe..8084d549c7d1 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> @@ -412,10 +412,7 @@ static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
>   }
>  
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>  }
>  
>  static struct drm_crtc_state *
> diff --git 

Re: [PATCH] drm/syncobj: Fix compilation following partial revert

2018-11-12 Thread Sean Paul
On Mon, Nov 12, 2018 at 03:21:30PM +, Chris Wilson wrote:
> We need to include the revert of commit 783195ec1cad ("drm/syncobj:
> disable the timeline UAPI for now v2") along with undoing the change to
> drm/i915.
> 
> Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
> Signed-off-by: Chris Wilson 

Thanks for your patch, Chris. I've applied it to -misc-next

Sean

> Cc: Christian König 
> Cc: Daniel Vetter 
> ---
>  drivers/gpu/drm/drm_syncobj.c  | 4 
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
>  2 files changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
> index 90e0a6dce086..e2c5b3ca4824 100644
> --- a/drivers/gpu/drm/drm_syncobj.c
> +++ b/drivers/gpu/drm/drm_syncobj.c
> @@ -277,10 +277,6 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, 
> uint32_t flags,
>   int ret;
>   struct drm_syncobj *syncobj;
>  
> - /* Disabled for now */
> - if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
> - return -EINVAL;
> -
>   syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
>   if (!syncobj)
>   return -ENOMEM;
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 1a1c04db6c80..1aaccbe7e1de 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -2157,7 +2157,7 @@ await_fence_array(struct i915_execbuffer *eb,
>   if (!(flags & I915_EXEC_FENCE_WAIT))
>   continue;
>  
> - drm_syncobj_search_fence(syncobj, 0, 0, );
> + fence = drm_syncobj_fence_get(syncobj);
>   if (!fence)
>   return -EINVAL;
>  
> -- 
> 2.19.1
> 
> ___
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
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Re: [PATCH] drm: Fix compilation failure

2018-11-12 Thread Sean Paul
On Mon, Nov 12, 2018 at 10:54 AM Sean Paul  wrote:
>
> From: Sean Paul 
>

Just saw Chris posted a fix to the list, please disregard this.

Sean

> We had competing reverts/disable commits go in that caused issues with
> each other.
>
> Christian committed 783195ec1cad ("drm/syncobj: disable the timeline UAPI for
> now v2"), which moved the CREATE_TYPE_TIMELINE #define internally and added a
> check in drm_syncobj.c. When Eric reverted the entire timeline patch, he 
> cleaned
> up the #define in the new location, but failed to remove the check, causing 
> the
> boom.
>
> The error:
>
> ../drivers/gpu/drm/drm_syncobj.c: In function ‘drm_syncobj_create’:
> ../drivers/gpu/drm/drm_syncobj.c:281:14: error: 
> ‘DRM_SYNCOBJ_CREATE_TYPE_TIMELINE’ undeclared (first use in this function); 
> did you mean ‘DRM_SYNCOBJ_CREATE_SIGNALED’?
>   if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
>   ^~~~
>   DRM_SYNCOBJ_CREATE_SIGNALED
> ../drivers/gpu/drm/drm_syncobj.c:281:14: note: each undeclared identifier is 
> reported only once for each function it appears in
>
> Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
> Cc: Chunming Zhou 
> Cc: Christian König 
> Cc: Daniel Vetter 
> Cc: Eric Anholt 
> Cc: Joonas Lahtinen 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: David Airlie 
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Sean Paul 
> ---
>  drivers/gpu/drm/drm_syncobj.c | 4 
>  1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
> index 90e0a6dce086..e2c5b3ca4824 100644
> --- a/drivers/gpu/drm/drm_syncobj.c
> +++ b/drivers/gpu/drm/drm_syncobj.c
> @@ -277,10 +277,6 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, 
> uint32_t flags,
> int ret;
> struct drm_syncobj *syncobj;
>
> -   /* Disabled for now */
> -   if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
> -   return -EINVAL;
> -
> syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
> if (!syncobj)
> return -ENOMEM;
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
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[PATCH] drm: Fix compilation failure

2018-11-12 Thread Sean Paul
From: Sean Paul 

We had competing reverts/disable commits go in that caused issues with
each other.

Christian committed 783195ec1cad ("drm/syncobj: disable the timeline UAPI for
now v2"), which moved the CREATE_TYPE_TIMELINE #define internally and added a
check in drm_syncobj.c. When Eric reverted the entire timeline patch, he cleaned
up the #define in the new location, but failed to remove the check, causing the
boom.

The error:

../drivers/gpu/drm/drm_syncobj.c: In function ‘drm_syncobj_create’:
../drivers/gpu/drm/drm_syncobj.c:281:14: error: 
‘DRM_SYNCOBJ_CREATE_TYPE_TIMELINE’ undeclared (first use in this function); did 
you mean ‘DRM_SYNCOBJ_CREATE_SIGNALED’?
  if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
  ^~~~
  DRM_SYNCOBJ_CREATE_SIGNALED
../drivers/gpu/drm/drm_syncobj.c:281:14: note: each undeclared identifier is 
reported only once for each function it appears in

Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
Cc: Chunming Zhou 
Cc: Christian König 
Cc: Daniel Vetter 
Cc: Eric Anholt 
Cc: Joonas Lahtinen 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: Sean Paul 
Cc: David Airlie 
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/drm_syncobj.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 90e0a6dce086..e2c5b3ca4824 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -277,10 +277,6 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, 
uint32_t flags,
int ret;
struct drm_syncobj *syncobj;
 
-   /* Disabled for now */
-   if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
-   return -EINVAL;
-
syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
if (!syncobj)
return -ENOMEM;
-- 
Sean Paul, Software Engineer, Google / Chromium OS

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Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Thierry Reding
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>  drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>  drivers/gpu/drm/i915/intel_display.c  |  2 +-
>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>  drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>  drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>  drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>  drivers/gpu/drm/tegra/dc.c|  5 +--
>  drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>  drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>  include/drm/drm_atomic_state_helper.h |  2 ++
>  18 files changed, 56 insertions(+), 81 deletions(-)

Looks good to me:

Acked-by: Thierry Reding 


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Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Heiko Stuebner
Am Montag, 12. November 2018, 16:01:14 CET schrieb Maarten Lankhorst:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 


> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> index fb70fb486fbf..d2d5aa676084 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> @@ -1071,13 +1071,14 @@ static void vop_crtc_destroy(struct drm_crtc *crtc)
>  
>  static void vop_crtc_reset(struct drm_crtc *crtc)
>  {
> + struct rockchip_crtc_state *crtc_state =
> + kzalloc(sizeof(*crtc_state), GFP_KERNEL);
> +
>   if (crtc->state)
>   __drm_atomic_helper_crtc_destroy_state(crtc->state);
>   kfree(crtc->state);
>  
> - crtc->state = kzalloc(sizeof(struct rockchip_crtc_state), GFP_KERNEL);
> - if (crtc->state)
> - crtc->state->crtc = crtc;
> + __drm_atomic_helper_crtc_reset(crtc, _state->base);
>  }
>  
>  static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc)

for the Rockchip-part
Acked-by: Heiko Stuebner 


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[Bug 108704] 4.19 amdgpu Tonga powerplay regressions

2018-11-12 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108704

--- Comment #2 from Alex Deucher  ---
If not, can you bisect?

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[Bug 108704] 4.19 amdgpu Tonga powerplay regressions

2018-11-12 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108704

--- Comment #1 from Alex Deucher  ---
Does this patch fix the issue?
https://patchwork.freedesktop.org/patch/259364/

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Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Li, Sun peng (Leo)


On 2018-11-12 10:01 AM, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org
> ---
>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>   drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>   .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
>   drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
>   drivers/gpu/drm/i915/intel_display.c  |  2 +-
>   drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
>   drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
>   drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
>   drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
>   drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
>   drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
>   drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
>   drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
>   drivers/gpu/drm/tegra/dc.c|  5 +--
>   drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
>   drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
>   drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
>   include/drm/drm_atomic_state_helper.h |  2 ++
>   18 files changed, 56 insertions(+), 81 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 5064768642f3..770a71726cd1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2802,9 +2802,7 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
>   if (WARN_ON(!state))
>   return;
>   
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> -
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>   }
>   
>   static struct drm_crtc_state *
> diff --git a/drivers/gpu/drm/arm/malidp_crtc.c 
> b/drivers/gpu/drm/arm/malidp_crtc.c
> index e1b72782848c..9a924ff27148 100644
> --- a/drivers/gpu/drm/arm/malidp_crtc.c
> +++ b/drivers/gpu/drm/arm/malidp_crtc.c
> @@ -474,10 +474,7 @@ static void malidp_crtc_reset(struct drm_crtc *crtc)
>   
>   kfree(state);
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>   }
>   
>   static void malidp_crtc_destroy_state(struct drm_crtc *crtc,
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index 96f4082671fe..8084d549c7d1 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> @@ -412,10 +412,7 @@ static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
>   }
>   
>   state = kzalloc(sizeof(*state), GFP_KERNEL);
> - if (state) {
> - crtc->state = >base;
> - crtc->state->crtc = crtc;
> - }
> + __drm_atomic_helper_crtc_reset(crtc, >base);
>   }
>   
>   static struct drm_crtc_state *
> diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
> 

Re: [PATCH] drm/syncobj: Fix compilation following partial revert

2018-11-12 Thread Christian König

Am 12.11.18 um 16:21 schrieb Chris Wilson:

We need to include the revert of commit 783195ec1cad ("drm/syncobj:
disable the timeline UAPI for now v2") along with undoing the change to
drm/i915.

Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
Signed-off-by: Chris Wilson 
Cc: Christian König 
Cc: Daniel Vetter 


Reviewed-by: Christian König 


---
  drivers/gpu/drm/drm_syncobj.c  | 4 
  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
  2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 90e0a6dce086..e2c5b3ca4824 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -277,10 +277,6 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, 
uint32_t flags,
int ret;
struct drm_syncobj *syncobj;
  
-	/* Disabled for now */

-   if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
-   return -EINVAL;
-
syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
if (!syncobj)
return -ENOMEM;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1a1c04db6c80..1aaccbe7e1de 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -2157,7 +2157,7 @@ await_fence_array(struct i915_execbuffer *eb,
if (!(flags & I915_EXEC_FENCE_WAIT))
continue;
  
-		drm_syncobj_search_fence(syncobj, 0, 0, );

+   fence = drm_syncobj_fence_get(syncobj);
if (!fence)
return -EINVAL;
  


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[PATCH] drm/syncobj: Fix compilation following partial revert

2018-11-12 Thread Chris Wilson
We need to include the revert of commit 783195ec1cad ("drm/syncobj:
disable the timeline UAPI for now v2") along with undoing the change to
drm/i915.

Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
Signed-off-by: Chris Wilson 
Cc: Christian König 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/drm_syncobj.c  | 4 
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 90e0a6dce086..e2c5b3ca4824 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -277,10 +277,6 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, 
uint32_t flags,
int ret;
struct drm_syncobj *syncobj;
 
-   /* Disabled for now */
-   if (flags & DRM_SYNCOBJ_CREATE_TYPE_TIMELINE)
-   return -EINVAL;
-
syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
if (!syncobj)
return -ENOMEM;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1a1c04db6c80..1aaccbe7e1de 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -2157,7 +2157,7 @@ await_fence_array(struct i915_execbuffer *eb,
if (!(flags & I915_EXEC_FENCE_WAIT))
continue;
 
-   drm_syncobj_search_fence(syncobj, 0, 0, );
+   fence = drm_syncobj_fence_get(syncobj);
if (!fence)
return -EINVAL;
 
-- 
2.19.1

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Re: [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Boris Brezillon
On Mon, 12 Nov 2018 16:01:14 +0100
Maarten Lankhorst  wrote:

> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
> 
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
> convert it to the common one.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: David Airlie 
> Cc: Liviu Dudau 
> Cc: Brian Starkey 
> Cc: Mali DP Maintainers 
> Cc: Boris Brezillon 
> Cc: Nicolas Ferre 
> Cc: Alexandre Belloni 
> Cc: Ludovic Desroches 
> Cc: Maarten Lankhorst 
> Cc: Maxime Ripard 
> Cc: Sean Paul 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Philipp Zabel 
> Cc: CK Hu 
> Cc: Matthias Brugger 
> Cc: Rob Clark 
> Cc: Ben Skeggs 
> Cc: Tomi Valkeinen 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: Sandy Huang 
> Cc: "Heiko Stübner" 
> Cc: Thierry Reding 
> Cc: Jonathan Hunter 
> Cc: Eric Anholt 
> Cc: VMware Graphics 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Cc: Tony Cheng 
> Cc: Shirish S 
> Cc: Mikita Lipski 
> Cc: Bhawanpreet Lakha 
> Cc: David Francis 
> Cc: Anthony Koo 
> Cc: Jeykumar Sankaran 
> Cc: Jordan Crouse 
> Cc: Bruce Wang 
> Cc: Sravanthi Kollukuduru 
> Cc: Archit Taneja 
> Cc: Steve Kowalik 
> Cc: Carsten Behling 
> Cc: Haneen Mohammed 
> Cc: Daniel Vetter 
> Cc: Rodrigo Siqueira 
> Cc: Mahesh Kumar 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: intel-...@lists.freedesktop.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-te...@vger.kernel.org
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
>  drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
>  .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--

For the atmel-hlcdc driver

Acked-by: Boris Brezillon 
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Re: [PATCH v2 2/9] phy: Add configuration interface

2018-11-12 Thread Kishon Vijay Abraham I
Hi Maxime,

On 06/11/18 8:24 PM, Maxime Ripard wrote:
> The phy framework is only allowing to configure the power state of the PHY
> using the init and power_on hooks, and their power_off and exit
> counterparts.
> 
> While it works for most, simple, PHYs supported so far, some more advanced
> PHYs need some configuration depending on runtime parameters. These PHYs
> have been supported by a number of means already, often by using ad-hoc
> drivers in their consumer drivers.
> 
> That doesn't work too well however, when a consumer device needs to deal
> with multiple PHYs, or when multiple consumers need to deal with the same
> PHY (a DSI driver and a CSI driver for example).
> 
> So we'll add a new interface, through two funtions, phy_validate and
> phy_configure. The first one will allow to check that a current
> configuration, for a given mode, is applicable. It will also allow the PHY
> driver to tune the settings given as parameters as it sees fit.
> 
> phy_configure will actually apply that configuration in the phy itself.
> 
> Signed-off-by: Maxime Ripard 
> ---
>  drivers/phy/phy-core.c  | 61 ++-
>  include/linux/phy/phy.h | 58 -
>  2 files changed, 119 insertions(+)
> 
> diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
> index 35fd38c5a4a1..7bd3ed65c708 100644
> --- a/drivers/phy/phy-core.c
> +++ b/drivers/phy/phy-core.c
> @@ -408,6 +408,67 @@ int phy_calibrate(struct phy *phy)
>  EXPORT_SYMBOL_GPL(phy_calibrate);
>  
>  /**
> + * phy_configure() - Changes the phy parameters
> + * @phy: the phy returned by phy_get()
> + * @opts: New configuration to apply
> + *
> + * Used to change the PHY parameters. phy_init() must have been called
> + * on the phy. The configuration will be applied on the current phy
> + * mode, that can be changed using phy_set_mode().
> + *
> + * Returns: 0 if successful, an negative error code otherwise
> + */
> +int phy_configure(struct phy *phy, union phy_configure_opts *opts)
> +{
> + int ret;
> +
> + if (!phy)
> + return -EINVAL;
> +
> + if (!phy->ops->configure)
> + return -EOPNOTSUPP;
> +
> + mutex_lock(>mutex);
> + ret = phy->ops->configure(phy, opts);
> + mutex_unlock(>mutex);
> +
> + return ret;
> +}

EXPORT_SYMBOL_GPL is missing here and below.
> +
> +/**
> + * phy_validate() - Checks the phy parameters
> + * @phy: the phy returned by phy_get()
> + * @mode: phy_mode the configuration is applicable to.
> + * @opts: Configuration to check
> + *
> + * Used to check that the current set of parameters can be handled by
> + * the phy. Implementations are free to tune the parameters passed as
> + * arguments if needed by some implementation detail or
> + * constraints. It will not change any actual configuration of the
> + * PHY, so calling it as many times as deemed fit will have no side
> + * effect.
> + *
> + * Returns: 0 if successful, an negative error code otherwise
> + */
> +int phy_validate(struct phy *phy, enum phy_mode mode,
> +   union phy_configure_opts *opts)

We are planning to switch to mode/submode combination [1], so this might have
to change.

Thanks
Kishon

[1] -> https://patchwork.kernel.org/cover/10673295/
> +{
> + int ret;
> +
> + if (!phy)
> + return -EINVAL;
> +
> + if (!phy->ops->validate)
> + return -EOPNOTSUPP;
> +
> + mutex_lock(>mutex);
> + ret = phy->ops->validate(phy, mode, opts);
> + mutex_unlock(>mutex);
> +
> + return ret;
> +}
> +
> +/**
>   * _of_phy_get() - lookup and obtain a reference to a phy by phandle
>   * @np: device_node for which to get the phy
>   * @index: the index of the phy
> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> index d5c2ac7369f2..89cf8b685546 100644
> --- a/include/linux/phy/phy.h
> +++ b/include/linux/phy/phy.h
> @@ -46,6 +46,12 @@ enum phy_mode {
>  };
>  
>  /**
> + * union phy_configure_opts - Opaque generic phy configuration
> + */
> +union phy_configure_opts {
> +};
> +
> +/**
>   * struct phy_ops - set of function pointers for performing phy operations
>   * @init: operation to be performed for initializing phy
>   * @exit: operation to be performed while exiting
> @@ -62,6 +68,37 @@ struct phy_ops {
>   int (*power_on)(struct phy *phy);
>   int (*power_off)(struct phy *phy);
>   int (*set_mode)(struct phy *phy, enum phy_mode mode);
> +
> + /**
> +  * @configure:
> +  *
> +  * Optional.
> +  *
> +  * Used to change the PHY parameters. phy_init() must have
> +  * been called on the phy.
> +  *
> +  * Returns: 0 if successful, an negative error code otherwise
> +  */
> + int (*configure)(struct phy *phy, union phy_configure_opts *opts);
> +
> + /**
> +  * @validate:
> +  *
> +  * Optional.
> +  *
> +  * Used to check that the current set of parameters can be
> +  * handled by the phy. 

Re: Performance regression in ast drm driver

2018-11-12 Thread Jean Delvare
Hi David,

On Fri, 2018-11-09 at 10:04 +1000, David Airlie wrote:
> On Thu, Nov 8, 2018 at 10:05 PM Jean Delvare  wrote:
> > 
> > On Thu, 1 Nov 2018 16:27:07 +0100, Jean Delvare wrote:
> > > Hi David,
> > > 
> > > The following commit:
> > > 
> > > commit 7cf321d118a825c1541b43ca45294126fd474efa
> > > Author: Dave Airlie
> > > Date:   Mon Oct 24 15:37:48 2016 +1000
> > > 
> > > drm/drivers: add support for using the arch wc mapping API.
> > > 
> > > is causing a huge performance regression for the ast drm driver. In a
> > > text console, if I call "cat" on a large text file, it takes almost
> > > twice as much time to be displayed and scrolled completely.
> > > 
> > > Can you please check that the ast driver portion of that commit is both
> > > correct and complete?
> > 
> > And in the meantime, what bad will happen if we just revert the ast
> > portion of that commit?
> 
> This seems likely to be a hw problem with PCI writes to the AST "GPU",
> since it's just some sort of RAM + ARM on the end of a PCIE bus, we've
> definitely seen possible issues in the past with write combining
> around some of the mga GPUs with some CPUs.

Takashi asked me to compare the contents of
/sys/kernel/debug/x86/pat_memtype_list before and after the commit
above. Before the commit, we have:

uncached-minus @ 0xfafe-0xfb00
uncached-minus @ 0xfb00-0xfb005000
write-combining @ 0xfb005000-0xfb584000

After the commit, we have:

uncached-minus @ 0xfafe-0xfb00
uncached-minus @ 0xfb00-0xfb005000
uncached-minus @ 0xfb00-0xfb80
uncached-minus @ 0xfb005000-0xfb584000

The corresponding lines in /proc/iomem are:

f000-fed8 : PCI Bus :00
  faf0-fb7f : PCI Bus :01
fafe-faff : :01:01.0
fb00-fb7f : :01:01.0

Does it help? Is the change of type expected? Is it not a problem that
one of the ranges is overlapping with 2 other ranges?

-- 
Jean Delvare
SUSE L3 Support
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Re: [RFC] mm: Replace all open encodings for NUMA_NO_NODE

2018-11-12 Thread Anshuman Khandual


On 11/12/2018 09:40 AM, Anshuman Khandual wrote:
> 
> 
> On 11/12/2018 09:27 AM, Joseph Qi wrote:
>> For ocfs2 part, node means host in the cluster, not NUMA node.
>>
> 
> Does not -1 indicate an invalid node which can never be present ?
> 

My bad, got it wrong. Seems like this is nothing to do with NUMA node
at all. Will drop the changes from ocfs2.
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Re: [RFC] mm: Replace all open encodings for NUMA_NO_NODE

2018-11-12 Thread Joseph Qi
For ocfs2 part, node means host in the cluster, not NUMA node.

Thanks,
Joseph

On 18/11/12 10:41, Anshuman Khandual wrote:
> At present there are multiple places where invalid node number is encoded
> as -1. Even though implicitly understood it is always better to have macros
> in there. Replace these open encodings for an invalid node number with the
> global macro NUMA_NO_NODE. This helps remove NUMA related assumptions like
> 'invalid node' from various places redirecting them to a common definition.
> 
> Signed-off-by: Anshuman Khandual 
> ---
> Build tested this with multiple cross compiler options like alpha, sparc,
> arm64, x86, powerpc64le etc with their default config which might not have
> compiled tested all driver related changes. I will appreciate folks giving
> this a test in their respective build environment.
> 
> All these places for replacement were found by running the following grep
> patterns on the entire kernel code. Please let me know if this might have
> missed some instances. This might also have replaced some false positives.
> I will appreciate suggestions, inputs and review.
> 
> 1. git grep "nid == -1"
> 2. git grep "node == -1"
> 3. git grep "nid = -1"
> 4. git grep "node = -1"
> 
>  arch/alpha/include/asm/topology.h |  2 +-
>  arch/ia64/kernel/numa.c   |  2 +-
>  arch/ia64/mm/discontig.c  |  6 +++---
>  arch/ia64/sn/kernel/io_common.c   |  2 +-
>  arch/powerpc/include/asm/pci-bridge.h |  2 +-
>  arch/powerpc/kernel/paca.c|  2 +-
>  arch/powerpc/kernel/pci-common.c  |  2 +-
>  arch/powerpc/mm/numa.c| 14 +++---
>  arch/powerpc/platforms/powernv/memtrace.c |  4 ++--
>  arch/sparc/kernel/auxio_32.c  |  2 +-
>  arch/sparc/kernel/pci_fire.c  |  2 +-
>  arch/sparc/kernel/pci_schizo.c|  2 +-
>  arch/sparc/kernel/pcic.c  |  6 +++---
>  arch/sparc/kernel/psycho_common.c |  2 +-
>  arch/sparc/kernel/sbus.c  |  2 +-
>  arch/sparc/mm/init_64.c   |  6 +++---
>  arch/sparc/prom/init_32.c |  2 +-
>  arch/sparc/prom/init_64.c |  4 ++--
>  arch/sparc/prom/tree_32.c | 12 ++--
>  arch/sparc/prom/tree_64.c | 18 +-
>  arch/x86/include/asm/pci.h|  2 +-
>  arch/x86/kernel/apic/x2apic_uv_x.c|  6 +++---
>  arch/x86/kernel/smpboot.c |  2 +-
>  arch/x86/platform/olpc/olpc_dt.c  | 16 
>  drivers/block/mtip32xx/mtip32xx.c |  4 ++--
>  drivers/dma/dmaengine.c   |  3 ++-
>  drivers/infiniband/hw/hfi1/affinity.c |  2 +-
>  drivers/infiniband/hw/hfi1/init.c |  2 +-
>  drivers/iommu/dmar.c  |  4 ++--
>  drivers/iommu/intel-iommu.c   |  2 +-
>  drivers/media/pci/ivtv/ivtvfb.c   |  2 +-
>  drivers/media/platform/vivid/vivid-osd.c  |  2 +-
>  drivers/misc/sgi-xp/xpc_uv.c  |  2 +-
>  drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |  4 ++--
>  drivers/video/fbdev/mmp/fb/mmpfb.c|  2 +-
>  drivers/video/fbdev/pxa168fb.c|  2 +-
>  drivers/video/fbdev/w100fb.c  |  2 +-
>  fs/ocfs2/dlm/dlmcommon.h  |  2 +-
>  fs/ocfs2/dlm/dlmdomain.c  | 10 +-
>  fs/ocfs2/dlm/dlmmaster.c  |  2 +-
>  fs/ocfs2/dlm/dlmrecovery.c|  2 +-
>  fs/ocfs2/stack_user.c |  6 +++---
>  init/init_task.c  |  2 +-
>  kernel/kthread.c  |  2 +-
>  kernel/sched/fair.c   | 15 ---
>  lib/cpumask.c |  2 +-
>  mm/huge_memory.c  | 12 ++--
>  mm/hugetlb.c  |  2 +-
>  mm/ksm.c  |  2 +-
>  mm/memory.c   |  6 +++---
>  mm/memory_hotplug.c   | 12 ++--
>  mm/mempolicy.c|  2 +-
>  mm/page_alloc.c   |  4 ++--
>  mm/page_ext.c |  2 +-
>  net/core/pktgen.c |  2 +-
>  net/qrtr/qrtr.c   |  2 +-
>  tools/perf/bench/numa.c   |  6 +++---
>  57 files changed, 125 insertions(+), 123 deletions(-)
> 
> diff --git a/arch/alpha/include/asm/topology.h 
> b/arch/alpha/include/asm/topology.h
> index e6e13a8..f6dc89c 100644
> --- a/arch/alpha/include/asm/topology.h
> +++ b/arch/alpha/include/asm/topology.h
> @@ -29,7 +29,7 @@ static const struct cpumask *cpumask_of_node(int node)
>  {
>   int cpu;
>  
> - if (node 

[PATCH -next] drm/qxl: remove set but not used variables 'driver, qbo'

2018-11-12 Thread YueHaibing
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/qxl/qxl_release.c: In function 
'qxl_release_fence_buffer_objects':
drivers/gpu/drm/qxl/qxl_release.c:431:17: warning:
 variable 'qbo' set but not used [-Wunused-but-set-variable]

drivers/gpu/drm/qxl/qxl_release.c:430:24: warning:
 variable 'driver' set but not used [-Wunused-but-set-variable]

'qbo' not used since commit f2c24b83ae90 ("drm/ttm: flip the switch, and convert
to dma_fence")

And 'driver' never used since introduction in
8002db6336dd ("qxl: convert qxl driver to proper use for reservations")

Signed-off-by: YueHaibing 
---
 drivers/gpu/drm/qxl/qxl_release.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/qxl/qxl_release.c 
b/drivers/gpu/drm/qxl/qxl_release.c
index 3813ec1..0a693fe 100644
--- a/drivers/gpu/drm/qxl/qxl_release.c
+++ b/drivers/gpu/drm/qxl/qxl_release.c
@@ -427,8 +427,6 @@ void qxl_release_fence_buffer_objects(struct qxl_release 
*release)
struct ttm_buffer_object *bo;
struct ttm_bo_global *glob;
struct ttm_bo_device *bdev;
-   struct ttm_bo_driver *driver;
-   struct qxl_bo *qbo;
struct ttm_validate_buffer *entry;
struct qxl_device *qdev;
 
@@ -449,14 +447,12 @@ void qxl_release_fence_buffer_objects(struct qxl_release 
*release)
   release->id | 0xf000, release->base.seqno);
trace_dma_fence_emit(>base);
 
-   driver = bdev->driver;
glob = bdev->glob;
 
spin_lock(>lru_lock);
 
list_for_each_entry(entry, >bos, head) {
bo = entry->bo;
-   qbo = to_qxl_bo(bo);
 
reservation_object_add_shared_fence(bo->resv, >base);
ttm_bo_add_to_lru(bo);



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[RFC] mm: Replace all open encodings for NUMA_NO_NODE

2018-11-12 Thread Anshuman Khandual
At present there are multiple places where invalid node number is encoded
as -1. Even though implicitly understood it is always better to have macros
in there. Replace these open encodings for an invalid node number with the
global macro NUMA_NO_NODE. This helps remove NUMA related assumptions like
'invalid node' from various places redirecting them to a common definition.

Signed-off-by: Anshuman Khandual 
---
Build tested this with multiple cross compiler options like alpha, sparc,
arm64, x86, powerpc64le etc with their default config which might not have
compiled tested all driver related changes. I will appreciate folks giving
this a test in their respective build environment.

All these places for replacement were found by running the following grep
patterns on the entire kernel code. Please let me know if this might have
missed some instances. This might also have replaced some false positives.
I will appreciate suggestions, inputs and review.

1. git grep "nid == -1"
2. git grep "node == -1"
3. git grep "nid = -1"
4. git grep "node = -1"

 arch/alpha/include/asm/topology.h |  2 +-
 arch/ia64/kernel/numa.c   |  2 +-
 arch/ia64/mm/discontig.c  |  6 +++---
 arch/ia64/sn/kernel/io_common.c   |  2 +-
 arch/powerpc/include/asm/pci-bridge.h |  2 +-
 arch/powerpc/kernel/paca.c|  2 +-
 arch/powerpc/kernel/pci-common.c  |  2 +-
 arch/powerpc/mm/numa.c| 14 +++---
 arch/powerpc/platforms/powernv/memtrace.c |  4 ++--
 arch/sparc/kernel/auxio_32.c  |  2 +-
 arch/sparc/kernel/pci_fire.c  |  2 +-
 arch/sparc/kernel/pci_schizo.c|  2 +-
 arch/sparc/kernel/pcic.c  |  6 +++---
 arch/sparc/kernel/psycho_common.c |  2 +-
 arch/sparc/kernel/sbus.c  |  2 +-
 arch/sparc/mm/init_64.c   |  6 +++---
 arch/sparc/prom/init_32.c |  2 +-
 arch/sparc/prom/init_64.c |  4 ++--
 arch/sparc/prom/tree_32.c | 12 ++--
 arch/sparc/prom/tree_64.c | 18 +-
 arch/x86/include/asm/pci.h|  2 +-
 arch/x86/kernel/apic/x2apic_uv_x.c|  6 +++---
 arch/x86/kernel/smpboot.c |  2 +-
 arch/x86/platform/olpc/olpc_dt.c  | 16 
 drivers/block/mtip32xx/mtip32xx.c |  4 ++--
 drivers/dma/dmaengine.c   |  3 ++-
 drivers/infiniband/hw/hfi1/affinity.c |  2 +-
 drivers/infiniband/hw/hfi1/init.c |  2 +-
 drivers/iommu/dmar.c  |  4 ++--
 drivers/iommu/intel-iommu.c   |  2 +-
 drivers/media/pci/ivtv/ivtvfb.c   |  2 +-
 drivers/media/platform/vivid/vivid-osd.c  |  2 +-
 drivers/misc/sgi-xp/xpc_uv.c  |  2 +-
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |  4 ++--
 drivers/video/fbdev/mmp/fb/mmpfb.c|  2 +-
 drivers/video/fbdev/pxa168fb.c|  2 +-
 drivers/video/fbdev/w100fb.c  |  2 +-
 fs/ocfs2/dlm/dlmcommon.h  |  2 +-
 fs/ocfs2/dlm/dlmdomain.c  | 10 +-
 fs/ocfs2/dlm/dlmmaster.c  |  2 +-
 fs/ocfs2/dlm/dlmrecovery.c|  2 +-
 fs/ocfs2/stack_user.c |  6 +++---
 init/init_task.c  |  2 +-
 kernel/kthread.c  |  2 +-
 kernel/sched/fair.c   | 15 ---
 lib/cpumask.c |  2 +-
 mm/huge_memory.c  | 12 ++--
 mm/hugetlb.c  |  2 +-
 mm/ksm.c  |  2 +-
 mm/memory.c   |  6 +++---
 mm/memory_hotplug.c   | 12 ++--
 mm/mempolicy.c|  2 +-
 mm/page_alloc.c   |  4 ++--
 mm/page_ext.c |  2 +-
 net/core/pktgen.c |  2 +-
 net/qrtr/qrtr.c   |  2 +-
 tools/perf/bench/numa.c   |  6 +++---
 57 files changed, 125 insertions(+), 123 deletions(-)

diff --git a/arch/alpha/include/asm/topology.h 
b/arch/alpha/include/asm/topology.h
index e6e13a8..f6dc89c 100644
--- a/arch/alpha/include/asm/topology.h
+++ b/arch/alpha/include/asm/topology.h
@@ -29,7 +29,7 @@ static const struct cpumask *cpumask_of_node(int node)
 {
int cpu;
 
-   if (node == -1)
+   if (node == NUMA_NO_NODE)
return cpu_all_mask;
 
cpumask_clear(_to_cpumask_map[node]);
diff --git a/arch/ia64/kernel/numa.c b/arch/ia64/kernel/numa.c
index 92c3762..1315da6 100644
--- a/arch/ia64/kernel/numa.c
+++ b/arch/ia64/kernel/numa.c
@@ -74,7 +74,7 @@ void 

Re: [RFC] mm: Replace all open encodings for NUMA_NO_NODE

2018-11-12 Thread Anshuman Khandual


On 11/12/2018 09:27 AM, Joseph Qi wrote:
> For ocfs2 part, node means host in the cluster, not NUMA node.
> 

Does not -1 indicate an invalid node which can never be present ?
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Re: [PATCH v2 8/9] phy: Add Cadence D-PHY support

2018-11-12 Thread Kishon Vijay Abraham I
Hi Maxime,

On 06/11/18 8:24 PM, Maxime Ripard wrote:
> Cadence has designed a D-PHY that can be used by the, currently in tree,
> DSI bridge (DRM), CSI Transceiver and CSI Receiver (v4l2) drivers.
> 
> Only the DSI driver has an ad-hoc driver for that phy at the moment, while
> the v4l2 drivers are completely missing any phy support. In order to make
> that phy support available to all these drivers, without having to
> duplicate that code three times, let's create a generic phy framework
> driver.
> 
> Signed-off-by: Maxime Ripard 
> ---
>  Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt |  21 +-
>  Documentation/devicetree/bindings/phy/cdns,dphy.txt   |  20 +-
>  drivers/phy/cadence/Kconfig   |  13 +-
>  drivers/phy/cadence/Makefile  |   1 +-
>  drivers/phy/cadence/cdns-dphy.c   | 459 +++-
>  5 files changed, 492 insertions(+), 22 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/cdns,dphy.txt
>  create mode 100644 drivers/phy/cadence/cdns-dphy.c
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt 
> b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
> index f5725bb6c61c..525a4bfd8634 100644
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
> @@ -31,28 +31,7 @@ Required subnodes:
>  - one subnode per DSI device connected on the DSI bus. Each DSI device should
>contain a reg property encoding its virtual channel.
>  
> -Cadence DPHY
> -
> -
> -Cadence DPHY block.
> -
> -Required properties:
> -- compatible: should be set to "cdns,dphy".
> -- reg: physical base address and length of the DPHY registers.
> -- clocks: DPHY reference clocks.
> -- clock-names: must contain "psm" and "pll_ref".
> -- #phy-cells: must be set to 0.
> -
> -
>  Example:
> - dphy0: dphy@fd0e{
> - compatible = "cdns,dphy";
> - reg = <0x0 0xfd0e 0x0 0x1000>;
> - clocks = <_clk>, <_ref_clk>;
> - clock-names = "psm", "pll_ref";
> - #phy-cells = <0>;
> - };
> -
>   dsi0: dsi@fd0c {
>   compatible = "cdns,dsi";
>   reg = <0x0 0xfd0c 0x0 0x1000>;
> diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.txt 
> b/Documentation/devicetree/bindings/phy/cdns,dphy.txt
> new file mode 100644
> index ..1095bc4e72d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/cdns,dphy.txt
> @@ -0,0 +1,20 @@
> +Cadence DPHY
> +
> +
> +Cadence DPHY block.
> +
> +Required properties:
> +- compatible: should be set to "cdns,dphy".
> +- reg: physical base address and length of the DPHY registers.
> +- clocks: DPHY reference clocks.
> +- clock-names: must contain "psm" and "pll_ref".
> +- #phy-cells: must be set to 0.
> +
> +Example:
> + dphy0: dphy@fd0e{
> + compatible = "cdns,dphy";
> + reg = <0x0 0xfd0e 0x0 0x1000>;
> + clocks = <_clk>, <_ref_clk>;
> + clock-names = "psm", "pll_ref";
> + #phy-cells = <0>;
> + };
> diff --git a/drivers/phy/cadence/Kconfig b/drivers/phy/cadence/Kconfig
> index 57fff7de4031..240effa81046 100644
> --- a/drivers/phy/cadence/Kconfig
> +++ b/drivers/phy/cadence/Kconfig
> @@ -1,6 +1,7 @@
>  #
> -# Phy driver for Cadence MHDP DisplayPort controller
> +# Phy drivers for Cadence IPs
>  #
> +
>  config PHY_CADENCE_DP
>   tristate "Cadence MHDP DisplayPort PHY driver"
>   depends on OF
> @@ -8,3 +9,13 @@ config PHY_CADENCE_DP
>   select GENERIC_PHY
>   help
> Support for Cadence MHDP DisplayPort PHY.
> +
> +config PHY_CADENCE_DPHY
> + tristate "Cadence D-PHY Support"
> + depends on HAS_IOMEM && OF
> + select GENERIC_PHY
> + select GENERIC_PHY_MIPI_DPHY
> + help
> +   Choose this option if you have a Cadence D-PHY in your
> +   system. If M is selected, the module will be called
> +   cdns-csi.
> diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile
> index e5b0a11cf28a..64cb9ea66ceb 100644
> --- a/drivers/phy/cadence/Makefile
> +++ b/drivers/phy/cadence/Makefile
> @@ -1 +1,2 @@
>  obj-$(CONFIG_PHY_CADENCE_DP) += phy-cadence-dp.o
> +obj-$(CONFIG_PHY_CADENCE_DPHY)   += cdns-dphy.o
> diff --git a/drivers/phy/cadence/cdns-dphy.c b/drivers/phy/cadence/cdns-dphy.c
> new file mode 100644
> index ..a398b401e5d3
> --- /dev/null
> +++ b/drivers/phy/cadence/cdns-dphy.c
> @@ -0,0 +1,459 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright: 2017-2018 Cadence Design Systems, Inc.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#define REG_WAKEUP_TIME_NS   800
> +#define DPHY_PLL_RATE_HZ 10800
> +
> +/* DPHY registers */

Re: [RFC] mm: Replace all open encodings for NUMA_NO_NODE

2018-11-12 Thread Anshuman Khandual


On 11/12/2018 02:13 PM, Hans Verkuil wrote:
> On 11/12/2018 03:41 AM, Anshuman Khandual wrote:
>> At present there are multiple places where invalid node number is encoded
>> as -1. Even though implicitly understood it is always better to have macros
>> in there. Replace these open encodings for an invalid node number with the
>> global macro NUMA_NO_NODE. This helps remove NUMA related assumptions like
>> 'invalid node' from various places redirecting them to a common definition.
>>
>> Signed-off-by: Anshuman Khandual 
>> ---
>> Build tested this with multiple cross compiler options like alpha, sparc,
>> arm64, x86, powerpc64le etc with their default config which might not have
>> compiled tested all driver related changes. I will appreciate folks giving
>> this a test in their respective build environment.
>>
>> All these places for replacement were found by running the following grep
>> patterns on the entire kernel code. Please let me know if this might have
>> missed some instances. This might also have replaced some false positives.
>> I will appreciate suggestions, inputs and review.
> The 'node' in the drivers/media and the drivers/video sources has nothing to
> do with numa. It's an index for a framebuffer instead (i.e. the X in 
> /dev/fbX).

Thanks for the input. Will drop the changes there.
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[PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-12 Thread Maarten Lankhorst
We already have __drm_atomic_helper_connector_reset() and
__drm_atomic_helper_plane_reset(), extend this to crtc as well.

Most drivers already have a gpu reset hook, correct it.
Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
convert it to the common one.

Signed-off-by: Maarten Lankhorst 
Cc: Harry Wentland 
Cc: Leo Li 
Cc: Alex Deucher 
Cc: "Christian König" 
Cc: "David (ChunMing) Zhou" 
Cc: David Airlie 
Cc: Liviu Dudau 
Cc: Brian Starkey 
Cc: Mali DP Maintainers 
Cc: Boris Brezillon 
Cc: Nicolas Ferre 
Cc: Alexandre Belloni 
Cc: Ludovic Desroches 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: Sean Paul 
Cc: Jani Nikula 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Philipp Zabel 
Cc: CK Hu 
Cc: Matthias Brugger 
Cc: Rob Clark 
Cc: Ben Skeggs 
Cc: Tomi Valkeinen 
Cc: Laurent Pinchart 
Cc: Kieran Bingham 
Cc: Sandy Huang 
Cc: "Heiko Stübner" 
Cc: Thierry Reding 
Cc: Jonathan Hunter 
Cc: Eric Anholt 
Cc: VMware Graphics 
Cc: Sinclair Yeh 
Cc: Thomas Hellstrom 
Cc: Tony Cheng 
Cc: Shirish S 
Cc: Mikita Lipski 
Cc: Bhawanpreet Lakha 
Cc: David Francis 
Cc: Anthony Koo 
Cc: Jeykumar Sankaran 
Cc: Jordan Crouse 
Cc: Bruce Wang 
Cc: Sravanthi Kollukuduru 
Cc: Archit Taneja 
Cc: Steve Kowalik 
Cc: Carsten Behling 
Cc: Haneen Mohammed 
Cc: Daniel Vetter 
Cc: Rodrigo Siqueira 
Cc: Mahesh Kumar 
Cc: amd-...@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-ker...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: intel-...@lists.freedesktop.org
Cc: linux-media...@lists.infradead.org
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: linux-renesas-...@vger.kernel.org
Cc: linux-rockc...@lists.infradead.org
Cc: linux-te...@vger.kernel.org
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 +--
 drivers/gpu/drm/arm/malidp_crtc.c |  5 +--
 .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c|  5 +--
 drivers/gpu/drm/drm_atomic_state_helper.c | 31 ---
 drivers/gpu/drm/i915/intel_display.c  |  2 +-
 drivers/gpu/drm/imx/ipuv3-crtc.c  |  5 +--
 drivers/gpu/drm/mediatek/mtk_drm_crtc.c   |  5 +--
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 12 ++-
 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c |  6 +---
 drivers/gpu/drm/nouveau/dispnv50/head.c   | 13 ++--
 drivers/gpu/drm/omapdrm/omap_crtc.c   |  7 ++---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c|  4 +--
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c   |  7 +++--
 drivers/gpu/drm/tegra/dc.c|  5 +--
 drivers/gpu/drm/vc4/vc4_crtc.c|  8 ++---
 drivers/gpu/drm/vkms/vkms_crtc.c  |  7 +
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |  9 +-
 include/drm/drm_atomic_state_helper.h |  2 ++
 18 files changed, 56 insertions(+), 81 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 5064768642f3..770a71726cd1 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2802,9 +2802,7 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
if (WARN_ON(!state))
return;
 
-   crtc->state = >base;
-   crtc->state->crtc = crtc;
-
+   __drm_atomic_helper_crtc_reset(crtc, >base);
 }
 
 static struct drm_crtc_state *
diff --git a/drivers/gpu/drm/arm/malidp_crtc.c 
b/drivers/gpu/drm/arm/malidp_crtc.c
index e1b72782848c..9a924ff27148 100644
--- a/drivers/gpu/drm/arm/malidp_crtc.c
+++ b/drivers/gpu/drm/arm/malidp_crtc.c
@@ -474,10 +474,7 @@ static void malidp_crtc_reset(struct drm_crtc *crtc)
 
kfree(state);
state = kzalloc(sizeof(*state), GFP_KERNEL);
-   if (state) {
-   crtc->state = >base;
-   crtc->state->crtc = crtc;
-   }
+   __drm_atomic_helper_crtc_reset(crtc, >base);
 }
 
 static void malidp_crtc_destroy_state(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 96f4082671fe..8084d549c7d1 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -412,10 +412,7 @@ static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
}
 
state = kzalloc(sizeof(*state), GFP_KERNEL);
-   if (state) {
-   crtc->state = >base;
-   crtc->state->crtc = crtc;
-   }
+   __drm_atomic_helper_crtc_reset(crtc, >base);
 }
 
 static struct drm_crtc_state *
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index 3ba996069d69..3eee1ca33fc5 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -55,6 +55,29 @@
  * for these functions.
  */
 
+/**
+ * __drm_atomic_helper_crtc_reset - reset state on CRTC
+ * @crtc: drm CRTC
+ * @crtc_state: CRTC 

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