On Tue, Nov 26, 2019 at 10:14:14AM +0100, Daniel Vetter wrote:
> 0 means 1 as the default, but it's mighty confusing if the block size
> for the first plane is spelled out explicitly, but not for the 2nd
> plane.
>
> No cc: stable because this is just confusion, but 0 functional issue.
Agree!
>
Am 22.11.19 um 19:21 schrieb Alex Deucher:
On Fri, Nov 22, 2019 at 4:17 AM Daniel Vetter wrote:
On Fri, Nov 22, 2019 at 7:37 AM Gerd Hoffmann wrote:
Use the shared address space of the drm device (see drm_open() in
drm_file.c) for dma-bufs too. That removes a difference betweem drm
device
From: "James Qian Wang (Arm Technology China)"
Split sysfs config_id bitfiles to multiple separated sysfs files.
Signed-off-by: James Qian Wang (Arm Technology China)
---
.../drm/arm/display/include/malidp_product.h | 13 ---
.../gpu/drm/arm/display/komeda/komeda_sysfs.c | 80
Split sysfs node "config_id" to multiple files.
James Qian Wang (Arm Technology China) (2):
drm/komeda: Add a new file komeda_sysfs.c
drm/komeda: Refactor sysfs node "config_id"
.../drm/arm/display/include/malidp_product.h | 13 --
drivers/gpu/drm/arm/display/komeda/Makefile | 1 +
From: "James Qian Wang (Arm Technology China)"
Add a new file komeda_sysfs.c and move all sysfs related code to it.
Signed-off-by: James Qian Wang (Arm Technology China)
---
drivers/gpu/drm/arm/display/komeda/Makefile | 1 +
.../gpu/drm/arm/display/komeda/komeda_dev.c | 61 +-
On Mon, Nov 18, 2019 at 11:35:36AM +0100, Daniel Vetter wrote:
> All implementations are gone now.
>
> Signed-off-by: Daniel Vetter
> Cc: Sumit Semwal
> Cc: linux-me...@vger.kernel.org
> Cc: linaro-mm-...@lists.linaro.org
Applied the final two patches of this series now too.
-Daniel
> ---
>
For hardware that does not interpret the startadd field correctly,
add the module parameter 'hw_bug_no_startadd', which enables the
workaround.
v2:
* ask user for feedback if the option is active
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Cc: John Donnelly
---
There's at least one system that does not interpret the value of
the device's 'startadd' field correctly, which leads to incorrectly
displayed scanout buffers. Always placing the active scanout buffer
at offset 0 works around the problem.
Signed-off-by: Thomas Zimmermann
Reported-by: John
We found an MGA chip that does not interpret the scanout offset
correctly. This patchset works around the problem by placing all
buffer objects at offset 0 on this system.
v2:
* serarate [4/4] from the rest of the series
* add missing tags to patch files
Thomas Zimmermann (3):
Adds a conversion function that extracts the device type from the
PCI id-table flags. Allows for storing additional information in the
other flag bits.
Signed-off-by: Thomas Zimmermann
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap +
unpin")
Reviewed-by: Daniel
The flags field in struct mga_device has been unused so far. We now
use it to store flag bits from the PCI driver.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap +
unpin")
Cc: John Donnelly
Cc: Gerd
Am 26.11.19 um 01:35 schrieb Jules Irenge:
Replace 0 with NULL to fix sparse tool warning
warning: Using plain integer as NULL pointer
Signed-off-by: Jules Irenge
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
1 file changed, 1 insertion(+), 1
Add dt-schema yaml bindig for AM65x DSS, AM65x version TI Keystone
Display SubSystem.
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,am65x-dss.yaml | 133 ++
1 file changed, 133 insertions(+)
create mode 100644
Add dt-schema yaml bindig for J721E DSS, J721E version TI Keystone
Display SubSystem.
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,j721e-dss.yaml | 177 ++
1 file changed, 177 insertions(+)
create mode 100644
Add dt-schema yaml bindig for K2G DSS, an ultra-light version of TI
Keystone Display SubSystem.
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,k2g-dss.yaml | 97 +++
1 file changed, 97 insertions(+)
create mode 100644
Add entry for tidss DRM driver.
Signed-off-by: Jyri Sarha
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index eb19fad370d7..556b7425e883 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5554,6 +5554,16 @@ F:
There was couple of attempts upstream an earlier version of this
driver about a year ago [1]. Back then I needed to stop my efforts to
implement support for next Keystone DSS version, so now the driver
supports three different Keystone DSS version on three different SoCs.
I am starting the patch
Hi
Am 26.11.19 um 10:37 schrieb Daniel Vetter:
> On Tue, Nov 26, 2019 at 08:25:44AM +0100, Thomas Zimmermann wrote:
>> There's at least one system that does not interpret the value of
>> the device's 'startadd' field correctly, which leads to incorrectly
>> displayed scanout buffers. Always
On Tue, Nov 26, 2019 at 08:25:45AM +0100, Thomas Zimmermann wrote:
> For hardware that does not interpret the startadd field correctly,
> add the module parameter 'hw_bug_no_startadd', which enables the
> workaround.
>
> Signed-off-by: Thomas Zimmermann
> ---
>
On Tue, Nov 26, 2019 at 08:25:44AM +0100, Thomas Zimmermann wrote:
> There's at least one system that does not interpret the value of
> the device's 'startadd' field correctly, which leads to incorrectly
> displayed scanout buffers. Always placing the active scanout buffer
> at offset 0 works
Adding the pitch alignment as an argument to drm_gem_vram_fill_create_dumb()
allows to align scanlines to certain offsets. A value of 0 disables scanline
pitches.
v2:
* split of patch from related hibmc changes
* test if scanline pitch is power of 2
Signed-off-by: Thomas
The hibmc driver's struct hibmc_framebuffer stores a DRM framebuffer
with an associated GEM object. This functionality is also provided by
generic code. Switch hibmc over.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
The hibmc driver aligns scanlines to 16 bytes. By using the new pitch_align
argument of drm_gem_vram_fill_create_dumb(), convert hibmc over.
v2:
* move changes to VRAM helpers into separate patch
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
This change makes information about VRAM consumption available on
debugfs. See
/sys/kernel/debug/dri/0/vram-mm
for an overview of how VRAM is being used.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
The patch set replaces code in hibmc with generic implementation.
Patches 1 to 4 replace fbdev emuation, framebuffer and creation of
dumb buffers with respective code from DRM helpers. Patch 5 adds an
additional interface to debugfs that displays the allocated and free
areas in video memory.
The
There's nothing special about hibmc's fbdev emulation that is not
provided by the generic implementation. Switch over and remove the
driver's code.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +-
0 means 1 as the default, but it's mighty confusing if the block size
for the first plane is spelled out explicitly, but not for the 2nd
plane.
No cc: stable because this is just confusion, but 0 functional issue.
Fixes: 05f8bc82fc42 ("drm/fourcc: Add new P010, P016 video format")
Cc: Daniel
0 means 1 as the default, but it's mighty confusing if the block size
for the first plane is spelled out explicitly, but not for the 2nd
plane.
No cc: stable because this is just confusion, but 0 functional issue.
Fixes: 7ba0fee247ee ("drm/fourcc: Add AFBC yuv fourccs for Mali")
Cc: Brian
Am 25.11.19 um 17:51 schrieb Steven Price:
On 25/11/2019 14:10, Andrey Grodzovsky wrote:
When the sched thread is parked we assume ring_mirror_list is
not accessed from here.
FWIW I don't think this is necessary. kthread_park() will wait until the
thread is parked, at which point the thread is
On Tue, Nov 26, 2019 at 02:29:26PM +0800, Bibby Hsieh wrote:
> The DRM core takes care of all atomic state refcounting.
> However, mediatek drm defers some work that accesses planes
> and plane_states in drm_atomic_state, and must therefore
> keep its own atomic state references until this work
Am 25.11.19 um 19:39 schrieb Sam Ravnborg:
> Hi Thomas.
>
> On Thu, Nov 14, 2019 at 03:10:20PM +0100, Thomas Zimmermann wrote:
>> Udl uses struct udl_framebuffer for representing its framebuffer. The
>> type can be replaced by the standard DRM framebuffer structure.
>>
>> Patches 1 to 4 prepare
On Mon, Nov 25, 2019 at 02:37:01PM -0800, syzbot wrote:
> syzbot has bisected this bug to:
>
> commit 4b6ce6810a5dc0af387a238e8c852e0d3822381f
> Author: Rafael Antognolli
> Date: Mon Feb 5 23:33:30 2018 +
>
> drm/i915/cnl: WaPipeControlBefore3DStateSamplePattern
This seems very
I tried latest (5.4) custom kernel (with UBSAN) on my Dell D600 laptop and
found that it exhibits a
UBSAN warning triggered by userspace ioctl. Here is dmesg with anything
radeon-related + the warning, and config:
[ 17.659534] [drm] radeon kernel modesetting enabled.
[ 17.659607] radeon
On Tue, Nov 26, 2019 at 08:40:27AM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 25.11.19 um 10:14 schrieb Daniel Vetter:
> > On Fri, Nov 22, 2019 at 09:30:43AM +0100, Thomas Zimmermann wrote:
> >> The hibmc driver aligns scanlines to 16 bytes. Adding the pitch alignment
> >> as an argument to
On Tue, Nov 26, 2019 at 1:35 AM Russell King - ARM Linux admin
wrote:
> On Mon, Nov 25, 2019 at 10:44:43PM +0100, Daniel Vetter wrote:
> > On Mon, Nov 18, 2019 at 11:35:26AM +0100, Daniel Vetter wrote:
> > > It's a dummy anyway.
> > >
> > > Signed-off-by: Daniel Vetter
> > > Cc: Russell King
>
Replace 0 with NULL to fix sparse tool warning
warning: Using plain integer as NULL pointer
Signed-off-by: Jules Irenge
---
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c
syzbot has bisected this bug to:
commit 4b6ce6810a5dc0af387a238e8c852e0d3822381f
Author: Rafael Antognolli
Date: Mon Feb 5 23:33:30 2018 +
drm/i915/cnl: WaPipeControlBefore3DStateSamplePattern
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=13aeb522e0
start commit:
Hi Geert,
> From: Geert Uytterhoeven
> Sent: 22 November 2019 08:17
> Subject: Re: [PATCH v4 12/13] [HACK] drm/bridge: lvds-codec: Enforce device
> specific compatible strings
>
> Hi Fabrizio,
>
> On Thu, Nov 21, 2019 at 5:00 PM Fabrizio Castro
> wrote:
> > > From:
> -Original Message-
> From: Ville Syrjälä
> Sent: 25 November 2019 06:30
> To: Devarsh Thakkar
> Cc: dri-devel@lists.freedesktop.org; Hyun Kwon ; vcu-
> team ; Ranganathan Sk ; Dhaval
> Rajeshbhai Shah ; Satish Kumar Nagireddy
> ; Varunkumar Allagadapa
> Subject: Re: [PATCH libdrm
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/vegam_smumgr.c:
In function vegam_populate_clock_stretcher_data_table:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/vegam_smumgr.c:1489:29:
warning: variable stretch_amount2 set but not used [-Wunused-but-set-variable]
It is never used, so can be
Add changes to setup display datapath on SC7180 target.
Changes in v1:
- Add changes to support ctl_active on SC7180 target.
- While selecting the number of mixers in the topology
consider the interface width.
Changes in v2:
- Spawn topology mixer selection into separate patch (Rob Clark).
Add a compatible string to support sc7180 dpu version.
Signed-off-by: Kalyan Thota
---
Documentation/devicetree/bindings/display/msm/dpu.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu.txt
Hi Dave, Daniel,
Here are a few lates fixes for drm-misc-fixes. Obviously, it's not
going to make it into 5.4, but it'd be great if they were in the
upcoming PR.
Thanks!
Maxime
drm-misc-fixes-2019-11-25:
- A fix for a memory leak in the dma-buf support
- One in mcde DSI support that leads to
* H. Nikolaus Schaller [191124 18:00]:
> Hi Paul, Tony,
>
> > Am 24.11.2019 um 18:48 schrieb Tony Lindgren :
> >
> > * Paul Cercueil [191124 12:58]:
> >> Le dim., nov. 24, 2019 at 12:40, H. Nikolaus Schaller
> >> a
> >> écrit :
> >>> and add interrupt and clocks.
> > ...
> >>> ---
Hi Linus,
Here is this batch of hmm updates, I think we are nearing the end of this
project for now, although I suspect there will be some more patches related to
hmm_range_fault() in the next cycle.
You will probably be most interested in the patch "mm/mmu_notifier: add an
interval tree
Support Boe Himax8279d 8.0" 1200x1920 TFT LCD panel, it is a MIPI DSI
panel.
V9:
- Adjust init code, make the format more concise
- kill off default_off_cmds (Emil)
- use mipi_dsi_dcs_set_display_{on,off} in their enable/disable
callbacks. (Emil)
- Adjusting the delay function (Emil)
V8:
-
mixer selection in the display topology is based on multiple
factors
1) mixers available in the hw
2) interfaces to be enabled
3) merge capability
change will pickup mixer as per the topology need.
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 21
Hi Daniel,
On Mon, 25 Nov 2019 09:18:41 +0100 Daniel Vetter wrote:
> On Mon, Nov 25, 2019 at 9:08 AM Bruno Prémont wrote:
> > Trying a new kernel on old [NV04] system I get tons of
> > nouveau :01:00.0: gr: intr 0001 [NOTIFY] nsource 0040
> > [ILLEGAL_MTHD] nstatus 4000
From: Yongqiang Niu
This patch fix up 1440x900 dp display black screen issue
the computed result will overflow rdma1 fifo max size
when external display pixel clock bigger than 74MHZ
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4
1 file changed, 4
On Sun, Nov 24, 2019 at 01:12:47PM -0800, Niranjan Vishwanathapura wrote:
> > > > Using a temporary range is the pattern from nouveau, is it really
> > > > necessary in this driver?
> > >
> > > Yah, not required. In my local build I tried with proper default_flags
> > > and set pfn_flags_mask to
drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c: In function
mod_hdcp_hdcp2_enable_encryption:
drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c:633:77: warning:
variable msg_out set but not used [-Wunused-but-set-variable]
Add display hw catalog changes for SC7180 target.
Changes in v1:
- Configure register offsets and capabilities for the
display hw blocks.
Changes in v2:
- mdss_irq data type has changed in the dependent
patch, accommodate the necessary changes.
- Add co-developed-by tags in the commit
SC7180 follows a newer architecture where in some flush controls have been
re-organized to simplify programming and provide for future expandability.
Specifically:
1) The TIMING_ bits that control flush of INTF_ have been replaced with a
common INTF flush bit which flushes the programming in the
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