From: Maarten Lankhorst
Use pin_pages_unlocked() where we don't have a lock.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Maarten Lankhorst
Ensure we hold the lock around put_pages, and use the unlocked wrappers
for pinning pages and mappings.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 10 ++
1 file changed, 6 insertions(+), 4
From: Venkata Ramana Nayana
As the initial phase of implementation, when the system in idle,
copying the user objects from LMEM to SMEM during suspend and
restoring back in resume. In present implementation using memcpy based
eviction during swapout/swapin of objects. To test the functionality,
From: Venkata Ramana Nayana
We are only doing it now for kernel_context. We also need to do for the
copy engine blitter context.
Signed-off-by: Venkata Ramana Nayana
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Ramalingam C
Functions for window_blt_copy defined to create and destroy
the dummy vmas for virtual memory, which dont have any associated
objects.
These dummy vmas are used at window_blt_copy festure to associated to
set of pages and create ptes at runtime and submit it for blt copy.
From: Ramalingam C
To avoid the locking issues in vma handling during the blt copy of
objects, dummy vmas with sg_tables of size BLT_WINDOW_SZ (with
WINDOW_SIZE / PAGE_SIZE number of scatterlists) are created
in driver load for source and destination objects.
Two sets of these vmas are created,
From: Tvrtko Ursulin
We can eliminate the current evict window mutex, held over the whole
eviction process, and replace it with a wait queue which takes over the
role of co-ordinating access to pre-configured window copy vmas.
Apart from the global lock not being held over whole of the copy,
From: CQ Tang
enable_eviction is used to tune if eviction is enabled (default) or not.
Signed-off-by: Sudeep Dutt
Signed-off-by: CQ Tang
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_region.c | 5 +
drivers/gpu/drm/i915/i915_params.c | 3
From: CQ Tang
lmem_size is used to limit the amount of lmem_size. Default is to
use hardware available lmem size, when setting this modpraram
which is in MB unit.
Signed-off-by: CQ Tang
---
drivers/gpu/drm/i915/i915_params.c | 3 +++
drivers/gpu/drm/i915/i915_params.h | 1 +
From: Sudeep Dutt
cat /sys/kernel/debug/dri/0/i915_gem_objects
num_bytes_swapped_out 9417 num_bytes_swapped_in 5612
Signed-off-by: Sudeep Dutt
---
drivers/gpu/drm/i915/gem/i915_gem_region.c | 6 ++
drivers/gpu/drm/i915/i915_debugfs.c| 3 +++
drivers/gpu/drm/i915/i915_drv.h
From: CQ Tang
When an object is pinning, get_pages() is called to allocate memory
on a region, if memory pages are not availabe, the region eviction
is triggered to find other objects on the same region to be evicted,
the selected object is passed to put_pages() call to free the
memory pages,
From: Stuart Summers
The current implementation of intel_set_subslices only takes
the number of bits per subslice stride and copies those in
based on the slice given. For all known use cases, this works
fine. But in the event of some faulty hardware or other future
use case, do a straight memcpy
From: CQ Tang
Function i915_gem_shrink_memory_region() is changed to
intel_memory_region_evict() and moved from i915_gem_shrinker.c
to intel_memory_region.c, this function is used to handle local
memory swapping, in addition to evict purgeable objects only.
When an object is selected from list,
From: CQ Tang
i915_gem_object_memcpy() will copy the pages from source object
to destination object by using memcpy. If source and destination
are not the same size, copy the smaller pages.
Using pread/pwrite mechanism to do the page read/write.
Signed-off-by: CQ Tang
---
From: Ramalingam C
Number of bytes swapped in and out are captured for both blitter and
memcpy based evictions with time taken for the process.
Debugfs is extended to provide the eviction statistics through both
methods with rate of transfer.
Signed-off-by: Ramalingam C
Cc: Matthew Auld
Cc:
From: Ramalingam C
Selftest live_blt_evict is written to create an lmem and smem objects and
copy lmem into smem obj using the window based blt copy used for lmem
eviction.
And we test for range of object size from 4K to 64M with different
usecase scenario w.r.t to window size.
Signed-off-by:
From: Prathap Kumar Valsan
During suspend we will lose all page tables as they are allocated in
LMEM. In-order to make sure that the contexts do not access the
corrupted page table after we restore, we are evicting all vma's that
are bound to vm's. This includes kernel vm.
During resume, we
From: Venkata Ramana Nayana
If record default objects are created in LMEM and in suspend
pin the pages of obj (src) and use blitter for eviction. But
during request creation using blitter context and try to pin the same
default object, to restore the ctx with default HW values, will leads to
the
From: Tvrtko Ursulin
Without a dedicated context there can be a "deadlock" due inversion
between object clearing and eviction on the shared blitter context
timeline.
Clearing of a newly allocated objects emits it's request, but to execute
the request, something may need to be evicted in order
From: Tvrtko Ursulin
Hold blitter engine power reference across the whole copy operation for
efficiency.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
From: Ramalingam C
window_blt_copy feature is used for swapin and swapout based on the i915
module parameter called enable_eviction.
Signed-off-by: Ramalingam C
Cc: Matthew Auld
Cc: CQ Tang
---
drivers/gpu/drm/i915/gem/i915_gem_region.c | 14 ++
drivers/gpu/drm/i915/i915_drv.c
From: Ramalingam C
Function to retrieve the partial pages from the object, from mentioned
offset(pages). This is created as a subset of intel_partial pages to be
used for window blt copy feature which is introduced in forthcoming
patches.
This takes the sg_table to be filled in with pages and
From: Sudeep Dutt
Signed-off-by: Sudeep Dutt
---
drivers/gpu/drm/i915/gem/i915_gem_region.c | 16 ++--
drivers/gpu/drm/i915/i915_debugfs.c| 3 +++
drivers/gpu/drm/i915/i915_drv.h| 2 ++
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git
On Fri, Nov 27, 2020 at 09:35:39AM +0100, Geert Uytterhoeven wrote:
> Hi Uwe,
>
> On Thu, Nov 26, 2020 at 6:03 PM Uwe Kleine-König
> wrote:
> > The remove callback is only called for devices that were probed
> > successfully before. As the matching probe function cannot complete
> > without
From: "Michael J. Ruhl"
The i915 GEM dmabuf mmap interface assumes all BOs are SHMEM. When
the BO is backed by LMEM, this assumption doesn't work so well.
Introduce the dmabuf mmap interface to LMEM by adding the appropriate
VMA faulting mechanism and update dmabuf to allow for LMEM backed BOs
We need to general our accessor for the page directories and tables from
using the simple kmap_atomic to support local memory, and this setup
must be done on acquisition of the backing storage prior to entering
fence execution contexts. Here we replace the kmap with the object
maping code that for
From: Zbigniew Kempczyński
IGTs should be able to choose testing strategy depending on memory
regions and its sizes. Add region instance number to make this
easier and descriptive.
Cc: Matthew Auld
Cc: Ramalingam C
Cc: Tvrtko Ursulin
Cc: Adam Miszczak
Signed-off-by: Zbigniew Kempczyński
It's a requirement that for dgfx we place all the paging structures in
device local-memory.
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 -
drivers/gpu/drm/i915/gt/intel_gtt.c | 27 +--
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
3
From: Michel Thierry
Signed-off-by: Michel Thierry
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/gt/intel_ring.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support setting an immutable-priority-list of potential
placements, at creation time.
If we wish to set the placements/regions we can simply
From: Kui Wen
When user space does mmap, kernel would map the physical page of local memory
to virtual memory address. The r->sgt.pfn is page address allocated from
local memory and the local memory region is from 0 to LMEM size. Hence the
r->sgt.pfn is possible to be 0, but this's normal case.
We are going want to able to move objects between different regions
like system memory and local memory. In the future everything should
be just another region.
Cc: Abdiel Janulgue
Cc: Sudeep Dutt
Cc: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Cc: Daniele Ceraolo Spurio
Cc:
From: Thomas Hellström
When an object is published on an eviction list, it's considered for
eviction and can be locked by other threads. This is strictly not
necessary until the object has pages. To limit eviction lookups that
need to discard the object and facilitate a longer period during
From: CQ Tang
We posted blitter copying operation. Then we call
i915_gem_object_set_to_cpu_domain(), inside this function, we
call i915_gem_object_wait() with interruptible flag. Sometimes
this wait call gets interrupted by the blitter copying complete
interrupt. This will make migration
Hook up the LMEM region. Addresses will start from zero, and for CPU
access we get LMEM_BAR which is just a 1:1 mapping of said region.
Based on a patch from Michel Thierry.
Cc: Abdiel Janulgue
Cc: Lucas De Marchi
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Signed-off-by: Matthew Auld
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/gt/intel_gt.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index
Based on a patch from Michel Thierry.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 24 ++--
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 ++-
2 files changed, 20
Now that PDs can also be mapped as WC, we can forgo all the flushing for
such mappings.
Signed-off-by: Matthew Auld
---
.../drm/i915/gem/selftests/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 6 ++---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26
From: Prathap Kumar Valsan
Store pointer to gt closest to its memory region so that we can access
the engines corresponding to that gt via memory region.
Signed-off-by: Prathap Kumar Valsan
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_memory_region.c | 1 +
From: Abdiel Janulgue
Returns the available memory region areas supported by the HW.
Signed-off-by: Abdiel Janulgue
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 12 -
drivers/gpu/drm/i915/gem/i915_gem_stolen.h | 3 ++
drivers/gpu/drm/i915/i915_drv.c|
Based on a patch from Michel Thierry.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
.../drm/i915/gt/intel_execlists_submission.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git
Add support for gpu fuse to help identify the supported opps.
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index
On 11/16/2020 10:44 PM, Jordan Crouse wrote:
On Mon, Nov 16, 2020 at 07:40:03PM +0530, Akhil P Oommen wrote:
On 11/12/2020 10:05 PM, Jordan Crouse wrote:
On Thu, Nov 12, 2020 at 09:19:04PM +0530, Akhil P Oommen wrote:
So far a530v2 gpu has support for detecting its supported opps
based on a
So far a530v2 gpu has support for detecting its supported opps
based on a fuse value called speed-bin. This patch makes this
support generic across gpu families. This is in preparation to
extend speed-bin support to a6x family.
Signed-off-by: Akhil P Oommen
---
Changes from v1:
1. Added
Extend speed-bin support to a618 gpu.
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c
b/drivers/gpu/drm/msm/adreno/adreno_device.c
index e0ff16c..21db7ae 100644
---
Hi Tomi,
On 26.11.20 г. 16:11 ч., Tomi Valkeinen wrote:
Hi Aaro, Ivaylo,
On 24/11/2020 23:03, Ivaylo Dimitrov wrote:
Is there any progress on the issue? I tried 5.9.1 and still nothing displayed.
Can you test the attached patch?
With this patch I don't see oops that Aaro reported, so:
drm hotplug handling code (drm_client_dev_hotplug()) can wait on mutex,
thus delaying further lt9611uxc IRQ events processing. It was observed
occasionally during bootups, when drm_client_modeset_probe() was waiting
for EDID ready event, which was delayed because IRQ handler was stuck
trying to
KASAN: null-ptr-deref in range [0x0030-0x0037]
CPU: 0 PID: 18491 Comm: syz-executor.0 Tainted: G C 5.10.0-rc4+ #1
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.13.0-1ubuntu1
04/01/2014
RIP: 0010:kobject_put+0x2f/0x140
Call Trace:
put_device+0x20/0x40
It looks like SPARC64 requires FB_ATY_CT to build without errors,
so have FB_ATY select FB_ATY_CT if both SPARC64 and PCI are enabled
instead of using "default y if SPARC64 && PCI", which is not strong
enough to prevent build errors.
As it currently is, FB_ATY_CT can be disabled, resulting in
if the driver uses drmm_vram_helper_init, there is no need to
call drm_vram_helper_release_mm when the drm module get unloaded,
as this will done automagically.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/vboxvideo/vbox_ttm.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff
pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to putting operation will result in a
reference leak here.
A new function pm_runtime_resume_and_get is introduced in
[0] to keep usage counter balanced. So We fix the reference
leak by replacing it with new funtion.
Because clk_disable_unprepare() already checked NULL clock parameter,
so the additional check is unnecessary, just remove them.
Signed-off-by: Xu Wang
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git
When using gem with vram carveout the page allocation is managed via
drm_mm. The necessary drm_mm_node is allocated in add_vma, but it is
referenced in msm_gem_object as well. It is freed before the drm_mm_node
has been deallocated leading to use-after-free on every single vram
allocation.
On Thu, Nov 26, 2020 at 12:01:40PM +0100, Uwe Kleine-König wrote:
> The driver core ignores the return value of struct bus_type::remove
> because there is only little that can be done. To simplify the quest to
> make this function return void, let struct locomo_driver::remove return
> void, too.
pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to putting operation will result in a
reference leak here.
A new function pm_runtime_resume_and_get is introduced in
[0] to keep usage counter balanced. So We fix the reference
leak by replacing it with new funtion.
patch #1 is code refactorings to use devm_drm_dev_alloc and
devm_drm_irq_install.
patch #2 add the new api to install irq, patch #3 is hibmc driver uses
the newly added api to register interrupts.
Tian Tao (3):
drm/hisilicon: Code refactoring for hibmc_drm_drv
drm/irq: Add the new api to
On Wed, Nov 25, 2020 at 11:44 PM Edward Cree wrote:
>
> To make the intent clear, you have to first be certain that you
> understand the intent; otherwise by adding either a break or a
> fallthrough to suppress the warning you are just destroying the
> information that "the intent of this code
On Thu, Nov 26, 2020 at 4:28 PM Geert Uytterhoeven wrote:
>
> The maintainer is not necessarily the owner/author of the code, and
> thus may not know the intent of the code.
Agreed, I was not blaming maintainers -- just trying to point out that
the problem is there :-)
In those cases, it is
pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to putting operation will result in a
reference leak here.
A new function pm_runtime_resume_and_get is introduced in
[0] to keep usage counter balanced. So We fix the reference
leak by replacing it with new funtion.
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_irq.c | 34 ++
include/drm/drm_irq.h | 2 +-
2 files changed, 35 insertions(+), 1
From: Maarten Lankhorst
We should not allow this any more, as it will break with the new userptr
implementation, it could still be made to work, but there's no point in
doing so.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 10
From: Maarten Lankhorst
Now that unsynchronized mappings are removed, the only time userptr
works is when the MMU notifier is enabled. Put all of the userptr
code behind a mmu notifier ifdef.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c
From: Maarten Lankhorst
This should be done as part of the ww loop, in order to remove a
i915_vma_pin that needs ww held.
Now only i915_ggtt_pin() callers remaining.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 24
From: Maarten Lankhorst
This allows us to remove pin_map from state allocation, which saves
us a few retry loops. We won't need this until first pin, anyway.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_context_types.h | 13 ++-
From: Maarten Lankhorst
We previously complained when ww == NULL.
This function is now only used in selftests to pin an object,
and ww locking is now fixed.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
.../i915/gem/selftests/i915_gem_coherency.c | 14 +
From: Daniele Ceraolo Spurio
Make creation separate from pinning, in order to take the lock only
once, and pin the mapping with the lock held.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
Signed-off-by: Daniele Ceraolo Spurio
---
.../drm/i915/gt/intel_engine_workaround_bb.c | 45
From: Maarten Lankhorst
Quick fix, just use the unlocked version.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/shmem_utils.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c
From: Maarten Lankhorst
We need to lock the object to move it to the correct domain,
add the missing lock.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff
From: Maarten Lankhorst
Pin in the caller, not in the work itself. This should also
work better for dma-fence annotations.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 15 +++
1 file changed, 7 insertions(+), 8
From: Thomas Hellström
Stolen objects need to lock, and we may call put_pages when
refcount drops to 0, ensure all calls are handled correctly.
Idea-from: Thomas Hellström
Signed-off-by: Maarten Lankhorst
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_object.h | 13
From: Maarten Lankhorst
pin_map needs the ww lock, so ensure we pin both before submission.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_object.h| 3 +
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++
From: Maarten Lankhorst
Take the ww lock around engine_unpark. Because of the
many many places where rpm is used, I chose the safest option
and used a trylock to opportunistically take this lock for
__engine_unpark.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
From: Maarten Lankhorst
We need to take the obj lock to pin pages, so wait until the callers
have done so, before making the object unshrinkable.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 2 +
From: Maarten Lankhorst
We may create page table objects on the fly, but we may need to
wait with the ww lock held. Instead of waiting on a freed obj
lock, ensure we have the same lock for each object to keep
-EDEADLK working. This ensures that i915_vma_pin_ww can lock
the page tables when
From: Maarten Lankhorst
In the ucode functions, the calls are done before userspace runs,
when debugging using debugfs, or when creating semi-permanent mappings;
we can safely use the unlocked versions that does the ww dance for us.
Because there is no pin_pages_unlocked yet, add it as
From: Maarten Lankhorst
With userptr fixed, there is no need for all separate lockdep classes
now, and we can remove all lockdep tricks used. A trylock in the
shrinker is all we need now to flatten the locking hierarchy.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
From: Maarten Lankhorst
Take a simple lock so we hold ww around (un)pin_pages as needed.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
From: Maarten Lankhorst
i915_gem_object_pin_map potentially needs a ww context, so ensure we
have one we can revoke.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 24 ++--
1 file changed, 22 insertions(+), 2
From: Maarten Lankhorst
We are removing obj->mm.lock, and need to take the reservation lock
before we can pin pages. Move the pinning pages into the helper, and
merge gtt pwrite/pread preparation and cleanup paths.
The fence lock is also removed; it will conflict with fence annotations,
because
From: Maarten Lankhorst
Because of the long lifetime of the mapping, we cannot wrap this in a
simple limited ww lock. Just use the unlocked version of pin_map,
because we'll likely release the mapping a lot later, in a different
thread.
Signed-off-by: Maarten Lankhorst
Cc: Thomas Hellström
From: CQ Tang
Adjust the page offset with region start dma address.
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Abdiel Janulgue
Cc: Niranjana Vishwanathapura
Cc: Sudeep Dutt
Signed-off-by: CQ Tang
---
drivers/gpu/drm/i915/i915_gpu_error.c | 4 +++-
1 file changed, 3 insertions(+), 1
From: Daniele Ceraolo Spurio
The firmware binary has to be loaded from lmem and the recommendation is
to put all other objects in there as well. Note that we don't fall back
to system memory if the allocation in lmem fails because all objects are
allocated during driver load and if we have
From: CQ Tang
Add "REGION_STOLEN" device info to dg1, create stolen memory
region from upper portion of local device memory, starting
from DSMBASE.
The memory region is marked with "is_devmem=true".
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Abdiel Janulgue
Cc: Chris P Wilson
Cc:
From: CQ Tang
We have three memory region types: INTEL_SMEM, INTEL_LMEM, and
INTEL_STOLEN. We also have two types of memory: system memory
and device memory (or called local memory).
Memory region with type INTEL_SMEM only has system memory; the
other two types of memory regions could have
From: CQ Tang
During high threads contention, the same object had been pinned
with a different type. A new pinning will catch -EBUSY if the
FORCE flag is not specified.
This error was observed on DG1 silicon during PO.
Cc: Matthew Auld
Cc: Lucas De Marchi
Cc: Abdiel Janulgue
Cc:
For the PTEs we get an LM bit, to signal whether the page resides in
SMEM or LMEM.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Venkata Sandeep Dhanalakota
---
From: Abdiel Janulgue
For performance writes over PCIe may not be strictly ordered by default.
This provides an option to expose a kernel configuration option to disable
relaxed ordering and turn on strict ordering instead for debug purposes.
Signed-off-by: Abdiel Janulgue
Signed-off-by:
For some internal device local-memory objects it would be useful to have
an option to CPU clear the pages upon gathering the backing store. Note
that this might be before the blitter is useable, which is the case for
some internal GuC objects.
Signed-off-by: Matthew Auld
---
From: CQ Tang
The lmem region needs to remove the stolen part.
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Abdiel Janulgue
Cc: Chris P Wilson
Cc: Balestrieri, Francesco
Cc: Niranjana Vishwanathapura
Cc: Venkata S Dhanalakota
Cc: Neel Desai
Cc: Matthew Brost
Cc: Sudeep Dutt
Signed-off-by:
From: CQ Tang
Current stolen code has partial memory region support. This patch
finish the rest of code, so object memory are allocated from stolen
memory region.
However, three "global" variables are still kept for the display code
to access, "i915->dsm", "i915->dsm_reserved",
and
From: Imre Deak
On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
One reason for this is that the 0xA-0xB range is not accessible
by the display, probably since this region is redirected to another
memory location for legacy VGA compatibility.
BSpec: 50586
Testcase:
From: Abdiel Janulgue
In the following patch we need to reserve regions unaccessible to the
driver during initialization, so add back mem->reserved for collecting
such regions.
Cc: Imre Deak
Signed-off-by: Abdiel Janulgue
---
drivers/gpu/drm/i915/intel_memory_region.c| 2 +
From: Clint Taylor
Read OPROM SPI through MMIO and find VBT entry since we can't use
OpRegion and PCI mapping may not work on some systems due to the BIOS
not leaving the Option ROM mapped.
Cc: Ville Syrjälä
Cc: Tomas Winkler
Cc: Jon Bloomfield
Signed-off-by: Clint Taylor
Signed-off-by:
From: Animesh Manna
For dgfx, DSB should use local memory instead of system memory. Using
local memory surely brings performance improvement as local memory is
close to gpu. Also want to avoid multiple gpu using system memory.
Use LMEM API to create gem object needed for DSB command buffer.
From: Animesh Manna
Newly created lmem buffer by fbdev need reset otherwise it has old
garbage data. Same logic was present for stolen memory, extended
the same for lmem.
Cc: Daniel Vetter
Cc: Daniel Vetter
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
From: Anusha Srivatsa
In the scenario where local memory is available, we have
rely on CPU access via lmem directly instead of aperture.
Cc: Ville Syrjälä
Cc: Dhinakaran Pandiyan
Cc: Maarten Lankhorst
Cc: Chris P Wilson
Cc: Daniel Vetter
Cc: Joonas Lahtinen
Cc: Daniele Ceraolo Spurio
Cc:
From: Clint Taylor
The PUNIT FW is currently returning 0 for all memory bandwidth
parameters. Read the values directly from MCHBAR offsets 0x5918 and
0x4000(4). This is a temporary WA until the PUNIT FW returns valid
values.
Cc: Ville Syrjälä
Cc: Matt Roper
Cc: Jani Saarinen
Signed-off-by:
From: Michel Thierry
Signed-off-by: Michel Thierry
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 +-
drivers/gpu/drm/i915/gt/intel_timeline.c | 8 +++-
2 files
From: Venkata Sandeep Dhanalakota
when allocating pages to lmem object of size 4G or greater
we allocate memory blocks from buddy system. In this scenario
buddy sytem can allocate blocks that can have size >= 4G and
these blocks require >32b to represent block size with these
blocks we run into
From: Anshuman Gupta
Sanitize OPROM header, CPD signature and OPROM PCI version.
OPROM_HEADER, EXPANSION_ROM_HEADER and OPROM_MEU_BLOB structures
and PCI struct offsets are provided by GSC counterparts.
These are yet to be Documented in B.Spec.
After successful sanitization, extract VBT from
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