[PATCH 3/5] arm64: dts: qcom: qrb5165-rb5: add onboard USB-C redriver

2023-07-08 Thread Dmitry Baryshkov
Add the nb7vpq904m, onboard USB-C redriver / retimer.

Signed-off-by: Dmitry Baryshkov 
---
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 52 +++-
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts 
b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index b6c587ffdf8f..a03f334a3d01 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -610,6 +610,46 @@ lt9611_out: endpoint {
 /* LS-I2C1 */
  {
status = "okay";
+
+   typec-mux@1c {
+   compatible = "onnn,nb7vpq904m";
+   reg = <0x1c>;
+
+   vcc-supply = <_s4a_1p8>;
+
+   retimer-switch;
+   orientation-switch;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+
+   redriver_usb_con_ss: endpoint {
+   remote-endpoint = 
<_typec_mux_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+
+   redriver_phy_con_ss: endpoint {
+   remote-endpoint = 
<_1_qmpphy_typec_mux_in>;
+   data-lanes = <0 1 2 3>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+
+   redriver_usb_con_sbu: endpoint {
+   remote-endpoint = 
<_typec_sbu_out>;
+   };
+   };
+   };
+   };
 };
 
  {
@@ -1294,7 +1334,7 @@ _1_qmpphy {
 };
 
 _1_qmpphy_typec_mux_in {
-   remote-endpoint = <_typec_mux_out>;
+   remote-endpoint = <_phy_con_ss>;
 };
 
 _2 {
@@ -1382,7 +1422,15 @@ pm8150b_role_switch_out: endpoint {
port@1 {
reg = <1>;
pm8150b_typec_mux_out: endpoint {
-   remote-endpoint = 
<_1_qmpphy_typec_mux_in>;
+   remote-endpoint = 
<_usb_con_ss>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+
+   pm8150b_typec_sbu_out: endpoint {
+   remote-endpoint = 
<_usb_con_sbu>;
};
};
};
-- 
2.39.2



[PATCH 5/5] arm64: dts: qcom: qrb5165-rb5: enable DP altmode

2023-07-08 Thread Dmitry Baryshkov
Add displayport altmode declaration to the Type-C controller node to
enable DP altmode negotiation.

Signed-off-by: Dmitry Baryshkov 
---
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts 
b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 210c60025c32..5f289bf640f1 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -1418,6 +1418,13 @@ PDO_FIXED_DUAL_ROLE |
 PDO_FIXED_USB_COMM |
 PDO_FIXED_DATA_SWAP)>;
 
+   altmodes {
+   displayport {
+   svid = <0xff01>;
+   vdo = <0x1c46>;
+   };
+   };
+
ports {
#address-cells = <1>;
#size-cells = <0>;
-- 
2.39.2



[PATCH 4/5] arm64: dts: qcom: qrb5165-rb5: enable displayport controller

2023-07-08 Thread Dmitry Baryshkov
Enable the onboard displayport controller, connect it to QMP PHY.

Signed-off-by: Dmitry Baryshkov 
---
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts 
b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index a03f334a3d01..210c60025c32 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -656,6 +656,15 @@  {
status = "okay";
 };
 
+_dp {
+   status = "okay";
+};
+
+_dp_out {
+   data-lanes = <0 1>;
+   remote-endpoint = <_1_qmpphy_dp_in>;
+};
+
 _dsi0 {
status = "okay";
vdda-supply = <_l9a_1p2>;
@@ -1436,3 +1445,7 @@ pm8150b_typec_sbu_out: endpoint {
};
};
 };
+
+_1_qmpphy_dp_in {
+   remote-endpoint = <_dp_out>;
+};
-- 
2.39.2



[PATCH 2/5] arm64: dts: qcom: sm8250: Add DisplayPort device node

2023-07-08 Thread Dmitry Baryshkov
Declare the displayport controller present on the Qualcomm SM8250 SoC.

Signed-off-by: Dmitry Baryshkov 
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 93 
 1 file changed, 93 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi 
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index aaf3f6764fe8..89b3a24d402d 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3626,6 +3626,12 @@ port@0 {
port@1 {
reg = <1>;
};
+
+   port@2 {
+   reg = <2>;
+
+   usb_1_qmpphy_dp_in: endpoint {};
+   };
};
};
 
@@ -4270,6 +4276,14 @@ dpu_intf2_out: endpoint {
remote-endpoint = 
<_dsi1_in>;
};
};
+
+   port@2 {
+   reg = <2>;
+
+   dpu_intf0_out: endpoint {
+   remote-endpoint = 
<_dp_in>;
+   };
+   };
};
 
mdp_opp_table: opp-table {
@@ -4297,6 +4311,85 @@ opp-46000 {
};
};
 
+   mdss_dp: displayport-controller@ae9 {
+   compatible = "qcom,sm8250-dp", "qcom,sm8350-dp";
+   reg = <0 0xae9 0 0x200>,
+ <0 0xae90200 0 0x200>,
+ <0 0xae90400 0 0x600>,
+ <0 0xae91000 0 0x400>,
+ <0 0xae91400 0 0x400>;
+   interrupt-parent = <>;
+   interrupts = <12>;
+   clocks = < DISP_CC_MDSS_AHB_CLK>,
+< DISP_CC_MDSS_DP_AUX_CLK>,
+< DISP_CC_MDSS_DP_LINK_CLK>,
+< 
DISP_CC_MDSS_DP_LINK_INTF_CLK>,
+< DISP_CC_MDSS_DP_PIXEL_CLK>;
+   clock-names = "core_iface",
+ "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface",
+ "stream_pixel";
+
+   assigned-clocks = < 
DISP_CC_MDSS_DP_LINK_CLK_SRC>,
+ < 
DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+   assigned-clock-parents = <_phy 0>,
+<_phy 1>;
+
+   phys = <_phy>;
+   phy-names = "dp";
+
+   #sound-dai-cells = <0>;
+
+   operating-points-v2 = <_opp_table>;
+   power-domains = < SM8250_MMCX>;
+
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   mdss_dp_in: endpoint {
+   remote-endpoint = 
<_intf0_out>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+
+   mdss_dp_out: endpoint {
+   };
+   };
+   };
+
+   dp_opp_table: opp-table {
+   compatible = "operating-points-v2";
+
+   opp-16000 {
+   opp-hz = /bits/ 64 <16000>;
+   required-opps = 
<_opp_low_svs>;
+   };
+
+   opp-27000 {
+   opp-hz = /bits/ 64 <27000>;
+   required-opps = 
<_opp_svs>;
+   };

[PATCH 0/5] arm64: dts: qcom: qrb5165-rb5: enable DP support

2023-07-08 Thread Dmitry Baryshkov
Implement DisplayPort support for the Qualcomm RB5 platform.

Note: while testing this, I had link training issues with several
dongles with DP connectors. Other DisplayPort-USB-C dongles (with HDMI
or VGA connectors) work perfectly.

Dependencies: [1]
Soft-dependencies: [2], [3]

[1] 
https://lore.kernel.org/linux-arm-msm/20230515133643.3621656-1-bryan.odonog...@linaro.org/
[2] 
https://lore.kernel.org/linux-arm-msm/20230709034211.4045004-1-dmitry.barysh...@linaro.org/
[3] 
https://lore.kernel.org/linux-arm-msm/20230709034808.4049383-1-dmitry.barysh...@linaro.org/

Dmitry Baryshkov (5):
  dt-bindings: display: msm: dp-controller: document SM8250 compatible
  arm64: dts: qcom: sm8250: Add DisplayPort device node
  arm64: dts: qcom: qrb5165-rb5: add onboard USB-C redriver
  arm64: dts: qcom: qrb5165-rb5: enable displayport controller
  arm64: dts: qcom: qrb5165-rb5: enable DP altmode

 .../bindings/display/msm/dp-controller.yaml   |  1 +
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts  | 72 +-
 arch/arm64/boot/dts/qcom/sm8250.dtsi  | 93 +++
 3 files changed, 164 insertions(+), 2 deletions(-)

-- 
2.39.2



[PATCH 1/5] dt-bindings: display: msm: dp-controller: document SM8250 compatible

2023-07-08 Thread Dmitry Baryshkov
It looks like DP controlled on SM8250 is the same as DP controller on
SM8350. Use the SM8350 compatible as fallback for SM8250.

Signed-off-by: Dmitry Baryshkov 
---
 Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml 
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 7a7cf3fb3e6d..a31ec9a4179f 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -28,6 +28,7 @@ properties:
   - qcom,sm8350-dp
   - items:
   - enum:
+  - qcom,sm8250-dp
   - qcom,sm8450-dp
   - qcom,sm8550-dp
   - const: qcom,sm8350-dp
-- 
2.39.2



Re: [syzbot] [dri?] divide error in drm_mode_vrefresh

2023-07-08 Thread syzbot
Hello,

syzbot has tested the proposed patch and the reproducer did not trigger any 
issue:

Reported-and-tested-by: syzbot+622bba18029bcde67...@syzkaller.appspotmail.com

Tested on:

commit: 1c7873e3 mm: lock newly mapped VMA with corrected orde..
git tree:   
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
console output: https://syzkaller.appspot.com/x/log.txt?x=101196d2a8
kernel config:  https://syzkaller.appspot.com/x/.config?x=8f6b0c7ae2c9c303
dashboard link: https://syzkaller.appspot.com/bug?extid=622bba18029bcde672e1
compiler:   gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for 
Debian) 2.35.2
patch:  https://syzkaller.appspot.com/x/patch.diff?x=10e44354a8

Note: testing is done by a robot and is best-effort only.


[PATCH v5 2/3] drm/bridge_connector: stop filtering events in drm_bridge_connector_hpd_cb()

2023-07-08 Thread Dmitry Baryshkov
In some cases the bridge drivers would like to receive hotplug events
even in the case new status is equal to the old status. In the DP case
this is used to deliver "attention" messages to the DP host. Stop
filtering the events in the drm_bridge_connector_hpd_cb() and let
drivers decide whether they would like to receive the event or not.

Signed-off-by: Dmitry Baryshkov 
---
 drivers/gpu/drm/drm_bridge_connector.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_bridge_connector.c 
b/drivers/gpu/drm/drm_bridge_connector.c
index 19ae4a177ac3..84d8d310ef04 100644
--- a/drivers/gpu/drm/drm_bridge_connector.c
+++ b/drivers/gpu/drm/drm_bridge_connector.c
@@ -113,16 +113,11 @@ static void drm_bridge_connector_hpd_cb(void *cb_data,
struct drm_bridge_connector *drm_bridge_connector = cb_data;
struct drm_connector *connector = _bridge_connector->base;
struct drm_device *dev = connector->dev;
-   enum drm_connector_status old_status;
 
mutex_lock(>mode_config.mutex);
-   old_status = connector->status;
connector->status = status;
mutex_unlock(>mode_config.mutex);
 
-   if (old_status == status)
-   return;
-
drm_bridge_connector_hpd_notify(connector, status);
 
drm_kms_helper_hotplug_event(dev);
-- 
2.39.2



[PATCH v5 3/3] drm/bridge_connector: implement oob_hotplug_event

2023-07-08 Thread Dmitry Baryshkov
Implement the oob_hotplug_event() callback. Translate it to the HPD
notification sent to the HPD bridge in the chain.

Signed-off-by: Dmitry Baryshkov 
---
 drivers/gpu/drm/drm_bridge_connector.c | 29 +++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_bridge_connector.c 
b/drivers/gpu/drm/drm_bridge_connector.c
index 84d8d310ef04..364f6e37fbdc 100644
--- a/drivers/gpu/drm/drm_bridge_connector.c
+++ b/drivers/gpu/drm/drm_bridge_connector.c
@@ -5,6 +5,8 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 
 #include 
@@ -107,10 +109,9 @@ static void drm_bridge_connector_hpd_notify(struct 
drm_connector *connector,
}
 }
 
-static void drm_bridge_connector_hpd_cb(void *cb_data,
-   enum drm_connector_status status)
+static void drm_bridge_connector_handle_hpd(struct drm_bridge_connector 
*drm_bridge_connector,
+   enum drm_connector_status status)
 {
-   struct drm_bridge_connector *drm_bridge_connector = cb_data;
struct drm_connector *connector = _bridge_connector->base;
struct drm_device *dev = connector->dev;
 
@@ -123,6 +124,21 @@ static void drm_bridge_connector_hpd_cb(void *cb_data,
drm_kms_helper_hotplug_event(dev);
 }
 
+static void drm_bridge_connector_hpd_cb(void *cb_data,
+   enum drm_connector_status status)
+{
+   drm_bridge_connector_handle_hpd(cb_data, status);
+}
+
+static void drm_bridge_connector_oob_hotplug_event(struct drm_connector 
*connector,
+  enum drm_connector_status 
status)
+{
+   struct drm_bridge_connector *bridge_connector =
+   to_drm_bridge_connector(connector);
+
+   drm_bridge_connector_handle_hpd(bridge_connector, status);
+}
+
 static void drm_bridge_connector_enable_hpd(struct drm_connector *connector)
 {
struct drm_bridge_connector *bridge_connector =
@@ -216,6 +232,7 @@ static const struct drm_connector_funcs 
drm_bridge_connector_funcs = {
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
.debugfs_init = drm_bridge_connector_debugfs_init,
+   .oob_hotplug_event = drm_bridge_connector_oob_hotplug_event,
 };
 
 /* 
-
@@ -351,6 +368,12 @@ struct drm_connector *drm_bridge_connector_init(struct 
drm_device *drm,
if (!drm_bridge_get_next_bridge(bridge))
connector_type = bridge->type;
 
+#ifdef CONFIG_OF
+   if (!drm_bridge_get_next_bridge(bridge) &&
+   bridge->of_node)
+   connector->fwnode = 
fwnode_handle_get(of_fwnode_handle(bridge->of_node));
+#endif
+
if (bridge->ddc)
ddc = bridge->ddc;
 
-- 
2.39.2



[PATCH v5 1/3] drm: Add HPD state to drm_connector_oob_hotplug_event()

2023-07-08 Thread Dmitry Baryshkov
From: Bjorn Andersson 

In some implementations, such as the Qualcomm platforms, the display
driver has no way to query the current HPD state and as such it's
impossible to distinguish between disconnect and attention events.

Add a parameter to drm_connector_oob_hotplug_event() to pass the HPD
state.

Also push the test for unchanged state in the displayport altmode driver
into the i915 driver, to allow other drivers to act upon each update.

Signed-off-by: Bjorn Andersson 
Reviewed-by: Hans de Goede 
Acked-by: Heikki Krogerus 
Signed-off-by: Dmitry Baryshkov 
---
 drivers/gpu/drm/drm_connector.c |  6 --
 .../gpu/drm/i915/display/intel_display_core.h   |  3 +++
 drivers/gpu/drm/i915/display/intel_dp.c | 17 ++---
 drivers/usb/typec/altmodes/displayport.c| 13 ++---
 include/drm/drm_connector.h |  6 --
 5 files changed, 31 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 3ed4cfcb350c..1128149c74f2 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -3049,6 +3049,7 @@ struct drm_connector *drm_connector_find_by_fwnode(struct 
fwnode_handle *fwnode)
 /**
  * drm_connector_oob_hotplug_event - Report out-of-band hotplug event to 
connector
  * @connector_fwnode: fwnode_handle to report the event on
+ * @status: hot plug detect logical state
  *
  * On some hardware a hotplug event notification may come from outside the 
display
  * driver / device. An example of this is some USB Type-C setups where the 
hardware
@@ -3058,7 +3059,8 @@ struct drm_connector *drm_connector_find_by_fwnode(struct 
fwnode_handle *fwnode)
  * This function can be used to report these out-of-band events after obtaining
  * a drm_connector reference through calling drm_connector_find_by_fwnode().
  */
-void drm_connector_oob_hotplug_event(struct fwnode_handle *connector_fwnode)
+void drm_connector_oob_hotplug_event(struct fwnode_handle *connector_fwnode,
+enum drm_connector_status status)
 {
struct drm_connector *connector;
 
@@ -3067,7 +3069,7 @@ void drm_connector_oob_hotplug_event(struct fwnode_handle 
*connector_fwnode)
return;
 
if (connector->funcs->oob_hotplug_event)
-   connector->funcs->oob_hotplug_event(connector);
+   connector->funcs->oob_hotplug_event(connector, status);
 
drm_connector_put(connector);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h 
b/drivers/gpu/drm/i915/display/intel_display_core.h
index 8d2243c71dd8..419efee5df74 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -175,6 +175,9 @@ struct intel_hotplug {
/* Whether or not to count short HPD IRQs in HPD storms */
u8 hpd_short_storm_enabled;
 
+   /* Last state reported by oob_hotplug_event for each encoder */
+   unsigned long oob_hotplug_last_state;
+
/*
 * if we get a HPD irq from DP and a HPD irq from non-DP
 * the non-DP HPD could block the workqueue on a mode config
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9f40da20e88d..cf633f0df6ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5244,15 +5244,26 @@ static int intel_dp_connector_atomic_check(struct 
drm_connector *conn,
return intel_modeset_synced_crtcs(state, conn);
 }
 
-static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
+static void intel_dp_oob_hotplug_event(struct drm_connector *connector,
+  enum drm_connector_status hpd_state)
 {
struct intel_encoder *encoder = 
intel_attached_encoder(to_intel_connector(connector));
struct drm_i915_private *i915 = to_i915(connector->dev);
+   bool hpd_high = hpd_state == connector_status_connected;
+   unsigned int hpd_pin = encoder->hpd_pin;
+   bool need_work = false;
 
spin_lock_irq(>irq_lock);
-   i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
+   if (hpd_high != test_bit(hpd_pin, 
>display.hotplug.oob_hotplug_last_state)) {
+   i915->display.hotplug.event_bits |= BIT(hpd_pin);
+
+   __assign_bit(hpd_pin, 
>display.hotplug.oob_hotplug_last_state, hpd_high);
+   need_work = true;
+   }
spin_unlock_irq(>irq_lock);
-   queue_delayed_work(i915->unordered_wq, 
>display.hotplug.hotplug_work, 0);
+
+   if (need_work)
+   queue_delayed_work(i915->unordered_wq, 
>display.hotplug.hotplug_work, 0);
 }
 
 static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/usb/typec/altmodes/displayport.c 
b/drivers/usb/typec/altmodes/displayport.c
index 66de880b28d0..4e5aa17ce4c8 100644
--- a/drivers/usb/typec/altmodes/displayport.c
+++ 

[PATCH v5 0/3] drm/bridge_connector: implement OOB HPD handling

2023-07-08 Thread Dmitry Baryshkov
Note, this is sent as v5, since there were several revisions for this
patchset under a different series title ([1]).

USB altmodes code would send OOB notifications to the drm_connector
specified in the device tree. However as the MSM DP driver uses
drm_bridge_connector, there is no way to receive these event directly.
Implement a bridge between oob_hotplug_event and drm_bridge's
hpd_notify.

Merge strategy: since this series touches i915 code, it might make sense
to merge it through drm-intel.

[1] https://patchwork.freedesktop.org/series/103449/

Changes since v4:
- Picked up the patchset
- Dropped msm-specific patches
- Changed drm_bridge_connector_oob_hotplug_event to call connector's HPD
  callback directly, rather than going through the last bridge's
  hpd_notify
- Added proper fwnode for the drm_bridge_connector

Bjorn Andersson (1):
  drm: Add HPD state to drm_connector_oob_hotplug_event()

Dmitry Baryshkov (2):
  drm/bridge_connector: stop filtering events in
drm_bridge_connector_hpd_cb()
  drm/bridge_connector: implement oob_hotplug_event

 drivers/gpu/drm/drm_bridge_connector.c| 34 ++-
 drivers/gpu/drm/drm_connector.c   |  6 ++--
 .../gpu/drm/i915/display/intel_display_core.h |  3 ++
 drivers/gpu/drm/i915/display/intel_dp.c   | 17 --
 drivers/usb/typec/altmodes/displayport.c  | 13 ---
 include/drm/drm_connector.h   |  6 ++--
 6 files changed, 57 insertions(+), 22 deletions(-)

-- 
2.39.2



Re: [PATCH v1 4/5] drm/msm/dp: move relevant dp initialization code from bind() to probe()

2023-07-08 Thread Bjorn Andersson
On Fri, Jul 07, 2023 at 04:52:22PM -0700, Kuogee Hsieh wrote:
> In preparation of moving edp of_dp_aux_populate_bus() to
> dp_display_probe(), move dp_display_request_irq(),
> dp->parser->parse() and dp_power_client_init() to dp_display_probe()
> too.
> 
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_display.c | 48 
> +
>  drivers/gpu/drm/msm/dp/dp_display.h |  1 -
>  2 files changed, 22 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index 44580c2..185f1eb 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -290,12 +290,6 @@ static int dp_display_bind(struct device *dev, struct 
> device *master,
>   goto end;
>   }
>  
> - rc = dp_power_client_init(dp->power);
> - if (rc) {
> - DRM_ERROR("Power client create failed\n");
> - goto end;
> - }
> -
>   rc = dp_register_audio_driver(dev, dp->audio);
>   if (rc) {
>   DRM_ERROR("Audio registration Dp failed\n");
> @@ -752,6 +746,12 @@ static int dp_init_sub_modules(struct dp_display_private 
> *dp)
>   goto error;
>   }
>  
> + rc = dp->parser->parse(dp->parser);

Today dp_init_sub_modules() just allocates memory for all the modules
and ties them together. While I don't fancy this way of structuring
device drivers in Linux, I think it's reasonable to retain that design
for now, and perform the parsing and power initialization in
dp_display_probe().

> + if (rc) {
> + DRM_ERROR("device tree parsing failed\n");
> + goto error;
> + }
> +
>   dp->catalog = dp_catalog_get(dev, >parser->io);
>   if (IS_ERR(dp->catalog)) {
>   rc = PTR_ERR(dp->catalog);
> @@ -768,6 +768,12 @@ static int dp_init_sub_modules(struct dp_display_private 
> *dp)
>   goto error;
>   }
>  
> + rc = dp_power_client_init(dp->power);
> + if (rc) {
> + DRM_ERROR("Power client create failed\n");
> + goto error;
> + }
> +
>   dp->aux = dp_aux_get(dev, dp->catalog, dp->dp_display.is_edp);
>   if (IS_ERR(dp->aux)) {
>   rc = PTR_ERR(dp->aux);
> @@ -1196,26 +1202,20 @@ static irqreturn_t dp_display_irq_handler(int irq, 
> void *dev_id)
>   return ret;
>  }
>  
> -int dp_display_request_irq(struct msm_dp *dp_display)
> +static int dp_display_request_irq(struct dp_display_private *dp)
>  {
>   int rc = 0;
> - struct dp_display_private *dp;
> -
> - if (!dp_display) {
> - DRM_ERROR("invalid input\n");
> - return -EINVAL;
> - }

Love this, but it's unrelated to the rest of the patch.

> -
> - dp = container_of(dp_display, struct dp_display_private, dp_display);
> + struct device *dev = >pdev->dev;
>  
> - dp->irq = irq_of_parse_and_map(dp->pdev->dev.of_node, 0);
>   if (!dp->irq) {
> - DRM_ERROR("failed to get irq\n");
> - return -EINVAL;
> + dp->irq = irq_of_parse_and_map(dp->pdev->dev.of_node, 0);
> + if (!dp->irq) {
> + DRM_ERROR("failed to get irq\n");
> + return -EINVAL;
> + }
>   }
>  
> - rc = devm_request_irq(dp_display->drm_dev->dev, dp->irq,
> - dp_display_irq_handler,
> + rc = devm_request_irq(dev, dp->irq, dp_display_irq_handler,

This is fixing a bug where currently the dp_display_irq_handler()
registration is tied to the DPU device's life cycle, while depending on
resources that are released as the DP device is torn down.

It would be nice if this was not hidden in a patch that claims to just
move calls around.

Regards,
Bjorn

>   IRQF_TRIGGER_HIGH, "dp_display_isr", dp);
>   if (rc < 0) {
>   DRM_ERROR("failed to request IRQ%u: %d\n",
> @@ -1290,6 +1290,8 @@ static int dp_display_probe(struct platform_device 
> *pdev)
>  
>   platform_set_drvdata(pdev, >dp_display);
>  
> + dp_display_request_irq(dp);
> +
>   rc = component_add(>dev, _display_comp_ops);
>   if (rc) {
>   DRM_ERROR("component add failed, rc=%d\n", rc);
> @@ -1574,12 +1576,6 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, 
> struct drm_device *dev,
>  
>   dp_priv = container_of(dp_display, struct dp_display_private, 
> dp_display);
>  
> - ret = dp_display_request_irq(dp_display);
> - if (ret) {
> - DRM_ERROR("request_irq failed, ret=%d\n", ret);
> - return ret;
> - }
> -
>   ret = dp_display_get_next_bridge(dp_display);
>   if (ret)
>   return ret;
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
> b/drivers/gpu/drm/msm/dp/dp_display.h
> index 1e9415a..b3c08de 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -35,7 +35,6 @@ struct msm_dp {
>  int 

Re: [PATCH v1 2/5] drm/msm/dp: incorporate pm_runtime framework into DP driver

2023-07-08 Thread Bjorn Andersson
On Fri, Jul 07, 2023 at 04:52:20PM -0700, Kuogee Hsieh wrote:
> Incorporating pm runtime framework into DP driver so that power
> and clock resource handling can be centralized allowing easier
> control of these resources in preparation of registering aux bus
> uring probe.
> 
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_aux.c |  3 ++
>  drivers/gpu/drm/msm/dp/dp_display.c | 75 
> +
>  2 files changed, 63 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
> index 8e3b677..c592064 100644
> --- a/drivers/gpu/drm/msm/dp/dp_aux.c
> +++ b/drivers/gpu/drm/msm/dp/dp_aux.c
> @@ -291,6 +291,7 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
>   return -EINVAL;
>   }
>  
> + pm_runtime_get_sync(dp_aux->dev);
>   mutex_lock(>mutex);
>   if (!aux->initted) {
>   ret = -EIO;
> @@ -364,6 +365,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
>  
>  exit:
>   mutex_unlock(>mutex);
> + pm_runtime_mark_last_busy(dp_aux->dev);
> + pm_runtime_put_autosuspend(dp_aux->dev);
>  
>   return ret;
>  }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index 76f1395..2c5706a 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -309,6 +309,10 @@ static int dp_display_bind(struct device *dev, struct 
> device *master,
>   goto end;
>   }
>  
> + pm_runtime_enable(dev);
> + pm_runtime_set_autosuspend_delay(dev, 1000);
> + pm_runtime_use_autosuspend(dev);
> +
>   return 0;
>  end:
>   return rc;
> @@ -320,9 +324,8 @@ static void dp_display_unbind(struct device *dev, struct 
> device *master,
>   struct dp_display_private *dp = dev_get_dp_display_private(dev);
>   struct msm_drm_private *priv = dev_get_drvdata(master);
>  
> - /* disable all HPD interrupts */
> - if (dp->core_initialized)
> - dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, 
> false);
> + pm_runtime_dont_use_autosuspend(dev);
> + pm_runtime_disable(dev);
>  
>   kthread_stop(dp->ev_tsk);
>  
> @@ -466,10 +469,12 @@ static void dp_display_host_init(struct 
> dp_display_private *dp)
>   dp->dp_display.connector_type, dp->core_initialized,
>   dp->phy_initialized);
>  
> - dp_power_init(dp->power);
> - dp_ctrl_reset_irq_ctrl(dp->ctrl, true);
> - dp_aux_init(dp->aux);
> - dp->core_initialized = true;
> + if (!dp->core_initialized) {
> + dp_power_init(dp->power);
> + dp_ctrl_reset_irq_ctrl(dp->ctrl, true);
> + dp_aux_init(dp->aux);
> + dp->core_initialized = true;

There are two cases that queries core_initialized, both of those are
done to avoid accessing the DP block without it first being powered up.
With the introduction of runtime PM, it seems reasonable to just power
up the block in those two code paths (and remove the variable).

> + }
>  }
>  
>  static void dp_display_host_deinit(struct dp_display_private *dp)
> @@ -478,10 +483,12 @@ static void dp_display_host_deinit(struct 
> dp_display_private *dp)
>   dp->dp_display.connector_type, dp->core_initialized,
>   dp->phy_initialized);
>  
> - dp_ctrl_reset_irq_ctrl(dp->ctrl, false);
> - dp_aux_deinit(dp->aux);
> - dp_power_deinit(dp->power);
> - dp->core_initialized = false;
> + if (dp->core_initialized) {
> + dp_ctrl_reset_irq_ctrl(dp->ctrl, false);
> + dp_aux_deinit(dp->aux);
> + dp_power_deinit(dp->power);
> + dp->core_initialized = false;
> + }
>  }
>  
>  static int dp_display_usbpd_configure_cb(struct device *dev)
> @@ -1304,6 +1311,39 @@ static int dp_display_remove(struct platform_device 
> *pdev)
>   dp_display_deinit_sub_modules(dp);
>  
>   platform_set_drvdata(pdev, NULL);
> + pm_runtime_put_sync_suspend(>dev);
> +
> + return 0;
> +}
> +
> +static int dp_pm_runtime_suspend(struct device *dev)
> +{
> + struct platform_device *pdev = to_platform_device(dev);
> + struct msm_dp *dp_display = platform_get_drvdata(pdev);

platform_get_drvdata() is a wrapper for dev_get_drvdata(>dev), so
there's no need to resolve the platform_device first...

> + struct dp_display_private *dp;
> +
> + dp = container_of(dp_display, struct dp_display_private, dp_display);
> +
> + dp_display_host_phy_exit(dp);
> + dp_catalog_ctrl_hpd_enable(dp->catalog);
> + dp_display_host_deinit(dp);
> +
> + return 0;
> +}
> +
> +static int dp_pm_runtime_resume(struct device *dev)
> +{
> + struct platform_device *pdev = to_platform_device(dev);
> + struct msm_dp *dp_display = platform_get_drvdata(pdev);
> + struct dp_display_private *dp;
> +
> + dp = container_of(dp_display, struct dp_display_private, dp_display);
> +

Re: [PATCH v1 1/5] drm/msm/dp: remove pm_runtime_xxx() from dp_power.c

2023-07-08 Thread Bjorn Andersson
On Fri, Jul 07, 2023 at 04:52:19PM -0700, Kuogee Hsieh wrote:
> Since both pm_runtime_resume() and pm_runtime_suspend() are not
> populated at dp_pm_ops. Those pm_runtime_get/put() functions within
> dp_power.c will not have any effects in addition to increase/decrease
> power counter. Also pm_runtime_xxx() should be executed at top
> layer.
> 

Getting/putting the runtime PM state affects the vote for the GDSC. So I
would suggest that you move this after patch 2, to not create a gap in
the git history of lacking GDSC votes.

Regards,
Bjorn

> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_power.c | 9 -
>  1 file changed, 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/dp/dp_power.c 
> b/drivers/gpu/drm/msm/dp/dp_power.c
> index 5cb84ca..ed2f62a 100644
> --- a/drivers/gpu/drm/msm/dp/dp_power.c
> +++ b/drivers/gpu/drm/msm/dp/dp_power.c
> @@ -152,8 +152,6 @@ int dp_power_client_init(struct dp_power *dp_power)
>  
>   power = container_of(dp_power, struct dp_power_private, dp_power);
>  
> - pm_runtime_enable(power->dev);
> -
>   return dp_power_clk_init(power);
>  }
>  
> @@ -162,8 +160,6 @@ void dp_power_client_deinit(struct dp_power *dp_power)
>   struct dp_power_private *power;
>  
>   power = container_of(dp_power, struct dp_power_private, dp_power);
> -
> - pm_runtime_disable(power->dev);
>  }
>  
>  int dp_power_init(struct dp_power *dp_power)
> @@ -173,11 +169,7 @@ int dp_power_init(struct dp_power *dp_power)
>  
>   power = container_of(dp_power, struct dp_power_private, dp_power);
>  
> - pm_runtime_get_sync(power->dev);
> -
>   rc = dp_power_clk_enable(dp_power, DP_CORE_PM, true);
> - if (rc)
> - pm_runtime_put_sync(power->dev);
>  
>   return rc;
>  }
> @@ -189,7 +181,6 @@ int dp_power_deinit(struct dp_power *dp_power)
>   power = container_of(dp_power, struct dp_power_private, dp_power);
>  
>   dp_power_clk_enable(dp_power, DP_CORE_PM, false);
> - pm_runtime_put_sync(power->dev);
>   return 0;
>  }
>  
> -- 
> 2.7.4
> 


[PATCH v5] drm/vkms: Add support to 1D gamma LUT

2023-07-08 Thread Arthur Grillo
Support a 1D gamma LUT with interpolation for each color channel on the
VKMS driver. Add a check for the LUT length by creating
vkms_atomic_check().

Enable VKMS to run the test igt@kms_plane@pixel-format.

Tested with:
igt@kms_color@gamma
igt@kms_color@legacy-gamma
igt@kms_color@invalid-gamma-lut-sizes

v2:
- Add interpolation between the values of the LUT (Simon Ser)

v3:
- s/ratio/delta (Pekka)
- s/color_channel/channel_value (Pekka)
- s/lut_area/lut_channel
- Store the `drm_color_lut`, `lut_length`, and
  `channel_value2index_ratio` inside a struct called `vkms_lut`
  (Pekka)
- Pre-compute some constants values used through the LUT procedure
  (Pekka)
- Change the switch statement to a cast to __u16* (Pekka)
- Make the apply_lut_to_channel_value return the computation result
  (Pekka)

v4:
- Add a comment explaining that `enum lut_area` depends on the
  layout of `struct drm_color_lut` (Pekka)
- Remove unused variable (kernel test robot)

v5:
- Mention that this will make it possible to run the test
  igt@kms_plane@pixel-format (Maíra)
- s/had/has (Maíra)

Signed-off-by: Arthur Grillo 
Acked-by: Pekka Paalanen 
Reviewed-by: Maíra Canal 
---
Maíra asked me to run a benchmark on some IGT tests:

Each test ran 100 times. The result with 'X' are tests that were not able to
run because of the absence of gamma LUT.

+--+---+-+---+
| Test |  No LUT   | Unoptimized 
LUT | Optimized LUT |
+ 
-+---+-+---+
| igt@kms_rotation@primary-rotation-180| 174.298s  |181.130s
 |   178.800s|
+ 
-+---+-+---+
| igt@kms_plane@pixel-format   |X  |1420.453s   
 |   1218.229s   |
+ 
-+---+-+---+
| igt@kms_plane@pixel-format-source-clamping   |X  |704.236s
 |   612.318s|
+ 
-+---+-+---+
| igt@kms_plane@plane-position-covered | 12.535s   |12.864s 
 |   12.025s |
+ 
-+---+-+---+
| igt@kms_plane@plane-position-hole| 11.752s   |12.873s 
 |   11.202s |
+ 
-+---+-+---+
| igt@kms_plane@plane-position-hole-dpms   | 15.188s   |15.238s 
 |   15.652s |
+ 
-+---+-+---+
| igt@kms_plane@plane-panning-top-left | 10.797s   |11.873s 
 |   11.041s |
+ 
-+---+-+---+
| igt@kms_plane@plane-bottom-right | 10.764s   |11.613s 
 |   10.053s |
+ 
-+---+-+---+
| igt@kms_plane@plane-panning-bottom-right-suspend | 2011.344s |2009.410s   
 |   2011.496s   |
+ 
-+---+-+---+
| igt@kms_cursor_crc@cursor-onscreen-512x5112  | 359.209s  |337.830s
 |   308.168s|
+ 
-+---+-+---+
| igt@kms_color@gamma  |X  |137.702s
 |   118.139s|
+ 
-+---+-+---+

---
 drivers/gpu/drm/vkms/vkms_composer.c | 86 
 drivers/gpu/drm/vkms/vkms_crtc.c |  3 +
 drivers/gpu/drm/vkms/vkms_drv.c  | 20 ++-
 drivers/gpu/drm/vkms/vkms_drv.h  |  9 +++
 4 files changed, 117 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vkms/vkms_composer.c 
b/drivers/gpu/drm/vkms/vkms_composer.c
index 906d3df40cdb..e3a79dcd2e38 100644
--- a/drivers/gpu/drm/vkms/vkms_composer.c
+++ b/drivers/gpu/drm/vkms/vkms_composer.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -89,6 +90,73 @@ static void fill_background(const struct pixel_argb_u16 
*background_color,
output_buffer->pixels[i] = *background_color;
 }
 
+// lerp(a, b, t) = a + (b - a) * t
+static u16 lerp_u16(u16 a, u16 b, s64 t)
+{
+   s64 a_fp = drm_int2fixp(a);
+   s64 b_fp = drm_int2fixp(b);
+
+   s64 delta = drm_fixp_mul(b_fp - a_fp,  t);
+
+   return drm_fixp2int(a_fp + delta);
+}
+
+static s64 get_lut_index(const struct vkms_color_lut *lut, u16 channel_value)
+{
+   

Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Abhinav Kumar




On 7/7/2023 1:47 AM, Neil Armstrong wrote:

On 07/07/2023 09:18, Neil Armstrong wrote:

Hi,

On 06/07/2023 11:20, Amit Pundir wrote:

On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
 wrote:


[Adding freedreno@ to cc list]

On Wed, 5 Jul 2023 at 08:31, Jagan Teki  
wrote:


Hi Amit,

On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir 
 wrote:


Hi Marek,

On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:


Do not generate the HS front and back porch gaps, the HSA gap and
EOT packet, as these packets are not required. This makes the bridge
work with Samsung DSIM on i.MX8MM and i.MX8MP.


This patch broke display on Dragonboard 845c (SDM845) devboard 
running

AOSP. This is what I see
https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
Reverting this patch fixes this regression for me.


Might be msm dsi host require proper handling on these updated
mode_flags? did they?


The msm DSI host supports those flags. Also, I'd like to point out
that the patch didn't change the rest of the driver code. So even if
drm/msm ignored some of the flags, it should not have caused the
issue. Most likely the issue is on the lt9611 side. I's suspect that
additional programming is required to make it work with these flags.


I spent some time today on smoke testing these flags (individually and
in limited combination) on DB845c, to narrow down this breakage to one
or more flag(s) triggering it. Here are my observations in limited
testing done so far.

There is no regression with MIPI_DSI_MODE_NO_EOT_PACKET when enabled
alone and system boots to UI as usual.

MIPI_DSI_MODE_VIDEO_NO_HFP always trigger the broken display as in the
screenshot[1] shared earlier as well.

Adding either of MIPI_DSI_MODE_VIDEO_NO_HSA and
MIPI_DSI_MODE_VIDEO_NO_HBP always result in no display, unless paired
with MIPI_DSI_MODE_VIDEO_NO_HFP and in that case we get the broken
display as reported.

In short other than MIPI_DSI_MODE_NO_EOT_PACKET flag, all other flags
added in this commit break the display on DB845c one way or another.


I think the investigation would be to understand why samsung-dsim 
requires
such flags and/or what are the difference in behavior between MSM DSI 
and samsung DSIM

for those flags ?

If someone has access to the lt9611 datasheet, so it requires 
HSA/HFP/HBP to be

skipped ? and does MSM DSI and samsung DSIM skip them in the same way ?


I think there's a mismatch, where on one side this flags sets the link 
in LP-11 while
in HSA/HFP/HPB while on the other it completely removes those blanking 
packets.


The name MIPI_DSI_MODE_VIDEO_NO_HBP suggests removal of HPB, not LP-11 
while HPB.

the registers used in both controllers are different:
- samsung-dsim: DSIM_HBP_DISABLE_MODE
- msm dsi: DSI_VID_CFG0_HBP_POWER_STOP

The first one suggest removing the packet, while the second one suggests 
powering

off the line while in the blanking packet period.

@Abhinav, can you comment on that ?



I dont get what it means by completely removes blanking packets in DSIM.

It should be replacing those periods with LP11 too.

The traffic mode being used on this bridge is 
MIPI_DSI_MODE_VIDEO_SYNC_PULSE which is "Non-Burst Mode with Sync Pulses".


As per this traffic mode in the DSI spec,

"Normally, periods shown as HSA (Horizontal Sync Active), HBP 
(Horizontal Back Porch) and HFP (Horizontal Front Porch) are filled by 
Blanking Packets, with lengths (including packet overhead)  calculated 
to match the period specified by the peripheral’s data sheet. 
Alternatively, if there is sufficient time to transition from HS to LP 
mode and back again, a timed interval in LP mode may substitute for a 
Blanking Packet, thus saving power. During HSA, HBP and HFP periods, the 
bus should stay in the LP-11 state."


So we can either send the blanking packets or transition to LP state and 
those 3 flags are controlling exactly that during those periods for MSM 
driver.


If you stop sending the blanking packets, you need to replace that gap 
with LP.


One reason I can think of why this could break with MSM is perhaps we do 
not have sufficient time in those periods for the LP-HS transition like 
the spec has written.


1) What is the resolution which is getting broken on db845c with this? I 
would like to know the full drm_display_mode for it to see how much time 
we have in those periods. Is any resolution working or all are broken.


2) I also do not completely get the last line of the DSI spec on this 
traffic mode. Is it suggesting that we *must* use only LP11 for those 
periods in this traffic mode? I need to check little more on that. 
Because if thats the case the change is doing just that and we need to 
investigate the MSM failure little more. If not and its indeed optional 
to save power like the DSI spec says, then its weird why DSIM should be 
blank without that too.



@Jagan, Andrezej So you have any documentation on what 
DSIM_xxx_DISABLE_MODE does ?


@Dmitry, so you have access to the 

[drm-misc:drm-misc-next 1/14] drivers/video/fbdev/hyperv_fb.c:1033:24: error: 'screen_info' undeclared

2023-07-08 Thread kernel test robot
tree:   git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
head:   b63f5e5ca945e1c0341a2c3278575bb82bf8b890
commit: 8b0d13545b091729e0aa05ff9981e2d06c1e2ee5 [1/14] efi: Do not include 
 from EFI header
config: arm64-allyesconfig 
(https://download.01.org/0day-ci/archive/20230709/202307090823.nxnt8kk5-...@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 12.3.0
reproduce: 
(https://download.01.org/0day-ci/archive/20230709/202307090823.nxnt8kk5-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/202307090823.nxnt8kk5-...@intel.com/

All errors (new ones prefixed by >>):

   drivers/video/fbdev/hyperv_fb.c: In function 'hvfb_getmem':
>> drivers/video/fbdev/hyperv_fb.c:1033:24: error: 'screen_info' undeclared 
>> (first use in this function)
1033 | base = screen_info.lfb_base;
 |^~~
   drivers/video/fbdev/hyperv_fb.c:1033:24: note: each undeclared identifier is 
reported only once for each function it appears in
--
   drivers/gpu/drm/hyperv/hyperv_drm_drv.c: In function 'hyperv_setup_vram':
>> drivers/gpu/drm/hyperv/hyperv_drm_drv.c:75:54: error: 'screen_info' 
>> undeclared (first use in this function)
  75 | 
drm_aperture_remove_conflicting_framebuffers(screen_info.lfb_base,
 |  ^~~
   drivers/gpu/drm/hyperv/hyperv_drm_drv.c:75:54: note: each undeclared 
identifier is reported only once for each function it appears in


vim +/screen_info +1033 drivers/video/fbdev/hyperv_fb.c

3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09   
988  
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29   
989  
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29   
990  /* Get framebuffer memory from Hyper-V video pci space */
3546448338e76a drivers/video/fbdev/hyperv_fb.c Jake Oshins   2015-08-05   
991  static int hvfb_getmem(struct hv_device *hdev, struct fb_info *info)
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29   
992  {
9069fd54960304 drivers/video/hyperv_fb.c   Gerd Hoffmann 2014-02-26   
993   struct hvfb_par *par = info->par;
9069fd54960304 drivers/video/hyperv_fb.c   Gerd Hoffmann 2014-02-26   
994   struct pci_dev *pdev  = NULL;
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29   
995   void __iomem *fb_virt;
9069fd54960304 drivers/video/hyperv_fb.c   Gerd Hoffmann 2014-02-26   
996   int gen2vm = efi_enabled(EFI_BOOT);
81d2393485f099 drivers/video/fbdev/hyperv_fb.c Thomas Zimmermann 2022-12-19   
997   resource_size_t base, size;
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09   
998   phys_addr_t paddr;
9069fd54960304 drivers/video/hyperv_fb.c   Gerd Hoffmann 2014-02-26   
999   int ret;
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1000  
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09  
1001   if (!gen2vm) {
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1002   pdev = pci_get_device(PCI_VENDOR_ID_MICROSOFT,
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1003   PCI_DEVICE_ID_HYPERV_VIDEO, NULL);
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1004   if (!pdev) {
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1005   pr_err("Unable to find PCI Hyper-V video\n");
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1006   return -ENODEV;
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1007   }
68a2d20b79b105 drivers/video/hyperv_fb.c   Haiyang Zhang 2013-04-29  
1008  
81d2393485f099 drivers/video/fbdev/hyperv_fb.c Thomas Zimmermann 2022-12-19  
1009   base = pci_resource_start(pdev, 0);
81d2393485f099 drivers/video/fbdev/hyperv_fb.c Thomas Zimmermann 2022-12-19  
1010   size = pci_resource_len(pdev, 0);
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09  
1011  
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09  
1012   /*
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09  
1013* For Gen 1 VM, we can directly use the contiguous memory
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09  
1014* from VM. If we succeed, deferred IO happens directly
3a6fb6c4255c38 drivers/video/fbdev/hyperv_fb.c Wei Hu2019-12-09  
1015* on this 

Re: [PATCH] drm/nouveau/nvkm/dp: Add hack to fix DP 1.3+ DPCD issues

2023-07-08 Thread Karol Herbst
On Fri, Jul 7, 2023 at 11:58 PM Lyude Paul  wrote:
>
> Currently we use the drm_dp_dpcd_read_caps() helper in the DRM side of
> nouveau in order to read the DPCD of a DP connector, which makes sure we do
> the right thing and also check for extended DPCD caps. However, it turns
> out we're not currently doing this on the nvkm side since we don't have
> access to the drm_dp_aux structure there - which means that the DRM side of
> the driver and the NVKM side can end up with different DPCD capabilities
> for the same connector.
>
> Ideally to fix this, we want to start setting up the drm_dp_aux device in
> NVKM before we've made contact with the DRM side - which should be pretty
> easy to accomplish (I'm already working on it!). Until then however, let's
> workaround this problem by porting a copy of drm_dp_read_dpcd_caps() into
> NVKM - which should fix this issue.
>
> Issue: https://gitlab.freedesktop.org/drm/nouveau/-/issues/211

Should a Fixes: or Cc: stable tag be added so it gets backported?

> Signed-off-by: Lyude Paul 
> ---
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c | 48 ++-
>  1 file changed, 47 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 
> b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
> index 40c8ea43c42f..b8ac66b4a2c4 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
> @@ -26,6 +26,8 @@
>  #include "head.h"
>  #include "ior.h"
>
> +#include 
> +
>  #include 
>  #include 
>  #include 
> @@ -634,6 +636,50 @@ nvkm_dp_enable_supported_link_rates(struct nvkm_outp 
> *outp)
> return outp->dp.rates != 0;
>  }
>
> +/* XXX: This is a big fat hack, and this is just drm_dp_read_dpcd_caps()

Well.. maybe we should rephrase that _if_ we want to see it
backported. But is this code really that bad? It kinda looks
reasonable enough.

> + * converted to work inside nvkm. This is a temporary holdover until we start
> + * passing the drm_dp_aux device through NVKM
> + */
> +static int
> +nvkm_dp_read_dpcd_caps(struct nvkm_outp *outp)
> +{
> +   struct nvkm_i2c_aux *aux = outp->dp.aux;
> +   u8 dpcd_ext[DP_RECEIVER_CAP_SIZE];
> +   int ret;
> +
> +   ret = nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, outp->dp.dpcd, 
> DP_RECEIVER_CAP_SIZE);
> +   if (ret < 0)
> +   return ret;
> +
> +   /*
> +* Prior to DP1.3 the bit represented by
> +* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
> +* If it is set DP_DPCD_REV at h could be at a value less than
> +* the true capability of the panel. The only way to check is to
> +* then compare h and 2200h.
> +*/
> +   if (!(outp->dp.dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
> +   return 0;
> +
> +   ret = nvkm_rdaux(aux, DP_DP13_DPCD_REV, dpcd_ext, sizeof(dpcd_ext));
> +   if (ret < 0)
> +   return ret;
> +
> +   if (outp->dp.dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {
> +   OUTP_DBG(outp, "Extended DPCD rev less than base DPCD rev (%d 
> > %d)\n",
> +outp->dp.dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]);
> +   return 0;
> +   }
> +
> +   if (!memcmp(outp->dp.dpcd, dpcd_ext, sizeof(dpcd_ext)))
> +   return 0;
> +
> +   memcpy(outp->dp.dpcd, dpcd_ext, sizeof(dpcd_ext));
> +
> +   return 0;
> +}
> +
>  void
>  nvkm_dp_enable(struct nvkm_outp *outp, bool auxpwr)
>  {
> @@ -689,7 +735,7 @@ nvkm_dp_enable(struct nvkm_outp *outp, bool auxpwr)
> memset(outp->dp.lttpr, 0x00, sizeof(outp->dp.lttpr));
> }
>
> -   if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, outp->dp.dpcd, 
> sizeof(outp->dp.dpcd))) {
> +   if (!nvkm_dp_read_dpcd_caps(outp)) {
> const u8 rates[] = { 0x1e, 0x14, 0x0a, 0x06, 0 };
> const u8 *rate;
> int rate_max;
> --
> 2.40.1
>



Re: [PATCH v2 1/2] drm/msm/dpu: fix DSC 1.2 block lengths

2023-07-08 Thread Abhinav Kumar




On 7/8/2023 6:00 AM, Dmitry Baryshkov wrote:

All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length.
This includes the common block itself, enc subblocks and some empty
space around. Change that to pass 0x4 instead, the length of common
register block itself.

Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets")
Reported-by: Ryan McCann 
Signed-off-by: Dmitry Baryshkov 
---

Changes since v2:
  - Added Reported-by tag.

---
  .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h   |  8 
  .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h   |  2 +-
  .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 ++--
  .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h   |  8 
  .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h   |  8 
  5 files changed, 19 insertions(+), 19 deletions(-)



Reviewed-by: Abhinav Kumar 


Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Marek Vasut

On 7/8/23 21:40, Dmitry Baryshkov wrote:

On Sat, 8 Jul 2023 at 22:39, Marek Vasut  wrote:


On 7/8/23 17:53, Dmitry Baryshkov wrote:

On 08/07/2023 18:40, Marek Vasut wrote:

On 7/7/23 10:47, Neil Armstrong wrote:

On 07/07/2023 09:18, Neil Armstrong wrote:

Hi,

On 06/07/2023 11:20, Amit Pundir wrote:

On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
 wrote:


[Adding freedreno@ to cc list]

On Wed, 5 Jul 2023 at 08:31, Jagan Teki
 wrote:


Hi Amit,

On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir
 wrote:


Hi Marek,

On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:


Do not generate the HS front and back porch gaps, the HSA gap and
EOT packet, as these packets are not required. This makes the
bridge
work with Samsung DSIM on i.MX8MM and i.MX8MP.


This patch broke display on Dragonboard 845c (SDM845) devboard
running
AOSP. This is what I see
https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
Reverting this patch fixes this regression for me.


Might be msm dsi host require proper handling on these updated
mode_flags? did they?


The msm DSI host supports those flags. Also, I'd like to point out
that the patch didn't change the rest of the driver code. So even if
drm/msm ignored some of the flags, it should not have caused the
issue. Most likely the issue is on the lt9611 side. I's suspect that
additional programming is required to make it work with these flags.


I spent some time today on smoke testing these flags (individually and
in limited combination) on DB845c, to narrow down this breakage to one
or more flag(s) triggering it. Here are my observations in limited
testing done so far.

There is no regression with MIPI_DSI_MODE_NO_EOT_PACKET when enabled
alone and system boots to UI as usual.

MIPI_DSI_MODE_VIDEO_NO_HFP always trigger the broken display as in the
screenshot[1] shared earlier as well.

Adding either of MIPI_DSI_MODE_VIDEO_NO_HSA and
MIPI_DSI_MODE_VIDEO_NO_HBP always result in no display, unless paired
with MIPI_DSI_MODE_VIDEO_NO_HFP and in that case we get the broken
display as reported.

In short other than MIPI_DSI_MODE_NO_EOT_PACKET flag, all other flags
added in this commit break the display on DB845c one way or another.


I think the investigation would be to understand why samsung-dsim
requires
such flags and/or what are the difference in behavior between MSM
DSI and samsung DSIM
for those flags ?

If someone has access to the lt9611 datasheet, so it requires
HSA/HFP/HBP to be
skipped ? and does MSM DSI and samsung DSIM skip them in the same way ?


I don't have the LT9611 datasheet, no.


I also don't have an lt9611 datasheet, unfortunately. I was using the
existing third-party drivers as a source.



The MX8M DSI (samsung-dsim) skips the HSA/HFP/HBP completely (see
i.MX8MP RM 13.6.2.7.2 RGB Interface , there is infographics on the
following pages).


Do you know, why did you have to disable HPB/HSA/HFP on your platform?
What was the result otherwise?


No image on the HDMI monitor at all. This flags change has fixed the
problem for multiple other bridges too btw, not just the LT9611, but
also TI SN65DSI83 and ICN6211. The flags were likely not set in all
those bridge drivers because no DSI host implemented them so far.


MSM DSI host have had those implemented for ages, but we never needed
them AFAIR.


The MSM one is exception in more ways than one it seems (in a positive way).


Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Dmitry Baryshkov
On Sat, 8 Jul 2023 at 22:39, Marek Vasut  wrote:
>
> On 7/8/23 17:53, Dmitry Baryshkov wrote:
> > On 08/07/2023 18:40, Marek Vasut wrote:
> >> On 7/7/23 10:47, Neil Armstrong wrote:
> >>> On 07/07/2023 09:18, Neil Armstrong wrote:
>  Hi,
> 
>  On 06/07/2023 11:20, Amit Pundir wrote:
> > On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
> >  wrote:
> >>
> >> [Adding freedreno@ to cc list]
> >>
> >> On Wed, 5 Jul 2023 at 08:31, Jagan Teki
> >>  wrote:
> >>>
> >>> Hi Amit,
> >>>
> >>> On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir
> >>>  wrote:
> 
>  Hi Marek,
> 
>  On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:
> >
> > Do not generate the HS front and back porch gaps, the HSA gap and
> > EOT packet, as these packets are not required. This makes the
> > bridge
> > work with Samsung DSIM on i.MX8MM and i.MX8MP.
> 
>  This patch broke display on Dragonboard 845c (SDM845) devboard
>  running
>  AOSP. This is what I see
>  https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
>  Reverting this patch fixes this regression for me.
> >>>
> >>> Might be msm dsi host require proper handling on these updated
> >>> mode_flags? did they?
> >>
> >> The msm DSI host supports those flags. Also, I'd like to point out
> >> that the patch didn't change the rest of the driver code. So even if
> >> drm/msm ignored some of the flags, it should not have caused the
> >> issue. Most likely the issue is on the lt9611 side. I's suspect that
> >> additional programming is required to make it work with these flags.
> >
> > I spent some time today on smoke testing these flags (individually and
> > in limited combination) on DB845c, to narrow down this breakage to one
> > or more flag(s) triggering it. Here are my observations in limited
> > testing done so far.
> >
> > There is no regression with MIPI_DSI_MODE_NO_EOT_PACKET when enabled
> > alone and system boots to UI as usual.
> >
> > MIPI_DSI_MODE_VIDEO_NO_HFP always trigger the broken display as in the
> > screenshot[1] shared earlier as well.
> >
> > Adding either of MIPI_DSI_MODE_VIDEO_NO_HSA and
> > MIPI_DSI_MODE_VIDEO_NO_HBP always result in no display, unless paired
> > with MIPI_DSI_MODE_VIDEO_NO_HFP and in that case we get the broken
> > display as reported.
> >
> > In short other than MIPI_DSI_MODE_NO_EOT_PACKET flag, all other flags
> > added in this commit break the display on DB845c one way or another.
> 
>  I think the investigation would be to understand why samsung-dsim
>  requires
>  such flags and/or what are the difference in behavior between MSM
>  DSI and samsung DSIM
>  for those flags ?
> 
>  If someone has access to the lt9611 datasheet, so it requires
>  HSA/HFP/HBP to be
>  skipped ? and does MSM DSI and samsung DSIM skip them in the same way ?
> >>
> >> I don't have the LT9611 datasheet, no.
> >
> > I also don't have an lt9611 datasheet, unfortunately. I was using the
> > existing third-party drivers as a source.
> >
> >>
> >> The MX8M DSI (samsung-dsim) skips the HSA/HFP/HBP completely (see
> >> i.MX8MP RM 13.6.2.7.2 RGB Interface , there is infographics on the
> >> following pages).
> >
> > Do you know, why did you have to disable HPB/HSA/HFP on your platform?
> > What was the result otherwise?
>
> No image on the HDMI monitor at all. This flags change has fixed the
> problem for multiple other bridges too btw, not just the LT9611, but
> also TI SN65DSI83 and ICN6211. The flags were likely not set in all
> those bridge drivers because no DSI host implemented them so far.

MSM DSI host have had those implemented for ages, but we never needed
them AFAIR.

-- 
With best wishes
Dmitry


Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Marek Vasut

On 7/8/23 17:53, Dmitry Baryshkov wrote:

On 08/07/2023 18:40, Marek Vasut wrote:

On 7/7/23 10:47, Neil Armstrong wrote:

On 07/07/2023 09:18, Neil Armstrong wrote:

Hi,

On 06/07/2023 11:20, Amit Pundir wrote:

On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
 wrote:


[Adding freedreno@ to cc list]

On Wed, 5 Jul 2023 at 08:31, Jagan Teki 
 wrote:


Hi Amit,

On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir 
 wrote:


Hi Marek,

On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:


Do not generate the HS front and back porch gaps, the HSA gap and
EOT packet, as these packets are not required. This makes the 
bridge

work with Samsung DSIM on i.MX8MM and i.MX8MP.


This patch broke display on Dragonboard 845c (SDM845) devboard 
running

AOSP. This is what I see
https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
Reverting this patch fixes this regression for me.


Might be msm dsi host require proper handling on these updated
mode_flags? did they?


The msm DSI host supports those flags. Also, I'd like to point out
that the patch didn't change the rest of the driver code. So even if
drm/msm ignored some of the flags, it should not have caused the
issue. Most likely the issue is on the lt9611 side. I's suspect that
additional programming is required to make it work with these flags.


I spent some time today on smoke testing these flags (individually and
in limited combination) on DB845c, to narrow down this breakage to one
or more flag(s) triggering it. Here are my observations in limited
testing done so far.

There is no regression with MIPI_DSI_MODE_NO_EOT_PACKET when enabled
alone and system boots to UI as usual.

MIPI_DSI_MODE_VIDEO_NO_HFP always trigger the broken display as in the
screenshot[1] shared earlier as well.

Adding either of MIPI_DSI_MODE_VIDEO_NO_HSA and
MIPI_DSI_MODE_VIDEO_NO_HBP always result in no display, unless paired
with MIPI_DSI_MODE_VIDEO_NO_HFP and in that case we get the broken
display as reported.

In short other than MIPI_DSI_MODE_NO_EOT_PACKET flag, all other flags
added in this commit break the display on DB845c one way or another.


I think the investigation would be to understand why samsung-dsim 
requires
such flags and/or what are the difference in behavior between MSM 
DSI and samsung DSIM

for those flags ?

If someone has access to the lt9611 datasheet, so it requires 
HSA/HFP/HBP to be

skipped ? and does MSM DSI and samsung DSIM skip them in the same way ?


I don't have the LT9611 datasheet, no.


I also don't have an lt9611 datasheet, unfortunately. I was using the 
existing third-party drivers as a source.




The MX8M DSI (samsung-dsim) skips the HSA/HFP/HBP completely (see 
i.MX8MP RM 13.6.2.7.2 RGB Interface , there is infographics on the 
following pages).


Do you know, why did you have to disable HPB/HSA/HFP on your platform? 
What was the result otherwise?


No image on the HDMI monitor at all. This flags change has fixed the 
problem for multiple other bridges too btw, not just the LT9611, but 
also TI SN65DSI83 and ICN6211. The flags were likely not set in all 
those bridge drivers because no DSI host implemented them so far.


Re: [PATCH 3/9] drm/verisilicon: Add basic drm driver

2023-07-08 Thread Thomas Zimmermann

Hi

Am 07.07.23 um 20:09 schrieb Nicolas Dufresne:
[...]

+config DRM_VERISILICON
+   tristate "DRM Support for VeriSilicon"


Can you rename the driver and files? 'VeriSilicon' seems
unpronounceable. Simply 'StarFive' and starfive/ would be fine.


Are you sure you want to request this ? If the display controller is a
Verisilicon design, it will be super odd to use on other SoC that aren't from
StarFive. Think about STM network driver, which is DesignWare.


It's not a hard requirement. If that's the name, so be it.

Best regards
Thomas



Nicolas




+   depends on DRM
+   select DRM_KMS_HELPER
+   select CMA
+   select DMA_CMA
+   help
+ Choose this option if you have a VeriSilicon soc chipset.
+ This driver provides VeriSilicon kernel mode
+ setting and buffer management. It does not
+ provide 2D or 3D acceleration.
diff --git a/drivers/gpu/drm/verisilicon/Makefile 
b/drivers/gpu/drm/verisilicon/Makefile
new file mode 100644
index ..64ce1b26546c
--- /dev/null
+++ b/drivers/gpu/drm/verisilicon/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+
+vs_drm-objs := vs_drv.o
+
+obj-$(CONFIG_DRM_VERISILICON) += vs_drm.o
+
diff --git a/drivers/gpu/drm/verisilicon/vs_drv.c 
b/drivers/gpu/drm/verisilicon/vs_drv.c
new file mode 100644
index ..24d333598477
--- /dev/null
+++ b/drivers/gpu/drm/verisilicon/vs_drv.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 VeriSilicon Holdings Co., Ltd.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "vs_drv.h"
+
+#define DRV_NAME   "starfive"
+#define DRV_DESC   "Starfive DRM driver"
+#define DRV_DATE   "202305161"
+#define DRV_MAJOR  1
+#define DRV_MINOR  0
+
+static struct platform_driver vs_drm_platform_driver;
+
+static const struct file_operations fops = {
+   .owner  = THIS_MODULE,
+   .open   = drm_open,
+   .release= drm_release,
+   .unlocked_ioctl = drm_ioctl,
+   .compat_ioctl   = drm_compat_ioctl,
+   .poll   = drm_poll,
+   .read   = drm_read,
+};
+
+static struct drm_driver vs_drm_driver = {
+   .driver_features= DRIVER_MODESET | DRIVER_ATOMIC | DRIVER_GEM,
+   .lastclose  = drm_fb_helper_lastclose,
+   .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
+   .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
+   .fops   = ,
+   .name   = DRV_NAME,
+   .desc   = DRV_DESC,
+   .date   = DRV_DATE,
+   .major  = DRV_MAJOR,
+   .minor  = DRV_MINOR,
+};
+
+void vs_drm_update_pitch_alignment(struct drm_device *drm_dev,
+  unsigned int alignment)
+{
+   struct vs_drm_private *priv = drm_dev->dev_private;
+
+   if (alignment > priv->pitch_alignment)
+   priv->pitch_alignment = alignment;
+}
+
+static int vs_drm_bind(struct device *dev)
+{
+   struct drm_device *drm_dev;
+   struct vs_drm_private *priv;
+   int ret;
+   static u64 dma_mask = DMA_BIT_MASK(40);
+
+   /* Remove existing drivers that may own the framebuffer memory. */
+   ret = drm_aperture_remove_framebuffers(false, _drm_driver);
+   if (ret) {
+   DRM_DEV_ERROR(dev,


drm_err(), drm_info(), drm_warn(), etc.  Here and everwhere else. The
DRM_DEV_*() print macros are obsolete.


+ "Failed to remove existing framebuffers - %d.\n",
+ ret);
+   return ret;
+   }
+
+   drm_dev = drm_dev_alloc(_drm_driver, dev);
+   if (IS_ERR(drm_dev))
+   return PTR_ERR(drm_dev);
+
+   dev_set_drvdata(dev, drm_dev);
+
+   priv = devm_kzalloc(drm_dev->dev, sizeof(struct vs_drm_private),
+   GFP_KERNEL);
+   if (!priv) {
+   ret = -ENOMEM;
+   goto err_put_dev;
+   }
+
+   priv->pitch_alignment = 64;
+   priv->dma_dev = drm_dev->dev;
+   priv->dma_dev->coherent_dma_mask = dma_mask;
+   drm_dev->dev_private = priv;


dev_private is obsolete and about to go away at some point.

Please embed drm_device in vs_drm_private and allocate the memory with
devm_drm_dev_alloc().


+
+   drm_mode_config_init(drm_dev);


drmm_mode_config_init() please.


+
+   /* Now try and bind all our sub-components */
+   ret = component_bind_all(dev, drm_dev);
+   if (ret)
+   goto err_mode;
+
+   ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc);
+   if (ret)
+   goto err_bind;
+
+   

Re: [PATCH 2/2] drm: bridge: tc358767: give VSDELAY some positive value

2023-07-08 Thread Marek Vasut

On 6/8/23 10:11, Lucas Stach wrote:

Am Mittwoch, dem 07.06.2023 um 15:54 +0200 schrieb Marek Vasut:

On 6/7/23 14:53, Lucas Stach wrote:

Am Freitag, dem 02.06.2023 um 23:34 +0200 schrieb Marek Vasut:

On 6/2/23 21:15, Lucas Stach wrote:

From: David Jander 

The documentation is not clear about how this delay works.
Empirical tests have shown that with a VSDELAY of 0, the first
scanline is not properly formatted in the output stream when
DSI->DP mode is used. The calculation spreadsheets from Toshiba
seem to always make this value equal to the HFP + 10 for DSI->DP
use-case. For DSI->DPI this value should be > 2 and for DPI->DP
it seems to always be 0x64.

Signed-off-by: David Jander 
Signed-off-by: Lucas Stach 
---
drivers/gpu/drm/bridge/tc358767.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/tc358767.c 
b/drivers/gpu/drm/bridge/tc358767.c
index 46916ae30f8f..9f2c67b4a488 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -817,7 +817,7 @@ static int tc_set_common_video_mode(struct tc_data *tc,
 * sync signals
 */
ret = regmap_write(tc->regmap, VPCTRL0,
-  FIELD_PREP(VSDELAY, 0) |
+  FIELD_PREP(VSDELAY, right_margin + 10) |
   OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED);
if (ret)
return ret;


Aren't you running into a problem due to VS timing misconfiguration on
the scanout engine or DSI serializer side ? The VSDELAY seems to
increase the length of VSYNC active .



No, as far as I understand the VSDELAY adds an offset between input an
output side of the video FIFO. It shouldn't increase the length of any
sync signal, but delays the read side of the FIFO, so the write (DSI)
side has some margin to put data into the FIFO before DP side starts to
assemble packets.


Does this apply to DSI-to-DPI mode too ?


I guess it does the same thing, but the technical documents I have
don't really say anything about it. I don't think the VSDELAY really
matters in the DPI output case, as DPI is much slower in pulling data
out of the FIFO compared to the DP packetizing, so the DSI side should
always be able to keep up with the DPI side.




   Which DSI bus mode do you use, sync events/pulses/burst ?


At the time when this patch was written it still was the SYNC_PULSE
mode.


Can you please double-check this with current burst mode ?


It works fine on a hardware in DSI to DPI mode. I could check that
things are still as expected in DSI to DP mode later, but I don't
expect any issues.


Tested-by: Marek Vasut  # TC9595
Reviewed-by: Marek Vasut 

Sorry for the delay


Re: [PATCH 1/2] drm: bridge: tc358767: increase PLL lock time delay

2023-07-08 Thread Marek Vasut

On 6/2/23 21:15, Lucas Stach wrote:

From: David Jander 

The PLL often fails to lock with this delay. The new value was
determined by trial and error increasing the delay bit by bit
until the error did not occurr anymore even after several tries.
Then double that value was taken as the minimum delay to be safe.

Signed-off-by: David Jander 
Signed-off-by: Lucas Stach 


Tested-by: Marek Vasut  # TC9595
Reviewed-by: Marek Vasut 


Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Dmitry Baryshkov

On 08/07/2023 18:40, Marek Vasut wrote:

On 7/7/23 10:47, Neil Armstrong wrote:

On 07/07/2023 09:18, Neil Armstrong wrote:

Hi,

On 06/07/2023 11:20, Amit Pundir wrote:

On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
 wrote:


[Adding freedreno@ to cc list]

On Wed, 5 Jul 2023 at 08:31, Jagan Teki 
 wrote:


Hi Amit,

On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir 
 wrote:


Hi Marek,

On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:


Do not generate the HS front and back porch gaps, the HSA gap and
EOT packet, as these packets are not required. This makes the 
bridge

work with Samsung DSIM on i.MX8MM and i.MX8MP.


This patch broke display on Dragonboard 845c (SDM845) devboard 
running

AOSP. This is what I see
https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
Reverting this patch fixes this regression for me.


Might be msm dsi host require proper handling on these updated
mode_flags? did they?


The msm DSI host supports those flags. Also, I'd like to point out
that the patch didn't change the rest of the driver code. So even if
drm/msm ignored some of the flags, it should not have caused the
issue. Most likely the issue is on the lt9611 side. I's suspect that
additional programming is required to make it work with these flags.


I spent some time today on smoke testing these flags (individually and
in limited combination) on DB845c, to narrow down this breakage to one
or more flag(s) triggering it. Here are my observations in limited
testing done so far.

There is no regression with MIPI_DSI_MODE_NO_EOT_PACKET when enabled
alone and system boots to UI as usual.

MIPI_DSI_MODE_VIDEO_NO_HFP always trigger the broken display as in the
screenshot[1] shared earlier as well.

Adding either of MIPI_DSI_MODE_VIDEO_NO_HSA and
MIPI_DSI_MODE_VIDEO_NO_HBP always result in no display, unless paired
with MIPI_DSI_MODE_VIDEO_NO_HFP and in that case we get the broken
display as reported.

In short other than MIPI_DSI_MODE_NO_EOT_PACKET flag, all other flags
added in this commit break the display on DB845c one way or another.


I think the investigation would be to understand why samsung-dsim 
requires
such flags and/or what are the difference in behavior between MSM DSI 
and samsung DSIM

for those flags ?

If someone has access to the lt9611 datasheet, so it requires 
HSA/HFP/HBP to be

skipped ? and does MSM DSI and samsung DSIM skip them in the same way ?


I don't have the LT9611 datasheet, no.


I also don't have an lt9611 datasheet, unfortunately. I was using the 
existing third-party drivers as a source.




The MX8M DSI (samsung-dsim) skips the HSA/HFP/HBP completely (see 
i.MX8MP RM 13.6.2.7.2 RGB Interface , there is infographics on the 
following pages).


Do you know, why did you have to disable HPB/HSA/HFP on your platform? 
What was the result otherwise?




I think there's a mismatch, where on one side this flags sets the link 
in LP-11 while
in HSA/HFP/HPB while on the other it completely removes those blanking 
packets.


The name MIPI_DSI_MODE_VIDEO_NO_HBP suggests removal of HPB, not LP-11 
while HPB.

the registers used in both controllers are different:
- samsung-dsim: DSIM_HBP_DISABLE_MODE
- msm dsi: DSI_VID_CFG0_HBP_POWER_STOP

The first one suggest removing the packet, while the second one 
suggests powering

off the line while in the blanking packet period.

@Abhinav, can you comment on that ?

@Jagan, Andrezej So you have any documentation on what 
DSIM_xxx_DISABLE_MODE does ?


See above, i.MX8M M/N/P uses the samsung-dsim block .

@Dmitry, so you have access to the lt9611 datasheet to know what's 
needed here ?


[...]


--
With best wishes
Dmitry



Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Marek Vasut

On 7/7/23 10:47, Neil Armstrong wrote:

On 07/07/2023 09:18, Neil Armstrong wrote:

Hi,

On 06/07/2023 11:20, Amit Pundir wrote:

On Wed, 5 Jul 2023 at 11:09, Dmitry Baryshkov
 wrote:


[Adding freedreno@ to cc list]

On Wed, 5 Jul 2023 at 08:31, Jagan Teki  
wrote:


Hi Amit,

On Wed, Jul 5, 2023 at 10:15 AM Amit Pundir 
 wrote:


Hi Marek,

On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:


Do not generate the HS front and back porch gaps, the HSA gap and
EOT packet, as these packets are not required. This makes the bridge
work with Samsung DSIM on i.MX8MM and i.MX8MP.


This patch broke display on Dragonboard 845c (SDM845) devboard 
running

AOSP. This is what I see
https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
Reverting this patch fixes this regression for me.


Might be msm dsi host require proper handling on these updated
mode_flags? did they?


The msm DSI host supports those flags. Also, I'd like to point out
that the patch didn't change the rest of the driver code. So even if
drm/msm ignored some of the flags, it should not have caused the
issue. Most likely the issue is on the lt9611 side. I's suspect that
additional programming is required to make it work with these flags.


I spent some time today on smoke testing these flags (individually and
in limited combination) on DB845c, to narrow down this breakage to one
or more flag(s) triggering it. Here are my observations in limited
testing done so far.

There is no regression with MIPI_DSI_MODE_NO_EOT_PACKET when enabled
alone and system boots to UI as usual.

MIPI_DSI_MODE_VIDEO_NO_HFP always trigger the broken display as in the
screenshot[1] shared earlier as well.

Adding either of MIPI_DSI_MODE_VIDEO_NO_HSA and
MIPI_DSI_MODE_VIDEO_NO_HBP always result in no display, unless paired
with MIPI_DSI_MODE_VIDEO_NO_HFP and in that case we get the broken
display as reported.

In short other than MIPI_DSI_MODE_NO_EOT_PACKET flag, all other flags
added in this commit break the display on DB845c one way or another.


I think the investigation would be to understand why samsung-dsim 
requires
such flags and/or what are the difference in behavior between MSM DSI 
and samsung DSIM

for those flags ?

If someone has access to the lt9611 datasheet, so it requires 
HSA/HFP/HBP to be

skipped ? and does MSM DSI and samsung DSIM skip them in the same way ?


I don't have the LT9611 datasheet, no.

The MX8M DSI (samsung-dsim) skips the HSA/HFP/HBP completely (see 
i.MX8MP RM 13.6.2.7.2 RGB Interface , there is infographics on the 
following pages).


I think there's a mismatch, where on one side this flags sets the link 
in LP-11 while
in HSA/HFP/HPB while on the other it completely removes those blanking 
packets.


The name MIPI_DSI_MODE_VIDEO_NO_HBP suggests removal of HPB, not LP-11 
while HPB.

the registers used in both controllers are different:
- samsung-dsim: DSIM_HBP_DISABLE_MODE
- msm dsi: DSI_VID_CFG0_HBP_POWER_STOP

The first one suggest removing the packet, while the second one suggests 
powering

off the line while in the blanking packet period.

@Abhinav, can you comment on that ?

@Jagan, Andrezej So you have any documentation on what 
DSIM_xxx_DISABLE_MODE does ?


See above, i.MX8M M/N/P uses the samsung-dsim block .

@Dmitry, so you have access to the lt9611 datasheet to know what's 
needed here ?


[...]


Re: [PATCH 2/4] vgacon: rework screen_info #ifdef checks

2023-07-08 Thread Thomas Bogendoerfer
On Fri, Jul 07, 2023 at 11:52:24AM +0200, Arnd Bergmann wrote:
> diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
> index ee044261eb223..3c14548353e47 100644
> --- a/arch/mips/jazz/setup.c
> +++ b/arch/mips/jazz/setup.c
> @@ -76,7 +76,7 @@ void __init plat_mem_setup(void)
>  
>   _machine_restart = jazz_machine_restart;
>  
> -#ifdef CONFIG_VT
> +#ifdef CONFIG_VGA_CONSOLE
>   screen_info = (struct screen_info) {
>   .orig_video_cols= 160,
>   .orig_video_lines   = 64,

that wssn't intended for VGA but for fbdev/g364fb, which doesn't use
it. So removing it is probably the best thing.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.[ RFC1925, 2.3 ]


Re: [PATCH 2/2] drm/bridge: lt9611: Do not generate HFP/HBP/HSA and EOT packet

2023-07-08 Thread Linux regression tracking (Thorsten Leemhuis)
[TLDR: I'm adding this report to the list of tracked Linux kernel
regressions; the text you find below is based on a few templates
paragraphs you might have encountered already in similar form.
See link in footer if these mails annoy you.]

On 05.07.23 06:45, Amit Pundir wrote:
> 
> On Wed, 5 Jul 2023 at 01:48, Marek Vasut  wrote:
>>
>> Do not generate the HS front and back porch gaps, the HSA gap and
>> EOT packet, as these packets are not required. This makes the bridge
>> work with Samsung DSIM on i.MX8MM and i.MX8MP.
> 
> This patch broke display on Dragonboard 845c (SDM845) devboard running
> AOSP. This is what I see
> https://people.linaro.org/~amit.pundir/db845c-userdebug/v6.5-broken-display/PXL_20230704_150156326.jpg.
> Reverting this patch fixes this regression for me.

Thanks for the report. To be sure the issue doesn't fall through the
cracks unnoticed, I'm adding it to regzbot, the Linux kernel regression
tracking bot:

#regzbot ^introduced 8ddce13ae69
#regzbot title drm/bridge: lt9611: Dragonboard 845c (SDM845) devboard
broken when running AOSP
#regzbot ignore-activity

This isn't a regression? This issue or a fix for it are already
discussed somewhere else? It was fixed already? You want to clarify when
the regression started to happen? Or point out I got the title or
something else totally wrong? Then just reply and tell me -- ideally
while also telling regzbot about it, as explained by the page listed in
the footer of this mail.

Developers: When fixing the issue, remember to add 'Link:' tags pointing
to the report (the parent of this mail). See page linked in footer for
details.

Ciao, Thorsten (wearing his 'the Linux kernel's regression tracker' hat)
--
Everything you wanna know about Linux kernel regression tracking:
https://linux-regtracking.leemhuis.info/about/#tldr
That page also explains what to do if mails like this annoy you.


[PATCH v2 2/2] drm/msm/dpu: fix DSC 1.2 enc subblock length

2023-07-08 Thread Dmitry Baryshkov
Both struct dpu_dsc_sub_blks instances declare enc subblock length to be
0x100, while the actual length is 0x9c (last register having offset 0x98).
Reduce subblock length to remove the empty register space from being
dumped.

Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets")
Reviewed-by: Abhinav Kumar 
Reviewed-by: Marijn Suijten 
Signed-off-by: Dmitry Baryshkov 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 0de507d4d7b7..dd2f89ada043 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -517,12 +517,12 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk 
= {
  * DSC sub blocks config
  */
 static const struct dpu_dsc_sub_blks dsc_sblk_0 = {
-   .enc = {.base = 0x100, .len = 0x100},
+   .enc = {.base = 0x100, .len = 0x9c},
.ctl = {.base = 0xF00, .len = 0x10},
 };
 
 static const struct dpu_dsc_sub_blks dsc_sblk_1 = {
-   .enc = {.base = 0x200, .len = 0x100},
+   .enc = {.base = 0x200, .len = 0x9c},
.ctl = {.base = 0xF80, .len = 0x10},
 };
 
-- 
2.40.1



[PATCH v2 1/2] drm/msm/dpu: fix DSC 1.2 block lengths

2023-07-08 Thread Dmitry Baryshkov
All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length.
This includes the common block itself, enc subblocks and some empty
space around. Change that to pass 0x4 instead, the length of common
register block itself.

Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets")
Reported-by: Ryan McCann 
Signed-off-by: Dmitry Baryshkov 
---

Changes since v2:
 - Added Reported-by tag.

---
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h   |  8 
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h   |  2 +-
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 ++--
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h   |  8 
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h   |  8 
 5 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 8da424eaee6a..6edf323f381f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -159,10 +159,10 @@ static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sm8350_dsc[] = {
-   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x29c, 0, dsc_sblk_0),
-   DSC_BLK_1_2("dce_0_1", DSC_1, 0x8, 0x29c, 0, dsc_sblk_1),
-   DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-   DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),
+   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x4, 0, dsc_sblk_0),
+   DSC_BLK_1_2("dce_0_1", DSC_1, 0x8, 0x4, 0, dsc_sblk_1),
+   DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x4, BIT(DPU_DSC_NATIVE_42x_EN), 
dsc_sblk_0),
+   DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x4, BIT(DPU_DSC_NATIVE_42x_EN), 
dsc_sblk_1),
 };
 
 static const struct dpu_intf_cfg sm8350_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 900fee410e11..5354003aa8be 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -104,7 +104,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = {
 
 /* NOTE: sc7280 only has one DSC hard slice encoder */
 static const struct dpu_dsc_cfg sc7280_dsc[] = {
-   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
+   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x4, BIT(DPU_DSC_NATIVE_42x_EN), 
dsc_sblk_0),
 };
 
 static const struct dpu_wb_cfg sc7280_wb[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
index f6ce6b090f71..1d374abec1fd 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
@@ -148,12 +148,12 @@ static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] 
= {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sc8280xp_dsc[] = {
-   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x29c, 0, dsc_sblk_0),
-   DSC_BLK_1_2("dce_0_1", DSC_1, 0x8, 0x29c, 0, dsc_sblk_1),
-   DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-   DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),
-   DSC_BLK_1_2("dce_2_0", DSC_4, 0x82000, 0x29c, 0, dsc_sblk_0),
-   DSC_BLK_1_2("dce_2_1", DSC_5, 0x82000, 0x29c, 0, dsc_sblk_1),
+   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x4, 0, dsc_sblk_0),
+   DSC_BLK_1_2("dce_0_1", DSC_1, 0x8, 0x4, 0, dsc_sblk_1),
+   DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x4, BIT(DPU_DSC_NATIVE_42x_EN), 
dsc_sblk_0),
+   DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x4, BIT(DPU_DSC_NATIVE_42x_EN), 
dsc_sblk_1),
+   DSC_BLK_1_2("dce_2_0", DSC_4, 0x82000, 0x4, 0, dsc_sblk_0),
+   DSC_BLK_1_2("dce_2_1", DSC_5, 0x82000, 0x4, 0, dsc_sblk_1),
 };
 
 /* TODO: INTF 3, 8 and 7 are used for MST, marked as INTF_NONE for now */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
index 8d13c369213c..79447d8cab05 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
@@ -167,10 +167,10 @@ static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sm8450_dsc[] = {
-   DSC_BLK_1_2("dce_0_0", DSC_0, 0x8, 0x29c, 0, dsc_sblk_0),
-   DSC_BLK_1_2("dce_0_1", DSC_1, 0x8, 0x29c, 0, dsc_sblk_1),
-   DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-   DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, 
BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),

Re: [PATCH v4 3/3] drm/panel-fannal-c3004: Add fannal c3004 DSI panel

2023-07-08 Thread Marek Vasut

On 7/7/23 17:26, Paulo Pavacic wrote:

Hello Marek,


Hi,


čet, 6. srp 2023. u 17:26 Marek Vasut  napisao je:


On 7/6/23 17:18, Paulo Pavacic wrote:

Hello Linus,

čet, 22. lip 2023. u 10:22 Linus Walleij  napisao je:


On Wed, Jun 21, 2023 at 5:09 PM Paulo Pavacic  wrote:


A lot of modifications to st7701 are required. I believe it would
result in a driver that doesn't look or work the same. e.g compare
delays between initialization sequences of panel-fannal-c3004 and
panel-st7701. I think it would be optimal to create st7701s driver and
have special handling for st7701s panels. If there was a flag for
whether panel is st7701 or st7701s it would end up looking like a
mess.


What matters is if the original authors of the old st7701 driver are
around and reviewing and testing patches at all. What we need is
active maintainers. (Added Jagan, Marek & Maya).

I buy the reasoning that the st7701s is perhaps substantially different
from st7701.

If st7701s is very different then I suppose it needs a separate driver,
then all we need to to name the driver properly, i.e.
panel-sitronix-st7701s.c.


I had in person talk with Paul Kocialkowski and I have concluded that
this is the best solution.
I believe I should rename it to st7701s due to the hardware changes. I
would like to create V5 patch with driver renamed to st7701s.
Please let me know if you agree / disagree.


If I recall it right, the ST7701 and ST7701S are basically the same
chip, aren't they ?


I'm currently exploring all the differences. There aren't a lot of
differences, but there are some.
So far I can see that default register values are different, new
previously unused registers are now used and there has been some
reordering of how info is placed in registers [1] (data bits are in
different order). Moreover, instructions to some commands have been
changed and meaning of what data bits mean [2][3]. Also, new features
have been added [2]; there is now PCLKS 3 for example.

You can see few differences in following images. Same images were
attached in this mail:
[1] https://ibb.co/NmgbZmy - GAMACTRL_st7701.png
[2] https://ibb.co/G79y235 - PCLKS2.png


Ouch. I wonder if this is still something that can be abstracted out 
with some helper accessor functions like:


if (model == ST7701)
  write something
else
  write the other layout

Or whether it makes sense to outright have a separate driver. The later 
would introduce duplication, but maybe that much duplication is OK.


Re: [PATCH] drm/nouveau/disp/g94: enable HDMI

2023-07-08 Thread Markus Elfring
Would a corresponding imperative description be helpful also for such a small 
change?

See also:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?h=v6.4#n94

Regards,
Markus


Re: [PATCH v2 0/3] Galaxy S2 (i9100) panel updates v2

2023-07-08 Thread Sam Ravnborg
Hi Paul.

On Sat, Jul 08, 2023 at 10:40:24AM +0200, Paul Cercueil wrote:
> Hi,
> 
> Follow-up on my patchset that fixes the display of the Samsung Galaxy S2
> when running PostmarketOS.
> 
> The first two patches update the LD9040 panel driver so that it looks
> much better, and supports setting the backlight.
> 
> The third patch fixes the size of the panel in the Device Tree. The
> previous values were completely bogus and caused Phosh (PmOS' UI) to
> display tiny icons and text as it thought the DPI was much lower.
> 
> Changes since V1:
> [1/3]: Remove spurious new line
> [2/3]: Remove .get_brightness() callback, use bl_get_data() and
>backlight_get_brightness()
> 
> Cheers,
> -Paul
> 
> Paul Cercueil (3):
>   drm/panel: ld9040: Use better magic values
>   drm/panel: ld9040: Register a backlight device
>   ARM: dts: exynos/i9100: Fix LCD screen's physical size

The series looks good.

The first two patches are:
Reviewed-by: Sam Ravnborg 

The third patch are:
Acked-by: Sam Ravnborg 

(I was not sure if I could/should stamp it r-b, so decided for the a-b).

Sam



Re: [PATCH 01/13] drm/msm/dpu: cleanup dpu_kms_hw_init error path

2023-07-08 Thread Konrad Dybcio
On 8.07.2023 01:48, Dmitry Baryshkov wrote:
> On 08/07/2023 02:25, Konrad Dybcio wrote:
>> On 7.07.2023 22:37, Dmitry Baryshkov wrote:
>>> It was noticed that dpu_kms_hw_init()'s error path contains several
>>> labels which point to the same code path. Replace all of them with a
>>> single label.
>>>
>>> Suggested-by: Konrad Dybcio 
>> it's the first time I'm seeing this code
>>
> 
> It is Suggested-by, not something else. And you pointed it out in 
> https://lore.kernel.org/linux-arm-msm/6d598438-f10f-8678-7878-829b8b3ae...@linaro.org/
Oh, thanks

Konrad
> 
>> Konrad
>>> Signed-off-by: Dmitry Baryshkov 
>>> ---
>>>   drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +
>>>   1 file changed, 9 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
>>> b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
>>> index c11b3ab572ab..e7ac02e92f42 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
>>> @@ -1037,7 +1037,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   if (!dpu_kms->catalog) {
>>>   DPU_ERROR("device config not known!\n");
>>>   rc = -EINVAL;
>>> -    goto power_error;
>>> +    goto err_pm_put;
>>>   }
>>>     /*
>>> @@ -1047,13 +1047,13 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   rc = _dpu_kms_mmu_init(dpu_kms);
>>>   if (rc) {
>>>   DPU_ERROR("dpu_kms_mmu_init failed: %d\n", rc);
>>> -    goto power_error;
>>> +    goto err_pm_put;
>>>   }
>>>     rc = dpu_rm_init(_kms->rm, dpu_kms->catalog, dpu_kms->mmio);
>>>   if (rc) {
>>>   DPU_ERROR("rm init failed: %d\n", rc);
>>> -    goto power_error;
>>> +    goto err_pm_put;
>>>   }
>>>     dpu_kms->rm_init = true;
>>> @@ -1065,7 +1065,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   rc = PTR_ERR(dpu_kms->hw_mdp);
>>>   DPU_ERROR("failed to get hw_mdp: %d\n", rc);
>>>   dpu_kms->hw_mdp = NULL;
>>> -    goto power_error;
>>> +    goto err_pm_put;
>>>   }
>>>     for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
>>> @@ -1076,7 +1076,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   if (IS_ERR(hw)) {
>>>   rc = PTR_ERR(hw);
>>>   DPU_ERROR("failed to init vbif %d: %d\n", vbif->id, rc);
>>> -    goto power_error;
>>> +    goto err_pm_put;
>>>   }
>>>     dpu_kms->hw_vbif[vbif->id] = hw;
>>> @@ -1092,7 +1092,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   rc = dpu_core_perf_init(_kms->perf, dpu_kms->catalog->perf, 
>>> max_core_clk_rate);
>>>   if (rc) {
>>>   DPU_ERROR("failed to init perf %d\n", rc);
>>> -    goto perf_err;
>>> +    goto err_pm_put;
>>>   }
>>>     dpu_kms->hw_intr = dpu_hw_intr_init(dpu_kms->mmio, 
>>> dpu_kms->catalog);
>>> @@ -1100,7 +1100,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   rc = PTR_ERR(dpu_kms->hw_intr);
>>>   DPU_ERROR("hw_intr init failed: %d\n", rc);
>>>   dpu_kms->hw_intr = NULL;
>>> -    goto hw_intr_init_err;
>>> +    goto err_pm_put;
>>>   }
>>>     dev->mode_config.min_width = 0;
>>> @@ -1125,7 +1125,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>   rc = _dpu_kms_drm_obj_init(dpu_kms);
>>>   if (rc) {
>>>   DPU_ERROR("modeset init failed: %d\n", rc);
>>> -    goto drm_obj_init_err;
>>> +    goto err_pm_put;
>>>   }
>>>     dpu_vbif_init_memtypes(dpu_kms);
>>> @@ -1134,10 +1134,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>>>     return 0;
>>>   -drm_obj_init_err:
>>> -hw_intr_init_err:
>>> -perf_err:
>>> -power_error:
>>> +err_pm_put:
>>>   pm_runtime_put_sync(_kms->pdev->dev);
>>>   error:
>>>   _dpu_kms_hw_destroy(dpu_kms);
> 


[PATCH v2 3/3] ARM: dts: exynos/i9100: Fix LCD screen's physical size

2023-07-08 Thread Paul Cercueil
The previous values were completely bogus, and resulted in the computed
DPI ratio being much lower than reality, causing applications and UIs to
misbehave.

The new values were measured by myself with a ruler.

Signed-off-by: Paul Cercueil 
Fixes: 8620cc2f99b7 ("ARM: dts: exynos: Add devicetree file for the Galaxy S2")
Cc:  # v5.8+
---
 arch/arm/boot/dts/exynos4210-i9100.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts 
b/arch/arm/boot/dts/exynos4210-i9100.dts
index 37cd4dde53e4..a9ec1f6c1dea 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -207,8 +207,8 @@ lcd@0 {
power-on-delay = <10>;
reset-delay = <10>;
 
-   panel-width-mm = <90>;
-   panel-height-mm = <154>;
+   panel-width-mm = <56>;
+   panel-height-mm = <93>;
 
display-timings {
timing {
-- 
2.40.1



[PATCH v2 2/3] drm/panel: ld9040: Register a backlight device

2023-07-08 Thread Paul Cercueil
Register a backlight device to be able to switch between all the gamma
levels.

v2: Remove .get_brightness() callback, use bl_get_data() and
backlight_get_brightness()

Signed-off-by: Paul Cercueil 
---
 drivers/gpu/drm/panel/panel-samsung-ld9040.c | 32 +++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-samsung-ld9040.c 
b/drivers/gpu/drm/panel/panel-samsung-ld9040.c
index f39f999c21af..ad5ed635f592 100644
--- a/drivers/gpu/drm/panel/panel-samsung-ld9040.c
+++ b/drivers/gpu/drm/panel/panel-samsung-ld9040.c
@@ -8,6 +8,7 @@
  * Andrzej Hajda 
 */
 
+#include 
 #include 
 #include 
 #include 
@@ -310,8 +311,30 @@ static int ld9040_parse_dt(struct ld9040 *ctx)
return 0;
 }
 
+static int ld9040_bl_update_status(struct backlight_device *dev)
+{
+   struct ld9040 *ctx = bl_get_data(dev);
+
+   ctx->brightness = backlight_get_brightness(dev);
+   ld9040_brightness_set(ctx);
+
+   return 0;
+}
+
+static const struct backlight_ops ld9040_bl_ops = {
+   .update_status  = ld9040_bl_update_status,
+};
+
+static const struct backlight_properties ld9040_bl_props = {
+   .type = BACKLIGHT_RAW,
+   .scale = BACKLIGHT_SCALE_NON_LINEAR,
+   .max_brightness = ARRAY_SIZE(ld9040_gammas) - 1,
+   .brightness = ARRAY_SIZE(ld9040_gammas) - 1,
+};
+
 static int ld9040_probe(struct spi_device *spi)
 {
+   struct backlight_device *bldev;
struct device *dev = >dev;
struct ld9040 *ctx;
int ret;
@@ -323,7 +346,7 @@ static int ld9040_probe(struct spi_device *spi)
spi_set_drvdata(spi, ctx);
 
ctx->dev = dev;
-   ctx->brightness = ARRAY_SIZE(ld9040_gammas) - 1;
+   ctx->brightness = ld9040_bl_props.brightness;
 
ret = ld9040_parse_dt(ctx);
if (ret < 0)
@@ -353,6 +376,13 @@ static int ld9040_probe(struct spi_device *spi)
drm_panel_init(>panel, dev, _drm_funcs,
   DRM_MODE_CONNECTOR_DPI);
 
+
+   bldev = devm_backlight_device_register(dev, dev_name(dev), dev,
+  ctx, _bl_ops,
+  _bl_props);
+   if (IS_ERR(bldev))
+   return PTR_ERR(bldev);
+
drm_panel_add(>panel);
 
return 0;
-- 
2.40.1



[PATCH v2 1/3] drm/panel: ld9040: Use better magic values

2023-07-08 Thread Paul Cercueil
I have no idea what the prior magic values mean, and I have no idea
what my replacement (extracted from [1]) magic values mean.

What I do know, is that these new values result in a much better
picture, where the blacks are really black (as you would expect on an
AMOLED display) instead of grey-ish.

[1]: 
https://github.com/dorimanx/Dorimanx-SG2-I9100-Kernel/blob/master-jelly-bean/arch/arm/mach-exynos/u1-panel.h

v2: Remove spurious new line

Signed-off-by: Paul Cercueil 
Reviewed-by: Neil Armstrong 
---
 drivers/gpu/drm/panel/panel-samsung-ld9040.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-samsung-ld9040.c 
b/drivers/gpu/drm/panel/panel-samsung-ld9040.c
index 01eb211f32f7..f39f999c21af 100644
--- a/drivers/gpu/drm/panel/panel-samsung-ld9040.c
+++ b/drivers/gpu/drm/panel/panel-samsung-ld9040.c
@@ -180,15 +180,15 @@ static void ld9040_init(struct ld9040 *ctx)
 {
ld9040_dcs_write_seq_static(ctx, MCS_USER_SETTING, 0x5a, 0x5a);
ld9040_dcs_write_seq_static(ctx, MCS_PANEL_CONDITION,
-   0x05, 0x65, 0x96, 0x71, 0x7d, 0x19, 0x3b, 0x0d,
-   0x19, 0x7e, 0x0d, 0xe2, 0x00, 0x00, 0x7e, 0x7d,
-   0x07, 0x07, 0x20, 0x20, 0x20, 0x02, 0x02);
+   0x05, 0x5e, 0x96, 0x6b, 0x7d, 0x0d, 0x3f, 0x00,
+   0x00, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x07, 0x05, 0x1f, 0x1f, 0x1f, 0x00, 0x00);
ld9040_dcs_write_seq_static(ctx, MCS_DISPCTL,
-   0x02, 0x08, 0x08, 0x10, 0x10);
+   0x02, 0x06, 0x0a, 0x10, 0x10);
ld9040_dcs_write_seq_static(ctx, MCS_MANPWR, 0x04);
ld9040_dcs_write_seq_static(ctx, MCS_POWER_CTRL,
0x0a, 0x87, 0x25, 0x6a, 0x44, 0x02, 0x88);
-   ld9040_dcs_write_seq_static(ctx, MCS_ELVSS_ON, 0x0d, 0x00, 0x16);
+   ld9040_dcs_write_seq_static(ctx, MCS_ELVSS_ON, 0x0f, 0x00, 0x16);
ld9040_dcs_write_seq_static(ctx, MCS_GTCON, 0x09, 0x00, 0x00);
ld9040_brightness_set(ctx);
ld9040_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
-- 
2.40.1



[PATCH v2 0/3] Galaxy S2 (i9100) panel updates v2

2023-07-08 Thread Paul Cercueil
Hi,

Follow-up on my patchset that fixes the display of the Samsung Galaxy S2
when running PostmarketOS.

The first two patches update the LD9040 panel driver so that it looks
much better, and supports setting the backlight.

The third patch fixes the size of the panel in the Device Tree. The
previous values were completely bogus and caused Phosh (PmOS' UI) to
display tiny icons and text as it thought the DPI was much lower.

Changes since V1:
[1/3]: Remove spurious new line
[2/3]: Remove .get_brightness() callback, use bl_get_data() and
   backlight_get_brightness()

Cheers,
-Paul

Paul Cercueil (3):
  drm/panel: ld9040: Use better magic values
  drm/panel: ld9040: Register a backlight device
  ARM: dts: exynos/i9100: Fix LCD screen's physical size

 arch/arm/boot/dts/exynos4210-i9100.dts   |  4 +-
 drivers/gpu/drm/panel/panel-samsung-ld9040.c | 42 +---
 2 files changed, 38 insertions(+), 8 deletions(-)

-- 
2.40.1



Re: [PATCH v4 3/3] drm/panel-fannal-c3004: Add fannal c3004 DSI panel

2023-07-08 Thread Jagan Teki
On Thu, 22 Jun 2023 at 13:52, Linus Walleij  wrote:
>
> On Wed, Jun 21, 2023 at 5:09 PM Paulo Pavacic  wrote:
>
> > A lot of modifications to st7701 are required. I believe it would
> > result in a driver that doesn't look or work the same. e.g compare
> > delays between initialization sequences of panel-fannal-c3004 and
> > panel-st7701. I think it would be optimal to create st7701s driver and
> > have special handling for st7701s panels. If there was a flag for
> > whether panel is st7701 or st7701s it would end up looking like a
> > mess.
>
> What matters is if the original authors of the old st7701 driver are
> around and reviewing and testing patches at all. What we need is
> active maintainers. (Added Jagan, Marek & Maya).
>
> I buy the reasoning that the st7701s is perhaps substantially different
> from st7701.
>
> If st7701s is very different then I suppose it needs a separate driver,
> then all we need to to name the driver properly, i.e.
> panel-sitronix-st7701s.c.

I agree with what Linus mentioned.

1. If the panel is designed on top of ST7701 then add driver data on
the existing panel-st7701 driver with this panel.

2. If the panel is designed on top of ST7701S - ST7701 and ST7701S are
completely different in terms of the command set and init sequence
then add panel-sitronix-st7701s.c

3. If the panel is designed on top ST7701S and if the commands set is
the same as ST7701 but the init sequence is different then it is
possible to use the existing st7701 driver with the init sequence as
in driver data.

Thanks,
Jagan.


Re: [PATCH v4 3/3] drm/panel-fannal-c3004: Add fannal c3004 DSI panel

2023-07-08 Thread Paulo Pavačić
Hello Marek,


Jul 6, 2023 5:26:15 PM Marek Vasut :

> On 7/6/23 17:18, Paulo Pavacic wrote:
>> Hello Linus,
>> čet, 22. lip 2023. u 10:22 Linus Walleij  napisao 
>> je:
>>>
>>> On Wed, Jun 21, 2023 at 5:09 PM Paulo Pavacic  wrote:
>>>
 A lot of modifications to st7701 are required. I believe it would
 result in a driver that doesn't look or work the same. e.g compare
 delays between initialization sequences of panel-fannal-c3004 and
 panel-st7701. I think it would be optimal to create st7701s driver and
 have special handling for st7701s panels. If there was a flag for
 whether panel is st7701 or st7701s it would end up looking like a
 mess.
>>>
>>> What matters is if the original authors of the old st7701 driver are
>>> around and reviewing and testing patches at all. What we need is
>>> active maintainers. (Added Jagan, Marek & Maya).
>>>
>>> I buy the reasoning that the st7701s is perhaps substantially different
>>> from st7701.
>>>
>>> If st7701s is very different then I suppose it needs a separate driver,
>>> then all we need to to name the driver properly, i.e.
>>> panel-sitronix-st7701s.c.
>> I had in person talk with Paul Kocialkowski and I have concluded that
>> this is the best solution.
>> I believe I should rename it to st7701s due to the hardware changes. I
>> would like to create V5 patch with driver renamed to st7701s.
>> Please let me know if you agree / disagree.
>
> If I recall it right, the ST7701 and ST7701S are basically the same chip, 
> aren't they ?

I'm currently exploring all the differences. There aren't a lot of them, but 
there are some.

So far I can see that default register values are different, previously unused 
registers are now used and there has been some reordering of how info is placed 
in registers [1] (return value for some commands is different). E.g AJ1N[1:0] 
has been moved from B102h to B101h [1]

Moreover, instructions to some commands have been changed as well as meaning of 
what data bits mean [2][3]. Also, new features have been added [2]; there is 
now PCLKS 3 for example.
You can see few differences in following images:
[1] https://ibb.co/NmgbZmy - GAMACTRL_st7701.png
[2] https://ibb.co/G79y235 - PCLKS2.png

P.S. this is second time I'm trying to send this e-mail so some of you might 
have received e-mail with the same text twice


Thank you for your time,
Paulo


Re: [PATCH drm-next v6 02/13] drm: manager to keep track of GPUs VA mappings

2023-07-08 Thread Matthew Brost
On Fri, Jul 07, 2023 at 02:52:41PM +0200, Boris Brezillon wrote:
> On Fri, 7 Jul 2023 14:41:23 +0200
> Danilo Krummrich  wrote:
> 
> > >> + va__ && (va__->va.addr < (end__)) && \
> > >> + !list_entry_is_head(va__, &(mgr__)->rb.list, rb.entry); \
> > >> + va__ = list_next_entry(va__, rb.entry))  
> > > 
> > > If you define:
> > > 
> > > static inline struct drm_gpuva *
> > > drm_gpuva_next(struct drm_gpuva *va)
> > > {
> > >   if (va && !list_is_last(>rb.entry, >mgr->rb.list))
> > >   return list_next_entry(va, rb.entry);
> > > 
> > >   return NULL;
> > > } >
> > > the for loop becomes a bit more readable:  
> > 
> > Yes, it would. However, I don't want it to be confused with 
> > drm_gpuva_find_next(). Maybe I should rename the latter to something 
> > like drm_gpuva_find_next_neighbor() then.
> 
> If you want to keep drm_gpuva_find_next(), feel free to rename/prefix
> the drm_gpuva_next() function. I was just posting it as a reference.
> 
> > 
> > > 
> > >   for (va__ = drm_gpuva_find_first((mgr__), (start__), (end__) - 
> > > (start__)); \
> > >va__ && (va__->va.addr < (end__)); \
> > >va__ = drm_gpuva_next(va__))
> > >   
> > >> +
> > >> +/**
> > >> + * drm_gpuva_for_each_va_range_safe - iternator to safely walk over a 
> > >> range of
> > >> + * _gpuvas
> > >> + * @va__: _gpuva to assign to in each iteration step
> > >> + * @next__: another _gpuva to use as temporary storage
> > >> + * @mgr__: _gpuva_manager to walk over
> > >> + * @start__: starting offset, the first gpuva will overlap this
> > >> + * @end__: ending offset, the last gpuva will start before this (but may
> > >> + * overlap)
> > >> + *
> > >> + * This iterator walks over all _gpuvas in the _gpuva_manager 
> > >> that lie
> > >> + * between @start__ and @end__. It is implemented similarly to
> > >> + * list_for_each_safe(), but is using the _gpuva_manager's internal 
> > >> interval
> > >> + * tree to accelerate the search for the starting _gpuva, and hence 
> > >> is safe
> > >> + * against removal of elements. It assumes that @end__ is within (or is 
> > >> the
> > >> + * upper limit of) the _gpuva_manager. This iterator does not skip 
> > >> over the
> > >> + * _gpuva_manager's @kernel_alloc_node.
> > >> + */
> > >> +#define drm_gpuva_for_each_va_range_safe(va__, next__, mgr__, start__, 
> > >> end__) \
> > >> +for (va__ = drm_gpuva_find_first((mgr__), (start__), (end__)), \
> > >> + next__ = va ? list_next_entry(va__, rb.entry) : NULL; \
> > >> + va__ && (va__->va.addr < (end__)) && \
> > >> + !list_entry_is_head(va__, &(mgr__)->rb.list, rb.entry); \
> > >> + va__ = next__, next__ = list_next_entry(va__, rb.entry))  
> > > 
> > > And this is the safe version using the drm_gpuva_next() helper:
> > > 
> > >   for (va__ = drm_gpuva_find_first((mgr__), (start__), (end__) - 
> > > (start__)), \
> > >next__ = drm_gpuva_next(va__); \
> > >va__ && (va__->va.addr < (end__)); \
> > >va__ = next__, next__ = drm_gpuva_next(va__))
> > > 
> > > Those changes fixed an invalid pointer access I had in the sm_unmap()
> > > path.
> > >   
> > 
> > Sorry you did run into this bug.
> 
> No worries, that's what testing/debugging/reviewing is for. And I'm glad
> someone decided to work on this gpuva stuff so I don't have to code it
> myself, so that's the least I can do.

With Boris's changes this version works in Xe.

With that:

Acked-by: Matthew Brost 
Tested-by: Matthew Brost 


[PATCH v3] drm/bridge: tc358767: Use devm_clk_get_enabled() helper

2023-07-08 Thread Christophe JAILLET
The devm_clk_get_enabled() helper:
   - calls devm_clk_get()
   - calls clk_prepare_enable() and registers what is needed in order to
 call clk_disable_unprepare() when needed, as a managed resource.

This simplifies the code and avoids the need of a dedicated function used
with devm_add_action_or_reset().

Signed-off-by: Christophe JAILLET 
Reviewed-by: Andrzej Hajda 
---
Change in v3:
  - Rebase with latest -next

Change in v2:
  - Convert to dev_err_probe()[Andrzej Hajda]
  - Update the error message[Andrzej Hajda]
  - Add R-b tag[Andrzej Hajda]
https://lore.kernel.org/all/208546ce4e01973da1eb9ad7bc0f9241f650b3af.1672415956.git.christophe.jail...@wanadoo.fr/

v1:
https://lore.kernel.org/all/4f855984ea895e1488169e77935fa6e044912ac2.1672414073.git.christophe.jail...@wanadoo.fr/
---
 drivers/gpu/drm/bridge/tc358767.c | 25 -
 1 file changed, 4 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/bridge/tc358767.c 
b/drivers/gpu/drm/bridge/tc358767.c
index 2a58eb271f70..99f3d5ca7257 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -2215,13 +2215,6 @@ static int tc_probe_bridge_endpoint(struct tc_data *tc)
return -EINVAL;
 }
 
-static void tc_clk_disable(void *data)
-{
-   struct clk *refclk = data;
-
-   clk_disable_unprepare(refclk);
-}
-
 static int tc_probe(struct i2c_client *client)
 {
struct device *dev = >dev;
@@ -2238,20 +2231,10 @@ static int tc_probe(struct i2c_client *client, const 
struct i2c_device_id *id)
if (ret)
return ret;
 
-   tc->refclk = devm_clk_get(dev, "ref");
-   if (IS_ERR(tc->refclk)) {
-   ret = PTR_ERR(tc->refclk);
-   dev_err(dev, "Failed to get refclk: %d\n", ret);
-   return ret;
-   }
-
-   ret = clk_prepare_enable(tc->refclk);
-   if (ret)
-   return ret;
-
-   ret = devm_add_action_or_reset(dev, tc_clk_disable, tc->refclk);
-   if (ret)
-   return ret;
+   tc->refclk = devm_clk_get_enabled(dev, "ref");
+   if (IS_ERR(tc->refclk))
+   return dev_err_probe(dev, PTR_ERR(tc->refclk),
+"Failed to get and enable the ref clk\n");
 
/* tRSTW = 100 cycles , at 13 MHz that is ~7.69 us */
usleep_range(10, 15);
-- 
2.34.1