Configures the GE B850v3 LVDS/DP++ bridge on the dts file.
Cc: Javier Martinez Canillas
Cc: Enric Balletbo i Serra
Cc: Philipp Zabel
Cc: Rob Herring
Cc: Fabio Estevam
Signed-off-by: Peter Senna Tschudin
---
Unchanged from V2.
Changes from V1:
- Replaced '_' by '-' in node names or
Add a driver that create a drm_bridge and a drm_connector for the LVDS
to DP++ display bridge of the GE B850v3.
There are two physical bridges on the video signal pipeline: a
STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The hardware and
firmware made it complicated for this binding to
Devicetree bindings documentation for the GE B850v3 LVDS/DP++
display bridge.
Cc: Javier Martinez Canillas
Cc: Enric Balletbo i Serra
Cc: Philipp Zabel
Cc: Rob Herring
Cc: Fabio Estevam
Signed-off-by: Peter Senna Tschudin
---
Unchanged from V2.
Changes from V1:
- Replaced '_' by '-' in
As the IPU has combined limitations across multiple crtcs, and as that
can't be communicated to userspace at the moment, reorder the crtcs to
allow support to two Full-HD monitors by avoiding assigning two
monitors to a single IPU.
Cc: Enric Balletbo i Serra
Cc: Philipp Zabel
Cc: Rob Herring
Add support to attach a drm_bridge to imx-ldb in addition to
existing support to attach a LVDS panel.
This patch does a simple code refactoring by moving code
from for_each_child_of_node iterator to a new function named
imx_ldb_panel_ddc(). This was necessary to allow the panel ddc
code to run
The series adds a driver that creates a drm_bridge and a drm_connector for the
LVDS to DP++ display bridge of the GE B850v3.
There are two physical bridges on the video signal pipeline: a STDP4028(LVDS to
DP) and a STDP2690(DP to DP++). The hardware and firmware made it complicated
for this
tps://lists.freedesktop.org/archives/dri-devel/attachments/20160731/6226704a/attachment.html>
Add support for the JDI LT070ME05000 WUXGA DSI panel used in
Nexus 7 2013 devices.
Programming sequence for the panel is was originally found in the
android-msm-flo-3.4-lollipop-release branch from:
https://android.googlesource.com/kernel/msm.git
And video mode setting is from
Provide a small convenience wrapper that set/get the
display brightness value
Cc: John Stultz
Cc: Sumit Semwal
Cc: Archit Taneja
Cc: Rob Clark
Cc: Jani Nikula
Cc: Thierry Reding
Cc: Emil Velikov
Signed-off-by: Vinay Simha BN
Reviewed-by: Emil Velikov
---
v1:
*tested in nexus7 2nd gen.
Add documentation for lt070me05000 panel
Cc: Archit Taneja
Cc: John Stultz
Cc: Thierry Reding
Cc: Sumit Semwal
Signed-off-by: Vinay Simha BN
Acked-by: Rob Herring
---
v2:
* incorporated rob herring and thierry reviews
gpio to gpios, gpio to regulator using fixed regulators
and pwm
because:
You are the assignee for the bug.
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nee for the bug.
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-buffers-v2/20160731-161116
reproduce: make htmldocs
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_irq.c:2722: warning: No description found for
parameter 'fmt'
include/drm/drm_crtc.h:374: warning: No description found for parameter
'mode_blob'
include/drm/drm_
On 07/31/2016 12:42 PM, Steve Longerbeam wrote:
> In this version:
>
> - API changes to ipu-vdi.c in "gpu: ipu-v3: Add Video Deinterlacer unit".
> - "gpu: ipu-v3: Add FSU channel linking support" is new but based on
> previous patch "gpu: ipu-v3: Add IDMA channel linking support".
>
> No other
The image converter kernel API supports conversion contexts and
job queues, so we should allow more than one handle to the IC, so
that multiple users can add jobs to the queue.
Note however that users that control the IC manually (that do not
use the image converter APIs but setup the IC task by
This patch implements complete image conversion support to ipu-ic,
with tiling to support scaling to and from images up to 4096x4096.
Image rotation is also supported.
The internal API is subsystem agnostic (no V4L2 dependency except
for the use of V4L2 fourcc pixel formats).
Callers prepare for
Adds functions to link and unlink source channels to sink
channels in the FSU:
int ipu_fsu_link(struct ipu_soc *ipu, int src_ch, int sink_ch);
int ipu_fsu_unlink(struct ipu_soc *ipu, int src_ch, int sink_ch);
The channels numbers are usually IDMAC channels, but they can also be
channels that do
Adds the Video Deinterlacer (VDIC) unit.
Signed-off-by: Steve Longerbeam
---
v3:
- renamed and exported ipu_vdi_set_top_field_man() to
ipu_vdi_set_field_order(). Args include std and field to determine
correct field order.
- exported ipu_vdi_set_motion().
- ipu_vdi_setup() does not need to
Rename the CSI client device in the client_reg[] table to
"imx-ipuv3-csi".
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2: no changes
---
drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c
There can be multiple IC tasks using the IRT, so the IRT needs
a separate use counter. Create a private ipu_irt_enable() to
enable the IRT module when any IC task requires rotation, and
ipu_irt_disable() when a task no longer needs the IRT.
Signed-off-by: Steve Longerbeam
---
v3: no changes
The CSI data format was being programmed incorrectly for the
1x16 media bus formats. The CSI data format for 16-bit must
be bayer/generic (CSI_SENS_CONF_DATA_FMT_BAYER).
Suggested-by: Carsten Resch
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2: no changes
---
Set the sensor full frame based on whether the passed in mbus_fmt
is 720x480 (NTSC) or 720x576 (PAL).
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2: no changes
---
drivers/gpu/ipu-v3/ipu-csi.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git
Adds the VDIC field input IDMAC channels. These channels
transfer fields F(n-1), F(n), and F(N+1) from memory to
the VDIC (channels 8, 9, 10 respectively).
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2:
- made the channel names more descriptive: "_PREV" instead of "_P", etc.
---
Adds of-alias id to ipu_soc and retrieve with ipu_get_num().
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2: no changes
---
drivers/gpu/ipu-v3/ipu-common.c | 8
drivers/gpu/ipu-v3/ipu-prv.h| 1 +
include/video/imx-ipu-v3.h | 1 +
3 files changed, 10 insertions(+)
Adds ipu_cpmem_get_burstsize().
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2: no changes
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 6 ++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets.
Signed-off-by: Steve Longerbeam
---
v3: no changes
v2: no changes
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 7 +++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c
In this version:
- API changes to ipu-vdi.c in "gpu: ipu-v3: Add Video Deinterlacer unit".
- "gpu: ipu-v3: Add FSU channel linking support" is new but based on
previous patch "gpu: ipu-v3: Add IDMA channel linking support".
No other changes from previous version.
Steve Longerbeam (12):
gpu:
When reconfiguring a plane position (as in moving the cursor), the
frame buffer for the cursor isn't changing, so don't call the prepare
or cleanup driver functions.
This avoids making cursor position updates block on all pending rendering.
v2: Track which planes have been prepared to know which
There are two paths into intel_cleanup_plane_fb, the normal completion
path and the failure path.
In the failure case, intel_cleanup_plane_fb is called before
drm_atomic_helper_swap_state, so any wait_req reference made in
intel_prepare_plane_fb will be in old_intel_state->wait_req.
In the
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