On Tue, Feb 28, 2017 at 12:09:29PM -0800, Eric Anholt wrote:
> Daniel Vetter writes:
>
> > Let's make sure that review doesn't go through needless cycles. Diff
> > doesn't show this, but this is only for the "small drivers" part of
> > drm.
> >
> > Acked-by: Boris
On Tue, Feb 28, 2017 at 08:36:57PM +0100, Daniel Vetter wrote:
> It's still just an experiment, but one lesson learned from drm-misc is
> that not updating MAINTAINERS just leads to confusion. And this is
> easy to revert.
>
> Cc: Boris Brezillon
> Cc: Mark
On 28/02/17 14:55, Joe Perches wrote:
> Use a more common logging style.
>
> Miscellanea:
>
> o Coalesce formats and realign arguments
> o Neaten a few macros now using pr_
>
> Signed-off-by: Joe Perches
For omap:
Acked-by: Tomi Valkeinen
Tomi
https://bugzilla.kernel.org/show_bug.cgi?id=194731
--- Comment #6 from Janpieter Sollie (janpieter.sol...@dommel.be) ---
I know, but isn't it possible that the error is with DRM and not with the
driver?
if not, sorry for reporting a wrong bug
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On 01/03/17 11:00 AM, Michael Zoran wrote:
> On Wed, 2017-03-01 at 10:48 +0900, Michel Dänzer wrote:
>> On 01/03/17 12:45 AM, Michael Zoran wrote:
>>> On Tue, 2017-02-28 at 16:42 +0900, Michel Dänzer wrote:
On 24/02/17 10:54 AM, Michael Zoran wrote:
> Commonly used desktop environments
On Wed, 2017-03-01 at 10:48 +0900, Michel Dänzer wrote:
> On 01/03/17 12:45 AM, Michael Zoran wrote:
> > On Tue, 2017-02-28 at 16:42 +0900, Michel Dänzer wrote:
> > > On 24/02/17 10:54 AM, Michael Zoran wrote:
> > > > Commonly used desktop environments such as xfce4 and gnome
> > > > on debian sid
On 01/03/17 12:45 AM, Michael Zoran wrote:
> On Tue, 2017-02-28 at 16:42 +0900, Michel Dänzer wrote:
>> On 24/02/17 10:54 AM, Michael Zoran wrote:
>>> Commonly used desktop environments such as xfce4 and gnome
>>> on debian sid can flood the graphics drivers with cursor
>>> updates.
>>
>> FWIW,
https://bugzilla.kernel.org/show_bug.cgi?id=194731
--- Comment #5 from Michel Dänzer (mic...@daenzer.net) ---
This bugzilla is only for in-tree code. Also, amdgpu-pro doesn't officially
support 4.10 yet, so this is basically an unsupported configuration.
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Hi Maarten,
Thank you for the patch.
On Thursday 16 Feb 2017 15:47:09 Maarten Lankhorst wrote:
> This is a straightforward conversion that converts all the users of
> get_existing_state in atomic core to use get_old_state or get_new_state
>
> Changes since v1:
> - Fix using the wrong state in
>
Hi Maarten,
Thank you for the patch.
On Thursday 16 Feb 2017 15:47:10 Maarten Lankhorst wrote:
> There are new iterator macros that annotate whether the new or old
> state should be used. This is better than using a state that depends on
> whether it's called before or after swap. For clarity,
Hi Maarten,
Thank you for the patch.
On Thursday 16 Feb 2017 15:47:08 Maarten Lankhorst wrote:
> After atomic commit, these macros should be used in place of
> get_existing_state. Also after commit get_xx_state should no longer
> be used because it may not have the required locks.
>
> The calls
Hi Maarten,
Thank you for the patch.
On Thursday 16 Feb 2017 15:47:07 Maarten Lankhorst wrote:
> This function becomes a lot simpler when having passed both the old and
> new state to it. Looking at all callers, it seems that old_plane_state
> is never NULL so the check can be dropped.
>
>
Hi Maarten,
Thank you for the patch.
On Thursday 16 Feb 2017 15:47:06 Maarten Lankhorst wrote:
> There are new iterator macros that annotate whether the new or old
> state should be used. This is better than using a state that depends on
> whether it's called before or after swap. For clarity,
Fixed the following style issues
drivers/gpu/vga/vga_switcheroo.c:98: WARNING: please, no space before tabs
drivers/gpu/vga/vga_switcheroo.c:99: WARNING: please, no space before tabs
drivers/gpu/vga/vga_switcheroo.c:102: WARNING: please, no space before tabs
drivers/gpu/vga/vga_switcheroo.c:103:
Le 06/02/2017 à 19:27, Boris Brezillon a écrit :
> An HLCDC layers in Atmel's nomenclature is either a DRM plane or a 'Post
> Processing Layer' which can be used to output the results of the HLCDC
> composition in a memory buffer.
>
> atmel_hlcdc_layer.c was designed to be generic enough to be
This is a selection of fixes for recent bugs, the vmwgfx one is
important to avoid a regression, and compat ioctl one is pretty urgent
for stable. Otherwise nothing too much. I've got a separate pull req
for some AST hw IBM need to enable.
Dave.
The following changes since commit
The video processing pipeline on the second output on the GE B850v3:
Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the
Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.
Cc: Laurent Pinchart
Cc: Martyn Welch
Cc: Martin Donnelly
Cc: Javier Martinez Canillas
Cc: Enric
On Thu, Jan 5, 2017 at 7:14 AM, wrote:
> From: Ville Syrjälä
>
> SKL+ display engine can scan out certain kinds of compressed surfaces
> produced by the render engine. This involved telling the display engine
> the location of the
On Tue, Feb 28, 2017 at 10:17 AM, Hoegeun Kwon wrote:
> Hi All,
>
> [Resend this v2 patches, because i have missing TO and CC.]
>
> The dsi + panel is a parental relationship, so OF grpah is not needed.
> Therefore, the current dsi_parse_dt function will throw an error,
On 02/27/2017 07:10 PM, Peter Senna Tschudin wrote:
On Wed, Feb 01, 2017 at 04:17:21PM +0530, Archit Taneja wrote:
Hi Archit,
Hi,
Some minor comments:
Thank you for the review!
On 01/28/2017 07:51 PM, Peter Senna Tschudin wrote:
The video processing pipeline on the second output on
On 28 February 2017 at 19:35, Al Viro wrote:
> On Tue, Feb 28, 2017 at 10:01:10AM +0100, Daniel Vetter wrote:
>
>> > + ret = get_user_pages_unlocked((unsigned long)xfer->mem_addr,
>> > + vsg->num_pages, vsg->pages,
>> > +
On Tue, 2017-02-28 at 16:42 +0900, Michel Dänzer wrote:
> On 24/02/17 10:54 AM, Michael Zoran wrote:
> > Commonly used desktop environments such as xfce4 and gnome
> > on debian sid can flood the graphics drivers with cursor
> > updates.
>
> FWIW, this has nothing to do with the desktop
The video processing pipeline on the second output on the GE B850v3:
Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the
On Tue, Feb 28, 2017 at 10:01:10AM +0100, Daniel Vetter wrote:
> > + ret = get_user_pages_unlocked((unsigned long)xfer->mem_addr,
> > + vsg->num_pages, vsg->pages,
> > + (vsg->direction == DMA_FROM_DEVICE) ? FOLL_WRITE : 0);
Umm... Why not
ret =
On 02/28/2017 06:57 AM, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
channel video format. Rockchip's vop support this video format(little
endian only) as the input video format.
P016 is a
Devicetree binding documentation for the second video output
of the GE B850v3:
STDP4028-ge-b850v3-fw bridges (LVDS-DP)
STDP2690-ge-b850v3-fw bridges (DP-DP++)
Added entry for MegaChips at:
Documentation/devicetree/bindings/vendor-prefixes.txt
Cc: Laurent Pinchart
This is a set of changes to enable the AST2500 BMC hardware, and also
fix some bugs interacting with the older AST hardware.
Some of the bug fixes are cc'ed to stable.
Dave.
The following changes since commit 45554b2357d5782497e59f09146cc3636d6ad551:
Merge tag 'trace-v4.11-2' of
Add MAINTAINERS entry for the second video output of the GE B850v3:
STDP4028-ge-b850v3-fw bridges (LVDS-DP)
STDP2690-ge-b850v3-fw bridges (DP-DP++)
Cc: Laurent Pinchart
Cc: Martyn Welch
Cc: Martin Donnelly
Daniel Vetter writes:
> I want to split up a few more things and document some details better
> (like how exactly to subclass drm_atomic_state). And maybe also split
> up the helpers a bit per-topic, but this should be a ok-ish start for
> better atomic overview.
>
> One
Daniel Vetter writes:
> Resulted in confusion a few times in the past.
>
> Cc: Laurent Pinchart
> Cc: Manasi Navare
> Signed-off-by: Daniel Vetter
> ---
>
Daniel Vetter writes:
> First overview text (if there is any), then headers (since generally
> you want to start out with the data structures), then all the other
> stuff with functions.
>
> Most of this is pre-shpinx, since with the old docbook only the
"sphinx"
From: Clint Taylor
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
channel video format. Rockchip's vop support this video format(little
endian only) as the input video format.
P016 is a planar 4:2:0 YUV 12 bits per channel
P016 is a planar 4:2:0
On 17-02-28 12:18:39, Jason Ekstrand wrote:
On Thu, Jan 5, 2017 at 7:14 AM, wrote:
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the
On 17-02-28 12:18:39, Jason Ekstrand wrote:
On Thu, Jan 5, 2017 at 7:14 AM, wrote:
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the
Michael Zoran writes:
> Commonly used desktop environments such as xfce4 and gnome
> on debian sid can flood the graphics drivers with cursor
> updates. Because the current implementation is waiting
> for a vblank between cursor updates, this will cause the
> display to
Daniel Vetter writes:
> On Mon, Feb 27, 2017 at 12:11:40PM -0800, Eric Anholt wrote:
>> danvet asked me a while ago to try generating documentation with the
>> new RST-based infrastructure. I had a couple of hours to do some
>> editing, so here it is.
>>
>> So far I'm not
On Tue, Feb 28, 2017 at 1:55 PM, Joe Perches wrote:
> Use a more common logging style.
>
> Miscellanea:
>
> o Coalesce formats and realign arguments
> o Neaten a few macros now using pr_
>
> Signed-off-by: Joe Perches
For the gma500 changes:
Acked-by: Patrik
On Tue, 28 Feb 2017 20:36:57 +0100
Daniel Vetter wrote:
> It's still just an experiment, but one lesson learned from drm-misc is
> that not updating MAINTAINERS just leads to confusion. And this is
> easy to revert.
>
> Cc: Boris Brezillon
Daniel Vetter writes:
> It's still just an experiment, but one lesson learned from drm-misc is
> that not updating MAINTAINERS just leads to confusion. And this is
> easy to revert.
>
> Cc: Boris Brezillon
> Cc: Mark Yao
Daniel Vetter writes:
> Let's make sure that review doesn't go through needless cycles. Diff
> doesn't show this, but this is only for the "small drivers" part of
> drm.
>
> Acked-by: Boris Brezillon
> Acked-by: Jani Nikula
For drm/vmwgfx: Acked-by: Sinclair Yeh
On Tue, Feb 28, 2017 at 04:55:54AM -0800, Joe Perches wrote:
> Use a more common logging style.
>
> Miscellanea:
>
> o Coalesce formats and realign arguments
> o Neaten a few macros now using pr_
>
> Signed-off-by: Joe Perches
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6cd8945b9094..e55a648e77ec 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -4174,7 +4174,7 @@ F: drivers/gpu/drm/bridge/
> DRM DRIVER FOR BOCHS VIRTUAL GPU
> M: Gerd Hoffmann
> L:
It's still just an experiment, but one lesson learned from drm-misc is
that not updating MAINTAINERS just leads to confusion. And this is
easy to revert.
Cc: Boris Brezillon
Cc: Mark Yao
Cc: Eric Anholt
Cc: Gerd
On Tue, Feb 28, 2017 at 7:55 AM, Joe Perches wrote:
> Use a more common logging style.
>
> Miscellanea:
>
> o Coalesce formats and realign arguments
> o Neaten a few macros now using pr_
>
> Signed-off-by: Joe Perches
for drm/msm part:
Acked-by: Rob Clark
On Tue, 28 Feb 2017 13:59:16 +0100
Hans de Goede wrote:
> Document the DSI panel enable / disable sequences from the spec,
> for easy comparison between the code and the spec.
>
> Signed-off-by: Hans de Goede
> Acked-by: Jani Nikula
Resulted in confusion a few times in the past.
Cc: Laurent Pinchart
Cc: Manasi Navare
Signed-off-by: Daniel Vetter
---
Documentation/gpu/drm-kms.rst | 22 ++
1 file changed, 22
I want to split up a few more things and document some details better
(like how exactly to subclass drm_atomic_state). And maybe also split
up the helpers a bit per-topic, but this should be a ok-ish start for
better atomic overview.
One thing I failed at is getting DOT to layout the overview
We already had a super-short blurb, but worth extending it I think:
We're still pretty far away from anything like a consensus, but
there's clearly a lot of people who prefer an as-light as possible
approach to converting existing .txt files to .rst. Make sure this is
properly taken into account
First overview text (if there is any), then headers (since generally
you want to start out with the data structures), then all the other
stuff with functions.
Most of this is pre-shpinx, since with the old docbook only the
overview stuff was pulled in directly. Everything else was put in a
Oh, the shiny and pretties!
Cc: Laurent Pinchart
Signed-off-by: Daniel Vetter
---
Documentation/gpu/drm-kms-helpers.rst | 4 ++
Documentation/gpu/drm-kms.rst | 132 ++
2 files changed, 136
Hi all,
Finally gotten around to polish and flush these out. I think Markus'
kfigure/kimage/krender support is now simplified a lot (at least as much as I
managed with my python/sphinx noob-ness), and also rebase the doc patch about
the light markup approach we've discussed a while ago.
From: Markus Heiser
This patch brings scalable figure, image handling and a concept to
embed *render* markups:
* DOT (http://www.graphviz.org)
* SVG
For image handling use the 'image' replacement::
.. kernel-image:: svg_image.svg
:alt:simple SVG
https://bugzilla.kernel.org/show_bug.cgi?id=193341
--- Comment #8 from Alex Deucher (alexdeuc...@gmail.com) ---
Make sure your kernel has this patch:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c10c8f7c27103bd7ac02d041d9d6e97296d48fc1
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On Tue, Feb 28, 2017 at 03:12:35PM +0100, Philipp Zabel wrote:
> Some hardware can read the alpha components separately and then
> conditionally fetch color components only for non-zero alpha values.
> This patch adds fourcc definitions for two-plane RGB formats with an
> 8-bit alpha channel on a
https://bugzilla.kernel.org/show_bug.cgi?id=193341
--- Comment #7 from stefan.ko...@um.si ---
Created attachment 254989
--> https://bugzilla.kernel.org/attachment.cgi?id=254989=edit
Dmesg of 4.10.1-1-ARCH #1 SMP PREEMPT Sun Feb 26 21:08:53 UTC 2017 x86_64
GNU/Linux
I'm not sure if all
On 02/28/2017 02:58 AM, ayaka wrote:
On 02/28/2017 06:57 AM, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
channel video format. Rockchip's vop support this video format(little
endian only)
Hi,
> Patches look good, great job. I'll go run some more tests and if all
> goes fine I'll push to drm-misc-next.
Ok, cool, text console, xorg and wayland all work fine without glitches.
Series pushed.
thanks,
Gerd
___
dri-devel mailing list
On Tue, Feb 28, 2017 at 08:08:55AM -0800, Clint Taylor wrote:
> On 02/28/2017 03:56 AM, Ville Syrjälä wrote:
> > On Mon, Feb 27, 2017 at 02:57:58PM -0800, clinton.a.tay...@intel.com wrote:
> >> From: Clint Taylor
> >>
> >> P010 is a planar 4:2:0 YUV with interleaved UV
On 02/28/2017 03:56 AM, Ville Syrjälä wrote:
On Mon, Feb 27, 2017 at 02:57:58PM -0800, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
channel video format. Rockchip's vop support this video
https://bugs.freedesktop.org/show_bug.cgi?id=99850
Samuel Pitoiset changed:
What|Removed |Added
Resolution|--- |FIXED
On Tue, Feb 28, 2017 at 8:11 AM, Andrey Ponomarenko
wrote:
> 27.02.2017, 15:30, "Rob Clark":
>> On Mon, Feb 27, 2017 at 1:41 AM, Andrey Ponomarenko:
>>> 26.02.2017, 22:15, "Daniel Vetter":
On Sun, Feb 26, 2017 at 10:51 AM, Andrey Ponomarenko:
> Hello,
Implement legacy framebuffer ioctl FBIO_WAITFORVSYNC in the generic
framebuffer emulation driver. Legacy framebuffer users like non kms/drm
based OpenGL(ES)/EGL implementations may require the ioctl to
synchronize drawing or buffer flip for double buffering. It is tested on
the i.MX6.
Hi,
This is a respin of the previous serie called "Support fast framebuffer
panning for i.MX6" made by Stefan 6 monthes ago. The imx6 bits have been
removed, and the comments that were made at that time fixed (hopefully).
Let me know what you think,
Maxime
Changes from v3:
- Dropped the
https://bugs.freedesktop.org/show_bug.cgi?id=97590
--- Comment #15 from Alex Deucher ---
(In reply to Vedran Miletić from comment #14)
> (In reply to Adam Bolte from comment #9)
> > The only difference between this patch and the Windows behaviour is with the
> > second
On Tue, Feb 28, 2017 at 03:34:53PM +0100, Pavel Machek wrote:
> Hi!
>
> mplayer stopped working after a while. Dmesg says:
>
> [ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
> usb-:00:1d.0-1.2, CDC Ethernet Device, 22:1b:e4:4e:56:f5
> [ 3190.767227] [drm] GPU HANG: ecode
On Di, 2017-02-28 at 14:29 +0100, Gerd Hoffmann wrote:
> On Mo, 2017-02-27 at 17:43 -0300, Gabriel Krisman Bertazi wrote:
> > Hi,
> >
> > This is a resend of the qxl atomic modesetting patchset to include the
> > reviewed-by tags from Gustavo and rebase on top of the tip of drm-misc-next.
> >
>
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_gem_object_get() and drm_gem_object_put(), as well as an unlocked
variant of the latter, to reference count GEM buffer objects.
Compatibility aliases are added to keep existing
From: Thierry Reding
This series introduces DRM reference counting APIs that are consistent
with other reference counting APIs in the kernel. They are also much
shorter. Compatibility aliases are added to keep existing code working
and will stay in place until all users of
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_property_blob_get() and drm_property_blob_put() to reference count
DRM blob properties.
Compatibility aliases are added to keep existing code working. To help
speed up the
From: Thierry Reding
Subsequent patches will introduce reference counting APIs that are more
consistent with similar APIs throughout the Linux kernel. These APIs use
the _get() and _put() suffixes and will collide with this existing
function.
Rename the function to
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_connector_get() and drm_connector_put() functions to reference count
connectors.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_framebuffer_get() and drm_framebuffer_put() to reference count DRM
framebuffers.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all
From: Thierry Reding
Currently the functions that initialize and tear down a connector
iterator use the _get() and _put() suffixes. However, these suffixes
are typically used by reference counting functions.
Make these function names a little more consistent by changing the
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_mode_object_get() and drm_mode_object_put() to reference count DRM
mode objects.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all
Hi!
mplayer stopped working after a while. Dmesg says:
[ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
usb-:00:1d.0-1.2, CDC Ethernet Device, 22:1b:e4:4e:56:f5
[ 3190.767227] [drm] GPU HANG: ecode 6:0:0xbb409fff, in chromium
[4597], reason: Hang on render ring, action: reset
On Tue, Feb 28, 2017 at 4:07 AM, Yannick FERTRE wrote:
> On 02/24/2017 03:06 PM, Rob Herring wrote:
>> On Fri, Feb 24, 2017 at 2:18 AM, Yannick FERTRE
>> wrote:
>>> On 02/21/2017 03:07 PM, Rob Herring wrote:
On Mon, Feb 20, 2017 at 5:01 AM,
From: Lucas Stach
This has never worked properly, as the IRQ got retriggered immediately
on unmask. Remove the IRQ wait dance, as it is apparently safe to disable
the DC channel at any point in time.
Signed-off-by: Lucas Stach
Signed-off-by:
When disabling the foreground DP channel during a modeset, the DC is
already disabled without waiting for end of frame. There is no reason
to wait for a frame boundary before updating the DP registers in that
case.
Add support to apply updates immediately. No functional changes, yet.
Hi,
third try. This time I've removed the drm_atomic_helper_wait_for_vblanks
call from imx_drm_commit_tail unless there are planes to be disabled.
Also the drm_atomic_helper_cleanup_planes call is removed, as that is
a no-op for CMA framebuffer based drivers.
This series fixes an issue with the
drm_atomic_helper_cleanup_planes only calls the cleanup_fb plane
helpers, which we don't implement as a CMA framebuffer based driver.
There is no reason to wait for vblanks in commit_tail only to do nothing
afterwards.
Signed-off-by: Philipp Zabel
---
Changes since v2:
-
The DP (display processor) channel disable code tried to busy wait for
the DP sync flow end interrupt status bit when disabling the partial
plane without a full modeset. That never worked reliably, and it was
disabled completely by the recent "gpu: ipu-v3: remove IRQ dance on DC
channel disable"
The IPUv3 can read 8-bit alpha values from a separate plane buffer using
a companion IDMAC channel driven by the Alpha Transparency Controller
(ATC) for the graphics channels. The conditional read mechanism allows
to reduce memory bandwidth by skipping reads of color data for
completely
Some hardware can read the alpha components separately and then
conditionally fetch color components only for non-zero alpha values.
This patch adds fourcc definitions for two-plane RGB formats with an
8-bit alpha channel on a second plane.
Signed-off-by: Philipp Zabel
Allow to calculate EBA for planes other than plane 0. This is in
preparation for the following patch, which adds support for separate
alpha planes.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/imx/ipuv3-plane.c | 16
1 file changed, 8 insertions(+),
The IPUv3 can read 8-bit alpha values from a separate IDMAC channel driven
by the Alpha Transparency Controller (ATC) for the graphics IDMAC channels.
This allows to reduce memory bandwidth via a conditional read mechanism or
to support planar YUV formats with alpha transparency.
Signed-off-by:
On Tue, Feb 28, 2017 at 04:55:51AM -0800, Joe Perches wrote:
> Broken up for Daniel Vetter
Thanks, I applied the core patch (needed a minor resolution in
drm_edid.c). I'll wait with the driver patch for a few more acks maybe,
and leave the 2 other patches to Alex for picking up directly.
Thanks,
On Mo, 2017-02-27 at 17:43 -0300, Gabriel Krisman Bertazi wrote:
> Hi,
>
> This is a resend of the qxl atomic modesetting patchset to include the
> reviewed-by tags from Gustavo and rebase on top of the tip of drm-misc-next.
>
> This series implements support for Atomic Modesetting in the QXL
On Tue, Feb 28, 2017 at 12:50:57PM +, Daniel Stone wrote:
> Hi,
>
> On 28 February 2017 at 12:36, Boris Brezillon
> wrote:
> > @@ -54,6 +54,13 @@ This will also check out the latest maintainer-tools
> > branches, so please replace
> > the dim you just
On Tue, 2017-02-28 at 12:45 +0100, Daniel Vetter wrote:
> On Tue, Feb 28, 2017 at 10:59:54AM +0100, Philipp Zabel wrote:
> > On Mon, 2017-02-27 at 17:25 +0100, Daniel Vetter wrote:
> > > On Mon, Feb 27, 2017 at 02:14:57PM +0100, Philipp Zabel wrote:
> > > > Disabling planes will consist of two
27.02.2017, 15:30, "Rob Clark":> On Mon, Feb 27, 2017 at 1:41 AM, Andrey Ponomarenko:>> 26.02.2017, 22:15, "Daniel Vetter":>>> On Sun, Feb 26, 2017 at 10:51 AM, Andrey Ponomarenko: Hello, I'd like to present the ABI Navigator project to search for binary symbols (functions,
According to the spec we should call MIPI_SEQ_TEAR_ON and DISPLAY_ON
on enable for cmd-mode, just like we already call their counterparts
on disable. Note: untested, my panel is a vid-mode panel.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
For v3 VBTs in vid-mode the delays are part of the VBT sequences, so
we should not also delay ourselves otherwise we get double delays.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c | 19
For v3+ VBTs we should call MIPI_SEQ_TEAR_OFF before MIPI_SEQ_DISPLAY_OFF,
v2 VBTs do not have MIPI_SEQ_TEAR_OFF so there this is a nop.
Signed-off-by: Hans de Goede
---
Changes in v2:
-Only call MIPI_SEQ_TEAR_OFF in cmd mode
---
drivers/gpu/drm/i915/intel_dsi.c | 2 ++
1
Execute MIPI_SEQ_DEASSERT_RESET before putting the device in ready
state (LP-11), this is the sequence in which things should be done
according to the spec.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c |
Execute the MIPI_SEQ_BACKLIGHT_ON/OFF VBT sequences at the same time as
we call intel_panel_enable_backlight() / intel_panel_disable_backlight().
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
Changes in v2:
-Drop meaningless code-comments
According to the spec for v2 VBTs we should call MIPI_SEQ_DISPLAY_OFF
before sending SHUTDOWN, where as for v3 VBTs we should send SHUTDOWN
first.
Since the v2 order has known issues, we use the v3 order everywhere,
add a comment documenting this.
Signed-off-by: Hans de Goede
intel_dsi_post_disable(), which does the MIPI_SEQ_ASSERT_RESET,
will always be called at some point before intel_dsi_pre_enable()
making the MIPI_SEQ_ASSERT_RESET in intel_dsi_pre_enable() redundant.
In addition, calling MIPI_SEQ_ASSERT_RESET in the enable path goes
against the VBT spec.
Now that we are no longer bound to the drm_panel_ callbacks, call
MIPI_SEQ_POWER_ON/OFF at the proper place.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c | 10 --
1 file changed, 4 insertions(+),
Move the DPOunit clock gate workaround to directly after the PLL enable.
The exact location of the workaround does not matter and there are 2
reasons to group it with the PLL enable:
1) This moves it out of the middle of the init sequence from the spec,
making it easier to follow the init
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