On Mon, 09 Jul 2018, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
> ---
> drivers/video/backlight/adp8860_bl.c | 1 +
> 1 file changed, 1 insertion(+)
Looks
On Wed, 4 Jul 2018, Noralf Trønnes wrote:
> AFAIU calling unregister_framebuffer() with open fd's is just fine as
> long as fb_info with buffers stay intact. All it does is to remove the
> fbX from userspace. Cleanup can be done in fb_ops->fb_destroy.
>
> I have been working on generic fbdev
On Wed, 4 Jul 2018, Bartlomiej Zolnierkiewicz wrote:
> On Tuesday, July 03, 2018 01:18:57 PM Mikulas Patocka wrote:
> >
> > On Tue, 3 Jul 2018, Bartlomiej Zolnierkiewicz wrote:
> >
> > > Hi,
> > >
> > > On Sunday, June 03, 2018 11:46:29 AM Mikulas Patocka wrote:
> > > > I have a USB display
Hey Linus,
School holidays here, and I'm not sure if I'll be inclined to work
until next week, (I might and if so there might be another fixes), but
thought it best to just dequeue the bits I had now. Otherwise the rest
of the fixes for rc5 might arrive just before rc5 or just after.
This just
On Mon, 9 Jul 2018 18:25:09 +0200 Daniel Vetter wrote:
> To avoid compilers complainig about ambigious else blocks when putting
> an if condition into a for_each macro one needs to invert the
> condition and add a dummy else. We have a nice little convenience
> macro for that in drm headers,
On Mon, Jul 09, 2018 at 10:36:48AM +0200, Daniel Vetter wrote:
> Avoids the inverted condition compared to the open-coded version.
>
> Signed-off-by: Daniel Vetter
> Cc: Bjorn Helgaas
> Cc: linux-...@vger.kernel.org
Acked-by: Bjorn Helgaas
I assume you'll merge this with the rest of the
On Mon, Jul 9, 2018 at 6:11 PM, Daniel Vetter wrote:
> Avoids the inverted condition compared to the open coded version.
>
> Signed-off-by: Daniel Vetter
> Cc: "Rafael J. Wysocki"
> Cc: Viresh Kumar
> Cc: linux...@vger.kernel.org
> Cc: Eric Engestrom
> --
> v2: Fix the logic fumble in the 2nd
On Wed, Jun 27, 2018 at 02:10:09PM +0530, Ramalingam C wrote:
> On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link
> integrity check for the HDCP version that is enabled.
>
> v2:
> Rebased. Function name is changed.
> v3:
> No Changes.
> v4:
> No Changes.
> v5:
> No Changes.
>
On Wed, Jun 27, 2018 at 02:10:08PM +0530, Ramalingam C wrote:
> HDCP check link is invoked only on CP_IRQ detection, instead of all
> short pulses.
>
> v3:
> No Changes.
> v4:
> Added sean in cc and collected the reviewed-by received.
> v5:
> No Change.
>
> Signed-off-by: Ramalingam C
On Wed, Jun 27, 2018 at 02:10:02PM +0530, Ramalingam C wrote:
> Implements a sequence of enabling and disabling the HDCP2.2
> (auth and encryption).
This is really hard to review, since all I see are stubs. I'd much rather have
each patch do something useful, instead of just call stubs. That
On Wed, Jun 27, 2018 at 02:10:01PM +0530, Ramalingam C wrote:
> When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
> enabled.
>
Just squash this into patch 11, no need for a separate patch.
> v2:
> Rebased.
> v3:
> No Changes.
> v4:
> Reviewed-by is collected.
> v5:
> No
On Wed, Jun 27, 2018 at 02:10:00PM +0530, Ramalingam C wrote:
> Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
> supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
>
> v2:
> Included few optimization suggestions [Chris Wilson]
> Commit message is updated as per the
On Wed, Jun 27, 2018 at 02:09:59PM +0530, Ramalingam C wrote:
> For reusability purpose, this patch implements the hdcp1.4 bksv's
> read and validation as a functions.
>
> For detecting the HDMI panel's HDCP capability this fucntions will be
> used.
>
> v2:
> Rebased.
> v3:
> No Changes.
>
On Wed, Jun 27, 2018 at 02:09:58PM +0530, Ramalingam C wrote:
> As a preparation for making the intel_hdcp_enable as common function
> for both HDCP1.4 and HDCP2.2, HDCP1.4 check_link scheduling is moved
> into _intel_hdcp_enable() function.
>
> v3:
> No Changes.
> v4:
> Style fix.
> v5:
>
On Wed, Jun 27, 2018 at 02:09:56PM +0530, Ramalingam C wrote:
> Intel HDCP2.2 registers are defined with addr offsets and bit details.
>
> v2:
> Replaced the arith calc with _PICK [Sean Paul]
> v3:
> No changes.
> v4:
> %s/HDCP2_CTR_DDI/HDCP2_CTL_DDI [Uma]
> v5:
> Added parentheses for
On Wed, Jun 27, 2018 at 02:09:55PM +0530, Ramalingam C wrote:
> For upcoming implementation of HDCP2.2 in I915, important variable
> required for HDCP2.2 are defined.
Please just introduce them when you use them. I can't provide useful review on
this patch unless I can see how the variables are
On Wed, Jun 27, 2018 at 02:09:54PM +0530, Ramalingam C wrote:
> Considering significant number of HDCP specific variables, it will
> be clean to have separate struct for HDCP.
>
> New structure called intel_hdcp is added within intel_connector.
>
> v2:
> struct hdcp statically allocated. [Sean
On Wed, Jun 27, 2018 at 02:09:51PM +0530, Ramalingam C wrote:
> This patch adds HDCP register definitions for HDMI and DP HDCP
> adaptations.
>
> HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h,
> where as HDCP2.2 register offsets in DPCD offsets are defined at
>
On Wed, Jun 27, 2018 at 02:09:50PM +0530, Ramalingam C wrote:
> This patch defines the hdcp2.2 protocol messages for authentication.
>
> v2:
> bit_fields are removed. Instead bitmasking used. [Tomas and Jani]
> prefix HDCP_2_2_ is added to the macros. [Tomas]
> v3:
> No Changes.
> v4:
>
On Mon, Jul 9, 2018 at 2:35 PM, Sean Paul wrote:
> On Mon, Jul 09, 2018 at 12:07:11PM -0600, Rob Herring wrote:
>> On Mon, Jul 9, 2018 at 11:40 AM Sean Paul wrote:
>> >
>> > Signed-off-by: Sean Paul
>> > ---
>> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 194 +++
>> > 1
On Mon, Jul 09, 2018 at 12:07:11PM -0600, Rob Herring wrote:
> On Mon, Jul 9, 2018 at 11:40 AM Sean Paul wrote:
> >
> > Signed-off-by: Sean Paul
> > ---
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 194 +++
> > 1 file changed, 194 insertions(+)
> >
> > diff --git
https://bugs.freedesktop.org/show_bug.cgi?id=107065
--- Comment #18 from Andrey Grodzovsky ---
(In reply to dwagner from comment #17)
> Interesting observation: If I first switch from the X11 display to the
> console display (with Alt-F2), and then enter "echo mem >/sys/power/state"
> on the
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:
> Hi,
>
> On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
> > On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
> >> On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
> >> different frequency then the
https://bugs.freedesktop.org/show_bug.cgi?id=107153
--- Comment #5 from Patrik Kullman ---
For reference, they seem to reference the same line and is vanilla compared to
Ubuntu-kernels:
https://github.com/torvalds/linux/blob/v4.18-rc3/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c#L4784
On Mon, Jul 9, 2018 at 11:40 AM Sean Paul wrote:
>
> Signed-off-by: Sean Paul
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 194 +++
> 1 file changed, 194 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>
On Mon, Jul 9, 2018 at 6:12 PM, Mark Rutland wrote:
> On Mon, Jul 09, 2018 at 06:03:42PM +0200, Peter Zijlstra wrote:
>> On Mon, Jul 09, 2018 at 05:52:04PM +0200, Daniel Vetter wrote:
>> > for_each_something(foo)
>> > if (foo->bla)
>> > call_bla(foo);
>> > else
>> >
Hi,
On 07/09/2018 07:37 PM, Rodrigo Vivi wrote:
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:
Hi,
On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
On BYT and CHT the GOP sometimes initializes the pclk at a
Signed-off-by: Sean Paul
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 194 +++
1 file changed, 194 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index cdaabeb3c995..339afed856de 100644
---
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:
> Hi,
>
> On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
> > On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
> > > On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
> > > different frequency then the
From: Jeykumar Sankaran
Adds bindings for Snapdragon 845 display processing unit
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Rajesh Yadav
Signed-off-by: Sean Paul
---
.../devicetree/bindings/display/msm/dpu.txt | 128 ++
1 file changed, 128 insertions(+)
create mode
From: Jeykumar Sankaran
This is needed by the dpu driver
Signed-off-by: Jeykumar Sankaran
[seanpaul split from the dpu megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 9 +
drivers/gpu/drm/msm/msm_kms.h | 1 +
2 files changed, 10 insertions(+)
diff --git
From: Jeykumar Sankaran
Used by the dpu driver for custom suspend/resume.
Signed-off-by: Jeykumar Sankaran
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 10 ++
drivers/gpu/drm/msm/msm_kms.h | 3 +++
2 files changed, 13
From: Jeykumar Sankaran
Called right before wait_for_commit_done() to perform kickoff for
active crtcs.
Signed-off-by: Jeykumar Sankaran
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_atomic.c | 5 +
drivers/gpu/drm/msm/msm_kms.h| 1 +
From: Jeykumar Sankaran
dpu uses these elsewhere in the driver (in addition to increasing
MAX_PLANES, that'll come later), so pull them out into #define.
Signed-off-by: Jeykumar Sankaran
[seanpaul pulled this out of the dpu megapatch]
Signed-off-by: Sean Paul
---
From: Jeykumar Sankaran
This simplifies cleanup, to make sure nothing drops out in case of
error.
Signed-off-by: Jeykumar Sankaran
[seanpaul split out of dpu megapatch and renamed labels]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 44 +--
1
From: Abhinav Kumar
Make the pclk_rate u64 to accommodate higher pixel clock
rates.
Changes in v4:
- fixed commit message
Signed-off-by: Abhinav Kumar
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
From: Jeykumar Sankaran
Useful for incoming DPU support
Signed-off-by: Jeykumar Sankaran
[seanpaul split this from the dpu megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
I missed this during the atomic conversion
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 4
drivers/gpu/drm/msm/msm_drv.h | 1 -
2 files changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 9c760cee5156..b73acdd52931
From: Rajesh Yadav
SoCs having mdp5 or dpu have identical tree like
device hierarchy where MDSS top level wrapper manages
common power resources for all child devices.
Subclass msm_mdss so that msm_mdss includes common defines
and mdp5/dpu mdss derivations to include any extensions.
Add mdss
From: Jeykumar Sankaran
Enable drm core zpos normalization for planes.
changes in v2:
- none
changes in v3:
- rebased on https://gitlab.freedesktop.org/seanpaul/
dpu-staging/commit/481d29d31cd629fd216381b53de5695f645465d5
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean
From: Rajesh Yadav
postdiv_lock spinlock was used before initialization
for 10nm pll. It causes following spin_bug:
"BUG: spinlock bad magic on CPU#0".
Initialize spinlock before its usage.
Signed-off-by: Rajesh Yadav
Signed-off-by: Sean Paul
---
From: Chandan Uddaraju
Current DSI driver uses two connectors for dual DSI case even
though we only have one panel. Fix this by implementing one
connector/bridge for dual DSI use case. Use master DSI
controllers to register one connector/bridge.
Changes in V2:
-Removed Change-Id from the
DPU doesn't use this, so push it into the mdp drivers.
Signed-off-by: Sean Paul
Signed-off-by: Rajesh Yadav
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 2 ++
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 2 ++
drivers/gpu/drm/msm/msm_atomic.c | 2 --
3 files changed, 4 insertions(+), 2
From: Chandan Uddaraju
For dual dsi mode, the horizontal timing needs
to be divided by half since both the dsi controllers
will be driving this panel. Adjust the pixel clock and
DSI timing accordingly.
Changes in V2:
--Removed Change-Id from the commit text tags.
Changes in V3:
--Instead of
From: Jeykumar Sankaran
Qualcomm Snapdragon chipsets uses compressed format
to optimize BW across multiple IP's. This change adds
needed modifier support in drm for a simple 4x4 tile
based compressed variants of base formats.
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
From: vkorjani
After enabling DSC we need to send compression mode command packet
and pps data packet, for which 2 new data types are added
07h Compression Mode Data Type Write , short write, 2 parameters
0Ah PPS Long Write (word count determines number of bytes)
This patch adds support to
From: Taniya Das
Add device tree bindings for display clock controller for Qualcomm
Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
Reviewed-by: Rob Herring
Signed-off-by: Sean Paul
---
.../devicetree/bindings/clock/qcom,dispcc.txt | 19
From: Jeykumar Sankaran
Adds mdp transfer time to msm dsi binding
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Rajesh Yadav
Signed-off-by: Sean Paul
---
.../devicetree/bindings/display/msm/dsi.txt | 16
1 file changed, 16 insertions(+)
diff --git
Hello again,
Well, here's the driver for QC SDM845 DPU support that I sent out in February,
this time without the RFC safety net. We've been busy since then, here's what
we've been up to!
We've seen 184 unique patches from 8 people sent to the list to prepare the
driver, here are the diffstat
On Wed, May 23, 2018 at 11:25:02AM +0200, Marco Felsch wrote:
> This serie adds support for the DLC Display Co. DLC0700YZG-1 7.0" WSVGA
> TFT LCD panel. The customer isn't listed as vendor so we have to add the
> vendor prefix too.
>
> Philipp Zabel (2):
> dt-bindings: Add vendor prefix for DLC
On Tue, Jun 19, 2018 at 11:55:43AM +0200, jan.tu...@emtrion.com wrote:
> From: Jan Tuerk
>
> Document the Emerging Display Technology Corp. (EDT) using the
> simple-panel binding in one single file.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Jan Tuerk
> ---
>
On Thu, Jun 07, 2018 at 07:16:48PM +0530, Jagan Teki wrote:
> This adds support for the Rocktech Display Ltd. RK070ER9427
> 800(RGB)x480 TFT LCD panel, which can be supported by the
> simple panel driver.
>
> Signed-off-by: Jagan Teki
> Reviewed-by: Rob Herring
> ---
> Changes for v2:
> -
On Mon, 09 Jul 2018 18:05:09 +0200,
Qu, Jim wrote:
>
> Hi Takashi,
>
> Not intel, but it is AMD APU+ AMD GFX, the APU has a local HDMI port for
> extension. And dGPU is only for offloading render via PRIME.
>
> Originally, the HDA driver before v4.17, there is a bug, that all the audio
> is
On Mon, 09 Jul 2018 18:03:48 +0200,
Alex Deucher wrote:
>
> On Mon, Jul 9, 2018 at 11:57 AM, Takashi Iwai wrote:
> > On Mon, 09 Jul 2018 17:53:19 +0200,
> > Qu, Jim wrote:
> >>
> >> Hi All,
> >>
> >> Here, I want to clarify the audio device is bound to iGPU. There is no
> >> audio codec for
On Mon, 09 Jul 2018 18:15:32 +0200,
Alex Deucher wrote:
>
> On Mon, Jul 9, 2018 at 12:06 PM, Lukas Wunner wrote:
> > On Mon, Jul 09, 2018 at 05:52:49PM +0200, Takashi Iwai wrote:
> >> On Mon, 09 Jul 2018 17:47:34 +0200, Lukas Wunner wrote:
> >> > Since v4.17, every time the GPU is powered up,
On Mon, Jul 09, 2018 at 05:48:18PM +0200, Arnd Bergmann wrote:
> Without this, we get link errors during randconfig build:
>
> drivers/gpu/drm/vkms/vkms_drv.o:(.rodata+0xa0): undefined reference to
> `drm_atomic_helper_check'
> drivers/gpu/drm/vkms/vkms_drv.o:(.rodata+0xa8): undefined reference
https://bugs.freedesktop.org/show_bug.cgi?id=107168
--- Comment #5 from Alex Deucher ---
(In reply to Paul Menzel from comment #4)
> (In reply to Alex Deucher from comment #3)
> > (In reply to Paul Menzel from comment #2)
> > > (In reply to Alex Deucher from comment #1)
> > > > You need the
On Wed, Jul 04, 2018 at 06:53:02PM +0530, Archit Taneja wrote:
>
>
> On Wednesday 04 July 2018 12:28 AM, Rob Clark wrote:
> > On Tue, Jul 3, 2018 at 12:56 PM, Sean Paul wrote:
> > > The bridge loses its hw state when the cable is unplugged. If we detect
> > > this case in the hpd handler, reset
https://bugs.freedesktop.org/show_bug.cgi?id=107168
--- Comment #4 from Paul Menzel ---
(In reply to Alex Deucher from comment #3)
> (In reply to Paul Menzel from comment #2)
> > (In reply to Alex Deucher from comment #1)
> > > You need the firmware for initialization.
> >
> > What’s the
On Mon, Jul 09, 2018 at 05:52:04PM +0200, Daniel Vetter wrote:
> for_each_something(foo)
> if (foo->bla)
> call_bla(foo);
> else
> call_default(foo);
Note that the kernel coding style 'discourages' this style and would
like you to write:
https://bugs.freedesktop.org/show_bug.cgi?id=107154
--- Comment #8 from freedesktop@nentwig.biz ---
Created attachment 140528
--> https://bugs.freedesktop.org/attachment.cgi?id=140528=edit
dmesg 4.14 LTS
Sorry, forgot about the requested 4.14 dmesg log. Attached as well.
This is: boot,
https://bugs.freedesktop.org/show_bug.cgi?id=107168
--- Comment #3 from Alex Deucher ---
(In reply to Paul Menzel from comment #2)
> (In reply to Alex Deucher from comment #1)
> > You need the firmware for initialization.
>
> What’s the technical reason for this. Why can’t certain parts of the
To avoid compilers complainig about ambigious else blocks when putting
an if condition into a for_each macro one needs to invert the
condition and add a dummy else. We have a nice little convenience
macro for that in drm headers, let's move it out. Subsequent patches
will roll it out to other
On Mon, Jul 9, 2018 at 12:06 PM, Lukas Wunner wrote:
> On Mon, Jul 09, 2018 at 05:52:49PM +0200, Takashi Iwai wrote:
>> On Mon, 09 Jul 2018 17:47:34 +0200, Lukas Wunner wrote:
>> > Since v4.17, every time the GPU is powered up, the HDA controller is
>> > runtime resumed to PCI_D0. (See the call
https://bugs.freedesktop.org/show_bug.cgi?id=107154
--- Comment #7 from freedesktop@nentwig.biz ---
Sure, attached. AMD staging kernel. I don't know how to tell whether DC=1 is
really enabled, so I did two runs: one with amdgpu.dc=1 as boot parameter and
one with /etc/modprobe.d/ on top of
Avoids the inverted condition compared to the open coded version.
Signed-off-by: Daniel Vetter
Cc: "Rafael J. Wysocki"
Cc: Viresh Kumar
Cc: linux...@vger.kernel.org
Cc: Eric Engestrom
--
v2: Fix the logic fumble in the 2nd hunk, spotted by Eric.
---
include/linux/cpufreq.h | 8 ++--
1
On Mon, Jul 09, 2018 at 05:52:49PM +0200, Takashi Iwai wrote:
> On Mon, 09 Jul 2018 17:47:34 +0200, Lukas Wunner wrote:
> > Since v4.17, every time the GPU is powered up, the HDA controller is
> > runtime resumed to PCI_D0. (See the call to pci_wakeup_bus() in
> > vga_switcheroo_runtime_resume()
Having DRM_SUN4I built-in but DRM_SUN8I_MIXER as a loadable module results in
a link error, as we try to access a symbol from the sun8i_tcon_top.ko module:
ERROR: "sun8i_tcon_top_of_table" [drivers/gpu/drm/sun4i/sun8i-drm-hdmi.ko]
undefined!
ERROR: "sun8i_tcon_top_of_table"
On Mon, Jul 9, 2018 at 6:03 PM, Peter Zijlstra wrote:
> On Mon, Jul 09, 2018 at 05:52:04PM +0200, Daniel Vetter wrote:
>> for_each_something(foo)
>> if (foo->bla)
>> call_bla(foo);
>> else
>> call_default(foo);
>>
>> Totally contrived, but this complains.
On Mon, Jul 09, 2018 at 10:24:19AM -0400, Alex Deucher wrote:
> On Sun, Jul 8, 2018 at 10:31 AM, wrote:
> > Hi,
> >
> > The firmware paths were changed from 'radeon/' to 'amdgpu/' in
> > amd-staging-drm-next, but master of
> > git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
Hi Takashi,
Not intel, but it is AMD APU+ AMD GFX, the APU has a local HDMI port for
extension. And dGPU is only for offloading render via PRIME.
Originally, the HDA driver before v4.17, there is a bug, that all the audio is
set to CLIENT_DIS, so the when the dGPU suspend, the audio which is
https://bugs.freedesktop.org/show_bug.cgi?id=107154
--- Comment #6 from freedesktop@nentwig.biz ---
Created attachment 140526
--> https://bugs.freedesktop.org/attachment.cgi?id=140526=edit
dmesg /etc/modprobe.d/
Booted with amdgpu.dc=1 in /etc/modprobe.d/
--
You are receiving this mail
On Mon, Jul 09, 2018 at 05:52:04PM +0200, Daniel Vetter wrote:
> for_each_something(foo)
> if (foo->bla)
> call_bla(foo);
> else
> call_default(foo);
>
> Totally contrived, but this complains. Liberally sprinkling {} also shuts
> up the compiler, but it's a
On Mon, Jul 9, 2018 at 11:57 AM, Takashi Iwai wrote:
> On Mon, 09 Jul 2018 17:53:19 +0200,
> Qu, Jim wrote:
>>
>> Hi All,
>>
>> Here, I want to clarify the audio device is bound to iGPU. There is no audio
>> codec for dGPU.
>
> I'm confused. So you mean that the HDMI detection on Intel GPU
>
https://bugs.freedesktop.org/show_bug.cgi?id=107154
--- Comment #5 from freedesktop@nentwig.biz ---
Created attachment 140525
--> https://bugs.freedesktop.org/attachment.cgi?id=140525=edit
dmesg amdgpu.dc=1
Booted with amdgpu.dc=1.
--
You are receiving this mail because:
You are the
On 09.07.2018 15:45, Heiko Stuebner wrote:
> Am Dienstag, 3. Juli 2018, 19:07:02 CEST schrieb Andrzej Hajda:
>> On 18.06.2018 12:28, Heiko Stuebner wrote:
>>> From: Nickey Yang
>>>
>>> Allow to also drive a slave dw-mipi-dsi controller in a dual-dsi
>>> setup. This will require additional
https://bugs.freedesktop.org/show_bug.cgi?id=107168
--- Comment #2 from Paul Menzel ---
(In reply to Alex Deucher from comment #1)
> You need the firmware for initialization.
What’s the technical reason for this. Why can’t certain parts of the hardware
be initialized later on?
> Even if the
On Mon, 09 Jul 2018 17:59:00 +0200,
Alex Deucher wrote:
>
> On Mon, Jul 9, 2018 at 11:52 AM, Takashi Iwai wrote:
> > On Mon, 09 Jul 2018 17:47:34 +0200,
> > Lukas Wunner wrote:
> >>
> >> On Mon, Jul 09, 2018 at 05:04:22PM +0200, Takashi Iwai wrote:
> >> > On Mon, 09 Jul 2018 15:58:51 +0200, Alex
On Mon, Jul 9, 2018 at 11:52 AM, Takashi Iwai wrote:
> On Mon, 09 Jul 2018 17:47:34 +0200,
> Lukas Wunner wrote:
>>
>> On Mon, Jul 09, 2018 at 05:04:22PM +0200, Takashi Iwai wrote:
>> > On Mon, 09 Jul 2018 15:58:51 +0200, Alex Deucher wrote:
>> > > On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
On Mon, 09 Jul 2018 17:56:43 +0200,
Daniel Vetter wrote:
>
> On Mon, Jul 09, 2018 at 05:04:22PM +0200, Takashi Iwai wrote:
> > On Mon, 09 Jul 2018 15:58:51 +0200,
> > Alex Deucher wrote:
> > >
> > > On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
> > > > Hi Lukas,
> > > >
> > > > Thanks to your
On Mon, 09 Jul 2018 17:53:19 +0200,
Qu, Jim wrote:
>
> Hi All,
>
> Here, I want to clarify the audio device is bound to iGPU. There is no audio
> codec for dGPU.
I'm confused. So you mean that the HDMI detection on Intel GPU
doesn't work with the hybrid GPUs? And no audio codec on discrete
On Mon, Jul 09, 2018 at 05:04:22PM +0200, Takashi Iwai wrote:
> On Mon, 09 Jul 2018 15:58:51 +0200,
> Alex Deucher wrote:
> >
> > On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
> > > Hi Lukas,
> > >
> > > Thanks to your explanation, and see comments in line.
> > >
> > >
> > > Do you need to
https://bugs.freedesktop.org/show_bug.cgi?id=107168
Alex Deucher changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Hi All,
Here, I want to clarify the audio device is bound to iGPU. There is no audio
codec for dGPU.
Thanks
JimQu
-邮件原件-
发件人: Lukas Wunner
发送时间: 2018年7月9日 23:48
收件人: Takashi Iwai
抄送: Alex Deucher ; alsa-de...@alsa-project.org;
amd-...@lists.freedesktop.org; Qu, Jim ;
On Mon, 09 Jul 2018 17:47:34 +0200,
Lukas Wunner wrote:
>
> On Mon, Jul 09, 2018 at 05:04:22PM +0200, Takashi Iwai wrote:
> > On Mon, 09 Jul 2018 15:58:51 +0200, Alex Deucher wrote:
> > > On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
> > > > > You're saying above that the HDA controller isn't
On Mon, Jul 09, 2018 at 05:12:58PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 09, 2018 at 05:00:07PM +0200, Daniel Vetter wrote:
> > On Mon, Jul 9, 2018 at 12:36 PM, Peter Zijlstra
> > wrote:
> > > On Mon, Jul 09, 2018 at 10:36:49AM +0200, Daniel Vetter wrote:
>
> > >> #define
https://bugs.freedesktop.org/show_bug.cgi?id=107168
Bug ID: 107168
Summary: Allow to load firmware during run-time (after
initialization)
Product: DRI
Version: DRI git
Hardware: Other
OS: All
Without this, we get link errors during randconfig build:
drivers/gpu/drm/vkms/vkms_drv.o:(.rodata+0xa0): undefined reference to
`drm_atomic_helper_check'
drivers/gpu/drm/vkms/vkms_drv.o:(.rodata+0xa8): undefined reference to
`drm_atomic_helper_commit'
On Mon, Jul 09, 2018 at 05:04:22PM +0200, Takashi Iwai wrote:
> On Mon, 09 Jul 2018 15:58:51 +0200, Alex Deucher wrote:
> > On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
> > > > You're saying above that the HDA controller isn't runtime resumed on
> > > > hotplug of a display. Is that necessary
On Monday 09 July 2018 08:40 PM, Daniel Vetter wrote:
On Mon, Jul 09, 2018 at 07:01:09PM +0530, Ramalingam C wrote:
Initialize HDCP2.2 support. This includes the mei interface
initialization along with required component registration.
v2:
mei interface handle is protected with mutex.
This tinydrm driver fails to link without the backlight support:
drivers/gpu/drm/tinydrm/ili9341.o: In function `ili9341_probe':
ili9341.c:(.text+0x578): undefined reference to `devm_of_find_backlight'
Fixes: 3fa0e8f6f960 ("drm/tinydrm: new driver for ILI9341 display panels")
Signed-off-by: Arnd
On Mon, Jul 09, 2018 at 05:00:07PM +0200, Daniel Vetter wrote:
> On Mon, Jul 9, 2018 at 12:36 PM, Peter Zijlstra wrote:
> > On Mon, Jul 09, 2018 at 10:36:49AM +0200, Daniel Vetter wrote:
> >> #define for_each_node_with_cpus(node)\
> >> for_each_online_node(node)
On Mon, Jul 09, 2018 at 07:01:09PM +0530, Ramalingam C wrote:
> Initialize HDCP2.2 support. This includes the mei interface
> initialization along with required component registration.
>
> v2:
> mei interface handle is protected with mutex. [Chris Wilson]
> v3:
> Notifiers are used for the
On Mon, 09 Jul 2018 16:02:48 +0200,
Alex Deucher wrote:
>
> On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
> > Hi Lukas,
> >
> > Thanks to your explanation, and see comments in line.
> >
> >
> > Do you need to runtime resume the HDA controller even if user space isn't
> > streaming audio? Why,
On Mon, 09 Jul 2018 15:58:51 +0200,
Alex Deucher wrote:
>
> On Mon, Jul 9, 2018 at 6:16 AM, Qu, Jim wrote:
> > Hi Lukas,
> >
> > Thanks to your explanation, and see comments in line.
> >
> >
> > Do you need to runtime resume the HDA controller even if user space isn't
> > streaming audio? Why,
On Mon, Jul 9, 2018 at 12:36 PM, Peter Zijlstra wrote:
> On Mon, Jul 09, 2018 at 10:36:49AM +0200, Daniel Vetter wrote:
>> Avoids complaints from gcc about ambiguous else clauses.
>
> Is that a new thing? I'm fairly sure I've never seen it do that,
>
>> Signed-off-by: Daniel Vetter
>> Cc: Andrew
https://bugs.freedesktop.org/show_bug.cgi?id=102322
--- Comment #29 from Andrey Grodzovsky ---
(In reply to dwagner from comment #28)
> (In reply to Michel Dänzer from comment #27)
> > That could be a Mesa issue, anyway it should probably be tracked separately
> > from this report.
>
> Created
On Sun, Jul 8, 2018 at 10:31 AM, wrote:
> Hi,
>
> The firmware paths were changed from 'radeon/' to 'amdgpu/' in
> amd-staging-drm-next, but master of
> git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git is missing
> the files in amdgpu/ for tahiti gpus.
I'm pushing out updated
On Fri, Jul 6, 2018 at 2:46 PM Jernej Škrabec wrote:
>
> Dne petek, 06. julij 2018 ob 22:40:52 CEST je Rob Herring napisal(a):
> > On Fri, Jul 06, 2018 at 07:51:02PM +0200, Jernej Skrabec wrote:
> > > TCON description is expanded with R40 TV TCON compatible. It is a bit
> > > special, because it
On 19.06.2018 10:19, Maciej Purski wrote:
> From: Andrzej Hajda
>
> Add a drm_bridge driver for the Toshiba TC358764 DSI to LVDS bridge.
>
> Signed-off-by: Andrzej Hajda
> Signed-off-by: Maciej Purski
> ---
> drivers/gpu/drm/bridge/Kconfig| 8 +
> drivers/gpu/drm/bridge/Makefile | 1
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