[Bug 108311] Query buffer object support is broken on r600.
https://bugs.freedesktop.org/show_bug.cgi?id=108311 --- Comment #3 from Andrew Wesie --- (In reply to Andrew Wesie from comment #2) > (In reply to Dave Airlie from comment #1) > > Created attachment 141989 [details] [review] [review] > > set larger alignment for tmp buffer offset > > > > Does this patch work as an alternate? > > It looks like it should work but I'll test it with real hw. > I confirmed the new patch fixes the bug with my test gpu (HD 5700 series). -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #9 from bmil...@gmail.com --- Created attachment 141991 --> https://bugs.freedesktop.org/attachment.cgi?id=141991=edit fixed xorg log sorry -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108323] RX580 starts doing a constant noise after setting fans to a fixed value, then back to auto
https://bugs.freedesktop.org/show_bug.cgi?id=108323 Bug ID: 108323 Summary: RX580 starts doing a constant noise after setting fans to a fixed value, then back to auto Product: DRI Version: XOrg git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: DRM/AMDgpu Assignee: dri-devel@lists.freedesktop.org Reporter: bmil...@gmail.com I'm using the sysfs API with those steps: To switch to manual fan control from automatic, run # echo "1" > /sys/class/drm/card0/device/hwmon/hwmon0/pwm1_enable Set up fan speed to e.g. 50% (100% are 255 PWM cycles, thus calculate desired fan speed percentage by multiplying its value by 2.55): # echo "128" > /sys/class/drm/card0/device/hwmon/hwmon0/pwm1 To reset to automatic fan control, run # echo "2" > /sys/class/drm/card0/device/hwmon/hwmon0/pwm1_enable My RX580 Nitro+ starts beeping a constant high pitched weird noise until I set it back to a fixed value or until reboot. It doesn't happen if start on auto, only after switching to a value then back to auto. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108311] Query buffer object support is broken on r600.
https://bugs.freedesktop.org/show_bug.cgi?id=108311 --- Comment #2 from Andrew Wesie --- (In reply to Dave Airlie from comment #1) > Created attachment 141989 [details] [review] > set larger alignment for tmp buffer offset > > Does this patch work as an alternate? It looks like it should work but I'll test it with real hw. Any reason you prefer this patch? It seems like it would use more heap space without any notable benefits (e.g. should it have better performance characteristics?). -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [GIT PULL] mediatek drm next for 4.20
On Thu, 11 Oct 2018 at 12:29, CK Hu wrote: > > Hi, Dave: > > On Thu, 2018-10-11 at 11:42 +1000, Dave Airlie wrote: > > On Thu, 11 Oct 2018 at 11:25, CK Hu wrote: > > > > > > Hi, Dave: > > > > > > Ping this. If there is any problem, tell me and I would fix it. > > > > > > Regards, > > > CK > > > > > > On Thu, 2018-10-04 at 09:22 +0800, CK Hu wrote: > > > > Hi, Dave: > > > > > > > > This include hdmi output support for mt2701 and mt7623. > > > > > > > > Regards, > > > > CK > > > > > > > > The following changes since commit > > > > 87c2ee740c07f1edae9eec8bc45cb9b32a68f323: > > > > > > > > Merge branch 'drm-next-4.20' of > > > > git://people.freedesktop.org/~agd5f/linux into drm-next (2018-09-28 > > > > 09:48:40 +1000) > > > > > > > > are available in the git repository at: > > > > > > > > > > > > https://github.com/ckhu-mediatek/linux.git-tags.git > > > > mediatek-drm-next-4.20 > > > > This has two newlines which might suggest and older version of git was > > being used. > > I'll take care of the newline part in future. But I don't understand > what is the problem of older version of git? Maybe I could prevent this > next time. In the recent hisilicon-next pulls Xinliang Liu mentioned the double lines are from git 1.9.1, and were fixed in a later version. Dave. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #8 from Alex Deucher --- Xorg log seems to be broken. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 Alex Deucher changed: What|Removed |Added Attachment #141988|application/octet-stream|text/plain mime type|| -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #7 from bmil...@gmail.com --- Created attachment 141990 --> https://bugs.freedesktop.org/attachment.cgi?id=141990=edit dmesg -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108311] Query buffer object support is broken on r600.
https://bugs.freedesktop.org/show_bug.cgi?id=108311 --- Comment #1 from Dave Airlie --- Created attachment 141989 --> https://bugs.freedesktop.org/attachment.cgi?id=141989=edit set larger alignment for tmp buffer offset Does this patch work as an alternate? -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #6 from Alex Deucher --- Please just attach the full dmesg output. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #5 from bmil...@gmail.com --- Created attachment 141988 --> https://bugs.freedesktop.org/attachment.cgi?id=141988=edit xorg log -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #3 from bmil...@gmail.com --- Created attachment 141986 --> https://bugs.freedesktop.org/attachment.cgi?id=141986=edit dmesg | grep -i gpu -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #4 from bmil...@gmail.com --- Created attachment 141987 --> https://bugs.freedesktop.org/attachment.cgi?id=141987=edit dmesg | grep -i drm -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #2 from bmil...@gmail.com --- Created attachment 141985 --> https://bugs.freedesktop.org/attachment.cgi?id=141985=edit dmesg | grep -i amd -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 --- Comment #1 from Alex Deucher --- Please attach your dmesg output and Xorg log if using X. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108322] RX580 Display flickering after waking from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=108322 Bug ID: 108322 Summary: RX580 Display flickering after waking from suspend Product: DRI Version: XOrg git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: major Priority: medium Component: DRM/AMDgpu Assignee: dri-devel@lists.freedesktop.org Reporter: bmil...@gmail.com GPU RX580 Nitro+ over DisplayPort to a single AOC 75hz monitor. Issue is on last kernels 4.18 4.19 but not in 4.14. Screen starts flickering until reboot if I sleep/wake or if I manually switch the monitor off/on. Tried to turn amdgpu.dc=0, screen then flickers everywhere anytime unless I manually change frequency from 75hz to 60hz. That only solves it inside KDE though. Checking gpu related logs shows this error, but couldn't find anything else: "Invalid PCI ROM header signature: expecting 0xaa55, got 0x" -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [GIT PULL] mediatek drm next for 4.20
Hi, Dave: On Thu, 2018-10-11 at 11:42 +1000, Dave Airlie wrote: > On Thu, 11 Oct 2018 at 11:25, CK Hu wrote: > > > > Hi, Dave: > > > > Ping this. If there is any problem, tell me and I would fix it. > > > > Regards, > > CK > > > > On Thu, 2018-10-04 at 09:22 +0800, CK Hu wrote: > > > Hi, Dave: > > > > > > This include hdmi output support for mt2701 and mt7623. > > > > > > Regards, > > > CK > > > > > > The following changes since commit > > > 87c2ee740c07f1edae9eec8bc45cb9b32a68f323: > > > > > > Merge branch 'drm-next-4.20' of > > > git://people.freedesktop.org/~agd5f/linux into drm-next (2018-09-28 > > > 09:48:40 +1000) > > > > > > are available in the git repository at: > > > > > > > > > https://github.com/ckhu-mediatek/linux.git-tags.git > > > mediatek-drm-next-4.20 > > This has two newlines which might suggest and older version of git was > being used. I'll take care of the newline part in future. But I don't understand what is the problem of older version of git? Maybe I could prevent this next time. Regards, CK > > I'll process this by hand for now. > > Dave. > > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driver
Fix the dsi clock names in the DSI 10nm PLL driver to match the names in the dispcc driver as those are according to the clock plan of the chipset. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c index 41bec57..8304024 100644 --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c @@ -690,7 +690,7 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm) hws[num++] = hw; - snprintf(clk_name, 32, "dsi%dpllbyte", pll_10nm->id); + snprintf(clk_name, 32, "dsi%d_phy_pll_out_byteclk", pll_10nm->id); snprintf(parent, 32, "dsi%d_pll_bit_clk", pll_10nm->id); /* DSI Byte clock = VCO_CLK / OUT_DIV / BIT_DIV / 8 */ @@ -739,7 +739,7 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm) hws[num++] = hw; - snprintf(clk_name, 32, "dsi%dpll", pll_10nm->id); + snprintf(clk_name, 32, "dsi%d_phy_pll_out_dsiclk", pll_10nm->id); snprintf(parent, 32, "dsi%d_pclk_mux", pll_10nm->id); /* PIX CLK DIV : DIV_CTRL_7_4*/ -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108321] rv610: corrupt shader output with SB if_conversion optimization pass
https://bugs.freedesktop.org/show_bug.cgi?id=108321
Bug ID: 108321
Summary: rv610: corrupt shader output with SB if_conversion
optimization pass
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/Gallium/r600
Assignee: dri-devel@lists.freedesktop.org
Reporter: nicholasbis...@gmail.com
QA Contact: dri-devel@lists.freedesktop.org
Created attachment 141984
--> https://bugs.freedesktop.org/attachment.cgi?id=141984=edit
rv610 sbdump
I'm debugging some graphics corruption in Chromium on an iMac7,1 with rv610
graphics. Basically an area of the application has randomish blocks of color,
like it's reading from an uninitialized texture.
I've narrowed the problem down to a fragment shader:
varying mediump vec2 _uv_texCoord;
uniform lowp sampler2D _ulut_texture;
uniform mediump float _ulut_size;
mediump vec4 _uLUT(in lowp sampler2D _usampler, in mediump vec3 _upos, in
mediump float _usize){
(_upos *= (_usize - 1.0));
mediump float _ulayer = min(floor(_upos.z), (_usize - 2.0));
(_upos.xy = ((_upos.xy + vec2(0.51234001, 0.51234001)) / _usize));
(_upos.y = ((_upos.y + _ulayer) / _usize));
return mix(texture2D(_usampler, _upos.xy), texture2D(_usampler, (_upos.xy
+ vec2(0, (1.0 / _usize, (_upos.z - _ulayer));
}
void main(){
mediump vec2 _utexCoord = _uv_texCoord;
mediump vec4 _utexColor = texture2D(_us_texture, _utexCoord);
if ((_utexColor.w > 0.0))
{
(_utexColor.xyz /= _utexColor.w);
}
(_utexColor.xyz = _uLUT(_ulut_texture, _utexColor.xyz, _ulut_size).xyz);
(_utexColor.xyz *= _utexColor.w);
(gl_FragColor = vec4(_utexColor.xyz, 1.0));
}
(Note that in the original shader "0.51234001" is just "0.5", I just changed it
to make grepping easier.) I played around with changes to the _uLUT function,
and I found that any mixing of the two samples seems to trigger the bug, e.g. I
can mix with a constant 0.5 and the bug still happens. I also tried replacing
"mix" with an explicit a*(x-1)+b*x; no change.
I found that disabling SB fixed the issue, and in particular just commenting
out the "if_conversion" SB pass fixes the issue.
I've attached the full sbdump output. Please let me know if there are more
details I can provide that would help.
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[pull] amdgpu, amdkfd, scheduler, radeon, ttm drm-next-4.20
Hi Dave, Fixes for 4.20. A little bigger than I'd like, but there are a lot of fixes for new asics that were introduced in 4.20 (Vega20, RV2, PCO). Highlights: - Add a new list.h helper for doing bulk updates. Used by ttm. - Fixes for display underflow on VI APUs at 4K with UVD running - Endian fixes for powerplay on vega - DC fixes for interlaced video - Vega20 powerplay fixes - RV/RV2/PCO powerplay fixes - Fix for spurious ACPI events on HG laptops - Fix a memory leak in DC on driver unload - Fixes for manual fan control mode switching - Suspend/resume robustness fixes - Fix display handling on RV2 - VCN fixes for DPG on PCO - Misc code cleanups and warning fixes The following changes since commit c530174b90fa3bcaa83d168b001b574bcb2da021: Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next (2018-10-04 11:31:05 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-next-4.20 for you to fetch changes up to df2fc43d09d3ee5ede82cab9299df5e78aa427b5: list: introduce list_bulk_move_tail helper (2018-10-10 15:20:54 -0500) Akshu Agrawal (1): drm/amd/powerplay: Enable/Disable NBPSTATE on On/OFF of UVD Alex Deucher (5): drm/amdgpu/vega20: make power profile output more consistent drm/amdgpu/powerplay: endian fixes for vega10_processpptables.c drm/amdgpu/powerplay: endian fixes for vega12_processpptables.c drm/amdgpu/powerplay: endian fixes for vega20_processpptables.c drm/amdgpu/powerplay: factor out some pptable helpers Charlene Liu (2): drm/amd/display: fix 4K stereo screen flash issue drm/amd/display: fix Interlace video timing. Christian König (3): drm/amdgpu: fix AGP location with VRAM at 0x0 drm/amdgpu: fix incorrect use of amdgpu_irq_add_id in si_dma.c list: introduce list_bulk_move_tail helper Colin Ian King (1): drm/amdgpu/powerplay: fix missing break in switch statements Emily Deng (1): drm/amdgpu: Limit the max mc address to hole start Eric Yang (2): drm/amd/display: block DP YCbCr420 modes drm/amd/display: clean up encoding checks Eryk Brol (1): drm/amd/display: Add function to fetch clock requirements Evan Quan (8): drm/amd/powerplay/vega20: correct the hwmon interface ppt limit output drm/amd/powerplay/vega20: tell the correct gfx voltage V2 drm/amd/powerplay/vega20: enable fan RPM and pwm settings V2 drm/amdgpu: added vega20 LBPW support v2 drm/amdgpu: change Raven always on CUs to 4 drm/amdgpu: added AMD GPU instance counting V2 drm/amd/powerplay: helper interfaces for MGPU fan boost feature drm/amd/powerplay: enable MGPU fan boost feature on Vega20 Felix Kuehling (1): drm/amdkfd: Fix incorrect use of process->mm Hersen Wu (1): drm/amd/display: RV2 DP MST 2nd display within daisy chain not light up James Zhu (4): drm/amdgpu/vcn:Remove unused code drm/amdgpu/vcn:fix dpg pause mode hang issue drm/amdgpu/vcn:Replace value with defined macro drm/amdgpu/vcn:Correct VCN cache window definition Jun Lei (2): drm/amd/display: Add DC build_id to determine build type drm/amd/display: fix memory leak in resource pools Leo Li (1): drm/amd/display: Flatten irq handler data struct Lyude Paul (1): drm/amdgpu: Suppress keypresses from ACPI_VIDEO events Murton Liu (1): drm/amd/display: HLK Periodic Frame Notification test failed Nathan Chancellor (2): drm/amd/display: Use proper enums in process_channel_reply drm/scheduler: Simplify spsc_queue_count check in drm_sched_entity_select_rq Nicholas Kazlauskas (1): drm/amd/display: Raise dispclk value for dce_update_clocks Nick Alcock (1): drm/radeon: ratelimit bo warnings Nikola Cornij (1): drm/amd/display: Add a check-function for virtual signal type Pratik Vishwakarma (1): drm/amdgpu: skip IB tests for KIQ in general Rex Zhu (35): drm/amdgpu: Fix comments error in sdma_v4_1_update_power_gating drm/amd/pp: Fix fan's RPM setting not work on VI/Vega10 drm/amd/pp: Avoid divide-by-zero in fan_ctrl_set_fan_speed_rpm drm/amd/pp: Expose the smu support for SDMA PG cntl drm/amdgpu: Move out power up/down sdma out of smu drm/amd/pp: Remove uncessary extra vcn pg cntl in smu drm/amd/pp: Remove wrong code in fiji_start_smu drm/amdgpu: Refine uvd_v6/7_0_enc_get_destroy_msg drm/amdgpu: Add new AMDGPU_PP_SENSOR_MIN/MAX_FAN_RPM sensor drm/amd/pp: Implement AMDGPU_PP_SENSOR_MIN/MAX_FAN_RPM drm/amdgpu: Add fan RPM setting via sysfs drm/amdgpu: Disable sysfs pwm1 if not in manual fan control drm/amdgpu: Always enable fan sensors for read drm/amdgpu: Drop dead define in amdgpu.h drm/amd/pp: Fix memory leak on CI/AI drm/amdgpu: Move gfx flag in_suspend to adev drm/amd/pp: Refine
Re: [GIT PULL] mediatek drm next for 4.20
On Thu, 11 Oct 2018 at 11:25, CK Hu wrote: > > Hi, Dave: > > Ping this. If there is any problem, tell me and I would fix it. > > Regards, > CK > > On Thu, 2018-10-04 at 09:22 +0800, CK Hu wrote: > > Hi, Dave: > > > > This include hdmi output support for mt2701 and mt7623. > > > > Regards, > > CK > > > > The following changes since commit > > 87c2ee740c07f1edae9eec8bc45cb9b32a68f323: > > > > Merge branch 'drm-next-4.20' of > > git://people.freedesktop.org/~agd5f/linux into drm-next (2018-09-28 > > 09:48:40 +1000) > > > > are available in the git repository at: > > > > > > https://github.com/ckhu-mediatek/linux.git-tags.git > > mediatek-drm-next-4.20 This has two newlines which might suggest and older version of git was being used. I'll process this by hand for now. Dave. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [GIT PULL] mediatek drm next for 4.20
Hi, Dave: Ping this. If there is any problem, tell me and I would fix it. Regards, CK On Thu, 2018-10-04 at 09:22 +0800, CK Hu wrote: > Hi, Dave: > > This include hdmi output support for mt2701 and mt7623. > > Regards, > CK > > The following changes since commit > 87c2ee740c07f1edae9eec8bc45cb9b32a68f323: > > Merge branch 'drm-next-4.20' of > git://people.freedesktop.org/~agd5f/linux into drm-next (2018-09-28 > 09:48:40 +1000) > > are available in the git repository at: > > > https://github.com/ckhu-mediatek/linux.git-tags.git > mediatek-drm-next-4.20 > > for you to fetch changes up to 84dacb9cad2804a9f5434b775ccea6aa5d9fc6ca: > > drm/mediatek: add a error return value when clock driver has been > prepared (2018-10-03 11:56:33 +0800) > > > Bibby Hsieh (2): > drm/mediatek: implement connection from BLS to DPI0 > drm/mediatek: add a error return value when clock driver has been > prepared > > chunhui dai (9): > drm/mediatek: add refcount for DPI power on/off > drm/mediatek: move hardware register to node data > drm/mediatek: adjust EDGE to match clock and data > drm/mediatek: add clock factor for different IC > drm/mediatek: convert dpi driver to use > drm_of_find_panel_or_bridge > drm/mediatek: add dpi driver for mt2701 and mt7623 > drm/mediatek: separate hdmi phy to different file > drm/mediatek: add support for SPDIF audio in HDMI > drm/mediatek: add hdmi driver for MT2701 and MT7623 > > drivers/gpu/drm/mediatek/Makefile | 5 +- > drivers/gpu/drm/mediatek/mtk_dpi.c | 131 -- > drivers/gpu/drm/mediatek/mtk_dpi_regs.h| 2 +- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c| 2 +- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 + > drivers/gpu/drm/mediatek/mtk_hdmi.c| 15 +- > drivers/gpu/drm/mediatek/mtk_hdmi.h| 2 +- > drivers/gpu/drm/mediatek/mtk_hdmi_phy.c| 235 > + > drivers/gpu/drm/mediatek/mtk_hdmi_phy.h| 60 +++ > drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 212 > ++ > drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 226 > +--- > 12 files changed, 627 insertions(+), 279 deletions(-) > create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > create mode 100644 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] fbdev: make FB_BACKLIGHT a tristate
On Wed, Oct 10, 2018 at 11:35 AM Arnd Bergmann wrote: > > On 10/10/18, Rob Clark wrote: > > BACKLIGHT_CLASS_DEVICE is already tristate, but a dependency > > FB_BACKLIGHT prevents it from being built as a module. There > > doesn't seem to be any particularly good reason for this, so > > switch FB_BACKLIGHT over to tristate. > > > > Signed-off-by: Rob Clark > > I don't see anything immediately wrong, but anything related to > BACKLIGHT_CLASS_DEVICE, BACKLIGHT_LCD_SUPPORT > and FB_BACKLIGHT is really fragile in Kconfig, because of the > way those interact with other options. > > I've applied your patch to my randconfig build tree for testing, > let's see what happens there before you apply it. > thanks.. tbh the fragility of backlight vs kconfig is why I've procrastinated on fixing this for a while.. in the end the solution seems not as bad as I feared (and after a iteration or two makes rhel kernel builds for various archs happy, at least).. but defn some randconfig build testing is in order. PS. discovering that the thing you need to fix (a) never really worked as intended, and (b) involves backlight + fbdev.. is never a good way to start your day ;-) BR, -R ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm: Do not call drm_dp_cec_set_edid() while registering DP connectors
drm_dp_cec_register_connector() is called when registering each DP connector in DRM, while sounds a good idea register CEC adapters as earlier as possible, it causes some driver initialization delay trying to do DPCD transactions in disconnected connectors. This change will cause no regressions as drm_dp_cec_set_edid() will still be called in further detection of connected connectors with a valid edid parameter. This change reduced the module load of i915 by average 0.5sec in a machine with just one DP port disconnected while reducing more than 3sec in a machine with 4 DP ports disconnected. Cc: Hans Verkuil Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_cec.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_cec.c b/drivers/gpu/drm/drm_dp_cec.c index 8a718f85079a..b15cee85b702 100644 --- a/drivers/gpu/drm/drm_dp_cec.c +++ b/drivers/gpu/drm/drm_dp_cec.c @@ -424,8 +424,6 @@ void drm_dp_cec_register_connector(struct drm_dp_aux *aux, const char *name, aux->cec.parent = parent; INIT_DELAYED_WORK(>cec.unregister_work, drm_dp_cec_unregister_work); - - drm_dp_cec_set_edid(aux, NULL); } EXPORT_SYMBOL(drm_dp_cec_register_connector); -- 2.19.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 08/18] drm/vmwgfx: Implement STDU plane update for BO backed fb
Using the new interface implement STDU plane update for BO backed fb.
v2: Rebase to new resource validation.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 11 ++
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 212 +++
2 files changed, 223 insertions(+)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
index f2f57e58dd88..73fc51f43400 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
@@ -129,6 +129,17 @@ struct vmw_du_update_plane {
bool intr;
};
+/**
+ * struct vmw_du_update_plane_buffer - Closure structure for buffer object
+ * @base: Base closure structure.
+ * @fb_left: x1 for fb damage bounding box.
+ * @fb_top: y1 for fb damage bounding box.
+ */
+struct vmw_du_update_plane_buffer {
+ struct vmw_du_update_plane base;
+ int fb_left, fb_top;
+};
+
/**
* struct vmw_kms_dirty - closure structure for the vmw_kms_helper_dirty
* function.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index 7d5e080f8e29..a084a0f533d8 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -1261,6 +1261,218 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane
*plane,
return ret;
}
+static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
+ uint32_t num_hits)
+{
+ return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
+ sizeof(SVGA3dCmdSurfaceDMASuffix) +
+ sizeof(struct vmw_stdu_update);
+}
+
+static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
+ uint32_t num_hits)
+{
+ return sizeof(struct vmw_stdu_update_gb_image) +
+ sizeof(struct vmw_stdu_update);
+}
+
+static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane *update,
+void *cmd, uint32_t num_hits)
+{
+ struct vmw_screen_target_display_unit *stdu;
+ struct vmw_framebuffer_bo *vfbbo;
+ struct vmw_stdu_dma *cmd_dma = cmd;
+
+ stdu = container_of(update->du, typeof(*stdu), base);
+ vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
+
+ cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
+ cmd_dma->header.size = sizeof(cmd_dma->body) +
+ sizeof(struct SVGA3dCopyBox) * num_hits +
+ sizeof(SVGA3dCmdSurfaceDMASuffix);
+ vmw_bo_get_guest_ptr(>buffer->base, _dma->body.guest.ptr);
+ cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
+ cmd_dma->body.host.sid = stdu->display_srf->res.id;
+ cmd_dma->body.host.face = 0;
+ cmd_dma->body.host.mipmap = 0;
+ cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
+
+ return sizeof(*cmd_dma);
+}
+
+static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane *update,
+ void *cmd, struct drm_rect *clip,
+ uint32_t fb_x, uint32_t fb_y)
+{
+ struct SVGA3dCopyBox *box = cmd;
+
+ box->srcx = fb_x;
+ box->srcy = fb_y;
+ box->srcz = 0;
+ box->x = clip->x1;
+ box->y = clip->y1;
+ box->z = 0;
+ box->w = drm_rect_width(clip);
+ box->h = drm_rect_height(clip);
+ box->d = 1;
+
+ return sizeof(*box);
+}
+
+static uint32_t vmw_stud_bo_populate_update(struct vmw_du_update_plane
*update,
+ void *cmd, struct drm_rect *bb)
+{
+ struct vmw_screen_target_display_unit *stdu;
+ struct vmw_framebuffer_bo *vfbbo;
+ SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
+
+ stdu = container_of(update->du, typeof(*stdu), base);
+ vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
+
+ suffix->suffixSize = sizeof(*suffix);
+ suffix->maximumOffset = vfbbo->buffer->base.num_pages * PAGE_SIZE;
+
+ vmw_stdu_populate_update([1], stdu->base.unit, bb->x1, bb->x2,
+bb->y1, bb->y2);
+
+ return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
+}
+
+static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane *update,
+void *cmd, uint32_t num_hits)
+{
+ struct vmw_du_update_plane_buffer *bo_update =
+ container_of(update, typeof(*bo_update), base);
+
+ bo_update->fb_left = INT_MAX;
+ bo_update->fb_top = INT_MAX;
+
+ return 0;
+}
+
+static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane *update,
+void *cmd, struct drm_rect *clip,
+uint32_t fb_x, uint32_t fb_y)
+{
+ struct vmw_du_update_plane_buffer *bo_update =
+ container_of(update, typeof(*bo_update), base);
+
+ bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
+
[PATCH v3 12/18] drm/vmwgfx: Implement SOU plane update for surface backed fb
Using the new interface implement SOU plane update for surface backed
fb.
v2: Rebase to new resource validation.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 11 ++
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 161 +++
2 files changed, 172 insertions(+)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
index 73fc51f43400..3e8b8b3d33aa 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
@@ -129,6 +129,17 @@ struct vmw_du_update_plane {
bool intr;
};
+/**
+ * struct vmw_du_update_plane_surface - closure structure for surface
+ * @base: base closure structure.
+ * @cmd_start: FIFO command start address (used by SOU only).
+ */
+struct vmw_du_update_plane_surface {
+ struct vmw_du_update_plane base;
+ /* This member is to handle special case SOU surface update */
+ void *cmd_start;
+};
+
/**
* struct vmw_du_update_plane_buffer - Closure structure for buffer object
* @base: Base closure structure.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 53316b1bda3d..991a6e87370a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -499,6 +499,167 @@ vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane,
return vmw_bo_pin_in_vram(dev_priv, vps->bo, true);
}
+static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update,
+ uint32_t num_hits)
+{
+ return sizeof(struct vmw_kms_sou_dirty_cmd) + sizeof(SVGASignedRect) *
+ num_hits;
+}
+
+static uint32_t vmw_sou_surface_post_prepare(struct vmw_du_update_plane
*update,
+void *cmd)
+{
+ struct vmw_du_update_plane_surface *srf_update;
+
+ srf_update = container_of(update, typeof(*srf_update), base);
+
+ /*
+* SOU SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN is special in the sense that
+* its bounding box is filled before iterating over all the clips. So
+* store the FIFO start address and revisit to fill the details.
+*/
+ srf_update->cmd_start = cmd;
+
+ return 0;
+}
+
+static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update,
+void *cmd, uint32_t num_hits)
+{
+ struct vmw_kms_sou_dirty_cmd *blit = cmd;
+ struct vmw_framebuffer_surface *vfbs;
+
+ vfbs = container_of(update->vfb, typeof(*vfbs), base);
+
+ blit->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
+ blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) *
+ num_hits;
+
+ blit->body.srcImage.sid = vfbs->surface->res.id;
+ blit->body.destScreenId = update->du->unit;
+
+ /* Update the source and destination bounding box later in post_clip */
+ blit->body.srcRect.left = 0;
+ blit->body.srcRect.top = 0;
+ blit->body.srcRect.right = 0;
+ blit->body.srcRect.bottom = 0;
+
+ blit->body.destRect.left = 0;
+ blit->body.destRect.top = 0;
+ blit->body.destRect.right = 0;
+ blit->body.destRect.bottom = 0;
+
+ return sizeof(*blit);
+}
+
+static uint32_t vmw_sou_surface_clip_rect(struct vmw_du_update_plane *update,
+ void *cmd, struct drm_rect *clip,
+ uint32_t src_x, uint32_t src_y)
+{
+ SVGASignedRect *rect = cmd;
+
+ /*
+* rects are relative to dest bounding box rect on screen object, so
+* translate to it later in post_clip
+*/
+ rect->left = clip->x1;
+ rect->top = clip->y1;
+ rect->right = clip->x2;
+ rect->bottom = clip->y2;
+
+ return sizeof(*rect);
+}
+
+static uint32_t vmw_sou_surface_post_clip(struct vmw_du_update_plane *update,
+ void *cmd, struct drm_rect *bb)
+{
+ struct vmw_du_update_plane_surface *srf_update;
+ struct drm_plane_state *state = update->plane->state;
+ struct drm_rect src_bb;
+ struct vmw_kms_sou_dirty_cmd *blit;
+ SVGASignedRect *rect;
+ uint32_t num_hits;
+ int translate_src_x;
+ int translate_src_y;
+ int i;
+
+ srf_update = container_of(update, typeof(*srf_update), base);
+
+ blit = srf_update->cmd_start;
+ rect = (SVGASignedRect *)[1];
+
+ num_hits = (blit->header.size - sizeof(blit->body))/
+ sizeof(SVGASignedRect);
+
+ src_bb = *bb;
+
+ /* To translate bb back to fb src coord */
+ translate_src_x = (state->src_x >> 16) - state->crtc_x;
+ translate_src_y = (state->src_y >> 16) - state->crtc_y;
+
+ drm_rect_translate(_bb, translate_src_x, translate_src_y);
+
+ blit->body.srcRect.left = src_bb.x1;
+ blit->body.srcRect.top = src_bb.y1;
+ blit->body.srcRect.right =
[PATCH v3 16/18] drm/vmwgfx: Enable FB_DAMAGE_CLIPS property for SOU primary plane
SOU primary plane now support damage clips, enable it for user-space. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c index 14bcd4db4f9c..77521075e803 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c @@ -29,6 +29,7 @@ #include #include #include +#include #define vmw_crtc_to_sou(x) \ @@ -909,6 +910,7 @@ static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit) } drm_plane_helper_add(primary, _sou_primary_plane_helper_funcs); + drm_plane_enable_fb_damage_clips(primary); /* Initialize cursor plane */ vmw_du_plane_reset(cursor); -- 2.17.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 14/18] drm/vmwgfx: Use the new interface for SOU plane update
With new interface to do plane update on SOU available, use that instead of old kms_dirty. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 17 + 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c index f9bb71e489db..1cef622a779e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c @@ -775,21 +775,14 @@ vmw_sou_primary_plane_atomic_update(struct drm_plane *plane, struct vmw_private *dev_priv = vmw_priv(crtc->dev); struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(plane->state->fb); - struct drm_vmw_rect vclips; - - vclips.x = crtc->x; - vclips.y = crtc->y; - vclips.w = crtc->mode.hdisplay; - vclips.h = crtc->mode.vdisplay; if (vfb->bo) - ret = vmw_kms_sou_do_bo_dirty(dev_priv, vfb, NULL, - , 1, 1, true, - , crtc); + ret = vmw_sou_plane_update_bo(dev_priv, plane, + old_state, vfb, ); else - ret = vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, - , NULL, 0, 0, - 1, 1, , crtc); + ret = vmw_sou_plane_update_surface(dev_priv, plane, + old_state, vfb, + ); /* * We cannot really fail this function, so if we do, then output -- 2.17.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 17/18] drm/vmwgfx: Use atomic helper function for dirty fb IOCTL
USe new atomic helper for dirty fb IOCTL which make use of damage
interface. Note that this is only done for STDU and SOU, for legacy
display unit still using old interface.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 82 +++--
1 file changed, 18 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 059f57bd8170..21dcb46a233b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -847,58 +847,6 @@ static void vmw_framebuffer_surface_destroy(struct
drm_framebuffer *framebuffer)
kfree(vfbs);
}
-static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
- struct drm_file *file_priv,
- unsigned flags, unsigned color,
- struct drm_clip_rect *clips,
- unsigned num_clips)
-{
- struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
- struct vmw_framebuffer_surface *vfbs =
- vmw_framebuffer_to_vfbs(framebuffer);
- struct drm_clip_rect norect;
- int ret, inc = 1;
-
- /* Legacy Display Unit does not support 3D */
- if (dev_priv->active_display_unit == vmw_du_legacy)
- return -EINVAL;
-
- drm_modeset_lock_all(dev_priv->dev);
-
- ret = ttm_read_lock(_priv->reservation_sem, true);
- if (unlikely(ret != 0)) {
- drm_modeset_unlock_all(dev_priv->dev);
- return ret;
- }
-
- if (!num_clips) {
- num_clips = 1;
- clips =
- norect.x1 = norect.y1 = 0;
- norect.x2 = framebuffer->width;
- norect.y2 = framebuffer->height;
- } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
- num_clips /= 2;
- inc = 2; /* skip source rects */
- }
-
- if (dev_priv->active_display_unit == vmw_du_screen_object)
- ret = vmw_kms_sou_do_surface_dirty(dev_priv, >base,
- clips, NULL, NULL, 0, 0,
- num_clips, inc, NULL, NULL);
- else
- ret = vmw_kms_stdu_surface_dirty(dev_priv, >base,
-clips, NULL, NULL, 0, 0,
-num_clips, inc, NULL, NULL);
-
- vmw_fifo_flush(dev_priv, false);
- ttm_read_unlock(_priv->reservation_sem);
-
- drm_modeset_unlock_all(dev_priv->dev);
-
- return 0;
-}
-
/**
* vmw_kms_readback - Perform a readback from the screen system to
* a buffer-object backed framebuffer.
@@ -942,7 +890,7 @@ int vmw_kms_readback(struct vmw_private *dev_priv,
static const struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
.destroy = vmw_framebuffer_surface_destroy,
- .dirty = vmw_framebuffer_surface_dirty,
+ .dirty = drm_atomic_helper_dirtyfb,
};
static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
@@ -1085,16 +1033,6 @@ static int vmw_framebuffer_bo_dirty(struct
drm_framebuffer *framebuffer,
}
switch (dev_priv->active_display_unit) {
- case vmw_du_screen_target:
- ret = vmw_kms_stdu_dma(dev_priv, NULL, >base, NULL,
- clips, NULL, num_clips, increment,
- true, true, NULL);
- break;
- case vmw_du_screen_object:
- ret = vmw_kms_sou_do_bo_dirty(dev_priv, >base,
- clips, NULL, num_clips,
- increment, true, NULL, NULL);
- break;
case vmw_du_legacy:
ret = vmw_kms_ldu_do_bo_dirty(dev_priv, >base, 0, 0,
clips, num_clips, increment);
@@ -1113,9 +1051,25 @@ static int vmw_framebuffer_bo_dirty(struct
drm_framebuffer *framebuffer,
return ret;
}
+static int vmw_framebuffer_bo_dirty_ext(struct drm_framebuffer *framebuffer,
+ struct drm_file *file_priv,
+ unsigned int flags, unsigned int color,
+ struct drm_clip_rect *clips,
+ unsigned int num_clips)
+{
+ struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
+
+ if (dev_priv->active_display_unit == vmw_du_legacy)
+ return vmw_framebuffer_bo_dirty(framebuffer, file_priv, flags,
+ color, clips, num_clips);
+
+ return drm_atomic_helper_dirtyfb(framebuffer, file_priv, flags, color,
+clips, num_clips);
+}
+
static const struct drm_framebuffer_funcs
[PATCH v3 15/18] drm/vmwgfx: Update comments for sou plane update function
Update comments to sync with code.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 1cef622a779e..14bcd4db4f9c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -771,6 +771,7 @@ vmw_sou_primary_plane_atomic_update(struct drm_plane *plane,
struct vmw_fence_obj *fence = NULL;
int ret;
+ /* If somehow gets a device error maintain consistent atomic state */
if (crtc && plane->state->fb) {
struct vmw_private *dev_priv = vmw_priv(crtc->dev);
struct vmw_framebuffer *vfb =
@@ -783,28 +784,15 @@ vmw_sou_primary_plane_atomic_update(struct drm_plane
*plane,
ret = vmw_sou_plane_update_surface(dev_priv, plane,
old_state, vfb,
);
-
- /*
-* We cannot really fail this function, so if we do, then output
-* an error and maintain consistent atomic state.
-*/
if (ret != 0)
DRM_ERROR("Failed to update screen.\n");
} else {
- /*
-* When disabling a plane, CRTC and FB should always be NULL
-* together, otherwise it's an error.
-* Here primary plane is being disable so should really blank
-* the screen object display unit, if not already done.
-*/
+ /* Do nothing when fb and crtc is NULL (blank crtc) */
return;
}
+ /* For error case vblank event is sent from vmw_du_crtc_atomic_flush */
event = crtc->state->event;
- /*
-* In case of failure and other cases, vblank event will be sent in
-* vmw_du_crtc_atomic_flush.
-*/
if (event && fence) {
struct drm_file *file_priv = event->base.file_priv;
--
2.17.1
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 04/18] drm/selftest: Add drm damage helper selftest
Selftest for drm damage helper iterator functions.
Cc: ville.syrj...@linux.intel.com
Cc: Daniel Vetter
Cc: Pekka Paalanen
Cc: Daniel Stone
Cc: intel-...@lists.freedesktop.org
Cc: igt-...@lists.freedesktop.org
Cc: petri.latv...@intel.com
Cc: ch...@chris-wilson.co.uk
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/selftests/Makefile| 3 +-
.../selftests/drm_damage_helper_selftests.h | 22 +
.../drm/selftests/test-drm_damage_helper.c| 844 ++
3 files changed, 868 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/selftests/drm_damage_helper_selftests.h
create mode 100644 drivers/gpu/drm/selftests/test-drm_damage_helper.c
diff --git a/drivers/gpu/drm/selftests/Makefile
b/drivers/gpu/drm/selftests/Makefile
index 9fc349fa18e9..88ac216f5962 100644
--- a/drivers/gpu/drm/selftests/Makefile
+++ b/drivers/gpu/drm/selftests/Makefile
@@ -1 +1,2 @@
-obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm-helper.o
+obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm-helper.o \
+ test-drm_damage_helper.o
diff --git a/drivers/gpu/drm/selftests/drm_damage_helper_selftests.h
b/drivers/gpu/drm/selftests/drm_damage_helper_selftests.h
new file mode 100644
index ..3a1cbe05bef0
--- /dev/null
+++ b/drivers/gpu/drm/selftests/drm_damage_helper_selftests.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+selftest(damage_iter_no_damage, igt_damage_iter_no_damage)
+selftest(damage_iter_no_damage_fractional_src,
igt_damage_iter_no_damage_fractional_src)
+selftest(damage_iter_no_damage_src_moved, igt_damage_iter_no_damage_src_moved)
+selftest(damage_iter_no_damage_fractional_src_moved,
igt_damage_iter_no_damage_fractional_src_moved)
+selftest(damage_iter_no_damage_not_visible,
igt_damage_iter_no_damage_not_visible)
+selftest(damage_iter_no_damage_no_crtc, igt_damage_iter_no_damage_no_crtc)
+selftest(damage_iter_no_damage_no_fb, igt_damage_iter_no_damage_no_fb)
+selftest(damage_iter_simple_damage, igt_damage_iter_simple_damage)
+selftest(damage_iter_single_damage, igt_damage_iter_single_damage)
+selftest(damage_iter_single_damage_intersect_src,
igt_damage_iter_single_damage_intersect_src)
+selftest(damage_iter_single_damage_outside_src,
igt_damage_iter_single_damage_outside_src)
+selftest(damage_iter_single_damage_fractional_src,
igt_damage_iter_single_damage_fractional_src)
+selftest(damage_iter_single_damage_intersect_fractional_src,
igt_damage_iter_single_damage_intersect_fractional_src)
+selftest(damage_iter_single_damage_outside_fractional_src,
igt_damage_iter_single_damage_outside_fractional_src)
+selftest(damage_iter_single_damage_src_moved,
igt_damage_iter_single_damage_src_moved)
+selftest(damage_iter_single_damage_fractional_src_moved,
igt_damage_iter_single_damage_fractional_src_moved)
+selftest(damage_iter_damage, igt_damage_iter_damage)
+selftest(damage_iter_damage_one_intersect,
igt_damage_iter_damage_one_intersect)
+selftest(damage_iter_damage_one_outside, igt_damage_iter_damage_one_outside)
+selftest(damage_iter_damage_src_moved, igt_damage_iter_damage_src_moved)
+selftest(damage_iter_damage_not_visible, igt_damage_iter_damage_not_visible)
diff --git a/drivers/gpu/drm/selftests/test-drm_damage_helper.c
b/drivers/gpu/drm/selftests/test-drm_damage_helper.c
new file mode 100644
index ..17754734c47a
--- /dev/null
+++ b/drivers/gpu/drm/selftests/test-drm_damage_helper.c
@@ -0,0 +1,844 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Test case for drm_damage_helper functions
+ */
+
+#define pr_fmt(fmt) "drm_damage_helper: " fmt
+
+#include
+#include
+
+#define TESTS "drm_damage_helper_selftests.h"
+#include "drm_selftest.h"
+
+#define FAIL(test, msg, ...) \
+ do { \
+ if (test) { \
+ pr_err("%s/%u: " msg, __FUNCTION__, __LINE__,
##__VA_ARGS__); \
+ return -EINVAL; \
+ } \
+ } while (0)
+
+#define FAIL_ON(x) FAIL((x), "%s", "FAIL_ON(" __stringify(x) ")\n")
+
+static void set_plane_src(struct drm_plane_state *state, int x1, int y1, int
x2,
+ int y2)
+{
+ state->src.x1 = x1;
+ state->src.y1 = y1;
+ state->src.x2 = x2;
+ state->src.y2 = y2;
+}
+
+static void set_damage_clip(struct drm_mode_rect *r, int x1, int y1, int x2,
+ int y2)
+{
+ r->x1 = x1;
+ r->y1 = y1;
+ r->x2 = x2;
+ r->y2 = y2;
+}
+
+static void set_damage_blob(struct drm_property_blob *damage_blob,
+ struct drm_mode_rect *r, uint32_t size)
+{
+ damage_blob->length = size;
+ damage_blob->data = r;
+}
+
+static void set_plane_damage(struct drm_plane_state *state,
+struct drm_property_blob *damage_blob)
+{
+ state->fb_damage_clips = damage_blob;
+}
+
+static bool check_damage_clip(struct drm_plane_state *state, struct drm_rect
*r,
+ int x1,
[PATCH v3 18/18] drm/vmwgfx: Don't clear mode::type anymore
With kernel commit 4f09c77b5c3b7, no need to clear mode::type for
user-space bug.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 22 --
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 3 ---
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 2 +-
5 files changed, 3 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 21dcb46a233b..12ce38bb6846 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -2812,28 +2812,6 @@ vmw_kms_create_implicit_placement_property(struct
vmw_private *dev_priv,
}
-
-/**
- * vmw_kms_set_config - Wrapper around drm_atomic_helper_set_config
- *
- * @set: The configuration to set.
- *
- * The vmwgfx Xorg driver doesn't assign the mode::type member, which
- * when drm_mode_set_crtcinfo is called as part of the configuration setting
- * causes it to return incorrect crtc dimensions causing severe problems in
- * the vmwgfx modesetting. So explicitly clear that member before calling
- * into drm_atomic_helper_set_config.
- */
-int vmw_kms_set_config(struct drm_mode_set *set,
- struct drm_modeset_acquire_ctx *ctx)
-{
- if (set && set->mode)
- set->mode->type = 0;
-
- return drm_atomic_helper_set_config(set, ctx);
-}
-
-
/**
* vmw_kms_suspend - Save modesetting state and turn modesetting off.
*
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
index 3e8b8b3d33aa..bc5bccf1db42 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
@@ -572,9 +572,6 @@ int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
bool interruptible,
struct drm_crtc *crtc);
-int vmw_kms_set_config(struct drm_mode_set *set,
- struct drm_modeset_acquire_ctx *ctx);
-
int vmw_du_helper_plane_update(struct vmw_du_update_plane *update);
/**
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 723578117191..b909fbc540ff 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -233,7 +233,7 @@ static const struct drm_crtc_funcs vmw_legacy_crtc_funcs = {
.reset = vmw_du_crtc_reset,
.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
.atomic_destroy_state = vmw_du_crtc_destroy_state,
- .set_config = vmw_kms_set_config,
+ .set_config = drm_atomic_helper_set_config,
};
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 77521075e803..09118ca199fa 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -353,7 +353,7 @@ static const struct drm_crtc_funcs
vmw_screen_object_crtc_funcs = {
.reset = vmw_du_crtc_reset,
.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
.atomic_destroy_state = vmw_du_crtc_destroy_state,
- .set_config = vmw_kms_set_config,
+ .set_config = drm_atomic_helper_set_config,
.page_flip = vmw_sou_crtc_page_flip,
};
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index ae9063482141..b5245a9b5608 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -990,7 +990,7 @@ static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
.reset = vmw_du_crtc_reset,
.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
.atomic_destroy_state = vmw_du_crtc_destroy_state,
- .set_config = vmw_kms_set_config,
+ .set_config = drm_atomic_helper_set_config,
.page_flip = vmw_stdu_crtc_page_flip,
};
--
2.17.1
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 03/18] drm: Add helper iterator functions for plane fb_damage_clips blob
With fb_damage_clips blob property in drm_plane_state, this patch adds
helper iterator to traverse the damage clips that lie inside plane src.
Iterator will return full plane src as damage in case need full plane
update or damage is not specified.
v2:
- Plane src clipping correction
- Handle no plane update case in iter_next
Cc: ville.syrj...@linux.intel.com
Cc: Daniel Vetter
Cc: Pekka Paalanen
Cc: Daniel Stone
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/drm_damage_helper.c | 91 +
include/drm/drm_damage_helper.h | 54 +
include/drm/drm_plane.h | 4 +-
3 files changed, 148 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_damage_helper.c
b/drivers/gpu/drm/drm_damage_helper.c
index c130514bbb21..e80fa6e08a99 100644
--- a/drivers/gpu/drm/drm_damage_helper.c
+++ b/drivers/gpu/drm/drm_damage_helper.c
@@ -65,6 +65,9 @@
*
* Drivers that are interested in damage interface for plane should enable
* FB_DAMAGE_CLIPS property by calling drm_plane_enable_fb_damage_clips().
+ * Drivers implementing damage can use drm_atomic_helper_damage_iter_init() and
+ * drm_atomic_helper_damage_iter_next() helper iterator function to get damage
+ * rectangles clipped to _plane_state.src.
*/
/**
@@ -119,3 +122,91 @@ void drm_atomic_helper_check_plane_damage(struct
drm_atomic_state *state,
}
}
EXPORT_SYMBOL(drm_atomic_helper_check_plane_damage);
+
+/**
+ * drm_atomic_helper_damage_iter_init - Initialize the damage iterator.
+ * @iter: The iterator to initialize.
+ * @old_state: Old plane state for validation.
+ * @new_state: Plane state from which to iterate the damage clips.
+ *
+ * Initialize an iterator, which clips plane damage
+ * _plane_state.fb_damage_clips to plane _plane_state.src. This
iterator
+ * returns full plane src in case damage is not present because either
+ * user-space didn't sent or driver discarded it (it want to do full plane
+ * update). Currently this iterator returns full plane src in case plane src
+ * changed but that can be changed in future to return damage.
+ *
+ * For the case when plane is not visible or plane update should not happen the
+ * first call to iter_next will return false. Note that this helper use clipped
+ * _plane_state.src, so driver calling this helper should have called
+ * drm_atomic_helper_check_plane_state() earlier.
+ */
+void
+drm_atomic_helper_damage_iter_init(struct drm_atomic_helper_damage_iter *iter,
+ const struct drm_plane_state *old_state,
+ const struct drm_plane_state *state)
+{
+ memset(iter, 0, sizeof(*iter));
+
+ if (!state || !state->crtc || !state->fb || !state->visible) {
+ return;
+ }
+
+ iter->clips = drm_helper_get_plane_damage_clips(state);
+ iter->num_clips = drm_plane_get_damage_clips_count(state);
+
+ /* Round down for x1/y1 and round up for x2/y2 to catch all pixels */
+ iter->plane_src.x1 = state->src.x1 >> 16;
+ iter->plane_src.y1 = state->src.y1 >> 16;
+ iter->plane_src.x2 = (state->src.x2 >> 16) + !!(state->src.x2 & 0x);
+ iter->plane_src.y2 = (state->src.y2 >> 16) + !!(state->src.y2 & 0x);
+
+ if (!iter->clips || !drm_rect_equals(>src, _state->src)) {
+ iter->clips = 0;
+ iter->num_clips = 0;
+ iter->full_update = true;
+ }
+}
+EXPORT_SYMBOL(drm_atomic_helper_damage_iter_init);
+
+/**
+ * drm_atomic_helper_damage_iter_next - Advance the damage iterator.
+ * @iter: The iterator to advance.
+ * @rect: Return a rectangle in fb coordinate clipped to plane src.
+ *
+ * Since plane src is in 16.16 fixed point and damage clips are whole number,
+ * this iterator round off clips that intersect with plane src. Round down for
+ * x1/y1 and round up for x2/y2 for the intersected coordinate. Similar
rounding
+ * off for full plane src, in case it's returned as damage. This iterator will
+ * skip damage clips outside of plane src.
+ *
+ * Return: True if the output is valid, false if reached the end.
+ *
+ * If the first call to iterator next returns false then it means no need to
+ * update the plane.
+ */
+bool
+drm_atomic_helper_damage_iter_next(struct drm_atomic_helper_damage_iter *iter,
+ struct drm_rect *rect)
+{
+ bool ret = false;
+
+ if (iter->full_update) {
+ *rect = iter->plane_src;
+ iter->full_update = false;
+ return true;
+ }
+
+ while (iter->curr_clip < iter->num_clips) {
+ *rect = iter->clips[iter->curr_clip];
+ iter->curr_clip++;
+
+ if (drm_rect_intersect(rect, >plane_src)) {
+ ret = true;
+ break;
+ }
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL(drm_atomic_helper_damage_iter_next);
diff --git a/include/drm/drm_damage_helper.h
[PATCH v3 07/18] drm/vmwgfx: Implement STDU plane update for surface backed fb
Using the new interface implement STDU plane update for surface backed
fb.
v2: Rebase to new resource validation.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 182 ++-
1 file changed, 181 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index e086565c1da6..7d5e080f8e29 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -30,7 +30,7 @@
#include
#include
#include
-
+#include
#define vmw_crtc_to_stdu(x) \
container_of(x, struct vmw_screen_target_display_unit, base.crtc)
@@ -92,6 +92,10 @@ struct vmw_stdu_surface_copy {
SVGA3dCmdSurfaceCopy body;
};
+struct vmw_stdu_update_gb_image {
+ SVGA3dCmdHeader header;
+ SVGA3dCmdUpdateGBImage body;
+};
/**
* struct vmw_screen_target_display_unit
@@ -1257,7 +1261,183 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane
*plane,
return ret;
}
+static uint32_t
+vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
+ uint32_t num_hits)
+{
+ struct vmw_framebuffer_surface *vfbs;
+ uint32_t size = 0;
+
+ vfbs = container_of(update->vfb, typeof(*vfbs), base);
+
+ if (vfbs->is_bo_proxy)
+ size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
+
+ size += sizeof(struct vmw_stdu_update);
+
+ return size;
+}
+
+static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
+ uint32_t num_hits)
+{
+ struct vmw_framebuffer_surface *vfbs;
+ uint32_t size = 0;
+
+ vfbs = container_of(update->vfb, typeof(*vfbs), base);
+
+ if (vfbs->is_bo_proxy)
+ size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
+
+ size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
+ num_hits + sizeof(struct vmw_stdu_update);
+
+ return size;
+}
+
+static uint32_t
+vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
+{
+ struct vmw_framebuffer_surface *vfbs;
+ struct drm_plane_state *state = update->plane->state;
+ struct drm_plane_state *old_state = update->old_state;
+ struct vmw_stdu_update_gb_image *cmd_update = cmd;
+ struct drm_atomic_helper_damage_iter iter;
+ struct drm_rect clip;
+ uint32_t copy_size = 0;
+
+ vfbs = container_of(update->vfb, typeof(*vfbs), base);
+
+ /*
+* proxy surface is special where a buffer object type fb is wrapped
+* in a surface and need an update gb image command to sync with device.
+*/
+ drm_atomic_helper_damage_iter_init(, old_state, state);
+ while (drm_atomic_helper_damage_iter_next(, )) {
+ SVGA3dBox *box = _update->body.box;
+
+ cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
+ cmd_update->header.size = sizeof(cmd_update->body);
+ cmd_update->body.image.sid = vfbs->surface->res.id;
+ cmd_update->body.image.face = 0;
+ cmd_update->body.image.mipmap = 0;
+
+ box->x = clip.x1;
+ box->y = clip.y1;
+ box->z = 0;
+ box->w = drm_rect_width();
+ box->h = drm_rect_height();
+ box->d = 1;
+
+ copy_size += sizeof(*cmd_update);
+ cmd_update++;
+ }
+
+ return copy_size;
+}
+static uint32_t
+vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd,
+ uint32_t num_hits)
+{
+ struct vmw_screen_target_display_unit *stdu;
+ struct vmw_framebuffer_surface *vfbs;
+ struct vmw_stdu_surface_copy *cmd_copy = cmd;
+
+ stdu = container_of(update->du, typeof(*stdu), base);
+ vfbs = container_of(update->vfb, typeof(*vfbs), base);
+
+ cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
+ cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
+ num_hits;
+ cmd_copy->body.src.sid = vfbs->surface->res.id;
+ cmd_copy->body.dest.sid = stdu->display_srf->res.id;
+
+ return sizeof(*cmd_copy);
+}
+
+static uint32_t
+vmw_stdu_surface_populate_clip(struct vmw_du_update_plane *update, void *cmd,
+ struct drm_rect *clip, uint32_t fb_x,
+ uint32_t fb_y)
+{
+ struct SVGA3dCopyBox *box = cmd;
+
+ box->srcx = fb_x;
+ box->srcy = fb_y;
+ box->srcz = 0;
+ box->x = clip->x1;
+ box->y = clip->y1;
+ box->z = 0;
+ box->w = drm_rect_width(clip);
+ box->h = drm_rect_height(clip);
+ box->d = 1;
+
+ return sizeof(*box);
+}
+
+static uint32_t
+vmw_stud_surface_populate_update(struct vmw_du_update_plane *update, void
*cmd,
+struct
[PATCH v3 11/18] drm/vmwgfx: Enable FB_DAMAGE_CLIPS property for STDU primary plane
STDU primary plane now support damage clips, enable it for user-space. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c index 1821c4be0ef4..ae9063482141 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c @@ -1844,6 +1844,7 @@ static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit) } drm_plane_helper_add(primary, _stdu_primary_plane_helper_funcs); + drm_plane_enable_fb_damage_clips(primary); /* Initialize cursor plane */ vmw_du_plane_reset(cursor); -- 2.17.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 02/18] drm: Add a new helper to validate damage during atomic_check
This helper function makes sure that damage from plane state is
discarded for full modeset cycle. For some reason, which makes damage
irrelevant, driver might want to do a full plane update for e.g. full
modeset. Such cases must be checked here.
Cc: ville.syrj...@linux.intel.com
Cc: Daniel Vetter
Cc: Pekka Paalanen
Cc: Daniel Stone
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/drm_atomic_helper.c | 3 +++
drivers/gpu/drm/drm_damage_helper.c | 38 +
include/drm/drm_damage_helper.h | 2 ++
3 files changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 35395577ca86..41dabb817c57 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
#include
#include "drm_crtc_helper_internal.h"
@@ -828,6 +829,8 @@ drm_atomic_helper_check_planes(struct drm_device *dev,
drm_atomic_helper_plane_changed(state, old_plane_state,
new_plane_state, plane);
+ drm_atomic_helper_check_plane_damage(state, new_plane_state);
+
if (!funcs || !funcs->atomic_check)
continue;
diff --git a/drivers/gpu/drm/drm_damage_helper.c
b/drivers/gpu/drm/drm_damage_helper.c
index 8dc906a489a9..c130514bbb21 100644
--- a/drivers/gpu/drm/drm_damage_helper.c
+++ b/drivers/gpu/drm/drm_damage_helper.c
@@ -29,6 +29,7 @@
*
**/
+#include
#include
/**
@@ -81,3 +82,40 @@ void drm_plane_enable_fb_damage_clips(struct drm_plane
*plane)
0);
}
EXPORT_SYMBOL(drm_plane_enable_fb_damage_clips);
+
+/**
+ * drm_atomic_helper_check_plane_damage - Verify plane damage on atomic_check.
+ * @state: The driver state object.
+ * @plane_state: Plane state for which to verify damage.
+ *
+ * This helper function makes sure that damage from plane state is discarded
+ * for full modeset cycle. For some reason, which makes damage irrelevant,
+ * driver might want to do a full plane update for e.g. full modeset. Such
+ * cases must be checked here. Note that NULL _plane_state.fb_damage_clips
+ * in plane state means that full update should happen. It also ensue helper
+ * iterator to return _plane_state.src as damage.
+ *
+ * Currently this helper discard damage during full modeset only. This is
+ * because, presently only vmwgfx exposes damage interface, which need full
+ * plane update during full modeset only. As more driver add damage support,
+ * should any state change need full plane update, must be added here.
+ */
+void drm_atomic_helper_check_plane_damage(struct drm_atomic_state *state,
+ struct drm_plane_state *plane_state)
+{
+ struct drm_crtc_state *crtc_state;
+
+ if (plane_state->crtc) {
+ crtc_state = drm_atomic_get_new_crtc_state(state,
+ plane_state->crtc);
+
+ if (WARN_ON(!crtc_state))
+ return;
+
+ if (drm_atomic_crtc_needs_modeset(crtc_state)) {
+ drm_property_blob_put(plane_state->fb_damage_clips);
+ plane_state->fb_damage_clips = NULL;
+ }
+ }
+}
+EXPORT_SYMBOL(drm_atomic_helper_check_plane_damage);
diff --git a/include/drm/drm_damage_helper.h b/include/drm/drm_damage_helper.h
index 4947c614fff9..59584cbf3d40 100644
--- a/include/drm/drm_damage_helper.h
+++ b/include/drm/drm_damage_helper.h
@@ -35,5 +35,7 @@
#include
void drm_plane_enable_fb_damage_clips(struct drm_plane *plane);
+void drm_atomic_helper_check_plane_damage(struct drm_atomic_state *state,
+ struct drm_plane_state *plane_state);
#endif
--
2.17.1
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[PATCH v3 06/18] drm/vmwgfx: Add a new interface for plane update on a display unit
Add a new struct vmw_du_update_plane similar to vmw_kms_dirty which
represent the flow of operations needed to update a display unit from
surface or bo (blit a new framebuffer).
v2:
- Kernel doc correction.
- Rebase.
v3: Rebase to new resource validation.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 122
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 111 +
2 files changed, 233 insertions(+)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index dca04d4246ea..059f57bd8170 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
/* Might need a hrtimer here? */
#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
@@ -2935,3 +2936,124 @@ void vmw_kms_lost_device(struct drm_device *dev)
{
drm_atomic_helper_shutdown(dev);
}
+
+/**
+ * vmw_du_helper_plane_update - Helper to do plane update on a display unit.
+ * @update: The closure structure.
+ *
+ * Call this helper after setting callbacks in _du_update_plane to do plane
+ * update on display unit.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int vmw_du_helper_plane_update(struct vmw_du_update_plane *update)
+{
+ struct drm_plane_state *state = update->plane->state;
+ struct drm_plane_state *old_state = update->old_state;
+ struct drm_atomic_helper_damage_iter iter;
+ struct drm_rect clip;
+ struct drm_rect bb;
+ DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
+ uint32_t reserved_size = 0;
+ uint32_t submit_size = 0;
+ uint32_t curr_size = 0;
+ uint32_t num_hits = 0;
+ void *cmd_start;
+ char *cmd_next;
+ int ret;
+
+ /*
+* Iterate in advance to check if really need plane update and find the
+* number of clips that actually are in plane src for fifo allocation.
+*/
+ drm_atomic_helper_damage_iter_init(, old_state, state);
+ drm_atomic_for_each_plane_damage(, )
+ num_hits++;
+
+ if (num_hits == 0)
+ return 0;
+
+ if (update->vfb->bo) {
+ struct vmw_framebuffer_bo *vfbbo =
+ container_of(update->vfb, typeof(*vfbbo), base);
+
+ ret = vmw_validation_add_bo(_ctx, vfbbo->buffer, false,
+ update->cpu_blit);
+ } else {
+ struct vmw_framebuffer_surface *vfbs =
+ container_of(update->vfb, typeof(*vfbs), base);
+
+ ret = vmw_validation_add_resource(_ctx, >surface->res,
+ 0, NULL, NULL);
+ }
+
+ if (ret)
+ return ret;
+
+ ret = vmw_validation_prepare(_ctx, update->mutex, update->intr);
+ if (ret)
+ goto out_unref;
+
+ reserved_size = update->calc_fifo_size(update, num_hits);
+ cmd_start = vmw_fifo_reserve(update->dev_priv, reserved_size);
+ if (!cmd_start) {
+ ret = -ENOMEM;
+ goto out_revert;
+ }
+
+ cmd_next = cmd_start;
+
+ if (update->post_prepare) {
+ curr_size = update->post_prepare(update, cmd_next);
+ cmd_next += curr_size;
+ submit_size += curr_size;
+ }
+
+ if (update->pre_clip) {
+ curr_size = update->pre_clip(update, cmd_next, num_hits);
+ cmd_next += curr_size;
+ submit_size += curr_size;
+ }
+
+ bb.x1 = INT_MAX;
+ bb.y1 = INT_MAX;
+ bb.x2 = INT_MIN;
+ bb.y2 = INT_MIN;
+
+ drm_atomic_helper_damage_iter_init(, old_state, state);
+ drm_atomic_for_each_plane_damage(, ) {
+ uint32_t fb_x = clip.x1;
+ uint32_t fb_y = clip.y1;
+
+ vmw_du_translate_to_crtc(state, );
+ if (update->clip) {
+ curr_size = update->clip(update, cmd_next, , fb_x,
+fb_y);
+ cmd_next += curr_size;
+ submit_size += curr_size;
+ }
+ bb.x1 = min_t(int, bb.x1, clip.x1);
+ bb.y1 = min_t(int, bb.y1, clip.y1);
+ bb.x2 = max_t(int, bb.x2, clip.x2);
+ bb.y2 = max_t(int, bb.y2, clip.y2);
+ }
+
+ curr_size = update->post_clip(update, cmd_next, );
+ submit_size += curr_size;
+
+ if (reserved_size < submit_size)
+ submit_size = 0;
+
+ vmw_fifo_commit(update->dev_priv, submit_size);
+
+ vmw_kms_helper_validation_finish(update->dev_priv, NULL, _ctx,
+update->out_fence, NULL);
+ return ret;
+
+out_revert:
+ vmw_validation_revert(_ctx);
+
+out_unref:
+ vmw_validation_unref_lists(_ctx);
+ return ret;
+}
diff --git
[PATCH v3 13/18] drm/vmwgfx: Implement SOU plane update for BO backed fb
Using the new interface implement SOU plane update for BO backed fb.
v2: Rebase to new resource validation.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 101 +++
1 file changed, 101 insertions(+)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 991a6e87370a..f9bb71e489db 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -76,6 +76,11 @@ struct vmw_kms_sou_dirty_cmd {
SVGA3dCmdBlitSurfaceToScreen body;
};
+struct vmw_kms_sou_define_gmrfb {
+ uint32_t header;
+ SVGAFifoCmdDefineGMRFB body;
+};
+
/**
* Display unit using screen objects.
*/
@@ -499,6 +504,102 @@ vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane,
return vmw_bo_pin_in_vram(dev_priv, vps->bo, true);
}
+static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update,
+uint32_t num_hits)
+{
+ return sizeof(struct vmw_kms_sou_define_gmrfb) +
+ sizeof(struct vmw_kms_sou_bo_blit) * num_hits;
+}
+
+static uint32_t vmw_sou_bo_define_gmrfb(struct vmw_du_update_plane *update,
+ void *cmd)
+{
+ struct vmw_framebuffer_bo *vfbbo =
+ container_of(update->vfb, typeof(*vfbbo), base);
+ struct vmw_kms_sou_define_gmrfb *gmr = cmd;
+ int depth = update->vfb->base.format->depth;
+
+ /* Emulate RGBA support, contrary to svga_reg.h this is not
+* supported by hosts. This is only a problem if we are reading
+* this value later and expecting what we uploaded back.
+*/
+ if (depth == 32)
+ depth = 24;
+
+ gmr->header = SVGA_CMD_DEFINE_GMRFB;
+
+ gmr->body.format.bitsPerPixel = update->vfb->base.format->cpp[0] * 8;
+ gmr->body.format.colorDepth = depth;
+ gmr->body.format.reserved = 0;
+ gmr->body.bytesPerLine = update->vfb->base.pitches[0];
+ vmw_bo_get_guest_ptr(>buffer->base, >body.ptr);
+
+ return sizeof(*gmr);
+}
+
+static uint32_t vmw_sou_bo_populate_clip(struct vmw_du_update_plane *update,
+void *cmd, struct drm_rect *clip,
+uint32_t fb_x, uint32_t fb_y)
+{
+ struct vmw_kms_sou_bo_blit *blit = cmd;
+
+ blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
+ blit->body.destScreenId = update->du->unit;
+ blit->body.srcOrigin.x = fb_x;
+ blit->body.srcOrigin.y = fb_y;
+ blit->body.destRect.left = clip->x1;
+ blit->body.destRect.top = clip->y1;
+ blit->body.destRect.right = clip->x2;
+ blit->body.destRect.bottom = clip->y2;
+
+ return sizeof(*blit);
+}
+
+static uint32_t vmw_stud_bo_post_clip(struct vmw_du_update_plane *update,
+ void *cmd, struct drm_rect *bb)
+{
+ return 0;
+}
+
+/**
+ * vmw_sou_plane_update_bo - Update display unit for bo backed fb.
+ * @dev_priv: Device private.
+ * @plane: Plane state.
+ * @old_state: Old plane state.
+ * @vfb: Framebuffer which is blitted to display unit.
+ * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
+ * The returned fence pointer may be NULL in which case the device
+ * has already synchronized.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+static int vmw_sou_plane_update_bo(struct vmw_private *dev_priv,
+ struct drm_plane *plane,
+ struct drm_plane_state *old_state,
+ struct vmw_framebuffer *vfb,
+ struct vmw_fence_obj **out_fence)
+{
+ struct vmw_du_update_plane_buffer bo_update;
+
+ memset(_update, 0, sizeof(struct vmw_du_update_plane_buffer));
+ bo_update.base.plane = plane;
+ bo_update.base.old_state = old_state;
+ bo_update.base.dev_priv = dev_priv;
+ bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
+ bo_update.base.vfb = vfb;
+ bo_update.base.out_fence = out_fence;
+ bo_update.base.mutex = NULL;
+ bo_update.base.cpu_blit = false;
+ bo_update.base.intr = true;
+
+ bo_update.base.calc_fifo_size = vmw_sou_bo_fifo_size;
+ bo_update.base.post_prepare = vmw_sou_bo_define_gmrfb;
+ bo_update.base.clip = vmw_sou_bo_populate_clip;
+ bo_update.base.post_clip = vmw_stud_bo_post_clip;
+
+ return vmw_du_helper_plane_update(_update.base);
+}
+
static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update,
uint32_t num_hits)
{
--
2.17.1
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[PATCH v3 10/18] drm/vmwgfx: Updated comment for stdu plane update
Update the commet to sync with code.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index 64d11af2b81b..1821c4be0ef4 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -1653,7 +1653,6 @@ static int vmw_stdu_plane_update_surface(struct
vmw_private *dev_priv,
/**
* vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
- *
* @plane: display plane
* @old_state: Only used to get crtc info
*
@@ -1674,10 +1673,7 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
struct vmw_private *dev_priv;
int ret;
- /*
-* We cannot really fail this function, so if we do, then output an
-* error and maintain consistent atomic state.
-*/
+ /* If somehow gets a device error, maintain consistent atomic state */
if (crtc && plane->state->fb) {
struct vmw_framebuffer *vfb =
vmw_framebuffer_to_vfb(plane->state->fb);
@@ -1706,12 +1702,7 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
stdu = vmw_crtc_to_stdu(crtc);
dev_priv = vmw_priv(crtc->dev);
- /*
-* When disabling a plane, CRTC and FB should always be NULL
-* together, otherwise it's an error.
-* Here primary plane is being disable so blank the screen
-* target display unit, if not already done.
-*/
+ /* Blank STDU when fb and crtc are NULL */
if (!stdu->defined)
return;
@@ -1726,11 +1717,8 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
return;
}
+ /* In case of error vblank event is sent in vmw_du_crtc_atomic_flush */
event = crtc->state->event;
- /*
-* In case of failure and other cases, vblank event will be sent in
-* vmw_du_crtc_atomic_flush.
-*/
if (event && fence) {
struct drm_file *file_priv = event->base.file_priv;
--
2.17.1
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[PATCH v3 01/18] drm: Add a new plane property to send damage during plane update
From: Lukasz Spintzyk
FB_DAMAGE_CLIPS is an optional plane property to mark damaged regions
on the plane in framebuffer coordinates of the framebuffer attached to
the plane.
The layout of blob data is simply an array of "struct drm_mode_rect".
Unlike plane src coordinates, damage clips are not in 16.16 fixed point.
As plane src in framebuffer cannot be negative so are damage clips. In
damage clip, x1/y1 are inclusive and x2/y2 are exclusive.
This patch also exports the kernel internal drm_rect to userspace as
drm_mode_rect. This is because "struct drm_clip_rect" is not sufficient
to represent damage for current plane size.
Driver which are interested in enabling FB_DAMAGE_CLIPS property for a
plane should enable this property using drm_plane_enable_damage_clips.
v2:
- Input validation on damage clips against framebuffer size.
- Doc update, other minor changes.
Cc: ville.syrj...@linux.intel.com
Cc: Daniel Vetter
Cc: Pekka Paalanen
Cc: Daniel Stone
Signed-off-by: Lukasz Spintzyk
Signed-off-by: Deepak Rawat
---
Documentation/gpu/drm-kms.rst | 12 +
drivers/gpu/drm/Makefile| 3 +-
drivers/gpu/drm/drm_atomic.c| 22
drivers/gpu/drm/drm_atomic_helper.c | 3 ++
drivers/gpu/drm/drm_atomic_uapi.c | 13 +
drivers/gpu/drm/drm_damage_helper.c | 83 +
drivers/gpu/drm/drm_mode_config.c | 6 +++
include/drm/drm_damage_helper.h | 39 ++
include/drm/drm_mode_config.h | 9
include/drm/drm_plane.h | 40 ++
include/uapi/drm/drm_mode.h | 19 +++
11 files changed, 248 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/drm_damage_helper.c
create mode 100644 include/drm/drm_damage_helper.h
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
index 4b1501b4835b..6c3e89e324f8 100644
--- a/Documentation/gpu/drm-kms.rst
+++ b/Documentation/gpu/drm-kms.rst
@@ -554,6 +554,18 @@ Plane Composition Properties
.. kernel-doc:: drivers/gpu/drm/drm_blend.c
:export:
+FB_DAMAGE_CLIPS
+~~~
+
+.. kernel-doc:: drivers/gpu/drm/drm_damage_helper.c
+ :doc: overview
+
+.. kernel-doc:: drivers/gpu/drm/drm_damage_helper.c
+ :export:
+
+.. kernel-doc:: include/drm/drm_damage_helper.h
+ :internal:
+
Color Management Properties
---
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index bc6a16a3c36e..2ed4c66ca849 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -36,7 +36,8 @@ drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o
drm_probe_helper.o \
drm_plane_helper.o drm_dp_mst_topology.o drm_atomic_helper.o \
drm_kms_helper_common.o drm_dp_dual_mode_helper.o \
drm_simple_kms_helper.o drm_modeset_helper.o \
- drm_scdc_helper.o drm_gem_framebuffer_helper.o
+ drm_scdc_helper.o drm_gem_framebuffer_helper.o \
+ drm_damage_helper.o
drm_kms_helper-$(CONFIG_DRM_PANEL_BRIDGE) += bridge/panel.o
drm_kms_helper-$(CONFIG_DRM_FBDEV_EMULATION) += drm_fb_helper.o
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 2870ae205237..ff488b47b5bb 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -516,6 +516,8 @@ static int drm_atomic_plane_check(struct drm_plane *plane,
struct drm_plane_state *state)
{
unsigned int fb_width, fb_height;
+ struct drm_mode_rect *clips;
+ uint32_t num_clips;
int ret;
/* either *both* CRTC and FB must be set, or neither */
@@ -585,6 +587,26 @@ static int drm_atomic_plane_check(struct drm_plane *plane,
return -ENOSPC;
}
+ clips = drm_plane_get_damage_clips(state);
+ num_clips = drm_plane_get_damage_clips_count(state);
+
+ /* Make sure damage clips are valid and inside the fb. */
+ while (num_clips > 0) {
+ if (clips->x1 >= clips->x2 ||
+ clips->y1 >= clips->y2 ||
+ clips->x1 < 0 ||
+ clips->y1 < 0 ||
+ clips->x2 > fb_width ||
+ clips->y2 > fb_height) {
+ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] invalid damage clip %d
%d %d %d\n",
+plane->base.id, plane->name, clips->x1,
+clips->y1, clips->x2, clips->y2);
+ return -EINVAL;
+ }
+ clips++;
+ num_clips--;
+ }
+
if (plane_switching_crtc(state->state, plane, state)) {
DRM_DEBUG_ATOMIC("[PLANE:%d:%s] switching CRTC directly\n",
plane->base.id, plane->name);
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index e49b22381048..35395577ca86 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++
[PATCH v3 05/18] drm: Add helper to implement legacy dirtyfb
From: Rob Clark
Add an atomic helper to implement dirtyfb support. This is needed to
support DSI command-mode panels with x11 userspace (ie. when we can't
rely on pageflips to trigger a flush to the panel).
v2: Modified the helper to use plane fb_damage_clips property and
removed plane_state::dirty flag.
v3:
- Use uapi drm_mode_rect.
- Support annotate flags.
v4: Correct kernel doc.
Cc: ville.syrj...@linux.intel.com
Cc: Daniel Vetter
Cc: Pekka Paalanen
Cc: Daniel Stone
Signed-off-by: Rob Clark
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/drm_damage_helper.c | 124
include/drm/drm_damage_helper.h | 4 +
2 files changed, 128 insertions(+)
diff --git a/drivers/gpu/drm/drm_damage_helper.c
b/drivers/gpu/drm/drm_damage_helper.c
index e80fa6e08a99..fdb5a072d7e9 100644
--- a/drivers/gpu/drm/drm_damage_helper.c
+++ b/drivers/gpu/drm/drm_damage_helper.c
@@ -26,6 +26,7 @@
*
* Authors:
* Deepak Rawat
+ * Rob Clark
*
**/
@@ -70,6 +71,21 @@
* rectangles clipped to _plane_state.src.
*/
+static void convert_clip_rect_to_rect(const struct drm_clip_rect *src,
+ struct drm_mode_rect *dest,
+ uint32_t num_clips, uint32_t src_inc)
+{
+ while (num_clips > 0) {
+ dest->x1 = src->x1;
+ dest->y1 = src->y1;
+ dest->x2 = src->x2;
+ dest->y2 = src->y2;
+ src += src_inc;
+ dest++;
+ num_clips--;
+ }
+}
+
/**
* drm_plane_enable_fb_damage_clips - Enables plane fb damage clips property.
* @plane: Plane on which to enable damage clips property.
@@ -123,6 +139,114 @@ void drm_atomic_helper_check_plane_damage(struct
drm_atomic_state *state,
}
EXPORT_SYMBOL(drm_atomic_helper_check_plane_damage);
+/**
+ * drm_atomic_helper_dirtyfb - Helper for dirtyfb.
+ * @fb: DRM framebuffer.
+ * @file_priv: Drm file for the ioctl call.
+ * @flags: Dirty fb annotate flags.
+ * @color: Color for annotate fill.
+ * @clips: Dirty region.
+ * @num_clips: Count of clip in clips.
+ *
+ * A helper to implement _framebuffer_funcs::dirty using damage interface
+ * during plane update. If num_clips is 0 then this helper will do a full plane
+ * update. This is the same behaviour expected by dirtyfb ioctl().
+ *
+ * Note that this helper is blocking implementation. This is because current
+ * user of this helper is vmwgfx which needs blocking.
+ *
+ * Return: Zero on success, negative errno on failure.
+ */
+int drm_atomic_helper_dirtyfb(struct drm_framebuffer *fb,
+ struct drm_file *file_priv, unsigned flags,
+ unsigned color, struct drm_clip_rect *clips,
+ unsigned num_clips)
+{
+ struct drm_modeset_acquire_ctx ctx;
+ struct drm_property_blob *damage = NULL;
+ struct drm_mode_rect *rects = NULL;
+ struct drm_atomic_state *state;
+ struct drm_plane *plane;
+ int ret = 0;
+
+ /*
+* When called from ioctl, we are interruptable, but not when called
+* internally (ie. defio worker)
+*/
+ drm_modeset_acquire_init(,
+ file_priv ? DRM_MODESET_ACQUIRE_INTERRUPTIBLE : 0);
+
+ state = drm_atomic_state_alloc(fb->dev);
+ if (!state) {
+ ret = -ENOMEM;
+ goto out;
+ }
+ state->acquire_ctx =
+
+ if (clips) {
+ uint32_t inc = 1;
+
+ if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
+ inc = 2;
+ num_clips /= 2;
+ }
+
+ rects = kcalloc(num_clips, sizeof(*rects), GFP_KERNEL);
+ if (!rects) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ convert_clip_rect_to_rect(clips, rects, num_clips, inc);
+ damage = drm_property_create_blob(fb->dev,
+ num_clips * sizeof(*rects),
+ rects);
+ if (IS_ERR(damage)) {
+ ret = PTR_ERR(damage);
+ damage = NULL;
+ goto out;
+ }
+ }
+
+retry:
+ drm_for_each_plane(plane, fb->dev) {
+ struct drm_plane_state *plane_state;
+
+ if (plane->state->fb != fb)
+ continue;
+
+ plane_state = drm_atomic_get_plane_state(state, plane);
+ if (IS_ERR(plane_state)) {
+ ret = PTR_ERR(plane_state);
+ goto out;
+ }
+
+ drm_property_replace_blob(_state->fb_damage_clips,
+ damage);
+ }
+
+ ret = drm_atomic_commit(state);
+
+out:
+ if
[PATCH v3 09/18] drm/vmwgfx: Use the new interface for STDU plane update
With new interface to do plane update on STDU available, use that
instead of old kms_dirty.
v2: Use fence from new resource validation.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 54 +++-
1 file changed, 20 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index a084a0f533d8..64d11af2b81b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -1670,6 +1670,7 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
struct drm_crtc *crtc = plane->state->crtc;
struct vmw_screen_target_display_unit *stdu;
struct drm_pending_vblank_event *event;
+ struct vmw_fence_obj *fence = NULL;
struct vmw_private *dev_priv;
int ret;
@@ -1680,7 +1681,6 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
if (crtc && plane->state->fb) {
struct vmw_framebuffer *vfb =
vmw_framebuffer_to_vfb(plane->state->fb);
- struct drm_vmw_rect vclips;
stdu = vmw_crtc_to_stdu(crtc);
dev_priv = vmw_priv(crtc->dev);
@@ -1688,23 +1688,17 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
stdu->content_fb_type = vps->content_fb_type;
stdu->cpp = vps->cpp;
- vclips.x = crtc->x;
- vclips.y = crtc->y;
- vclips.w = crtc->mode.hdisplay;
- vclips.h = crtc->mode.vdisplay;
-
ret = vmw_stdu_bind_st(dev_priv, stdu, >display_srf->res);
if (ret)
DRM_ERROR("Failed to bind surface to STDU.\n");
if (vfb->bo)
- ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL,
- , 1, 1, true, false,
- crtc);
+ ret = vmw_stdu_plane_update_bo(dev_priv, plane,
+ old_state, vfb, );
else
- ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL,
-, NULL, 0, 0,
-1, 1, NULL, crtc);
+ ret = vmw_stdu_plane_update_surface(dev_priv, plane,
+ old_state, vfb,
+ );
if (ret)
DRM_ERROR("Failed to update STDU.\n");
} else {
@@ -1737,31 +1731,23 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane
*plane,
* In case of failure and other cases, vblank event will be sent in
* vmw_du_crtc_atomic_flush.
*/
- if (event && (ret == 0)) {
- struct vmw_fence_obj *fence = NULL;
+ if (event && fence) {
struct drm_file *file_priv = event->base.file_priv;
- vmw_execbuf_fence_commands(NULL, dev_priv, , NULL);
-
- /*
-* If fence is NULL, then already sync.
-*/
- if (fence) {
- ret = vmw_event_fence_action_queue(
- file_priv, fence, >base,
- >event.vbl.tv_sec,
- >event.vbl.tv_usec,
- true);
- if (ret)
- DRM_ERROR("Failed to queue event on fence.\n");
- else
- crtc->state->event = NULL;
-
- vmw_fence_obj_unreference();
- }
- } else {
- (void) vmw_fifo_flush(dev_priv, false);
+ ret = vmw_event_fence_action_queue(file_priv,
+ fence,
+ >base,
+ >event.vbl.tv_sec,
+ >event.vbl.tv_usec,
+ true);
+ if (ret)
+ DRM_ERROR("Failed to queue event on fence.\n");
+ else
+ crtc->state->event = NULL;
}
+
+ if (fence)
+ vmw_fence_obj_unreference();
}
--
2.17.1
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
nouveau-next 4.20
Hey Dave, Just initial HDMI 2.0 support, and a bunch of other cleanups. Ben. The following changes since commit 62e681f7dcab746412dce22d4b75b32c5ea38cdb: Merge tag 'drm-msm-fixes-2018-10-09' of git://people.freedesktop.org/~robclark/linux into drm-next (2018-10-10 16:49:55 +1000) are available in the Git repository at: git://github.com/skeggsb/linux linux-4.20 for you to fetch changes up to 74a07c0a59fa372b069d879971ba4d9e341979cf: drm/nouveau/secboot/acr: fix memory leak (2018-10-11 09:54:10 +1000) Gustavo A. R. Silva (1): drm/nouveau/secboot/acr: fix memory leak Ilia Mirkin (5): drm/nouveau/disp: add a way to configure scrambling/tmds for hdmi 2.0 drm/nouveau/disp/gm200-: add scdc parameter setter drm/nouveau/disp: keep track of high-speed state, program into clock drm/nouveau/disp: add support for setting scdc parameters for high modes drm/nouveau/disp: take sink support into account for exposing 594mhz Lyude Paul (8): drm/nouveau: Check backlight IDs are >= 0, not > 0 drm/nouveau: Add NV_PRINTK_ONCE and variants drm/nouveau: Move backlight device into nouveau_connector drm/nouveau/drm/nouveau: s/nouveau_backlight_exit/nouveau_backlight_fini/ drm/nouveau: Cleanup indenting in nouveau_backlight.c drm/nouveau: Refactor nvXX_backlight_init() drm/nouveau: Fix potential memory leak in nouveau_drm_load() drm/nouveau: Start using new drm_dev initialization helpers drivers/gpu/drm/nouveau/dispnv50/disp.c| 40 +++- drivers/gpu/drm/nouveau/include/nvif/cl5070.h | 5 +- drivers/gpu/drm/nouveau/nouveau_backlight.c| 220 ++--- drivers/gpu/drm/nouveau/nouveau_connector.c| 54 +++-- drivers/gpu/drm/nouveau/nouveau_connector.h| 33 drivers/gpu/drm/nouveau/nouveau_display.c | 2 - drivers/gpu/drm/nouveau/nouveau_display.h | 25 --- drivers/gpu/drm/nouveau/nouveau_drm.c | 179 ++--- drivers/gpu/drm/nouveau/nouveau_drv.h | 10 +- drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild| 1 + .../gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c | 36 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h | 8 + .../gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c| 10 +- .../gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c| 11 +- .../gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c| 1 + .../gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c| 1 + .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 1 + 17 files changed, 401 insertions(+), 236 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v12 2/2] drm/i915: Allow "max bpc" property to limit pipe_bpp
Use the newly added "max bpc" connector property to limit pipe bpp.
V3: Use drm_connector_state to access the "max bpc" property
V4: Initialize the drm property, add suuport to DP(Ville)
V5: Use the property in the connector and fix CI failure(Ville)
V6: Use the core function to attach max_bpc property, remove the redundant
clamping of pipe bpp based on connector info
V7: Fix Checkpatch warnings
V9: Cleanup connected_sink_max_bpp and fix initial value in DP(Ville)
V12: Fix debug message(Ville)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 48 +---
drivers/gpu/drm/i915/intel_dp.c | 4 +++
drivers/gpu/drm/i915/intel_hdmi.c| 5
3 files changed, 37 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index a145efba9157..a597c4410f5d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10869,30 +10869,38 @@ static void
intel_modeset_update_connector_atomic_state(struct drm_device *dev)
drm_connector_list_iter_end(_iter);
}
-static void
-connected_sink_compute_bpp(struct intel_connector *connector,
- struct intel_crtc_state *pipe_config)
+static int
+connected_sink_max_bpp(const struct drm_connector_state *conn_state,
+ struct intel_crtc_state *pipe_config)
{
- const struct drm_display_info *info = >base.display_info;
- int bpp = pipe_config->pipe_bpp;
+ int bpp;
+ struct drm_display_info *info = _state->connector->display_info;
- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] checking for sink bpp constrains\n",
- connector->base.base.id,
- connector->base.name);
+ bpp = min(pipe_config->pipe_bpp, conn_state->max_bpc * 3);
- /* Don't use an invalid EDID bpc value */
- if (info->bpc != 0 && info->bpc * 3 < bpp) {
- DRM_DEBUG_KMS("clamping display bpp (was %d) to EDID reported
max of %d\n",
- bpp, info->bpc * 3);
- pipe_config->pipe_bpp = info->bpc * 3;
+ switch (conn_state->max_bpc) {
+ case 6 ... 7:
+ pipe_config->pipe_bpp = 6 * 3;
+ case 8 ... 9:
+ pipe_config->pipe_bpp = 8 * 3;
+ break;
+ case 10 ... 11:
+ pipe_config->pipe_bpp = 10 * 3;
+ break;
+ case 12:
+ pipe_config->pipe_bpp = 12 * 3;
+ break;
+ default:
+ return -EINVAL;
}
- /* Clamp bpp to 8 on screens without EDID 1.4 */
- if (info->bpc == 0 && bpp > 24) {
- DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit
of 24\n",
- bpp);
- pipe_config->pipe_bpp = 24;
+ if (bpp != pipe_config->pipe_bpp) {
+ DRM_DEBUG_KMS("Limiting display bpp to %d instead of Edid bpp "
+ "%d, requested bpp %d\n", bpp, 3 * info->bpc,
+ 3 * conn_state->max_requested_bpc);
+ pipe_config->pipe_bpp = bpp;
}
+ return 0;
}
static int
@@ -10923,8 +10931,8 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
if (connector_state->crtc != >base)
continue;
- connected_sink_compute_bpp(to_intel_connector(connector),
- pipe_config);
+ if (connected_sink_max_bpp(connector_state, pipe_config) < 0)
+ return -EINVAL;
}
return bpp;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0855b9785f7b..863c8832fe8b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5705,6 +5705,10 @@ intel_dp_add_properties(struct intel_dp *intel_dp,
struct drm_connector *connect
intel_attach_force_audio_property(connector);
intel_attach_broadcast_rgb_property(connector);
+ if (HAS_GMCH_DISPLAY(dev_priv))
+ drm_connector_attach_max_bpc_property(connector, 6, 10);
+ else if (INTEL_GEN(dev_priv) >= 5)
+ drm_connector_attach_max_bpc_property(connector, 6, 12);
if (intel_dp_is_edp(intel_dp)) {
u32 allowed_scalers;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 2c53efc463e6..3158ab085a30 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2103,11 +2103,16 @@ static const struct drm_encoder_funcs
intel_hdmi_enc_funcs = {
static void
intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector
*connector)
{
+ struct drm_i915_private *dev_priv =
[PATCH v12 1/2] drm: Add connector property to limit max bpc
At times 12bpc HDMI cannot be driven due to faulty cables, dongles
level shifters etc. To workaround them we may need to drive the output
at a lower bpc. Currently the user space does not have a way to limit
the bpc. The default bpc to be programmed is decided by the driver and
is run against connector limitations.
Creating a new connector property "max bpc" in order to limit the bpc.
xrandr can make use of this connector property to make sure that bpc does
not exceed the configured value. This property can be used by userspace to
set the bpc.
V2: Initialize max_bpc to satisfy kms_properties
V3: Move the property to drm_connector
V4: Split drm and i915 components(Ville)
V5: Make the property per connector(Ville)
V6: Compare the requested bpc to connector bpc(Daniel)
Move the attach_property function to core(Ville)
V7: Fix checkpatch warnings
V8: Simplify the connector check code(Ville)
V9: Const display_info(Ville)
V10,V11: Fix CI issues.
V12: Add the Kernel documentation(Daniel)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Cc: Sunpeng Li
Acked-by: Daniel Vetter
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 5 +
drivers/gpu/drm/drm_atomic_helper.c | 4
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_connector.c | 39 +
include/drm/drm_connector.h | 20 +++
5 files changed, 72 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 2870ae205237..cd8362dc4f74 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -390,6 +390,11 @@ static int drm_atomic_connector_check(struct drm_connector
*connector,
{
struct drm_crtc_state *crtc_state;
struct drm_writeback_job *writeback_job = state->writeback_job;
+ const struct drm_display_info *info = >display_info;
+
+ state->max_bpc = info->bpc ? info->bpc : 8;
+ if (connector->max_bpc_property)
+ state->max_bpc = min(state->max_bpc, state->max_requested_bpc);
if ((connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) ||
!writeback_job)
return 0;
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index e6a2cf72de5e..8bc919e3b271 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -669,6 +669,10 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
if (old_connector_state->link_status !=
new_connector_state->link_status)
new_crtc_state->connectors_changed = true;
+
+ if (old_connector_state->max_requested_bpc !=
+ new_connector_state->max_requested_bpc)
+ new_crtc_state->connectors_changed = true;
}
if (funcs->atomic_check)
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index d5b7f315098c..86ac33922b09 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -740,6 +740,8 @@ static int drm_atomic_connector_set_property(struct
drm_connector *connector,
return set_out_fence_for_connector(state->state, connector,
fence_ptr);
+ } else if (property == connector->max_bpc_property) {
+ state->max_requested_bpc = val;
} else if (connector->funcs->atomic_set_property) {
return connector->funcs->atomic_set_property(connector,
state, property, val);
@@ -804,6 +806,8 @@ drm_atomic_connector_get_property(struct drm_connector
*connector,
*val = 0;
} else if (property == config->writeback_out_fence_ptr_property) {
*val = 0;
+ } else if (property == connector->max_bpc_property) {
+ *val = state->max_requested_bpc;
} else if (connector->funcs->atomic_get_property) {
return connector->funcs->atomic_get_property(connector,
state, property, val);
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 5d01414ec9f7..a346004a1c4f 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -932,6 +932,11 @@ DRM_ENUM_NAME_FN(drm_get_content_protection_name,
drm_cp_enum_list)
* is no longer protected and userspace should take appropriate action
* (whatever that might be).
*
+ * max bpc:
+ * This range property is used by userspace to limit the bit depth. When
+ * used the driver would limit the bpc in accordance with the valid range
+ * supported by the hardware and sink.
+ *
* Connectors also have one standardized atomic property:
*
* CRTC_ID:
@@
[PATCH 1/2] drm: Add CRTC background color property
Some display controllers can be programmed to present non-black colors
for pixels not covered by any plane (or pixels covered by the
transparent regions of higher planes). Compositors that want a UI with
a solid color background can potentially save memory bandwidth by
setting the CRTC background property and using smaller planes to display
the rest of the content.
To avoid confusion between different ways of encoding RGB data, we
define a standard 64-bit format that should be used for this property's
value. Helper functions and macros are provided to generate and dissect
values in this standard format with varying component precision values.
Cc: dri-devel@lists.freedesktop.org
Cc: wei.c...@intel.com
Cc: harish.krupo@intel.com
Signed-off-by: Matt Roper
---
drivers/gpu/drm/drm_atomic_state_helper.c | 1 +
drivers/gpu/drm/drm_atomic_uapi.c | 5 +
drivers/gpu/drm/drm_mode_config.c | 6 ++
include/drm/drm_crtc.h| 17 +
include/drm/drm_mode_config.h | 5 +
include/uapi/drm/drm_mode.h | 26 ++
6 files changed, 60 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c
b/drivers/gpu/drm/drm_atomic_state_helper.c
index 3ba996069d69..2f8c55668089 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -101,6 +101,7 @@ void __drm_atomic_helper_crtc_duplicate_state(struct
drm_crtc *crtc,
state->planes_changed = false;
state->connectors_changed = false;
state->color_mgmt_changed = false;
+ state->bgcolor_changed = false;
state->zpos_changed = false;
state->commit = NULL;
state->event = NULL;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index d5b7f315098c..399f0ead5370 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -467,6 +467,9 @@ static int drm_atomic_crtc_set_property(struct drm_crtc
*crtc,
return -EFAULT;
set_out_fence_for_crtc(state->state, crtc, fence_ptr);
+ } else if (property == config->bgcolor_property) {
+ state->background_color = val;
+ state->bgcolor_changed = true;
} else if (crtc->funcs->atomic_set_property) {
return crtc->funcs->atomic_set_property(crtc, state, property,
val);
} else {
@@ -499,6 +502,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc,
*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
else if (property == config->prop_out_fence_ptr)
*val = 0;
+ else if (property == config->bgcolor_property)
+ *val = state->background_color;
else if (crtc->funcs->atomic_get_property)
return crtc->funcs->atomic_get_property(crtc, state, property,
val);
else
diff --git a/drivers/gpu/drm/drm_mode_config.c
b/drivers/gpu/drm/drm_mode_config.c
index ee80788f2c40..75e376755176 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -352,6 +352,12 @@ static int drm_mode_create_standard_properties(struct
drm_device *dev)
return -ENOMEM;
dev->mode_config.modifiers_property = prop;
+ prop = drm_property_create_range(dev, 0, "BACKGROUND_COLOR",
+0, GENMASK_ULL(63, 0));
+ if (!prop)
+ return -ENOMEM;
+ dev->mode_config.bgcolor_property = prop;
+
return 0;
}
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index b21437bc95bf..ddfdad9ccecb 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -168,6 +168,11 @@ struct drm_crtc_state {
* drivers to steer the atomic commit control flow.
*/
bool color_mgmt_changed : 1;
+ /**
+* @bgcolor_changed: Background color value has changed. Used by
+* drivers to steer the atomic commit control flow.
+*/
+ bool bgcolor_changed : 1;
/**
* @no_vblank:
@@ -274,6 +279,18 @@ struct drm_crtc_state {
*/
struct drm_property_blob *gamma_lut;
+ /**
+* @background_color:
+*
+* RGB value representing the pipe's background color. The background
+* color (aka "canvas color") of a pipe is the color that will be used
+* for pixels not covered by a plane, or covered by transparent pixels
+* of a plane. The value here should be built via drm_rgba();
+* individual color components can be extracted with desired precision
+* via the DRM_RGBA_*() macros.
+*/
+ u64 background_color;
+
/**
* @target_vblank:
*
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 928e4172a0bb..c3f57a9e5b31 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
[PATCH 0/2] CRTC background color
Some display controllers can be programmed to present non-black colors for pixels not covered by any plane (or pixels covered by the transparent regions of higher planes). Compositors that want a UI with a solid color background can potentially save memory bandwidth by setting the CRTC background property and using smaller planes to display the rest of the content. Earlier versions of these patches were floated on dri-devel about 2.5 years ago, but at that time the only userspace software that made use of this was closed-source (product-specific Wayland compositors), so we never landed the patches upstream. I'm told that there's now some renewed interest in this functionality from both the ChromeOS camp and the Weston camp, so I'm re-posting updated kernel patches here to get the ball rolling again. As always, we'll still need the patches for at least one of those projects to get posted (and reviewed) somewhere public before we actually merge these kernel patches. Cc: dri-devel@lists.freedesktop.org Cc: wei.c...@intel.com Cc: harish.krupo@intel.com Matt Roper (2): drm: Add CRTC background color property drm/i915/gen9+: Add support for pipe background color drivers/gpu/drm/drm_atomic_state_helper.c | 1 + drivers/gpu/drm/drm_atomic_uapi.c | 5 + drivers/gpu/drm/drm_mode_config.c | 6 ++ drivers/gpu/drm/i915/i915_debugfs.c | 9 drivers/gpu/drm/i915/i915_reg.h | 6 ++ drivers/gpu/drm/i915/intel_display.c | 34 +++ include/drm/drm_crtc.h| 17 include/drm/drm_mode_config.h | 5 + include/uapi/drm/drm_mode.h | 26 +++ 9 files changed, 109 insertions(+) -- 2.14.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 2/2] drm/i915/gen9+: Add support for pipe background color
Gen9+ platforms allow CRTC's to be programmed with a background/canvas
color below the programmable planes. Let's expose this for use by
compositors.
Cc: dri-devel@lists.freedesktop.org
Cc: wei.c...@intel.com
Cc: harish.krupo@intel.com
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 +
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_display.c | 34 ++
3 files changed, 49 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 4565eda29c87..cc423f7f3e62 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3254,6 +3254,15 @@ static int i915_display_info(struct seq_file *m, void
*unused)
intel_plane_info(m, crtc);
}
+ if (INTEL_GEN(dev_priv) >= 9 && pipe_config->base.active) {
+ uint64_t background =
pipe_config->base.background_color;
+
+ seq_printf(m, "\tbackground color (10bpc): r=%x g=%x
b=%x\n",
+ DRM_RGBA_RED(background, 10),
+ DRM_RGBA_GREEN(background, 10),
+ DRM_RGBA_BLUE(background, 10));
+ }
+
seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n",
yesno(!crtc->cpu_fifo_underrun_disabled),
yesno(!crtc->pch_fifo_underrun_disabled));
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 20785417953d..988183870f6e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5661,6 +5661,12 @@ enum {
#define PIPEMISC_DITHER_TYPE_SP (0 << 2)
#define PIPEMISC(pipe) _MMIO_PIPE2(pipe, _PIPE_MISC_A)
+/* Skylake+ pipe bottom (background) color */
+#define _PIPE_BOTTOM_COLOR_A 0x70034
+#define PIPE_BOTTOM_GAMMA_ENABLE (1 << 31)
+#define PIPE_BOTTOM_CSC_ENABLE (1 << 30)
+#define PIPE_BOTTOM_COLOR(pipe)_MMIO_PIPE2(pipe,
_PIPE_BOTTOM_COLOR_A)
+
#define VLV_DPFLIPSTAT _MMIO(VLV_DISPLAY_BASE +
0x70028)
#define PIPEB_LINE_COMPARE_INT_EN(1 << 29)
#define PIPEB_HLINE_INT_EN (1 << 28)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index a145efba9157..2ee402a98e70 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3853,6 +3853,28 @@ void intel_finish_reset(struct drm_i915_private
*dev_priv)
clear_bit(I915_RESET_MODESET, _priv->gpu_error.flags);
}
+static void skl_update_background_color(const struct intel_crtc_state *cstate)
+{
+ struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ uint64_t propval = cstate->base.background_color;
+ uint32_t hwval;
+
+ /* Hardware is programmed with 10 bits of precision */
+ hwval = DRM_RGBA_RED(propval, 10) << 20
+ | DRM_RGBA_GREEN(propval, 10) << 10
+ | DRM_RGBA_BLUE(propval, 10);
+
+ /*
+* Set CSC and gamma for bottom color to ensure background pixels
+* receive the same color transformations as plane content.
+*/
+ hwval |= PIPE_BOTTOM_CSC_ENABLE;
+ hwval |= PIPE_BOTTOM_GAMMA_ENABLE;
+
+ I915_WRITE_FW(PIPE_BOTTOM_COLOR(crtc->pipe), hwval);
+}
+
static void intel_update_pipe_config(const struct intel_crtc_state
*old_crtc_state,
const struct intel_crtc_state
*new_crtc_state)
{
@@ -3887,6 +3909,9 @@ static void intel_update_pipe_config(const struct
intel_crtc_state *old_crtc_sta
else if (old_crtc_state->pch_pfit.enabled)
ironlake_pfit_disable(old_crtc_state);
}
+
+ if (new_crtc_state->base.bgcolor_changed)
+ skl_update_background_color(new_crtc_state);
}
static void intel_fdi_normal_train(struct intel_crtc *crtc)
@@ -10791,6 +10816,9 @@ static int intel_crtc_atomic_check(struct drm_crtc
*crtc,
crtc_state->planes_changed = true;
}
+ if (crtc_state->bgcolor_changed)
+ pipe_config->update_pipe = true;
+
ret = 0;
if (dev_priv->display.compute_pipe_wm) {
ret = dev_priv->display.compute_pipe_wm(pipe_config);
@@ -13831,6 +13859,7 @@ static void intel_crtc_init_scalers(struct intel_crtc
*crtc,
static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
{
+ struct drm_mode_config *mode_config = _priv->drm.mode_config;
struct intel_crtc *intel_crtc;
struct intel_crtc_state *crtc_state = NULL;
struct intel_plane *primary = NULL;
@@ -13905,6 +13934,11 @@ static int intel_crtc_init(struct drm_i915_private
*dev_priv, enum
[Bug 108307] Regression: Raven Ridge 2700U does not boot with 4.19-rc7
https://bugs.freedesktop.org/show_bug.cgi?id=108307 --- Comment #6 from Samantha McVey --- It turns out it is config related, as I compiled the kernel with my old config instead of a minimal one, and I had the same boot issue. I posted about my issue here https://bugzilla.kernel.org/show_bug.cgi?id=200087 since that may be the same bug. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] staging: ion: Rework ion_map_dma_buf() to minimize re-mapping
Since 4.12, much later narrowed down to commit 2a55e7b5e544
("staging: android: ion: Call dma_map_sg for syncing and mapping"),
we have seen graphics performance issues on the HiKey960.
This was initially confounded by the fact that the out-of-tree
DRM driver was using HiSi custom ION heap which broke with the
4.12 ION abi changes, so there was lots of suspicion that the
performance problems were due to switching to a somewhat simple
cma based DRM driver for HiKey960. Additionally, as no
performance regression was seen w/ the original HiKey board
(which is SMP, not big.LITTLE as w/ HiKey960), there was some
thought that the out-of-tree EAS code wasn't quite optimized.
But after chasing a number of other leads, I found that
reverting the ION code to 4.11-era got the majority of the
graphics performance back (there may yet be further EAS tweaks
needed), which lead me to the dma_map_sg change.
In talking w/ Laura and Liam, it was suspected that the extra
cache operations were causing the trouble. Additionally, I found
that part of the reason we didn't see this w/ the original
HiKey board is that its (proprietary blob) GL code uses ion_mmap
and ion_map_dma_buf is called very rarely, where as with
HiKey960, the (also proprietary blob) GL code calls
ion_map_dma_buf much more frequently via the kernel driver.
Anyway, with the cause of the performance regression isolated,
I've tried to find a way to improve the performance of the
current code.
This approach, which I've mostly copied from the drm_prime
implementation is to try to track the direction we're mapping
the buffers so we can avoid calling dma_map/unmap_sg on every
ion_map_dma_buf/ion_unmap_dma_buf call, and instead try to do
the work in attach/detach paths.
I'm not 100% sure of the correctness here, so close review would
be good, but it gets the performance back to being similar to
reverting the ION code to the 4.11-era.
Feedback would be greatly appreciated!
Cc: Beata Michalska
Cc: Matt Szczesiak
Cc: Anders Pedersen
Cc: John Reitan
Cc: Liam Mark
Cc: Laura Abbott
Cc: Sumit Semwal
Cc: Greg Kroah-Hartman
Cc: Todd Kjos
Cc: Martijn Coenen
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz
---
drivers/staging/android/ion/ion.c | 36 +++-
1 file changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/android/ion/ion.c
b/drivers/staging/android/ion/ion.c
index 9907332..a4d7fca 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -199,6 +199,7 @@ struct ion_dma_buf_attachment {
struct device *dev;
struct sg_table *table;
struct list_head list;
+ enum dma_data_direction dir;
};
static int ion_dma_buf_attach(struct dma_buf *dmabuf,
@@ -220,6 +221,7 @@ static int ion_dma_buf_attach(struct dma_buf *dmabuf,
a->table = table;
a->dev = attachment->dev;
+ a->dir = DMA_NONE;
INIT_LIST_HEAD(>list);
attachment->priv = a;
@@ -236,6 +238,18 @@ static void ion_dma_buf_detatch(struct dma_buf *dmabuf,
{
struct ion_dma_buf_attachment *a = attachment->priv;
struct ion_buffer *buffer = dmabuf->priv;
+ struct sg_table *table;
+
+ if (!a)
+ return;
+
+ table = a->table;
+ if (table) {
+ if (a->dir != DMA_NONE)
+ dma_unmap_sg(attachment->dev, table->sgl, table->nents,
+a->dir);
+ sg_free_table(table);
+ }
free_duped_table(a->table);
mutex_lock(>lock);
@@ -243,6 +257,7 @@ static void ion_dma_buf_detatch(struct dma_buf *dmabuf,
mutex_unlock(>lock);
kfree(a);
+ attachment->priv = NULL;
}
static struct sg_table *ion_map_dma_buf(struct dma_buf_attachment *attachment,
@@ -251,12 +266,24 @@ static struct sg_table *ion_map_dma_buf(struct
dma_buf_attachment *attachment,
struct ion_dma_buf_attachment *a = attachment->priv;
struct sg_table *table;
- table = a->table;
+ if (WARN_ON(direction == DMA_NONE || !a))
+ return ERR_PTR(-EINVAL);
- if (!dma_map_sg(attachment->dev, table->sgl, table->nents,
- direction))
- return ERR_PTR(-ENOMEM);
+ if (a->dir == direction)
+ return a->table;
+ if (WARN_ON(a->dir != DMA_NONE))
+ return ERR_PTR(-EBUSY);
+
+ table = a->table;
+ if (!IS_ERR(table)) {
+ if (!dma_map_sg(attachment->dev, table->sgl, table->nents,
+ direction)) {
+ table = ERR_PTR(-ENOMEM);
+ } else {
+ a->dir = direction;
+ }
+ }
return table;
}
@@ -264,7 +291,6 @@ static void ion_unmap_dma_buf(struct dma_buf_attachment
*attachment,
struct sg_table *table,
enum dma_data_direction
[Bug 102401] Radeon Displayport Audio Warping
https://bugzilla.kernel.org/show_bug.cgi?id=102401 Vitor Antunes (vitor@gmail.com) changed: What|Removed |Added CC||vitor@gmail.com --- Comment #16 from Vitor Antunes (vitor@gmail.com) --- I'm having the same problem with my Tahiti GPU. This output seems to confirm that there's an EDID issue: > tail -n+1 /proc/asound/card*/eld* [...] edid_version[0x0] no CEA EDID Timing Extension block present [...] These patches touch DCE6 and such: https://lists.freedesktop.org/archives/amd-gfx/2018-October/027462.html Maybe it fixes this issue? Don't have the availability to test at the moment. -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 200695] Blank screen on RX 580 with amdgpu.dc=1 enabled (no displays detected)
https://bugzilla.kernel.org/show_bug.cgi?id=200695 Claude Heiland-Allen (cla...@mathr.co.uk) changed: What|Removed |Added Kernel Version|4.17.19, 4.18.0-rc7,|4.17.19, 4.18.0-rc7, |4.18.5, 4.18.6, 4.18.7, |4.18.5, 4.18.6, 4.18.7, |4.18.8, 4.18.9, 4.18.10,|4.18.8, 4.18.9, 4.18.10, |4.18.11, 4.19-rc1, |4.18.11, 4.18.12, 4.18.13, |4.19-rc2, 4.19-rc3, |4.19-rc1, 4.19-rc2, |4.19-rc4, 4.19-rc5, |4.19-rc3, 4.19-rc4, |4.19-rc5|4.19-rc5, 4.19-rc6, ||4.19-rc7 --- Comment #16 from Claude Heiland-Allen (cla...@mathr.co.uk) --- still an issue in 4.18.12 still an issue in 4.18.13 still an issue in 4.19-rc7 -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v4] drm/msm: validate display and event threads
While creating display and event threads per crtc, validate
them before setting their priorities.
changes in v2:
- use dev_warn (Abhinav Kumar)
changes in v3:
- fix compilation error
changes in v4:
- Remove Change-Id (Sean Paul)
- Keep logging within 80 char limit (Sean Paul)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 49 ++-
1 file changed, 16 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 4904d0d..dcff812 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -553,17 +553,18 @@ static int msm_drm_init(struct device *dev, struct
drm_driver *drv)
kthread_run(kthread_worker_fn,
>disp_thread[i].worker,
"crtc_commit:%d", priv->disp_thread[i].crtc_id);
- ret = sched_setscheduler(priv->disp_thread[i].thread,
- SCHED_FIFO, );
- if (ret)
- pr_warn("display thread priority update failed: %d\n",
- ret);
-
if (IS_ERR(priv->disp_thread[i].thread)) {
dev_err(dev, "failed to create crtc_commit kthread\n");
priv->disp_thread[i].thread = NULL;
+ goto err_msm_uninit;
}
+ ret = sched_setscheduler(priv->disp_thread[i].thread,
+SCHED_FIFO, );
+ if (ret)
+ dev_warn(dev, "disp_thread set priority failed: %d\n",
+ret);
+
/* initialize event thread */
priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
kthread_init_worker(>event_thread[i].worker);
@@ -572,6 +573,12 @@ static int msm_drm_init(struct device *dev, struct
drm_driver *drv)
kthread_run(kthread_worker_fn,
>event_thread[i].worker,
"crtc_event:%d", priv->event_thread[i].crtc_id);
+ if (IS_ERR(priv->event_thread[i].thread)) {
+ dev_err(dev, "failed to create crtc_event kthread\n");
+ priv->event_thread[i].thread = NULL;
+ goto err_msm_uninit;
+ }
+
/**
* event thread should also run at same priority as disp_thread
* because it is handling frame_done events. A lower priority
@@ -580,34 +587,10 @@ static int msm_drm_init(struct device *dev, struct
drm_driver *drv)
* failure at crtc commit level.
*/
ret = sched_setscheduler(priv->event_thread[i].thread,
- SCHED_FIFO, );
+SCHED_FIFO, );
if (ret)
- pr_warn("display event thread priority update failed:
%d\n",
- ret);
-
- if (IS_ERR(priv->event_thread[i].thread)) {
- dev_err(dev, "failed to create crtc_event kthread\n");
- priv->event_thread[i].thread = NULL;
- }
-
- if ((!priv->disp_thread[i].thread) ||
- !priv->event_thread[i].thread) {
- /* clean up previously created threads if any */
- for ( ; i >= 0; i--) {
- if (priv->disp_thread[i].thread) {
- kthread_stop(
- priv->disp_thread[i].thread);
- priv->disp_thread[i].thread = NULL;
- }
-
- if (priv->event_thread[i].thread) {
- kthread_stop(
- priv->event_thread[i].thread);
- priv->event_thread[i].thread = NULL;
- }
- }
- goto err_msm_uninit;
- }
+ dev_warn(dev, "event_thread set priority failed:%d\n",
+ret);
}
ret = drm_vblank_init(ddev, priv->num_crtcs);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris and Tahiti (maybe more)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #8 from John Galt --- I attempted to bisect in Mesa, and found that I wasn't able to get rid of the glitch. The regression must be in LLVM. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PULL] drm-misc-next-fixes
Hi Dave, Another next-fixes pull, pretty light this week. drm-misc-next-fixes-2018-10-10: - Fix build failure without CONFIG_DRM_FBDEV_EMULATION (Arnd) - Add Maxime to drm-misc maintainer group (Sean) Cc: Arnd Bergmann Cc: Sean Paul Cheers, Sean The following changes since commit 4be9bd10e22dfc7fc101c5cf5969ef2d3a042d8a: drm/fb_helper: Allow leaking fbdev smem_start (2018-10-03 21:08:21 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2018-10-10 for you to fetch changes up to 7372fd049aa8836310f84da5f82dc9eb146915c8: MAINTAINERS: Add Maxime Ripard as drm-misc maintainer (2018-10-09 16:16:54 -0400) - Fix build failure without CONFIG_DRM_FBDEV_EMULATION (Arnd) - Add Maxime to drm-misc maintainer group (Sean) Cc: Arnd Bergmann Cc: Sean Paul Arnd Bergmann (1): drm/imx: fix build failure without CONFIG_DRM_FBDEV_EMULATION Sean Paul (1): MAINTAINERS: Add Maxime Ripard as drm-misc maintainer MAINTAINERS| 2 +- drivers/gpu/drm/imx/imx-drm-core.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) -- Sean Paul, Software Engineer, Google / Chromium OS ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [Intel-gfx] [PATCH] drm/i915: Convert _print_param to a macro
On Wed, 10 Oct 2018 14:01:40 +0200, Jani Nikula
wrote:
On Tue, 09 Oct 2018, Nick Desaulniers wrote:
On Tue, Oct 9, 2018 at 10:14 AM Nathan Chancellor
wrote:
When building the kernel with Clang with defconfig and CONFIG_64BIT
disabled, vmlinux fails to link because of the BUILD_BUG in
_print_param.
ld: drivers/gpu/drm/i915/i915_params.o: in function `i915_params_dump':
i915_params.c:(.text+0x56): undefined reference to
`__compiletime_assert_191'
This function is semantically invalid unless the code is first inlined
then constant folded, which doesn't work for Clang because semantic
analysis happens before optimization/inlining. Converting this function
to a macro avoids this problem and allows Clang to properly remove the
BUILD_BUG during optimization.
Thanks Nathan for the patch. To provide more context, Clang does
semantic analysis before optimization, where as GCC does these
together (IIUC). So the above link error is from the naked
BUILD_BUG(). Clang can't evaluate the __builtin_strcmp's statically
until inlining has occurred, but that optimization happens after
semantic analysis. To do the inlining before semantic analysis, we
MUST leverage the preprocessor, which runs before the compiler starts
doing semantic analysis. I suspect this code is not valid for GCC
unless optimizations are enabled (the kernel only does compile with
optimizations turned on). This change allows us to build this
translation unit with Clang.
Acked-by: Nick Desaulniers
(Note: this is the change I suggested, so not sure whether Acked-by or
Reviewed-by is more appropriate).
*Sad trombone*
I'd rather see us converting more macros to static inlines than the
other way round.
I'll let others chime in if they have any better ideas, otherwise I'll
apply this one.
Option 1: Just drop BUILD_BUG() from _print_param() function.
Option 2: Use aliases instead of real types in param() macros.
Aliases can be same as in linux/moduleparam.h (charp|int|uint|bool)
We can convert aliases back to real types but it will also allow
to construct proper names for dedicated functions - see [1]
Michal
[1] https://patchwork.freedesktop.org/patch/255928/
BR,
Jani.
The output of 'objdump -D' is identically before and after this change
for GCC regardless of if CONFIG_64BIT is set and allows Clang to link
the kernel successfully with or without CONFIG_64BIT set.
Link: https://github.com/ClangBuiltLinux/linux/issues/191
Suggested-by: Nick Desaulniers
Signed-off-by: Nathan Chancellor
---
drivers/gpu/drm/i915/i915_params.c | 29 +
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 295e981e4a39..a0f20b9b6f2d 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -174,22 +174,19 @@ i915_param_named(enable_dpcd_backlight, bool,
0600,
i915_param_named(enable_gvt, bool, 0400,
"Enable support for Intel GVT-g graphics virtualization host
support(default:false)");
-static __always_inline void _print_param(struct drm_printer *p,
-const char *name,
-const char *type,
-const void *x)
-{
- if (!__builtin_strcmp(type, "bool"))
- drm_printf(p, "i915.%s=%s\n", name, yesno(*(const bool
*)x));
- else if (!__builtin_strcmp(type, "int"))
- drm_printf(p, "i915.%s=%d\n", name, *(const int *)x);
- else if (!__builtin_strcmp(type, "unsigned int"))
- drm_printf(p, "i915.%s=%u\n", name, *(const unsigned
int *)x);
- else if (!__builtin_strcmp(type, "char *"))
- drm_printf(p, "i915.%s=%s\n", name, *(const char **)x);
- else
- BUILD_BUG();
-}
+#define _print_param(p, name, type,
x)\
+do
{
\
+ if (!__builtin_strcmp(type,
"bool")) \
+ drm_printf(p, "i915.%s=%s\n", name, yesno(*(const bool
*)x)); \
+ else if (!__builtin_strcmp(type,
"int")) \
+ drm_printf(p, "i915.%s=%d\n", name, *(const int
*)x); \
+ else if (!__builtin_strcmp(type, "unsigned
int")) \
+ drm_printf(p, "i915.%s=%u\n", name, *(const unsigned
int *)x); \
+ else if (!__builtin_strcmp(type, "char
*"))\
+ drm_printf(p, "i915.%s=%s\n", name, *(const char
**)x);\
+
else
\
+
BUILD_BUG(); \
+} while (0)
/**
* i915_params_dump - dump i915 modparams
--
2.19.0
___
[Bug 108317] [Polaris] Black Textures only on Polaris in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 --- Comment #6 from John Galt --- (In reply to Alex Deucher from comment #5) > This is more likely an llvm or mesa issue than a kernel issue. Okay. Seeing as this issue has always persisted on Polaris since mesa mild (when this game was first playable on linux), I'm not sure where to go from here since I can't bisect. Please let me know if there's any additional logging I can get. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris and Tahiti (maybe more)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #7 from John Galt --- (In reply to Alex Deucher from comment #6) > Seems more likely to be an LLVM or Mesa bug than a kernel one. I went back to 4.18.7 and it persisted, so you're correct. It was okay early on at 18.2.0 with llvm svn. I'll go back to 18.2.0 to test, and if it's broken then we know it's llvm. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris and Tahiti (maybe more)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 Alex Deucher changed: What|Removed |Added Product|DRI |Mesa Version|DRI git |unspecified QA Contact||dri-devel@lists.freedesktop ||.org Component|DRM/AMDgpu |Drivers/Gallium/radeonsi -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108317] [Polaris] Black Textures only on Polaris in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 Alex Deucher changed: What|Removed |Added Component|DRM/AMDgpu |Drivers/Gallium/radeonsi QA Contact||dri-devel@lists.freedesktop ||.org Version|DRI git |unspecified Product|DRI |Mesa -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108317] [Polaris] Black Textures only on Polaris in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 --- Comment #5 from Alex Deucher --- This is more likely an llvm or mesa issue than a kernel issue. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108309] Raven Ridge 2700U system lock-up on multiple games
https://bugs.freedesktop.org/show_bug.cgi?id=108309 --- Comment #1 from Alex Deucher --- Please attach your dmesg output and xorg log if using X. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris and Tahiti (maybe more)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #6 from Alex Deucher --- Seems more likely to be an LLVM or Mesa bug than a kernel one. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris and Tahiti (maybe more)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 John Galt changed: What|Removed |Added Summary|[Polaris] Glitches in New |[Polaris] Glitches in New |Super Mario Brothers U in |Super Mario Brothers U in |Cemu on Polaris only|Cemu on Polaris and Tahiti |(recent)|(maybe more) -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #5 from John Galt --- I was incorrect, this also happens on Tahiti now. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH -next] drm/amdgpu: remove set but not used variable 'header'
On Wed, Sep 26, 2018 at 11:01 AM YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c: In function 'amdgpu_ucode_init_bo':
> drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:431:39: warning:
> variable 'header' set but not used [-Wunused-but-set-variable]
>
> Signed-off-by: YueHaibing
Applied. Thanks,
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> index 1fa8bc3..afd5cf3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> @@ -428,7 +428,6 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev)
> uint64_t fw_offset = 0;
> int i, err;
> struct amdgpu_firmware_info *ucode = NULL;
> - const struct common_firmware_header *header = NULL;
>
> if (!adev->firmware.fw_size) {
> dev_warn(adev->dev, "No ip firmware need to load\n");
> @@ -465,7 +464,6 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev)
> for (i = 0; i < adev->firmware.max_ucodes; i++) {
> ucode = >firmware.ucode[i];
> if (ucode->fw) {
> - header = (const struct common_firmware_header
> *)ucode->fw->data;
> amdgpu_ucode_init_single_fw(adev, ucode,
> adev->firmware.fw_buf_mc + fw_offset,
> adev->firmware.fw_buf_ptr
> + fw_offset);
> if (i == AMDGPU_UCODE_ID_CP_MEC1 &&
>
> ___
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> amd-...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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Re: [PATCH v4 3/4] drm: Add library for shmem backed GEM objects
Den 01.10.2018 09.46, skrev Daniel Vetter:
On Wed, Sep 26, 2018 at 04:59:32PM +0200, Noralf Trønnes wrote:
This adds a library for shmem backed GEM objects.
Signed-off-by: Noralf Trønnes
---
Changes since version 3:
- Drop cache modes (Thomas Hellstrom)
- Add a GEM attached vtable
Documentation/gpu/drm-kms-helpers.rst | 12 +
drivers/gpu/drm/Kconfig| 6 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/drm_gem_shmem_helper.c | 586 +
include/drm/drm_gem_shmem_helper.h | 153 +
5 files changed, 758 insertions(+)
create mode 100644 drivers/gpu/drm/drm_gem_shmem_helper.c
create mode 100644 include/drm/drm_gem_shmem_helper.h
diff --git a/Documentation/gpu/drm-kms-helpers.rst
b/Documentation/gpu/drm-kms-helpers.rst
index f9cfcdcdf024..bc24b1b5216a 100644
--- a/Documentation/gpu/drm-kms-helpers.rst
+++ b/Documentation/gpu/drm-kms-helpers.rst
@@ -326,3 +326,15 @@ Legacy CRTC/Modeset Helper Functions Reference
.. kernel-doc:: drivers/gpu/drm/drm_crtc_helper.c
:export:
+
+SHMEM GEM Helper Reference
+==
+
+.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
+ :doc: overview
+
+.. kernel-doc:: include/drm/drm_gem_shmem_helper.h
+ :internal:
+
+.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
+ :export:
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index cb88528e7b10..db588ae44bcc 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -157,6 +157,12 @@ config DRM_KMS_CMA_HELPER
help
Choose this if you need the KMS CMA helper functions
+config DRM_GEM_SHMEM_HELPER
+ bool
+ depends on DRM
+ help
+ Choose this if you need the GEM shmem helper functions
+
config DRM_VM
bool
depends on DRM && MMU
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index bc6a16a3c36e..13777f22dc25 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -25,6 +25,7 @@ drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o
drm-$(CONFIG_DRM_VM) += drm_vm.o
drm-$(CONFIG_COMPAT) += drm_ioc32.o
drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
+drm-$(CONFIG_DRM_GEM_SHMEM_HELPER) += drm_gem_shmem_helper.o
drm-$(CONFIG_PCI) += ati_pcigart.o
drm-$(CONFIG_DRM_PANEL) += drm_panel.o
drm-$(CONFIG_OF) += drm_of.o
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/drivers/gpu/drm/drm_gem_shmem_helper.c
new file mode 100644
index ..7471856d34ac
--- /dev/null
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -0,0 +1,586 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2018 Noralf Trønnes
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: overview
+ *
+ * This library provides helpers for GEM objects backed by shmem buffers
+ * allocated using anonymous pageable memory.
+ */
+
+static const struct drm_gem_object_funcs drm_gem_shmem_funcs = {
+ .free = drm_gem_shmem_free_object,
+ .print_info = drm_gem_shmem_print_info,
+ .pin = drm_gem_shmem_pin,
+ .unpin = drm_gem_shmem_unpin,
+ .get_sg_table = drm_gem_shmem_get_sg_table,
+ .vmap = drm_gem_shmem_vmap,
+ .vunmap = drm_gem_shmem_vunmap,
+ .prime_mmap = drm_gem_shmem_prime_mmap,
+ .vm_ops = _gem_shmem_vm_ops,
+};
+
+/**
+ * drm_gem_shmem_create - Allocate an object with the given size
+ * @dev: DRM device
+ * @size: Size of the object to allocate
+ *
+ * This function creates a shmem GEM object.
+ *
+ * Returns:
+ * A struct drm_gem_shmem_object * on success or an ERR_PTR()-encoded negative
+ * error code on failure.
+ */
+struct drm_gem_shmem_object *drm_gem_shmem_create(struct drm_device *dev,
size_t size)
+{
+ struct drm_gem_shmem_object *shmem;
+ struct drm_gem_object *obj;
+ int ret;
+
+ size = PAGE_ALIGN(size);
+
+ if (dev->driver->gem_create_object)
+ obj = dev->driver->gem_create_object(dev, size);
+ else
+ obj = kzalloc(sizeof(*shmem), GFP_KERNEL);
+ if (!obj)
+ return ERR_PTR(-ENOMEM);
+
+ if (!obj->funcs)
+ obj->funcs = _gem_shmem_funcs;
+
+ ret = drm_gem_object_init(dev, obj, size);
+ if (ret)
+ goto err_free;
+
+ ret = drm_gem_create_mmap_offset(obj);
+ if (ret)
+ goto err_release;
+
+ shmem = to_drm_gem_shmem_obj(obj);
+ mutex_init(>pages_lock);
+ mutex_init(>vmap_lock);
+
+ return shmem;
+
+err_release:
+ drm_gem_object_release(obj);
+err_free:
+ kfree(shmem);
+
+ return ERR_PTR(ret);
+}
+EXPORT_SYMBOL_GPL(drm_gem_shmem_create);
+
+/**
+ * drm_gem_shmem_free_object - Free resources associated with a shmem GEM
object
+ * @obj: GEM object to free
+ *
+ * This function cleans up the GEM object state and frees the memory used to
+ * store the
Re: [PATCH -next] drm/amdgpu: remove set but not used variable 'ring' in psp_v11_0_ring_stop
On Mon, Oct 1, 2018 at 3:26 AM YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c: In function 'psp_v11_0_ring_stop':
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c:309:19: warning:
> variable 'ring' set but not used [-Wunused-but-set-variable]
>
> Signed-off-by: YueHaibing
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index 9217af0..3f3fac2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -306,11 +306,8 @@ static int psp_v11_0_ring_stop(struct psp_context *psp,
> enum psp_ring_type ring_type)
> {
> int ret = 0;
> - struct psp_ring *ring;
> struct amdgpu_device *adev = psp->adev;
>
> - ring = >km_ring;
> -
> /* Write the ring destroy command to C2PMSG_64 */
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
> GFX_CTRL_CMD_ID_DESTROY_RINGS);
>
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Re: [PATCH -next] drm/amdkfd: Remove set but not used variable 'preempt_all_queues'
On Tue, Oct 9, 2018 at 3:37 AM YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c: In function
> 'destroy_queue_cpsch':
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c:1366:7: warning:
> variable 'preempt_all_queues' set but not used [-Wunused-but-set-variable]
>
> It never used since introduct in
> commit 992839ad64f2 ("drm/amdkfd: Add static user-mode queues support")
>
> Signed-off-by: YueHaibing
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index 4f22e74..06d38b7 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -1363,9 +1363,6 @@ static int destroy_queue_cpsch(struct
> device_queue_manager *dqm,
> {
> int retval;
> struct mqd_manager *mqd_mgr;
> - bool preempt_all_queues;
> -
> - preempt_all_queues = false;
>
> retval = 0;
>
> ___
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Re: [PATCH][drm-next] drm/amdgpu/powerplay: fix missing break in switch statements
On Tue, Oct 9, 2018 at 6:44 AM Huang Rui wrote:
>
> On Mon, Oct 08, 2018 at 05:22:28PM +0100, Colin King wrote:
> > From: Colin Ian King
> >
> > There are several switch statements that are missing break statements.
> > Add missing breaks to handle any fall-throughs corner cases.
> >
> > Detected by CoverityScan, CID#1457175 ("Missing break in switch")
> >
> > Fixes: 18aafc59b106 ("drm/amd/powerplay: implement fw related smu interface
> > for iceland.")
> > Signed-off-by: Colin Ian King
>
> Acked-by: Huang Rui
>
Applied. thanks!
Alex
> > ---
> > drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 2 ++
> > drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c| 2 ++
> > drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c | 2 ++
> > drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 2 ++
> > drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c | 2 ++
> > 5 files changed, 10 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
> > b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
> > index 18643e06bc6f..669bd0c2a16c 100644
> > --- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
> > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
> > @@ -2269,11 +2269,13 @@ static uint32_t ci_get_offsetof(uint32_t type,
> > uint32_t member)
> > case DRAM_LOG_BUFF_SIZE:
> > return offsetof(SMU7_SoftRegisters,
> > DRAM_LOG_BUFF_SIZE);
> > }
> > + break;
> > case SMU_Discrete_DpmTable:
> > switch (member) {
> > case LowSclkInterruptThreshold:
> > return offsetof(SMU7_Discrete_DpmTable,
> > LowSclkInterruptT);
> > }
> > + break;
> > }
> > pr_debug("can't get the offset of type %x member %x\n", type, member);
> > return 0;
> > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> > b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> > index ec14798e87b6..bddd6d09f887 100644
> > --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> > @@ -2331,6 +2331,7 @@ static uint32_t fiji_get_offsetof(uint32_t type,
> > uint32_t member)
> > case DRAM_LOG_BUFF_SIZE:
> > return offsetof(SMU73_SoftRegisters,
> > DRAM_LOG_BUFF_SIZE);
> > }
> > + break;
> > case SMU_Discrete_DpmTable:
> > switch (member) {
> > case UvdBootLevel:
> > @@ -2340,6 +2341,7 @@ static uint32_t fiji_get_offsetof(uint32_t type,
> > uint32_t member)
> > case LowSclkInterruptThreshold:
> > return offsetof(SMU73_Discrete_DpmTable,
> > LowSclkInterruptThreshold);
> > }
> > + break;
> > }
> > pr_warn("can't get the offset of type %x member %x\n", type, member);
> > return 0;
> > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
> > b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
> > index 73aa368a454e..2d4c7f167b88 100644
> > --- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
> > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
> > @@ -2237,11 +2237,13 @@ static uint32_t iceland_get_offsetof(uint32_t type,
> > uint32_t member)
> > case DRAM_LOG_BUFF_SIZE:
> > return offsetof(SMU71_SoftRegisters,
> > DRAM_LOG_BUFF_SIZE);
> > }
> > + break;
> > case SMU_Discrete_DpmTable:
> > switch (member) {
> > case LowSclkInterruptThreshold:
> > return offsetof(SMU71_Discrete_DpmTable,
> > LowSclkInterruptThreshold);
> > }
> > + break;
> > }
> > pr_warn("can't get the offset of type %x member %x\n", type, member);
> > return 0;
> > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> > b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> > index ae8378ed32ee..a2ba5b012866 100644
> > --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> > @@ -2619,6 +2619,7 @@ static uint32_t tonga_get_offsetof(uint32_t type,
> > uint32_t member)
> > case DRAM_LOG_BUFF_SIZE:
> > return offsetof(SMU72_SoftRegisters,
> > DRAM_LOG_BUFF_SIZE);
> > }
> > + break;
> > case SMU_Discrete_DpmTable:
> > switch (member) {
> > case UvdBootLevel:
> > @@ -2628,6 +2629,7 @@ static uint32_t tonga_get_offsetof(uint32_t type,
> > uint32_t member)
> > case LowSclkInterruptThreshold:
> > return offsetof(SMU72_Discrete_DpmTable,
> > LowSclkInterruptThreshold);
> > }
> > + break;
> > }
> > pr_warn("can't get the offset of type %x member %x\n", type, member);
> > return 0;
> >
Re: [PATCH] drm/amdgpu: Suppress keypresses from ACPI_VIDEO events
On Fri, Sep 21, 2018 at 8:44 PM Lyude Paul wrote:
>
> Currently we return NOTIFY_DONE for any event which we don't think is
> ours. However, many laptops will send more then just an ATIF event and
> will also send an ACPI_VIDEO_NOTIFY_PROBE event as well. Since we don't
> check for this, we return NOTIFY_DONE which causes a keypress for the
> ACPI event to be propogated to userspace. This is the equivalent of
> someone pressing the display key on a laptop every time there's a
> hotplug event.
>
> So, check for ACPI_VIDEO_NOTIFY_PROBE events and suppress keypresses
> from them.
>
> Signed-off-by: Lyude Paul
> Cc: sta...@vger.kernel.org
Applied. Thanks! Sorry for the delay.
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 -
> 1 file changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> index 353993218f21..f008804f0b97 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> @@ -358,7 +358,9 @@ static int amdgpu_atif_get_sbios_requests(struct
> amdgpu_atif *atif,
> *
> * Checks the acpi event and if it matches an atif event,
> * handles it.
> - * Returns NOTIFY code
> + *
> + * Returns:
> + * NOTIFY_BAD or NOTIFY_DONE, depending on the event.
> */
> static int amdgpu_atif_handler(struct amdgpu_device *adev,
>struct acpi_bus_event *event)
> @@ -372,11 +374,16 @@ static int amdgpu_atif_handler(struct amdgpu_device
> *adev,
> if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
> return NOTIFY_DONE;
>
> + /* Is this actually our event? */
> if (!atif ||
> !atif->notification_cfg.enabled ||
> - event->type != atif->notification_cfg.command_code)
> - /* Not our event */
> - return NOTIFY_DONE;
> + event->type != atif->notification_cfg.command_code) {
> + /* These events will generate keypresses otherwise */
> + if (event->type == ACPI_VIDEO_NOTIFY_PROBE)
> + return NOTIFY_BAD;
> + else
> + return NOTIFY_DONE;
> + }
>
> if (atif->functions.sbios_requests) {
> struct atif_sbios_requests req;
> @@ -385,7 +392,7 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
> count = amdgpu_atif_get_sbios_requests(atif, );
>
> if (count <= 0)
> - return NOTIFY_DONE;
> + return NOTIFY_BAD;
>
> DRM_DEBUG_DRIVER("ATIF: %d pending SBIOS requests\n", count);
>
> --
> 2.17.1
>
> ___
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Re: [PATCH 14/25] drm/msm/dpu: remove enc_id tagging for hw blocks
On 2018-10-10 08:06, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:31PM -0700, Jeykumar Sankaran wrote:
RM was using encoder id's to tag HW block's to reserve
and retrieve later for display pipeline. Now
that all the reserved HW blocks for a display are
maintained in its crtc state, no retrieval is needed.
This patch cleans up RM of encoder id tagging.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c| 90
+--
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 28 --
2 files changed, 36 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 303f1b3..a8461b8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -21,9 +21,6 @@
#include "dpu_encoder.h"
#include "dpu_trace.h"
-#define RESERVED_BY_OTHER(h, r) \
- ((h)->enc_id && (h)->enc_id != r)
-
/**
* struct dpu_rm_requirements - Reservation requirements parameter
bundle
* @topology: selected topology for the display
@@ -38,12 +35,13 @@ struct dpu_rm_requirements {
/**
* struct dpu_rm_hw_blk - hardware block tracking list member
* @list: List head for list of all hardware blocks tracking items
- * @enc_id:Encoder id to which this blk is binded
+ * @in_use: True, if the hw block is assigned to a display
pipeline.
+ * False, otherwise
* @hw:Pointer to the hardware register access object for
this block
*/
struct dpu_rm_hw_blk {
struct list_head list;
- uint32_t enc_id;
+ bool in_use;
How do the reservations work for TEST_ONLY commits? At a quick glance
it
looks
like they might be marked in_use?
Yes. We have a bug. I guess I should be releasing them in
drm_crtc_destroy_state.
Thanks and Regards,
Jeykumar S.
Sean
struct dpu_hw_blk *hw;
};
@@ -51,23 +49,19 @@ struct dpu_rm_hw_blk {
* struct dpu_rm_hw_iter - iterator for use with dpu_rm
* @hw: dpu_hw object requested, or NULL on failure
* @blk: dpu_rm internal block representation. Clients ignore. Used
as
iterator.
- * @enc_id: DRM ID of Encoder client wishes to search for, or 0 for
Any
Encoder
* @type: Hardware Block Type client wishes to search for.
*/
struct dpu_rm_hw_iter {
struct dpu_hw_blk *hw;
struct dpu_rm_hw_blk *blk;
- uint32_t enc_id;
enum dpu_hw_blk_type type;
};
static void _dpu_rm_init_hw_iter(
struct dpu_rm_hw_iter *iter,
- uint32_t enc_id,
enum dpu_hw_blk_type type)
{
memset(iter, 0, sizeof(*iter));
- iter->enc_id = enc_id;
iter->type = type;
}
@@ -91,16 +85,12 @@ static bool _dpu_rm_get_hw_locked(struct dpu_rm
*rm,
struct dpu_rm_hw_iter *i)
i->blk = list_prepare_entry(i->blk, blk_list, list);
list_for_each_entry_continue(i->blk, blk_list, list) {
- if (i->enc_id == i->blk->enc_id) {
+ if (!i->blk->in_use) {
i->hw = i->blk->hw;
- DPU_DEBUG("found type %d id %d for enc %d\n",
- i->type, i->blk->hw->id,
i->enc_id);
return true;
}
}
- DPU_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
-
return false;
}
@@ -196,7 +186,6 @@ static int _dpu_rm_hw_blk_create(
}
blk->hw = hw;
- blk->enc_id = 0;
list_add_tail(>list, >hw_blks[type]);
return 0;
@@ -301,7 +290,6 @@ static bool _dpu_rm_needs_split_display(const
struct
msm_display_topology *top)
* proposed use case requirements, incl. hardwired dependent blocks
like
* pingpong
* @rm: dpu resource manager handle
- * @enc_id: encoder id requesting for allocation
* @reqs: proposed use case requirements
* @lm: proposed layer mixer, function checks if lm, and all other
hardwired
* blocks connected to the lm (pp) is available and appropriate
@@ -313,7 +301,6 @@ static bool _dpu_rm_needs_split_display(const
struct
msm_display_topology *top)
*/
static bool _dpu_rm_check_lm_and_get_connected_blks(
struct dpu_rm *rm,
- uint32_t enc_id,
struct dpu_rm_requirements *reqs,
struct dpu_rm_hw_blk *lm,
struct dpu_rm_hw_blk **pp,
@@ -339,13 +326,7 @@ static bool
_dpu_rm_check_lm_and_get_connected_blks(
}
}
- /* Already reserved? */
- if (RESERVED_BY_OTHER(lm, enc_id)) {
- DPU_DEBUG("lm %d already reserved\n", lm_cfg->id);
- return false;
- }
-
- _dpu_rm_init_hw_iter(, 0, DPU_HW_BLK_PINGPONG);
+ _dpu_rm_init_hw_iter(, DPU_HW_BLK_PINGPONG);
while (_dpu_rm_get_hw_locked(rm, )) {
if (iter.blk->hw->id == lm_cfg->pingpong) {
*pp = iter.blk;
@@ -358,16 +339,10 @@
Re: [Freedreno] [DPU PATCH 2/3] drm/msm/dp: add displayPort driver support
On Wed, Oct 10, 2018 at 10:15:58AM -0700, Chandan Uddaraju wrote: > Add the needed displayPort files to enable DP driver > on msm target. > > "dp_display" module is the main module that calls into > other sub-modules. "dp_drm" file represents the interface > between DRM framework and DP driver. > > Signed-off-by: Chandan Uddaraju > --- > drivers/gpu/drm/msm/Kconfig |9 + > drivers/gpu/drm/msm/Makefile| 15 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c | 206 > drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h | 44 + > drivers/gpu/drm/msm/dp/dp_aux.c | 570 ++ > drivers/gpu/drm/msm/dp/dp_aux.h | 44 + > drivers/gpu/drm/msm/dp/dp_catalog.c | 1188 > drivers/gpu/drm/msm/dp/dp_catalog.h | 144 +++ > drivers/gpu/drm/msm/dp/dp_ctrl.c| 1475 + > drivers/gpu/drm/msm/dp/dp_ctrl.h| 50 + > drivers/gpu/drm/msm/dp/dp_debug.c | 507 + > drivers/gpu/drm/msm/dp/dp_debug.h | 81 ++ > drivers/gpu/drm/msm/dp/dp_display.c | 977 + > drivers/gpu/drm/msm/dp/dp_display.h | 55 + > drivers/gpu/drm/msm/dp/dp_drm.c | 542 ++ > drivers/gpu/drm/msm/dp/dp_drm.h | 52 + > drivers/gpu/drm/msm/dp/dp_extcon.c | 400 +++ > drivers/gpu/drm/msm/dp/dp_extcon.h | 111 ++ > drivers/gpu/drm/msm/dp/dp_link.c| 1549 > +++ > drivers/gpu/drm/msm/dp/dp_link.h| 184 > drivers/gpu/drm/msm/dp/dp_panel.c | 624 +++ > drivers/gpu/drm/msm/dp/dp_panel.h | 121 +++ > drivers/gpu/drm/msm/dp/dp_parser.c | 679 > drivers/gpu/drm/msm/dp/dp_parser.h | 205 > drivers/gpu/drm/msm/dp/dp_power.c | 599 +++ > drivers/gpu/drm/msm/dp/dp_power.h | 57 + > drivers/gpu/drm/msm/dp/dp_reg.h | 357 ++ > drivers/gpu/drm/msm/msm_drv.c |2 + > drivers/gpu/drm/msm/msm_drv.h | 22 + > include/drm/drm_dp_helper.h | 19 + > 30 files changed, 10887 insertions(+), 1 deletion(-) > create mode 100644 drivers/gpu/drm/msm/dp/dp_aux.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_aux.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_debug.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_debug.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_display.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_display.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_drm.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_drm.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_extcon.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_extcon.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_link.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_link.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_panel.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_panel.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_parser.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_parser.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_power.c > create mode 100644 drivers/gpu/drm/msm/dp/dp_power.h > create mode 100644 drivers/gpu/drm/msm/dp/dp_reg.h > > diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig > index 843a9d4..c363f24 100644 > --- a/drivers/gpu/drm/msm/Kconfig > +++ b/drivers/gpu/drm/msm/Kconfig > @@ -49,6 +49,15 @@ config DRM_MSM_HDMI_HDCP > help > Choose this option to enable HDCP state machine > > +config DRM_MSM_DP > + bool "Enable DP support in MSM DRM driver" > + depends on DRM_MSM > + default n default n should be implied so you don't need to add it. > + help > + Compile in support for DP driver in msm drm > + driver. DP external display support is enabled > + through this config option. It can be primary or > + secondary display on device. > config DRM_MSM_DSI > bool "Enable DSI support in MSM DRM driver" > depends on DRM_MSM > diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile > index 19ab521..765a8d8 100644 > --- a/drivers/gpu/drm/msm/Makefile > +++ b/drivers/gpu/drm/msm/Makefile > @@ -2,6 +2,7 @@ > ccflags-y := -Idrivers/gpu/drm/msm > ccflags-y += -Idrivers/gpu/drm/msm/disp/dpu1 > ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi > +ccflags-$(CONFIG_DRM_MSM_DP) += -Idrivers/gpu/drm/msm/dp > > msm-y := \ > adreno/adreno_device.o \ > @@ -93,7 +94,19 @@ msm-y := \ > msm_submitqueue.o > > msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ > - disp/dpu1/dpu_dbg.o > +
Re: [Freedreno] [PATCH 24/25] drm/msm/dpu: remove mutex locking for RM interfaces
On 2018-10-10 07:36, Sean Paul wrote:
On Tue, Oct 09, 2018 at 11:03:24PM -0700, Jeykumar Sankaran wrote:
On 2018-10-09 12:57, Sean Paul wrote:
> On Mon, Oct 08, 2018 at 09:27:41PM -0700, Jeykumar Sankaran wrote:
> > Since HW reservations are happening through atomic_check
> > and all the display commits are catered by a single commit thread,
> > it is not necessary to protect the interfaces by a separate
> > mutex.
> >
> > Signed-off-by: Jeykumar Sankaran
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 24
> > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 --
> > 2 files changed, 26 deletions(-)
> >
>
> /snip
>
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> > index 8676fa5..9acbeba 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> > @@ -24,11 +24,9 @@
> > * struct dpu_rm - DPU dynamic hardware resource manager
> > * @hw_blks: array of lists of hardware resources present in the
> system, one
> > * list per type of hardware block
> > - * @rm_lock: resource manager mutex
> > */
> > struct dpu_rm {
> > struct list_head hw_blks[DPU_HW_BLK_MAX];
>
> At this point, there's really not much point to even having the rm.
It's
> just
> another level of indirection that IMO complicates the code. If you
look
> at the usage of hw_blks, the code is always looking at a specific type
> of
> hw_blk, so the array is unnecessary.
>
> dpu_kms could just keep a few arrays/lists of the hw types, and the
crtc
> and encoder
> reserve functions can just go in crtc/encoder.
>
> Sean
>
RM has been reduced to its current form to manage only LM/PP, CTL and
interfaces.
Our eventual plan is to support all the advanced HW blocks and its
features
in
an upstream friendly way. When RM grows to manage all its subblocks,
iteration
logic may get heavy since the chipset have HW chain restrictions on
various
hw blocks.
To provide room for the growth, I suggest keeping the allocation
helpers in a separate file. But I can see why you want to maintain the
HW
block lists
in the KMS.
At least for the blocks that exist, using the RM is unnecessary, does
that
change for the current blocks when you add more? I'm guessing their
code
will
remain unchanged.
Yes. But to seperate out the allocation logics, I prefered the separate
file. I guess we can hold off the discussion until we need those
enhancements.
I can get rid of the RM files for now and move the allocation functions
to
the respective files (CRTC / Encoder).
Thanks,
Jeykumar S.
If the new blocks you're adding have a lot of commonality, perhaps it
makes
sense to re-introduce the RM, but IMO it doesn't make sense for
lm/ctl/pp.
Sean
Thanks,
Jeykumar S.
> > - struct mutex rm_lock;
> > };
> >
> > /**
> > --
> > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> Forum,
> > a Linux Foundation Collaborative Project
> >
> > ___
> > Freedreno mailing list
> > freedr...@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/freedreno
--
Jeykumar S
--
Jeykumar S
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Re: [Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing
On 2018-10-10 07:29, Sean Paul wrote:
On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote:
On 2018-10-09 11:07, Sean Paul wrote:
> On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote:
> > Layer mixer/pingpong block counts and hw ctl block counts
> > will not be same for all the topologies (e.g. layer
> > mixer muxing to single interface)
> >
> > Use the encoder's split_role info to retrieve the
> > respective control path for programming.
> >
> > Signed-off-by: Jeykumar Sankaran
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 9 ++---
> > 1 file changed, 6 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > index 96cdf06..d12f896 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > @@ -1060,6 +1060,7 @@ static void dpu_encoder_virt_mode_set(struct
> drm_encoder *drm_enc,
> >
> > for (i = 0; i < dpu_enc->num_phys_encs; i++) {
> > struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
> > + int ctl_index;
> >
> > if (phys) {
> > if (!dpu_enc->hw_pp[i]) {
> > @@ -1068,14 +1069,16 @@ static void dpu_encoder_virt_mode_set(struct
> drm_encoder *drm_enc,
> > return;
> > }
> >
> > - if (!hw_ctl[i]) {
> > + ctl_index = phys->split_role == ENC_ROLE_SLAVE ? 1
> : 0;
> > +
>
> What if MAX_CHANNELS_PER_ENC isn't 2? Similarly, what if num_phys_encs
> MAX_CHANNELS_PER_ENC? It seems like there should be a more formal
> relationship
> between all of these verious values (num_of_h_tiles assumed to be <= 2
> as
> well).
> If one of them changes beyond the assumed bound, the rest of the
driver
> falls
> over pretty hard.
>
MAX_CHANNELS_PER_ENC is set to 2 to represent HW limitation on the
chipset
as
we cannot gang up more than 2 LM chain to an interface. Supporting
more
than
2
might demand much larger changes than validating for boundaries.
num_phys_enc is the max no of phys encoders we create as we are
looping
through
num_of_h_tiles which cannot be more than priv->dsi array size.
So its very unlikely we would expect these loops to go out of bound!
For now, sure. However a new revision of hardware will be a pain to add
support
for if we add more assumptions, and secondly it makes it _really_ hard
to
understand the code if you don't have Qualcomm employee-level access to
the
hardware design :).
I am having a hard time understanding why you have to see these counts
as
"assumptions".
Except for MAX_CHANNELS_PER_ENC, all the other counts are either
calculated
or derived from the other modules linked to the topology.
h_tiles is the drm_connector terminology which represents the number of
panels
the display is driving. We use this information to determine the HW
block chains in the MDP. HW blocks counts (pp or ctl) need not be same
as the h_tile count to replace them with.
I believe maintaining the counts independently at each layer allows us
to have more
flexibility to support independent HW chaining for future revisions.
Would it be more convincing if I get the MAX_CHANNELS_PER_ENC value from
catalog.c?
So this is why I'm advocating for the reduction of the number of
"num_of_"
values we assume are all in the same range. It's a lot easier to
understand the
hardware when you can see that a phys encoder is needed per h tile, and
that a
ctl/pp is needed per phys encoder.
This is exactly the idea I don't want to convey to the reader. For the
LM merge path,
each phys encoder will not be having its own control. Based on the
topology we
are supporting, HW block counts can vary. We can even drive:
- 2 interfaces with 1 ctl and 1 ping pong
- 1 interface with 1 ctl and 2 ping pongs
- 1 interface with 1 ctl and 1 ping pong
Thanks,
Jeykumar S.
Anyways, just my $0.02.
Sean
Thanks,
Jeykumar S.
>
> > + if (!hw_ctl[ctl_index]) {
> > DPU_ERROR_ENC(dpu_enc, "no ctl block
> assigned"
> > - "at idx: %d\n", i);
> > + "at idx: %d\n", ctl_index);
> > return;
>
> When you return on error here, should you give back the resources that
> you've
> already provisioned?
>
> > }
> >
> > phys->hw_pp = dpu_enc->hw_pp[i];
> > - phys->hw_ctl = hw_ctl[i];
> > + phys->hw_ctl = hw_ctl[ctl_index];
> >
> > phys->connector = conn->state->connector;
> > if (phys->ops.mode_set)
> > --
> > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> Forum,
> > a Linux Foundation Collaborative Project
> >
> > ___
> > Freedreno
Re: [PATCH] drm/atomic_helper: Allow DPMS On<->Off changes for unregistered connectors
On Tue, Oct 09, 2018 at 04:44:24PM -0400, Lyude Paul wrote: > It appears when testing my previous fix for some of the legacy > modesetting issues with MST, I misattributed some kernel splats that > started appearing on my machine after a rebase as being from upstream. > But it appears they actually came from my patch series: > > [2.980512] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] > Updating routing for [CONNECTOR:65:eDP-1] > [2.980516] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] > [CONNECTOR:65:eDP-1] is not registered > [2.980516] [ cut here ] > [2.980519] Could not determine valid watermarks for inherited state > [2.980553] WARNING: CPU: 3 PID: 551 at > drivers/gpu/drm/i915/intel_display.c:14983 intel_modeset_init+0x14d7/0x19f0 > [i915] > [2.980556] Modules linked in: i915(O+) i2c_algo_bit drm_kms_helper(O) > syscopyarea sysfillrect sysimgblt fb_sys_fops drm(O) intel_rapl > x86_pkg_temp_thermal iTCO_wdt wmi_bmof coretemp crc32_pclmul psmouse i2c_i801 > mei_me mei i2c_core lpc_ich mfd_core tpm_tis tpm_tis_core wmi tpm > thinkpad_acpi pcc_cpufreq video ehci_pci crc32c_intel serio_raw ehci_hcd > xhci_pci xhci_hcd > [2.980577] CPU: 3 PID: 551 Comm: systemd-udevd Tainted: G O > 4.19.0-rc7Lyude-Test+ #1 > [2.980579] Hardware name: LENOVO 20BWS1KY00/20BWS1KY00, BIOS JBET63WW > (1.27 ) 11/10/2016 > [2.980605] RIP: 0010:intel_modeset_init+0x14d7/0x19f0 [i915] > [2.980607] Code: 89 df e8 ec 27 02 00 e9 24 f2 ff ff be 03 00 00 00 48 89 > df e8 da 27 02 00 e9 26 f2 ff ff 48 c7 c7 c8 d1 34 a0 e8 23 cf dc e0 <0f> 0b > e9 7c fd ff ff f6 c4 04 0f 85 37 f7 ff ff 48 8b 83 60 08 00 > [2.980611] RSP: 0018:c9287988 EFLAGS: 00010282 > [2.980614] RAX: RBX: 88031b488000 RCX: > 0006 > [2.980617] RDX: 0007 RSI: 0086 RDI: > 880321ad54d0 > [2.980620] RBP: c9287a10 R08: 040a R09: > 0065 > [2.980623] R10: 88030ebb8f00 R11: 81416590 R12: > 88031b488000 > [2.980626] R13: 88031b4883a0 R14: c92879a8 R15: > 880319099800 > [2.980630] FS: 7f475620d180() GS:880321ac() > knlGS: > [2.980633] CS: 0010 DS: ES: CR0: 80050033 > [2.980636] CR2: 7f9ef28018a0 CR3: 00031b72c001 CR4: > 003606e0 > [2.980639] DR0: DR1: DR2: > > [2.980642] DR3: DR6: fffe0ff0 DR7: > 0400 > [2.980645] Call Trace: > [2.980675] i915_driver_load+0xb0e/0xdc0 [i915] > [2.980681] ? kernfs_add_one+0xe7/0x130 > [2.980709] i915_pci_probe+0x46/0x60 [i915] > [2.980715] pci_device_probe+0xd4/0x150 > [2.980719] really_probe+0x243/0x3b0 > [2.980722] driver_probe_device+0xba/0x100 > [2.980726] __driver_attach+0xe4/0x110 > [2.980729] ? driver_probe_device+0x100/0x100 > [2.980733] bus_for_each_dev+0x74/0xb0 > [2.980736] driver_attach+0x1e/0x20 > [2.980739] bus_add_driver+0x159/0x230 > [2.980743] ? 0xa0393000 > [2.980746] driver_register+0x70/0xc0 > [2.980749] ? 0xa0393000 > [2.980753] __pci_register_driver+0x57/0x60 > [2.980780] i915_init+0x55/0x58 [i915] > [2.980785] do_one_initcall+0x4a/0x1c4 > [2.980789] ? do_init_module+0x27/0x210 > [2.980793] ? kmem_cache_alloc_trace+0x131/0x190 > [2.980797] do_init_module+0x60/0x210 > [2.980800] load_module+0x2063/0x22e0 > [2.980804] ? vfs_read+0x116/0x140 > [2.980807] ? vfs_read+0x116/0x140 > [2.980811] __do_sys_finit_module+0xbd/0x120 > [2.980814] ? __do_sys_finit_module+0xbd/0x120 > [2.980818] __x64_sys_finit_module+0x1a/0x20 > [2.980821] do_syscall_64+0x5a/0x110 > [2.980824] entry_SYSCALL_64_after_hwframe+0x44/0xa9 > [2.980826] RIP: 0033:0x7f4754e32879 > [2.980828] Code: 00 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 48 89 > f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d > 01 f0 ff ff 73 01 c3 48 8b 0d f7 45 2c 00 f7 d8 64 89 01 48 > [2.980831] RSP: 002b:7fff43fd97d8 EFLAGS: 0246 ORIG_RAX: > 0139 > [2.980834] RAX: ffda RBX: 559a44ca64f0 RCX: > 7f4754e32879 > [2.980836] RDX: RSI: 7f475599f4cd RDI: > 0018 > [2.980838] RBP: 7f475599f4cd R08: R09: > > [2.980839] R10: 0018 R11: 0246 R12: > > [2.980841] R13: 559a44c92fd0 R14: 0002 R15: > > [2.980881] WARNING: CPU: 3 PID: 551 at > drivers/gpu/drm/i915/intel_display.c:14983 intel_modeset_init+0x14d7/0x19f0 > [i915] > [2.980884] ---[ end trace 5eb47a76277d4731 ]--- > > The cause of this appears to be due to the fact that if
[Bug 99923] HITMAN (2016) having lighting and artefacting, and overly light room.
https://bugs.freedesktop.org/show_bug.cgi?id=99923 --- Comment #39 from Martin Pilarski --- I can confirm that the issue is fixed with the initial fix. glxinfo | grep Mesa client glx vendor string: Mesa Project and SGI OpenGL core profile version string: 4.5 (Core Profile) Mesa 18.3.0-devel (git-fa52ff856d) OpenGL version string: 4.5 (Compatibility Profile) Mesa 18.3.0-devel (git-fa52ff856d) OpenGL ES profile version string: OpenGL ES 3.2 Mesa 18.3.0-devel (git-fa52ff856d) glxinfo | grep LLVM Device: AMD PITCAIRN (DRM 2.50.0, 4.18.12-arch1-1-ARCH, LLVM 8.0.0) (0x6818) OpenGL renderer string: AMD PITCAIRN (DRM 2.50.0, 4.18.12-arch1-1-ARCH, LLVM 8.0.0) LLVM was built from commit c179d7b. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [DPU PATCH 0/3] Add support for DisplayPort driver on SnapDragon 845
On 2018-10-10 10:15, Chandan Uddaraju wrote: These patches add support for Display-Port driver on SnapDragon 845 hardware. It adds DP driver and DP PLL driver files along with the needed device-tree bindings. The block diagram of DP driver is shown below: +-+ |DRM FRAMEWORK| +--+--+ | +v+ | DP DRM | +++ | +v+ ++| DP+--++--+ ++---+| DISPLAY |+---+ | | |++-+-+-+| | | || | | | | | || | | | | | || | | | | | vv v v v v v +--+ +--+ +---+ ++ ++ +---+ +-+ | DP | | DP | |DP | | DP | | DP | |DP | | DP | |PARSER| |EXTCON| |AUX| |LINK| |CTRL| |PHY| |POWER| +--+---+ +---+--+ +---+ ++ +--+-+ +-+-+ +-+ | || | +--v---+ +---v-+ +v-v+ |DEVICE| |EXTCON | | DP | | TREE | |INTERFACE| |CATALOG| +--+ +-+ +---+---+ | +---v+ |CTRL/PHY| | HW | ++ It will be more helpful to have this block diagram in [DPU PATCH 2/3] drm/msm/dp: add displayPort driver support Thanks, Jeykumar S. These patches have dependency on clock driver changes mentioned below: https://patchwork.kernel.org/patch/10632753/ https://patchwork.kernel.org/patch/10632757/ Chandan Uddaraju (3): dt-bindings: msm/dp: add bindings of DP/DP-PLL driver for Snapdragon 845 drm/msm/dp: add displayPort driver support drm/msm/dp: add support for DP PLL driver .../devicetree/bindings/display/msm/dp.txt | 249 .../devicetree/bindings/display/msm/dpu.txt| 16 +- drivers/gpu/drm/msm/Kconfig| 25 + drivers/gpu/drm/msm/Makefile | 21 +- drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c| 206 +++ drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h| 44 + drivers/gpu/drm/msm/dp/dp_aux.c| 570 +++ drivers/gpu/drm/msm/dp/dp_aux.h| 44 + drivers/gpu/drm/msm/dp/dp_catalog.c| 1188 +++ drivers/gpu/drm/msm/dp/dp_catalog.h| 144 ++ drivers/gpu/drm/msm/dp/dp_ctrl.c | 1476 +++ drivers/gpu/drm/msm/dp/dp_ctrl.h | 50 + drivers/gpu/drm/msm/dp/dp_debug.c | 507 +++ drivers/gpu/drm/msm/dp/dp_debug.h | 81 + drivers/gpu/drm/msm/dp/dp_display.c| 1027 + drivers/gpu/drm/msm/dp/dp_display.h| 58 + drivers/gpu/drm/msm/dp/dp_drm.c| 542 +++ drivers/gpu/drm/msm/dp/dp_drm.h| 52 + drivers/gpu/drm/msm/dp/dp_extcon.c | 400 + drivers/gpu/drm/msm/dp/dp_extcon.h | 111 ++ drivers/gpu/drm/msm/dp/dp_link.c | 1549 drivers/gpu/drm/msm/dp/dp_link.h | 184 +++ drivers/gpu/drm/msm/dp/dp_panel.c | 624 drivers/gpu/drm/msm/dp/dp_panel.h | 121 ++ drivers/gpu/drm/msm/dp/dp_parser.c | 679 + drivers/gpu/drm/msm/dp/dp_parser.h | 208 +++ drivers/gpu/drm/msm/dp/dp_power.c | 652 drivers/gpu/drm/msm/dp/dp_power.h | 59 + drivers/gpu/drm/msm/dp/dp_reg.h| 357 + drivers/gpu/drm/msm/dp/pll/dp_pll.c| 153 ++ drivers/gpu/drm/msm/dp/pll/dp_pll.h| 64 + drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c | 401 + drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.h | 94 ++ drivers/gpu/drm/msm/dp/pll/dp_pll_10nm_util.c | 531 +++ drivers/gpu/drm/msm/msm_drv.c |2 + drivers/gpu/drm/msm/msm_drv.h | 22 + include/drm/drm_dp_helper.h| 19 + 37 files changed, 12525 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dp.txt create mode 100644 drivers/gpu/drm/msm/dp/dp_aux.c create mode 100644 drivers/gpu/drm/msm/dp/dp_aux.h create mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.c create mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.h create mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.c create mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.h create mode 100644 drivers/gpu/drm/msm/dp/dp_debug.c create mode 100644 drivers/gpu/drm/msm/dp/dp_debug.h create
Re: [DPU PATCH 1/3] dt-bindings: msm/dp: add bindings of DP/DP-PLL driver for Snapdragon 845
On Wed, Oct 10, 2018 at 10:15:57AM -0700, Chandan Uddaraju wrote: > Add bindings for Snapdragon 845 DisplayPort and > display-port PLL driver. > This won't get Rob Herring's review unless it's sent to the devicetree list. > Signed-off-by: Chandan Uddaraju > --- > .../devicetree/bindings/display/msm/dp.txt | 249 > + > .../devicetree/bindings/display/msm/dpu.txt| 16 +- > 2 files changed, 261 insertions(+), 4 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/msm/dp.txt > > diff --git a/Documentation/devicetree/bindings/display/msm/dp.txt > b/Documentation/devicetree/bindings/display/msm/dp.txt > new file mode 100644 > index 000..0155266 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/dp.txt > @@ -0,0 +1,249 @@ > +Qualcomm Technologies, Inc. > +DP is the master Display Port device which supports DP host controllers that > are compatible with VESA Display Port interface specification. > +DP Controller: Required properties: > +- compatible: Should be "qcom,dp-display". > +- reg: Base address and length of DP hardware's memory > mapped regions. > +- cell-index: Specifies the controller instance. > +- reg-names:A list of strings that name the list of regs. > + "dp_ahb" - DP controller memory region. > + "dp_aux" - DP AUX memory region. > + "dp_link" - DP link layer memory region. > + "dp_p0" - DP pixel clock domain memory region. > + "dp_phy" - DP PHY memory region. > + "dp_ln_tx0" - USB3 DP PHY combo TX-0 lane memory region. > + "dp_ln_tx1" - USB3 DP PHY combo TX-1 lane memory region. > + "dp_mmss_cc" - Display Clock Control memory region. > + "qfprom_physical" - QFPROM Phys memory region. > + "dp_pll" - USB3 DP combo PLL memory region. > + "usb3_dp_com" - USB3 DP PHY combo memory region. > + "hdcp_physical" - DP HDCP memory region. > +- interrupt-parent phandle to the interrupt parent device node. > +- interrupts:The interrupt signal from the DP block. > +- clocks: Clocks required for Display Port operation. See [1] > for details on clock bindings. > +- clock-names: Names of the clocks corresponding to handles. > Following clocks are required: > + "core_aux_clk", > "core_usb_ref_clk_src","core_usb_ref_clk", "core_usb_cfg_ahb_clk", > + "core_usb_pipe_clk", "ctrl_link_clk", > "ctrl_link_iface_clk", "ctrl_crypto_clk", > + "ctrl_pixel_clk", "pixel_clk_rcg", "pixel_parent". > +- pll-node: phandle to DP PLL node. > +- vdda-1p2-supply: phandle to vdda 1.2V regulator node. > +- vdda-0p9-supply: phandle to vdda 0.9V regulator node. > +- qcom,aux-cfg0-settings:Specifies the DP AUX configuration 0 > settings. The first > + entry in this array corresponds to the > register offset > + within DP AUX, while the remaining > entries indicate the > + programmable values. > +- qcom,aux-cfg1-settings:Specifies the DP AUX configuration 1 > settings. The first > + entry in this array corresponds to the > register offset > + within DP AUX, while the remaining > entries indicate the > + programmable values. > +- qcom,aux-cfg2-settings:Specifies the DP AUX configuration 2 > settings. The first > + entry in this array corresponds to the > register offset > + within DP AUX, while the remaining > entries indicate the > + programmable values. > +- qcom,aux-cfg3-settings:Specifies the DP AUX configuration 3 > settings. The first > + entry in this array corresponds to the > register offset > + within DP AUX, while the remaining > entries indicate the > + programmable values. > +- qcom,aux-cfg4-settings:Specifies the DP AUX configuration 4 > settings. The first > + entry in this array corresponds to the > register offset > + within DP AUX, while the remaining > entries indicate the > + programmable values. > +- qcom,aux-cfg5-settings:Specifies the DP AUX configuration 5 > settings. The first > + entry in this array corresponds to the > register offset > +
[DPU PATCH 3/3] drm/msm/dp: add support for DP PLL driver
Add the needed DP PLL specific files to support
display port interface on msm targets.
The DP driver calls the DP PLL driver registration.
The DP driver sets the link and pixel clock sources.
Signed-off-by: Chandan Uddaraju
---
drivers/gpu/drm/msm/Kconfig | 16 +
drivers/gpu/drm/msm/Makefile | 6 +
drivers/gpu/drm/msm/dp/dp_ctrl.c | 1 +
drivers/gpu/drm/msm/dp/dp_display.c | 50 +++
drivers/gpu/drm/msm/dp/dp_display.h | 3 +
drivers/gpu/drm/msm/dp/dp_parser.h| 3 +
drivers/gpu/drm/msm/dp/dp_power.c | 77 +++-
drivers/gpu/drm/msm/dp/dp_power.h | 2 +
drivers/gpu/drm/msm/dp/pll/dp_pll.c | 153
drivers/gpu/drm/msm/dp/pll/dp_pll.h | 64
drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c | 401 +++
drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.h | 94 +
drivers/gpu/drm/msm/dp/pll/dp_pll_10nm_util.c | 531 ++
13 files changed, 1389 insertions(+), 12 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll.c
create mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll.h
create mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
create mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.h
create mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll_10nm_util.c
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig
index c363f24..1e0b9158 100644
--- a/drivers/gpu/drm/msm/Kconfig
+++ b/drivers/gpu/drm/msm/Kconfig
@@ -58,6 +58,22 @@ config DRM_MSM_DP
driver. DP external display support is enabled
through this config option. It can be primary or
secondary display on device.
+
+config DRM_MSM_DP_PLL
+ bool "Enable DP PLL driver in MSM DRM"
+ depends on DRM_MSM_DP && COMMON_CLK
+ default y
+ help
+ Choose this option to enable DP PLL driver which provides DP
+ source clocks under common clock framework.
+
+config DRM_MSM_DP_10NM_PLL
+ bool "Enable DP 10nm PLL driver in MSM DRM (used by SDM845)"
+ depends on DRM_MSM_DP
+ default y
+ help
+ Choose this option if DP PLL on SDM845 is used on the platform.
+
config DRM_MSM_DSI
bool "Enable DSI support in MSM DRM driver"
depends on DRM_MSM
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 765a8d8..8d18353 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -137,4 +137,10 @@ msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) +=
dsi/pll/dsi_pll_14nm.o
msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/pll/dsi_pll_10nm.o
endif
+ifeq ($(CONFIG_DRM_MSM_DP_PLL),y)
+msm-y += dp/pll/dp_pll.o
+msm-y += dp/pll/dp_pll_10nm.o
+msm-y += dp/pll/dp_pll_10nm_util.o
+endif
+
obj-$(CONFIG_DRM_MSM) += msm.o
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 08a52f5..e23beee 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1051,6 +1051,7 @@ static int dp_ctrl_enable_mainlink_clocks(struct
dp_ctrl_private *ctrl)
{
int ret = 0;
+ ctrl->power->set_link_clk_parent(ctrl->power);
ctrl->power->set_pixel_clk_parent(ctrl->power);
dp_ctrl_set_clock_rate(ctrl, "ctrl_link_clk",
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index 8c98399..2bf6635 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -72,6 +72,48 @@ struct dp_display_private {
{}
};
+static int dp_get_pll(struct dp_display_private *dp_priv)
+{
+ struct platform_device *pdev = NULL;
+ struct platform_device *pll_pdev;
+ struct device_node *pll_node;
+ struct dp_parser *dp_parser = NULL;
+
+ if (!dp_priv) {
+ pr_err("Invalid Arguments\n");
+ return -EINVAL;
+ }
+
+ pdev = dp_priv->pdev;
+ dp_parser = dp_priv->parser;
+
+ if (!dp_parser) {
+ pr_err("Parser not initialized.\n");
+ return -EINVAL;
+ }
+
+ pll_node = of_parse_phandle(pdev->dev.of_node, "pll-node", 0);
+ if (!pll_node) {
+ dev_err(>dev, "cannot find pll device\n");
+ return -ENXIO;
+ }
+
+ pll_pdev = of_find_device_by_node(pll_node);
+ if (pll_pdev)
+ dp_parser->pll = platform_get_drvdata(pll_pdev);
+
+ of_node_put(pll_node);
+
+ if (!pll_pdev || !dp_parser->pll) {
+ dev_err(>dev, "%s: pll driver is not ready\n", __func__);
+ return -EPROBE_DEFER;
+ }
+
+ dp_parser->pll_dev = get_device(_pdev->dev);
+
+ return 0;
+}
+
static irqreturn_t dp_display_irq(int irq, void *dev_id)
{
struct dp_display_private *dp = dev_id;
@@ -125,6 +167,12 @@ static int dp_display_bind(struct device *dev, struct
device *master,
goto end;
}
+ rc =
[DPU PATCH 1/3] dt-bindings: msm/dp: add bindings of DP/DP-PLL driver for Snapdragon 845
Add bindings for Snapdragon 845 DisplayPort and display-port PLL driver. Signed-off-by: Chandan Uddaraju --- .../devicetree/bindings/display/msm/dp.txt | 249 + .../devicetree/bindings/display/msm/dpu.txt| 16 +- 2 files changed, 261 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dp.txt diff --git a/Documentation/devicetree/bindings/display/msm/dp.txt b/Documentation/devicetree/bindings/display/msm/dp.txt new file mode 100644 index 000..0155266 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dp.txt @@ -0,0 +1,249 @@ +Qualcomm Technologies, Inc. +DP is the master Display Port device which supports DP host controllers that are compatible with VESA Display Port interface specification. +DP Controller: Required properties: +- compatible: Should be "qcom,dp-display". +- reg: Base address and length of DP hardware's memory mapped regions. +- cell-index: Specifies the controller instance. +- reg-names:A list of strings that name the list of regs. + "dp_ahb" - DP controller memory region. + "dp_aux" - DP AUX memory region. + "dp_link" - DP link layer memory region. + "dp_p0" - DP pixel clock domain memory region. + "dp_phy" - DP PHY memory region. + "dp_ln_tx0" - USB3 DP PHY combo TX-0 lane memory region. + "dp_ln_tx1" - USB3 DP PHY combo TX-1 lane memory region. + "dp_mmss_cc" - Display Clock Control memory region. + "qfprom_physical" - QFPROM Phys memory region. + "dp_pll" - USB3 DP combo PLL memory region. + "usb3_dp_com" - USB3 DP PHY combo memory region. + "hdcp_physical" - DP HDCP memory region. +- interrupt-parent phandle to the interrupt parent device node. +- interrupts: The interrupt signal from the DP block. +- clocks: Clocks required for Display Port operation. See [1] for details on clock bindings. +- clock-names: Names of the clocks corresponding to handles. Following clocks are required: + "core_aux_clk", "core_usb_ref_clk_src","core_usb_ref_clk", "core_usb_cfg_ahb_clk", + "core_usb_pipe_clk", "ctrl_link_clk", "ctrl_link_iface_clk", "ctrl_crypto_clk", + "ctrl_pixel_clk", "pixel_clk_rcg", "pixel_parent". +- pll-node:phandle to DP PLL node. +- vdda-1p2-supply: phandle to vdda 1.2V regulator node. +- vdda-0p9-supply: phandle to vdda 0.9V regulator node. +- qcom,aux-cfg0-settings: Specifies the DP AUX configuration 0 settings. The first + entry in this array corresponds to the register offset + within DP AUX, while the remaining entries indicate the + programmable values. +- qcom,aux-cfg1-settings: Specifies the DP AUX configuration 1 settings. The first + entry in this array corresponds to the register offset + within DP AUX, while the remaining entries indicate the + programmable values. +- qcom,aux-cfg2-settings: Specifies the DP AUX configuration 2 settings. The first + entry in this array corresponds to the register offset + within DP AUX, while the remaining entries indicate the + programmable values. +- qcom,aux-cfg3-settings: Specifies the DP AUX configuration 3 settings. The first + entry in this array corresponds to the register offset + within DP AUX, while the remaining entries indicate the + programmable values. +- qcom,aux-cfg4-settings: Specifies the DP AUX configuration 4 settings. The first + entry in this array corresponds to the register offset + within DP AUX, while the remaining entries indicate the + programmable values. +- qcom,aux-cfg5-settings: Specifies the DP AUX configuration 5 settings. The first + entry in this array corresponds to the register offset + within DP AUX, while the remaining entries indicate the + programmable values. +- qcom,aux-cfg6-settings: Specifies the DP AUX configuration 6 settings. The first +
[DPU PATCH 0/3] Add support for DisplayPort driver on SnapDragon 845
These patches add support for Display-Port driver on SnapDragon 845 hardware. It adds DP driver and DP PLL driver files along with the needed device-tree bindings. The block diagram of DP driver is shown below: +-+ |DRM FRAMEWORK| +--+--+ | +v+ | DP DRM | +++ | +v+ ++| DP+--++--+ ++---+| DISPLAY |+---+ | | |++-+-+-+| | | || | | | | | || | | | | | || | | | | | vv v v v v v +--+ +--+ +---+ ++ ++ +---+ +-+ | DP | | DP | |DP | | DP | | DP | |DP | | DP | |PARSER| |EXTCON| |AUX| |LINK| |CTRL| |PHY| |POWER| +--+---+ +---+--+ +---+ ++ +--+-+ +-+-+ +-+ | || | +--v---+ +---v-+ +v-v+ |DEVICE| |EXTCON | | DP | | TREE | |INTERFACE| |CATALOG| +--+ +-+ +---+---+ | +---v+ |CTRL/PHY| | HW | ++ These patches have dependency on clock driver changes mentioned below: https://patchwork.kernel.org/patch/10632753/ https://patchwork.kernel.org/patch/10632757/ Chandan Uddaraju (3): dt-bindings: msm/dp: add bindings of DP/DP-PLL driver for Snapdragon 845 drm/msm/dp: add displayPort driver support drm/msm/dp: add support for DP PLL driver .../devicetree/bindings/display/msm/dp.txt | 249 .../devicetree/bindings/display/msm/dpu.txt| 16 +- drivers/gpu/drm/msm/Kconfig| 25 + drivers/gpu/drm/msm/Makefile | 21 +- drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c| 206 +++ drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h| 44 + drivers/gpu/drm/msm/dp/dp_aux.c| 570 +++ drivers/gpu/drm/msm/dp/dp_aux.h| 44 + drivers/gpu/drm/msm/dp/dp_catalog.c| 1188 +++ drivers/gpu/drm/msm/dp/dp_catalog.h| 144 ++ drivers/gpu/drm/msm/dp/dp_ctrl.c | 1476 +++ drivers/gpu/drm/msm/dp/dp_ctrl.h | 50 + drivers/gpu/drm/msm/dp/dp_debug.c | 507 +++ drivers/gpu/drm/msm/dp/dp_debug.h | 81 + drivers/gpu/drm/msm/dp/dp_display.c| 1027 + drivers/gpu/drm/msm/dp/dp_display.h| 58 + drivers/gpu/drm/msm/dp/dp_drm.c| 542 +++ drivers/gpu/drm/msm/dp/dp_drm.h| 52 + drivers/gpu/drm/msm/dp/dp_extcon.c | 400 + drivers/gpu/drm/msm/dp/dp_extcon.h | 111 ++ drivers/gpu/drm/msm/dp/dp_link.c | 1549 drivers/gpu/drm/msm/dp/dp_link.h | 184 +++ drivers/gpu/drm/msm/dp/dp_panel.c | 624 drivers/gpu/drm/msm/dp/dp_panel.h | 121 ++ drivers/gpu/drm/msm/dp/dp_parser.c | 679 + drivers/gpu/drm/msm/dp/dp_parser.h | 208 +++ drivers/gpu/drm/msm/dp/dp_power.c | 652 drivers/gpu/drm/msm/dp/dp_power.h | 59 + drivers/gpu/drm/msm/dp/dp_reg.h| 357 + drivers/gpu/drm/msm/dp/pll/dp_pll.c| 153 ++ drivers/gpu/drm/msm/dp/pll/dp_pll.h| 64 + drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c | 401 + drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.h | 94 ++ drivers/gpu/drm/msm/dp/pll/dp_pll_10nm_util.c | 531 +++ drivers/gpu/drm/msm/msm_drv.c |2 + drivers/gpu/drm/msm/msm_drv.h | 22 + include/drm/drm_dp_helper.h| 19 + 37 files changed, 12525 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dp.txt create mode 100644 drivers/gpu/drm/msm/dp/dp_aux.c create mode 100644 drivers/gpu/drm/msm/dp/dp_aux.h create mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.c create mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.h create mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.c create mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.h create mode 100644 drivers/gpu/drm/msm/dp/dp_debug.c create mode 100644 drivers/gpu/drm/msm/dp/dp_debug.h create mode 100644 drivers/gpu/drm/msm/dp/dp_display.c create mode 100644 drivers/gpu/drm/msm/dp/dp_display.h create mode 100644 drivers/gpu/drm/msm/dp/dp_drm.c create mode 100644
[Bug 201273] Fatal error during GPU init amdgpu RX560
https://bugzilla.kernel.org/show_bug.cgi?id=201273 --- Comment #3 from quirin.blae...@freenet.de --- (In reply to Alex Deucher from comment #1) > Is this a regression? If so, can you bisect? which is the first release supporting RX560? -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] fbdev: make FB_BACKLIGHT a tristate
On 10/10/18, Rob Clark wrote: > BACKLIGHT_CLASS_DEVICE is already tristate, but a dependency > FB_BACKLIGHT prevents it from being built as a module. There > doesn't seem to be any particularly good reason for this, so > switch FB_BACKLIGHT over to tristate. > > Signed-off-by: Rob Clark I don't see anything immediately wrong, but anything related to BACKLIGHT_CLASS_DEVICE, BACKLIGHT_LCD_SUPPORT and FB_BACKLIGHT is really fragile in Kconfig, because of the way those interact with other options. I've applied your patch to my randconfig build tree for testing, let's see what happens there before you apply it. Arnd ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 John Galt changed: What|Removed |Added Attachment #141980|dmesg from boo |dmesg from boot to the description||issue -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108317] [Polaris] Black Textures only on Polaris in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 --- Comment #4 from John Galt --- I forgot to mention, if IRC works better for communication for anyone, I'm TheRealJohnGalt on Freenode #radeon. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #4 from John Galt --- I forgot to mention, if IRC works better for communication for anyone, I'm TheRealJohnGalt on Freenode #radeon. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #3 from John Galt --- Created attachment 141983 --> https://bugs.freedesktop.org/attachment.cgi?id=141983=edit screenshot of the issue -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #2 from John Galt --- Created attachment 141982 --> https://bugs.freedesktop.org/attachment.cgi?id=141982=edit glxinfo -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 --- Comment #1 from John Galt --- Created attachment 141981 --> https://bugs.freedesktop.org/attachment.cgi?id=141981=edit xorg log -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108318] [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent)
https://bugs.freedesktop.org/show_bug.cgi?id=108318 Bug ID: 108318 Summary: [Polaris] Glitches in New Super Mario Brothers U in Cemu on Polaris only (recent) Product: DRI Version: DRI git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: major Priority: medium Component: DRM/AMDgpu Assignee: dri-devel@lists.freedesktop.org Reporter: johngaltfirst...@gmail.com Created attachment 141980 --> https://bugs.freedesktop.org/attachment.cgi?id=141980=edit dmesg from boo This is a semi recent (within the last few months) bug on Polaris in NSMBU. Many polygons (maybe?) have major glitches across the screen, or don't show up at all. This doesn't occur on Tahiti or Pitcairn. I've gone back to 18.2.1 and verified it still exists, so it must be prior. It also exists on both linux 4.18.12 and the amdgpu-staging-drm-next branch. I'll continue attempting to bisect, unless someone else knows exactly what the issue is. There are quite a few GPU faults listed in the attached dmesg, though I'm not sure if they're related to the issue. Glxinfo, Xorg.0.log, as well as a screenshot of the issue. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] fbdev: make FB_BACKLIGHT a tristate
BACKLIGHT_CLASS_DEVICE is already tristate, but a dependency
FB_BACKLIGHT prevents it from being built as a module. There
doesn't seem to be any particularly good reason for this, so
switch FB_BACKLIGHT over to tristate.
Signed-off-by: Rob Clark
---
drivers/video/fbdev/Kconfig| 2 +-
drivers/video/fbdev/core/fbsysfs.c | 8
include/linux/fb.h | 2 +-
include/uapi/linux/fb.h| 2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index 591a13a59787..146ab2c347f8 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -198,7 +198,7 @@ config FB_MACMODES
default n
config FB_BACKLIGHT
- bool
+ tristate
depends on FB
select BACKLIGHT_LCD_SUPPORT
select BACKLIGHT_CLASS_DEVICE
diff --git a/drivers/video/fbdev/core/fbsysfs.c
b/drivers/video/fbdev/core/fbsysfs.c
index e31a182b42bf..44cca39f2b51 100644
--- a/drivers/video/fbdev/core/fbsysfs.c
+++ b/drivers/video/fbdev/core/fbsysfs.c
@@ -60,7 +60,7 @@ struct fb_info *framebuffer_alloc(size_t size, struct device
*dev)
info->device = dev;
info->fbcon_rotate_hint = -1;
-#ifdef CONFIG_FB_BACKLIGHT
+#if IS_ENABLED(CONFIG_FB_BACKLIGHT)
mutex_init(>bl_curve_mutex);
#endif
@@ -429,7 +429,7 @@ static ssize_t show_fbstate(struct device *device,
return snprintf(buf, PAGE_SIZE, "%d\n", fb_info->state);
}
-#ifdef CONFIG_FB_BACKLIGHT
+#if IS_ENABLED(CONFIG_FB_BACKLIGHT)
static ssize_t store_bl_curve(struct device *device,
struct device_attribute *attr,
const char *buf, size_t count)
@@ -510,7 +510,7 @@ static struct device_attribute device_attrs[] = {
__ATTR(stride, S_IRUGO, show_stride, NULL),
__ATTR(rotate, S_IRUGO|S_IWUSR, show_rotate, store_rotate),
__ATTR(state, S_IRUGO|S_IWUSR, show_fbstate, store_fbstate),
-#ifdef CONFIG_FB_BACKLIGHT
+#if IS_ENABLED(CONFIG_FB_BACKLIGHT)
__ATTR(bl_curve, S_IRUGO|S_IWUSR, show_bl_curve, store_bl_curve),
#endif
};
@@ -551,7 +551,7 @@ void fb_cleanup_device(struct fb_info *fb_info)
}
}
-#ifdef CONFIG_FB_BACKLIGHT
+#if IS_ENABLED(CONFIG_FB_BACKLIGHT)
/* This function generates a linear backlight curve
*
* 0: off
diff --git a/include/linux/fb.h b/include/linux/fb.h
index a3cab6dc9b44..7cdd31a69719 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -485,7 +485,7 @@ struct fb_info {
struct list_head modelist; /* mode list */
struct fb_videomode *mode; /* current mode */
-#ifdef CONFIG_FB_BACKLIGHT
+#if IS_ENABLED(CONFIG_FB_BACKLIGHT)
/* assigned backlight device */
/* set before framebuffer registration,
remove after unregister */
diff --git a/include/uapi/linux/fb.h b/include/uapi/linux/fb.h
index 6cd9b198b7c6..07f14cd6791a 100644
--- a/include/uapi/linux/fb.h
+++ b/include/uapi/linux/fb.h
@@ -393,7 +393,7 @@ struct fb_cursor {
struct fb_image image; /* Cursor image */
};
-#ifdef CONFIG_FB_BACKLIGHT
+#if IS_ENABLED(CONFIG_FB_BACKLIGHT)
/* Settings for the generic backlight code */
#define FB_BACKLIGHT_LEVELS128
#define FB_BACKLIGHT_MAX 0xFF
--
2.17.1
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Re: [PATCH 16/25] drm/msm/dpu: clean up test_only flag for RM reservation
On Mon, Oct 08, 2018 at 09:27:33PM -0700, Jeykumar Sankaran wrote:
> Encoder uses test_only flag to differentiate RM reservations
> invoked from atomic check and atomic_commit phases.
> After reserving the HW blocks, if test_only was set, RM
> releases the reservation. Retains them if not. Since we
> got rid of RM reserve call from atomic_commit path, get rid
> of this flag.
I think I'm being dense, but I still don't see how the test_only path doesn't
result in lasting reservations.
Sean
>
> Signed-off-by: Jeykumar Sankaran
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 13 +++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 +---
> 3 files changed, 5 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 468b8fd0..dd17528 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -636,7 +636,7 @@ static int dpu_encoder_virt_atomic_check(
>
> if (!ret && drm_atomic_crtc_needs_modeset(crtc_state))
> ret = dpu_rm_reserve(_kms->rm, drm_enc, crtc_state,
> - topology, false);
> + topology);
>
> if (!ret)
> drm_mode_set_crtcinfo(adj_mode, 0);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index 3a92a3e..1234991 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -631,8 +631,7 @@ int dpu_rm_reserve(
> struct dpu_rm *rm,
> struct drm_encoder *enc,
> struct drm_crtc_state *crtc_state,
> - struct msm_display_topology topology,
> - bool test_only)
> + struct msm_display_topology topology)
> {
> struct dpu_rm_requirements reqs;
> struct dpu_crtc_state *dpu_cstate = to_dpu_crtc_state(crtc_state);
> @@ -642,8 +641,8 @@ int dpu_rm_reserve(
> if (!drm_atomic_crtc_needs_modeset(crtc_state))
> return 0;
>
> - DRM_DEBUG_KMS("reserving hw for enc %d crtc %d test_only %d\n",
> - enc->base.id, crtc_state->crtc->base.id, test_only);
> + DRM_DEBUG_KMS("reserving hw for enc %d crtc %d\n",
> + enc->base.id, crtc_state->crtc->base.id);
>
> mutex_lock(>rm_lock);
>
> @@ -657,13 +656,7 @@ int dpu_rm_reserve(
> if (ret) {
> DPU_ERROR("failed to reserve hw resources: %d\n", ret);
> _dpu_rm_release_reservation(rm, dpu_cstate);
> - } else if (test_only) {
> - /* test_only: test the reservation and then undo */
> - DPU_DEBUG("test_only: discard test [enc: %d]\n",
> - enc->base.id);
> - _dpu_rm_release_reservation(rm, dpu_cstate);
> }
> -
> end:
> mutex_unlock(>rm_lock);
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> index 7ac1553..415eeec 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> @@ -63,14 +63,12 @@ int dpu_rm_init(struct dpu_rm *rm,
> * @drm_enc: DRM Encoder handle
> * @crtc_state: Proposed Atomic DRM CRTC State handle
> * @topology: Pointer to topology info for the display
> - * @test_only: Atomic-Test phase, discard results (unless property overrides)
> * @Return: 0 on Success otherwise -ERROR
> */
> int dpu_rm_reserve(struct dpu_rm *rm,
> struct drm_encoder *drm_enc,
> struct drm_crtc_state *crtc_state,
> - struct msm_display_topology topology,
> - bool test_only);
> + struct msm_display_topology topology);
>
> /**
> * dpu_rm_release - Given the encoder for the display chain, release any
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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Re: [Freedreno] [PATCH 5/9] arm64: dts: sdm845: Add gpu and gmu device nodes
On Wed, Oct 10, 2018 at 08:21:39PM +0530, Viresh Kumar wrote: > On 10-10-18, 08:48, Jordan Crouse wrote: > > qcom,level comes straight from: > > > > https://lore.kernel.org/lkml/20180627045234.27403-2-rna...@codeaurora.org/ > > > > But in this case instead of using the CPU to program the RPMh we are passing > > the value to a microprocessor (the GMU) and that will do the vote on our > > behalf > > (Technically we use the value to look up the vote in the cmd-db database and > > pass that to the GMU) > > > > This is why the qcom,level was added in the first place so we could at least > > share the nomenclature with the rpmhd if not the implementation. > > How you actually pass the vote to the underlying hardware, RPMh or > GMU, is irrelevant to the whole thing. What is important is how we > describe that in DT and how we represent the whole thing. > > We have chosen genpd + OPP to do this and same should be used by you > as well. Another benefit is that the genpd core will do vote > aggregation for you here. I'm not sure what you are suggesting? The vote is represented in DT exactly as described in the bindings. Jordan > -- > viresh > ___ > Freedreno mailing list > freedr...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/freedreno -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108317] [Polaris] Black Textures only on Polaris in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 John Galt changed: What|Removed |Added Summary|[Polaris] Black Textures on |[Polaris] Black Textures |Polaris only in Cemu Zelda |only on Polaris in Cemu |Breath of the Wild |Zelda Breath of the Wild -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 15/25] drm/msm/dpu: avoid redundant hw blk reference
On Mon, Oct 08, 2018 at 09:27:32PM -0700, Jeykumar Sankaran wrote:
> Get rid of hw block pointer in RM iter as we can
> access the same through dpu_hw_blk.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 10 ++
> 1 file changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index a8461b8..3a92a3e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -47,12 +47,10 @@ struct dpu_rm_hw_blk {
>
> /**
> * struct dpu_rm_hw_iter - iterator for use with dpu_rm
> - * @hw: dpu_hw object requested, or NULL on failure
> * @blk: dpu_rm internal block representation. Clients ignore. Used as
> iterator.
> * @type: Hardware Block Type client wishes to search for.
> */
> struct dpu_rm_hw_iter {
> - struct dpu_hw_blk *hw;
> struct dpu_rm_hw_blk *blk;
> enum dpu_hw_blk_type type;
> };
> @@ -74,7 +72,6 @@ static bool _dpu_rm_get_hw_locked(struct dpu_rm *rm, struct
> dpu_rm_hw_iter *i)
> return false;
> }
>
> - i->hw = NULL;
> blk_list = >hw_blks[i->type];
>
> if (i->blk && (>blk->list == blk_list)) {
> @@ -84,12 +81,9 @@ static bool _dpu_rm_get_hw_locked(struct dpu_rm *rm,
> struct dpu_rm_hw_iter *i)
>
> i->blk = list_prepare_entry(i->blk, blk_list, list);
>
> - list_for_each_entry_continue(i->blk, blk_list, list) {
> - if (!i->blk->in_use) {
> - i->hw = i->blk->hw;
> + list_for_each_entry_continue(i->blk, blk_list, list)
> + if (!i->blk->in_use)
> return true;
> - }
> - }
>
> return false;
> }
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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Re: [PATCH 14/25] drm/msm/dpu: remove enc_id tagging for hw blocks
On Mon, Oct 08, 2018 at 09:27:31PM -0700, Jeykumar Sankaran wrote:
> RM was using encoder id's to tag HW block's to reserve
> and retrieve later for display pipeline. Now
> that all the reserved HW blocks for a display are
> maintained in its crtc state, no retrieval is needed.
> This patch cleans up RM of encoder id tagging.
>
> Signed-off-by: Jeykumar Sankaran
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c| 90
> +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 28 --
> 2 files changed, 36 insertions(+), 82 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index 303f1b3..a8461b8 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -21,9 +21,6 @@
> #include "dpu_encoder.h"
> #include "dpu_trace.h"
>
> -#define RESERVED_BY_OTHER(h, r) \
> - ((h)->enc_id && (h)->enc_id != r)
> -
> /**
> * struct dpu_rm_requirements - Reservation requirements parameter bundle
> * @topology: selected topology for the display
> @@ -38,12 +35,13 @@ struct dpu_rm_requirements {
> /**
> * struct dpu_rm_hw_blk - hardware block tracking list member
> * @list:List head for list of all hardware blocks tracking items
> - * @enc_id: Encoder id to which this blk is binded
> + * @in_use: True, if the hw block is assigned to a display pipeline.
> + * False, otherwise
> * @hw: Pointer to the hardware register access object for this
> block
> */
> struct dpu_rm_hw_blk {
> struct list_head list;
> - uint32_t enc_id;
> + bool in_use;
How do the reservations work for TEST_ONLY commits? At a quick glance it looks
like they might be marked in_use?
Sean
> struct dpu_hw_blk *hw;
> };
>
> @@ -51,23 +49,19 @@ struct dpu_rm_hw_blk {
> * struct dpu_rm_hw_iter - iterator for use with dpu_rm
> * @hw: dpu_hw object requested, or NULL on failure
> * @blk: dpu_rm internal block representation. Clients ignore. Used as
> iterator.
> - * @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any
> Encoder
> * @type: Hardware Block Type client wishes to search for.
> */
> struct dpu_rm_hw_iter {
> struct dpu_hw_blk *hw;
> struct dpu_rm_hw_blk *blk;
> - uint32_t enc_id;
> enum dpu_hw_blk_type type;
> };
>
> static void _dpu_rm_init_hw_iter(
> struct dpu_rm_hw_iter *iter,
> - uint32_t enc_id,
> enum dpu_hw_blk_type type)
> {
> memset(iter, 0, sizeof(*iter));
> - iter->enc_id = enc_id;
> iter->type = type;
> }
>
> @@ -91,16 +85,12 @@ static bool _dpu_rm_get_hw_locked(struct dpu_rm *rm,
> struct dpu_rm_hw_iter *i)
> i->blk = list_prepare_entry(i->blk, blk_list, list);
>
> list_for_each_entry_continue(i->blk, blk_list, list) {
> - if (i->enc_id == i->blk->enc_id) {
> + if (!i->blk->in_use) {
> i->hw = i->blk->hw;
> - DPU_DEBUG("found type %d id %d for enc %d\n",
> - i->type, i->blk->hw->id, i->enc_id);
> return true;
> }
> }
>
> - DPU_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
> -
> return false;
> }
>
> @@ -196,7 +186,6 @@ static int _dpu_rm_hw_blk_create(
> }
>
> blk->hw = hw;
> - blk->enc_id = 0;
> list_add_tail(>list, >hw_blks[type]);
>
> return 0;
> @@ -301,7 +290,6 @@ static bool _dpu_rm_needs_split_display(const struct
> msm_display_topology *top)
> * proposed use case requirements, incl. hardwired dependent blocks like
> * pingpong
> * @rm: dpu resource manager handle
> - * @enc_id: encoder id requesting for allocation
> * @reqs: proposed use case requirements
> * @lm: proposed layer mixer, function checks if lm, and all other hardwired
> * blocks connected to the lm (pp) is available and appropriate
> @@ -313,7 +301,6 @@ static bool _dpu_rm_needs_split_display(const struct
> msm_display_topology *top)
> */
> static bool _dpu_rm_check_lm_and_get_connected_blks(
> struct dpu_rm *rm,
> - uint32_t enc_id,
> struct dpu_rm_requirements *reqs,
> struct dpu_rm_hw_blk *lm,
> struct dpu_rm_hw_blk **pp,
> @@ -339,13 +326,7 @@ static bool _dpu_rm_check_lm_and_get_connected_blks(
> }
> }
>
> - /* Already reserved? */
> - if (RESERVED_BY_OTHER(lm, enc_id)) {
> - DPU_DEBUG("lm %d already reserved\n", lm_cfg->id);
> - return false;
> - }
> -
> - _dpu_rm_init_hw_iter(, 0, DPU_HW_BLK_PINGPONG);
> + _dpu_rm_init_hw_iter(, DPU_HW_BLK_PINGPONG);
> while (_dpu_rm_get_hw_locked(rm, )) {
> if (iter.blk->hw->id == lm_cfg->pingpong) {
> *pp = iter.blk;
> @@ -358,16 +339,10 @@ static bool
[Bug 108317] [Polaris] Black Textures on Polaris only in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 --- Comment #3 from John Galt --- Created attachment 141978 --> https://bugs.freedesktop.org/attachment.cgi?id=141978=edit Screenshot of the issue -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108317] [Polaris] Black Textures on Polaris only in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 --- Comment #2 from John Galt --- Created attachment 141977 --> https://bugs.freedesktop.org/attachment.cgi?id=141977=edit Xorg log -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108317] [Polaris] Black Textures on Polaris only in Cemu Zelda Breath of the Wild
https://bugs.freedesktop.org/show_bug.cgi?id=108317 --- Comment #1 from John Galt --- Created attachment 141976 --> https://bugs.freedesktop.org/attachment.cgi?id=141976=edit glxinfo -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
