On 10.11.2018 08:32, Jagan Teki wrote:
> On Wed, Nov 7, 2018 at 2:41 PM Andrzej Hajda wrote:
>> On 06.11.2018 19:08, Jagan Teki wrote:
>>> On Wed, Oct 31, 2018 at 2:45 PM Andrzej Hajda wrote:
On 31.10.2018 09:58, Chen-Yu Tsai wrote:
> On Wed, Oct 31, 2018 at 4:53 PM Andrzej Hajda
v2: Renamed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV.
Added comment about AYUV byte ordering in Gstreamer.
v3: Removed sna_composite_op flags related change to the separate patch.
v4: Fixed review comments, done code refactoring
v5: Fixed following review comments:
- Fixed comment in
sna/gen9+: Added AYUV format support for textured and sprite video adapters.
Split out wm_kernel from the sna_composite_op flags
Stanislav Lisovskiy (2):
sna/gen9+: Split out wm_kernel from the sna_composite_op flags
sna: Added AYUV format support for textured and sprite video adapters.
With the extra video kernels we already ran out of bits in
the flags. To tackle that let's just split out the
wm_kernel to its own thing.
Signed-off-by: Stanislav Lisovskiy
---
src/sna/gen9_render.c | 35 ++-
src/sna/sna_render.h | 1 +
2 files changed, 23
On 2018年11月12日 18:16, Christian König wrote:
Am 09.11.18 um 23:26 schrieb Eric Anholt:
Eric Anholt writes:
[ Unknown signature status ]
zhoucm1 writes:
On 2018年11月09日 00:52, Christian König wrote:
Am 08.11.18 um 17:07 schrieb Koenig, Christian:
Am 08.11.18 um 17:04 schrieb Eric
On 2018年11月12日 18:48, Chris Wilson wrote:
Quoting Christian König (2018-11-12 10:16:01)
Am 09.11.18 um 23:26 schrieb Eric Anholt:
Eric Anholt writes:
[ Unknown signature status ]
zhoucm1 writes:
On 2018年11月09日 00:52, Christian König wrote:
From: "Lee, Shawn C"
[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]
BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.
Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.
Cc: Jani Nikula
Cc:
From: "Lee, Shawn C"
[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]
BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.
Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.
Cc: Jani Nikula
Cc:
From: "Lee, Shawn C"
[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]
BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.
Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.
Cc: Jani Nikula
Cc:
From: "Lee, Shawn C"
[ Upstream commit 922dceff8dc1fb4dafc9af78139ba65671408103 ]
BOE panel (ID: 0x0771) that reports "DFP 1.x compliant TMDS".
But it's 6bpc panel only instead of 8 bpc.
Add panel ID to edid quirk list and set 6 bpc as default to
work around this issue.
Cc: Jani Nikula
Cc:
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
The crtc runtime resume doesn't actually operate on the crtc, but
rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
enc_spinlock instead of enc_spin_lock.
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 2018-11-12 17:06, Jeykumar Sankaran wrote:
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Now that we don't have any event handlers, remove dpu_power_handle!
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's only used in core_perf, so stick it there (and change the name to
reflect that).
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 34 +--
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
1 file changed, 1
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's unused
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 5 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 23 ++-
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
There's only one client -- core, and it's only used for runtime pm
which
is already refcounted.
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 +
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 -
1 file changed, 21 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's only used for debugfs, so just output the enum value instead.
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 ++
On Wed, Nov 07, 2018 at 07:10:38AM -0500, Brian Dodge wrote:
> The vendor-prefixes.txt file properly refers to ArcticSand
> as arctic but the driver bindings improperly abbreviated the
> prefix to arc. This was a mistake in the original patch
>
Are there any users and are they okay with this
On Wed, 7 Nov 2018 19:18:39 +0100, Paul Kocialkowski wrote:
> This introduces a new device-tree binding vendor prefix for Shenzhen
> LeMaker Technology Co., Ltd.
>
> This vendor was already in use but it was not documented until now.
>
> Signed-off-by: Paul Kocialkowski
> Reviewed-by: Rob
On Sat, 3 Nov 2018 15:38:58 +0530, Jagan Teki wrote:
> Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel.
>
> Add dt-bingings for it.
>
> Signed-off-by: Jagan Teki
> ---
> .../display/panel/feiyang,fy07024di26a30d.txt | 20 +++
> 1 file changed, 20 insertions(+)
On Wed, 7 Nov 2018 19:18:40 +0100, Paul Kocialkowski wrote:
> This adds the device-tree bindings for the LeMaker BL035-RGB-002 3.5"
> QVGA TFT LCD panel, compatible with simple-panel.
>
> Signed-off-by: Paul Kocialkowski
> ---
> .../bindings/display/panel/lemaker,bl035-rgb-002.txt | 12
On Mon, 5 Nov 2018 11:45:07 +0100, Maxime Jourdan wrote:
> Allows using the new canvas provider module if present.
>
> Signed-off-by: Maxime Jourdan
> ---
> Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring
https://bugs.freedesktop.org/show_bug.cgi?id=108718
Bug ID: 108718
Summary: Raven Ridge: ring sdma0 timeout on heavy CSS website
with Firefox WebRender
Product: DRI
Version: XOrg git
Hardware: Other
OS: All
From: Sean Paul
It's for legacy drivers, for atomic drivers crtc->state->encoder_mask
should be used to map encoder to crtc.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 46
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 19 +++---
2 files
From: Sean Paul
This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
since it digs into the state objects.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
From: Sean Paul
Add modeset lock checks to functions that could be called outside the
core atomic stack.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
2 files changed, 3 insertions(+)
diff --git
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
From: Sean Paul
The crtc runtime resume doesn't actually operate on the crtc, but rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be called while holding the modeset locks
From: Sean Paul
Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27 +
1 file changed,
From: Sean Paul
Now that we don't have any event handlers, remove dpu_power_handle!
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 11 --
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 3 -
From: Sean Paul
enc_spinlock instead of enc_spin_lock.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index
From: Sean Paul
It's only used in core_perf, so stick it there (and change the name to
reflect that).
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 34 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 17 --
From: Sean Paul
It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
From: Sean Paul
It's unused
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 5 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 -
3 files changed, 9 deletions(-)
diff --git
From: Sean Paul
Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 23 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 10 ++
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
From: Sean Paul
There's only one client -- core, and it's only used for runtime pm which
is already refcounted.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
From: Sean Paul
I started pulling a thread last week when looking at dpu locking. It led
me into the power_handle code and eventually runtime suspend/resume.
This set removes the power_handle stuff entirely. I'm sure it's more
useful when there are multiple clients/handles/events, but for our
From: Sean Paul
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 -
1 file changed, 21 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 0c122e173892..7ab0ba8224f6 100644
---
From: Sean Paul
It's only used for debugfs, so just output the enum value instead.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 14 --
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
Hi Jean
Am 12.11.18 um 15:36 schrieb Jean Delvare:
> Hi David,
>
> On Fri, 2018-11-09 at 10:04 +1000, David Airlie wrote:
>> On Thu, Nov 8, 2018 at 10:05 PM Jean Delvare wrote:
>>>
>>> On Thu, 1 Nov 2018 16:27:07 +0100, Jean Delvare wrote:
Hi David,
The following commit:
https://bugs.freedesktop.org/show_bug.cgi?id=99923
--- Comment #45 from Gregor Münch ---
Thats very good news. Thx for the effort!
I just checked that with Vulkan the game works but standard opengl crash on
start. Will contact support.
--
You are receiving this mail because:
You are the
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
The horizontal blanking periods are too short, as the values are
specified for a single LVDS channel. Since this panel is dual LVDS
they need to be doubled. With this change the panel reaches its
nominal vrefresh rate of 60Fps, instead of the 64Fps with the
current wrong blanking.
Signed-off-by:
Op 12-11-18 om 17:11 schreef Sean Paul:
> On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
>> We already have __drm_atomic_helper_connector_reset() and
>> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>>
>> Most drivers already have a gpu reset hook, correct it.
On 11/12/18 11:12 AM, Wentland, Harry wrote:
> On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote:
>> These include the drm_connector 'vrr_capable' and the drm_crtc
>> 'vrr_enabled' properties.
>>
>> Signed-off-by: Nicholas Kazlauskas
>> Cc: Harry Wentland
>> Cc: Manasi Navare
>> Cc: Pekka
From: Ville Syrjälä
On gen3 we must disable the TV encoder vertical filter for >1024
pixel wide sources. Once that's done all we can is try to center
the image on the screen. Naturally the TV mode vertical resolution
must be equal or larger than the user mode vertical resolution
or else we'd
From: Ville Syrjälä
Since gen3 can't handle >1024 wide sources with vertical scaling
let's not advertize such modes in the mode list. Less tempetation
to the user to try out things that won't work.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 6 ++
1 file changed, 6
From: Ville Syrjälä
The current code insists on picking a new TV mode when
switching between component and non-component cables.
That's super annoying. Let's just keep the current TV
mode unless the new cable type actually disagrees with it.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
To make vblank timestamps work better with the TV encoder let's
scale the pipe timings such that the relationship between the
TV active and TV blanking periods is mirrored in the
corresponding pipe timings.
Note that in reality the pipe runs at a faster speed during the
TV
From: Ville Syrjälä
Add the missing 1080p TV modes. On gen4 all of them work just fine,
whereas on gen3 only the 30Hz mode actually works correctly.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 90 +++--
1 file changed, 86 insertions(+), 4
From: Ville Syrjälä
Rewrite the preferred mode selection to just check
whether the TV modes is HD or SD. For SD TV modes we
favor 480 line modes, for 720p we prefer 720 line modes,
and for 1080i/p we prefer 1080 line modes.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 50
From: Ville Syrjälä
No point in storing the mode names in the array. drm_mode_set_name()
will give us the same names without wasting space for these string
constants.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 21 +++--
1 file changed, 11 insertions(+),
On Mon, Nov 12, 2018 at 04:50:37PM +, Peter Rosin wrote:
> On 2018-08-02 08:06, Peter Rosin wrote:
> > On 2018-08-01 11:35, Russell King - ARM Linux wrote:
> >> On Wed, Aug 01, 2018 at 11:01:12AM +0200, Peter Rosin wrote:
> >>> I don't think it's a problem with the atmel I2C driver. IIRC, the
From: Ville Syrjälä
Remove the silly reported_modes[] array. I suppse once upon a time
this actually had something to do with modes we reported to userspace.
Now it is just the placeholder for the mode we use for load detection.
We don't need it even for that, and instead we can just rely on
the
From: Ville Syrjälä
Just assign the margin values directly to xpos/ypos instead
of first initializing to zero and then adding the values.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Ville Syrjälä
Store the oversampling factor as a number in the TV modes. We
shall want to arithmetic with this which is easier if it's
a number we can use directly.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 42 ++---
1 file changed,
From: Ville Syrjälä
The oversample clock is always supposed to be either 108 MHz
or 148.5 MHz. Make it so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_tv.c
From: Ville Syrjälä
'component_only' is a bool. Initialize it like a bool.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_tv.c
From: Ville Syrjälä
Just assign the margin values directly to xpos/ypos instead
of first initializing to zero and then adding the values.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Ville Syrjälä
Fix the calculation of the vertical active period for interlaced
TV modes.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_tv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
From: Ville Syrjälä
Our TV encoder support isn't in the best shape. This series fixes
it up quite a bit.
The most important part is fixing the issues resulting from the
lack of frame counter on i965gm which causes nasty flip_done
timeouts when we attempt to do anything with the TV encoder
From: Ville Syrjälä
On i965gm the hardware frame counter does not work when
the TV encoder is active. So let's not try to consult
the hardware frame counter in that case. Instead we'll
fall back to the timestamp based guesstimation method
used on gen2.
Note that the pipe timings generated by
From: Ville Syrjälä
On i965gm we need to adjust max_vblank_count dynamically
depending on whether the TV encoder is used or not. To
that end add a per-crtc max_vblank_count that takes
precedence over its device wide counterpart. The driver
can now call drm_crtc_set_max_vblank_count() to
Add a new field called fence_fd that will be used by userspace to send
in-fences to the kernel and receive out-fences created by the kernel.
This uapi enables virtio to take advantage of explicit synchronization of
dma-bufs.
There are two new flags:
* VIRTGPU_EXECBUF_FENCE_FD_IN to be used when
From: Gustavo Padovan
To reflect the (backward compatible) changes in the uabi we are bumping
the driver's version.
Signed-off-by: Gustavo Padovan
Signed-off-by: Robert Foss
Reviewed-by: Emil Velikov
---
Changes since v3:
- Emil: Added r-b
drivers/gpu/drm/virtio/virtgpu_drv.h | 4 ++--
1
Refactor fence creation, add fences to relevant GPU
operations and add cursor helper functions.
This removes the potential for allocation failures from the
cmd_submit and atomic_commit paths.
Now a fence will be allocated first and only after that
will we proceed with the rest of the execution.
This series implements fence support for drm/virtio and
has been tested using qemu, kmscube and the below branches.
Rob Herring solved a reference counting issue and
suggested a context check for the execbuf ioctl, his
changes have been included in the below commits to
keep the tree working at
When the execbuf call receives an in-fence it will get the dma_fence
related to that fence fd and wait on it before submitting the draw call.
On the out-fence side we get fence returned by the submitted draw call
and attach it to a sync_file and send the sync_file fd to userspace. On
error -1 is
On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote:
> These include the drm_connector 'vrr_capable' and the drm_crtc
> 'vrr_enabled' properties.
>
> Signed-off-by: Nicholas Kazlauskas
> Cc: Harry Wentland
> Cc: Manasi Navare
> Cc: Pekka Paalanen
> Cc: Ville Syrjälä
> Cc: Michel Dänzer
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
On 2018-11-12 10:01 a.m., Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
On Mon, Nov 12, 2018 at 03:21:30PM +, Chris Wilson wrote:
> We need to include the revert of commit 783195ec1cad ("drm/syncobj:
> disable the timeline UAPI for now v2") along with undoing the change to
> drm/i915.
>
> Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
>
On Mon, Nov 12, 2018 at 10:54 AM Sean Paul wrote:
>
> From: Sean Paul
>
Just saw Chris posted a fix to the list, please disregard this.
Sean
> We had competing reverts/disable commits go in that caused issues with
> each other.
>
> Christian committed 783195ec1cad ("drm/syncobj: disable the
From: Sean Paul
We had competing reverts/disable commits go in that caused issues with
each other.
Christian committed 783195ec1cad ("drm/syncobj: disable the timeline UAPI for
now v2"), which moved the CREATE_TYPE_TIMELINE #define internally and added a
check in drm_syncobj.c. When Eric
On Mon, Nov 12, 2018 at 04:01:14PM +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
Am Montag, 12. November 2018, 16:01:14 CET schrieb Maarten Lankhorst:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
https://bugs.freedesktop.org/show_bug.cgi?id=108704
--- Comment #2 from Alex Deucher ---
If not, can you bisect?
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https://bugs.freedesktop.org/show_bug.cgi?id=108704
--- Comment #1 from Alex Deucher ---
Does this patch fix the issue?
https://patchwork.freedesktop.org/patch/259364/
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On 2018-11-12 10:01 AM, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
Am 12.11.18 um 16:21 schrieb Chris Wilson:
We need to include the revert of commit 783195ec1cad ("drm/syncobj:
disable the timeline UAPI for now v2") along with undoing the change to
drm/i915.
Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
Signed-off-by: Chris Wilson
Cc:
We need to include the revert of commit 783195ec1cad ("drm/syncobj:
disable the timeline UAPI for now v2") along with undoing the change to
drm/i915.
Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.")
Signed-off-by: Chris Wilson
Cc: Christian König
Cc: Daniel Vetter
---
On Mon, 12 Nov 2018 16:01:14 +0100
Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
Hi Maxime,
On 06/11/18 8:24 PM, Maxime Ripard wrote:
> The phy framework is only allowing to configure the power state of the PHY
> using the init and power_on hooks, and their power_off and exit
> counterparts.
>
> While it works for most, simple, PHYs supported so far, some more advanced
>
Hi David,
On Fri, 2018-11-09 at 10:04 +1000, David Airlie wrote:
> On Thu, Nov 8, 2018 at 10:05 PM Jean Delvare wrote:
> >
> > On Thu, 1 Nov 2018 16:27:07 +0100, Jean Delvare wrote:
> > > Hi David,
> > >
> > > The following commit:
> > >
> > > commit 7cf321d118a825c1541b43ca45294126fd474efa
>
On 11/12/2018 09:40 AM, Anshuman Khandual wrote:
>
>
> On 11/12/2018 09:27 AM, Joseph Qi wrote:
>> For ocfs2 part, node means host in the cluster, not NUMA node.
>>
>
> Does not -1 indicate an invalid node which can never be present ?
>
My bad, got it wrong. Seems like this is nothing to do
For ocfs2 part, node means host in the cluster, not NUMA node.
Thanks,
Joseph
On 18/11/12 10:41, Anshuman Khandual wrote:
> At present there are multiple places where invalid node number is encoded
> as -1. Even though implicitly understood it is always better to have macros
> in there. Replace
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/qxl/qxl_release.c: In function
'qxl_release_fence_buffer_objects':
drivers/gpu/drm/qxl/qxl_release.c:431:17: warning:
variable 'qbo' set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/qxl/qxl_release.c:430:24: warning:
At present there are multiple places where invalid node number is encoded
as -1. Even though implicitly understood it is always better to have macros
in there. Replace these open encodings for an invalid node number with the
global macro NUMA_NO_NODE. This helps remove NUMA related assumptions
On 11/12/2018 09:27 AM, Joseph Qi wrote:
> For ocfs2 part, node means host in the cluster, not NUMA node.
>
Does not -1 indicate an invalid node which can never be present ?
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Hi Maxime,
On 06/11/18 8:24 PM, Maxime Ripard wrote:
> Cadence has designed a D-PHY that can be used by the, currently in tree,
> DSI bridge (DRM), CSI Transceiver and CSI Receiver (v4l2) drivers.
>
> Only the DSI driver has an ad-hoc driver for that phy at the moment, while
> the v4l2 drivers
On 11/12/2018 02:13 PM, Hans Verkuil wrote:
> On 11/12/2018 03:41 AM, Anshuman Khandual wrote:
>> At present there are multiple places where invalid node number is encoded
>> as -1. Even though implicitly understood it is always better to have macros
>> in there. Replace these open encodings for
We already have __drm_atomic_helper_connector_reset() and
__drm_atomic_helper_plane_reset(), extend this to crtc as well.
Most drivers already have a gpu reset hook, correct it.
Nouveau already implemented its own __drm_atomic_helper_crtc_reset(),
convert it to the common one.
Signed-off-by:
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