Re: [PATCH 01/11] drm/vram: Add struct drm_vram_buffer to VRAM helpers
On Wed, Sep 18, 2019 at 04:22:57PM +0200, Thomas Zimmermann wrote: > Drivers with dedicated video memory occasionally need to reserve a memory > area for a specific purpose, such as cursor images or sprites. Using GEM > VRAM buffer objects can be problematic. For small buffers, GEM VRAM buffer > objects are inefficient as they are aligned to page boundaries. I would still allocate gem objects for that. Then use them as pool instead of using them directly. Not sure this is worth the trouble just for the cursors though as they are big enough that page-sized allocations don't waste memory. > And they cannot easily be placed at specific memory offsets. This can > lead to memory fragmentation and is a problem for hardware with only a > small amount of memory. Note that there is a flag to change the allocation strategy (TTM_PL_FLAG_TOPDOWN). You could allocate the cursor objects with the flag set. Should be good enough to avoid fragmentation. I have a patch doing exactly that for qxl, for the same reason: https://git.kraxel.org/cgit/linux/commit/?id=e00e913a64c6fba9630b311f8bc71bd7c9842479 (no, that patch wasn't sent to the list yet). We could do the same for vram and either let the driver explicitly ask for top-down allocation, or use some threshold like the qxl patch. So, I'm not convinced we actually need the drm_vram_buffer infrastructure. cheers, Gerd ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 110645] Blender EEVEE World Volumetric flickering
https://bugs.freedesktop.org/show_bug.cgi?id=110645 Ali Naj changed: What|Removed |Added Resolution|--- |NOTABUG Status|NEW |RESOLVED --- Comment #1 from Ali Naj --- It is seems fixed in Blender 2.81 version blender-2.81-b043bef000e9-linux-glibc217-x86_64, So this is not Mesa bug and it seems was Blender bug,Thanks. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 111077] link_shader and deserialize_glsl_program suddenly consume huge amount of RAM
https://bugs.freedesktop.org/show_bug.cgi?id=111077 --- Comment #42 from Matt Turner --- (In reply to rol...@rptd.ch from comment #41) > EDIT: to sum up: > 1) GIT master + patch => bug present > 2) GIT master - patch + revert-commit => bug fixed If you don't have a way for developers to reproduce the issue themselves, it's likely to go unfixed. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[RFC] checking drm_framebuffer against config width/height
Hello All,
I bumped into the below check [1] enforced in drm_framebuffer creation which
checks the requested framebuffer width/height parameters against the drm
mode config width/height limits. As I understand, drm_mode_config: min/max
width/height indicate the upper and lower bounds of the display panel
(drm_connector) resolutions the DRM device can support. But the pixel
processing pipeline can apply cropping/scaling transformations on much
larger input framebuffers and flip the buffers within the display
resolution. Such configurations are very common and the final resolution
will be still within drm_mode_config bounds. So I believe the checks should
be relaxed / removed from the drm_framebuffer creation api's.
If my understanding is incorrect, could somehow explain the motivation
behind having these checks here?
Thanks and Regards,
Jeykumar S.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/driv
ers/gpu/drm/drm_framebuffer.c?h=v5.3#n303
struct drm_framebuffer *
drm_internal_framebuffer_create(struct drm_device *dev,
const struct drm_mode_fb_cmd2 *r,
struct drm_file *file_priv)
{
/* snip */
if ((config->min_width > r->width) || (r->width >
config->max_width)) {
DRM_DEBUG_KMS("bad framebuffer width %d, should be >= %d &&
<= %d\n",
r->width, config->min_width, config->max_width);
return ERR_PTR(-EINVAL);
}
if ((config->min_height > r->height) || (r->height >
config->max_height)) {
DRM_DEBUG_KMS("bad framebuffer height %d, should be >= %d &&
<= %d\n",
r->height, config->min_height, config->max_height);
return ERR_PTR(-EINVAL);
}
/* snip */
}
___
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[Bug 111080] Random crash on amdgpu due to temperature missrepoorting
https://bugs.freedesktop.org/show_bug.cgi?id=111080 Alex Deucher changed: What|Removed |Added Product|Mesa|DRI Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop |org |.org Component|Mesa core |DRM/AMDgpu QA Contact|mesa-dev@lists.freedesktop. | |org | -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[radeon-alex:amd-mainline-dkms-5.0 2453/3724] include/kcl/kcl_fence.h:6:10: fatal error: linux/fence.h: No such file or directory
tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-5.0 head: a51a5ad4b8daf0dd0a437d51a19c2baa98953675 commit: cde0ab5e1f7cce36c771989aa4142e5607f4fa6e [2453/3724] drm/amd/autoconf: Test if fence is renamed to dma_fence. config: x86_64-allyesconfig (attached as .config) compiler: gcc-7 (Debian 7.4.0-13) 7.4.0 reproduce: git checkout cde0ab5e1f7cce36c771989aa4142e5607f4fa6e # save the attached .config to linux build tree make ARCH=x86_64 If you fix the issue, kindly add following tag Reported-by: kbuild test robot Note: the radeon-alex/amd-mainline-dkms-5.0 HEAD a51a5ad4b8daf0dd0a437d51a19c2baa98953675 builds fine. It only hurts bisectibility. All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/scheduler/backport/backport.h:5:0, from :0: >> include/kcl/kcl_fence.h:6:10: fatal error: linux/fence.h: No such file or >> directory #include ^~~ compilation terminated. vim +6 include/kcl/kcl_fence.h 6ab2f507957f67 Junwei Zhang 2016-12-23 3 6ab2f507957f67 Junwei Zhang 2016-12-23 4 #include cde0ab5e1f7cce Yifan Zhang 2019-07-22 5 #if !defined(RENAME_FENCE_TO_DMA_FENCE) 6ab2f507957f67 Junwei Zhang 2016-12-23 @6 #include 6ab2f507957f67 Junwei Zhang 2016-12-23 7 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 8, 0) 6ab2f507957f67 Junwei Zhang 2016-12-23 8 #include 6ab2f507957f67 Junwei Zhang 2016-12-23 9 #endif 6ab2f507957f67 Junwei Zhang 2016-12-23 10 #include 6ab2f507957f67 Junwei Zhang 2016-12-23 11 #else 6ab2f507957f67 Junwei Zhang 2016-12-23 12 #include 6ab2f507957f67 Junwei Zhang 2016-12-23 13 #include 6ab2f507957f67 Junwei Zhang 2016-12-23 14 #endif 6ab2f507957f67 Junwei Zhang 2016-12-23 15 :: The code at line 6 was first introduced by commit :: 6ab2f507957f676d2bbdccaaaec570a3d1901fc7 drm/amdkcl: add fence functions :: TO: Junwei Zhang :: CC: tianci yin --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[radeon-alex:amd-mainline-dkms-5.0 2219/3724] configure: error: in `drivers/gpu/drm/scheduler/dkms':
tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-5.0 head: a51a5ad4b8daf0dd0a437d51a19c2baa98953675 commit: fbb2398b29e0de236e9ee3ad48385095ebcb2a84 [2219/3724] drm/amd/autoconf: fix in-build error for O=... config: mips-allmodconfig (attached as .config) compiler: mips-linux-gcc (GCC) 7.4.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout fbb2398b29e0de236e9ee3ad48385095ebcb2a84 # save the attached .config to linux build tree GCC_VERSION=7.4.0 make.cross ARCH=mips If you fix the issue, kindly add following tag Reported-by: kbuild test robot All errors (new ones prefixed by >>): >> configure: error: in `drivers/gpu/drm/scheduler/dkms': configure: error: C compiler cannot create executables See `config.log' for more details --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[radeon-alex:amd-mainline-dkms-5.0 3698/3724] include/kcl/kcl_fence.h:142:20: error: redefinition of 'dma_fence_set_error'
tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-5.0
head: a51a5ad4b8daf0dd0a437d51a19c2baa98953675
commit: a5784d79d1577c00e6e81f892cde52593546a5f4 [3698/3724] drm/amdkcl: drop
kcl_dma_fence_set_error
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-13) 7.4.0
reproduce:
git checkout a5784d79d1577c00e6e81f892cde52593546a5f4
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/scheduler/backport/backport.h:5:0,
from :0:
>> include/kcl/kcl_fence.h:142:20: error: redefinition of 'dma_fence_set_error'
static inline void dma_fence_set_error(struct dma_fence *fence,
^~~
In file included from include/kcl/kcl_fence.h:9:0,
from drivers/gpu/drm/scheduler/backport/backport.h:5,
from :0:
include/linux/dma-fence.h:508:20: note: previous definition of
'dma_fence_set_error' was here
static inline void dma_fence_set_error(struct dma_fence *fence,
^~~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:5:0,
from :0:
include/kcl/kcl_fence.h: In function 'dma_fence_set_error':
include/kcl/kcl_fence.h:148:7: error: 'struct dma_fence' has no member named
'status'
fence->status = error;
^~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: At top level:
include/kcl/kcl_drm.h:167:1: error: redefinition of
'drm_fb_helper_remove_conflicting_pci_framebuffers'
drm_fb_helper_remove_conflicting_pci_framebuffers(struct pci_dev *pdev,
^
In file included from include/kcl/kcl_drm.h:7:0,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_fb_helper.h:641:1: note: previous definition of
'drm_fb_helper_remove_conflicting_pci_framebuffers' was here
drm_fb_helper_remove_conflicting_pci_framebuffers(struct pci_dev *pdev,
^
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_encoder_init':
include/kcl/kcl_drm.h:307:9: error: too few arguments to function
'drm_encoder_init'
return drm_encoder_init(dev, encoder, funcs,
^~~~
In file included from include/drm/drm_modeset_helper_vtables.h:33:0,
from include/drm/drm_atomic_helper.h:32,
from include/kcl/kcl_drm.h:11,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_encoder.h:183:5: note: declared here
int drm_encoder_init(struct drm_device *dev,
^~~~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_crtc_init_with_planes':
include/kcl/kcl_drm.h:322:10: error: too few arguments to function
'drm_crtc_init_with_planes'
return drm_crtc_init_with_planes(dev, crtc, primary,
^
In file included from include/drm/drmP.h:69:0,
from include/kcl/kcl_drm.h:6,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_crtc.h:1120:5: note: declared here
int drm_crtc_init_with_planes(struct drm_device *dev,
^
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_universal_plane_init':
include/kcl/kcl_drm.h:343:29: error: incompatible type for argument 7 of
'drm_universal_plane_init'
formats, format_count, type);
^~~~
In file included from include/drm/drm_crtc.h:45:0,
from include/drm/drmP.h:69,
from include/kcl/kcl_drm.h:6,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_plane.h:713:5: note: expected 'const uint64_t * {aka const
long long unsigned int *}' but argument is of type 'enum drm_plane_type'
int drm_universal_plane_init(struct drm_device *dev,
^~~~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h:342:10: error: too few arguments to function
'drm_universal_plane_init'
return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
^~~~
In
Re: [PATCH v4 6/9] drm: rcar-du: crtc: Enable and disable CMMs
Hello,
On Thu, Sep 12, 2019 at 10:19:30AM +0100, Kieran Bingham wrote:
> On 12/09/2019 09:07, Jacopo Mondi wrote:
> > On Wed, Sep 11, 2019 at 07:40:27PM +0100, Kieran Bingham wrote:
> >> On 06/09/2019 14:54, Jacopo Mondi wrote:
> >>> Enable/disable the CMM associated with a CRTC at CRTC start and stop
> >>> time and enable the CMM unit through the Display Extensional Functions
> >>> register at group setup time.
> >>>
> >>> Reviewed-by: Ulrich Hecht
> >>> Reviewed-by: Laurent Pinchart
> >>> Signed-off-by: Jacopo Mondi
> >>> ---
> >>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 7 +++
> >>> drivers/gpu/drm/rcar-du/rcar_du_group.c | 8
> >>> drivers/gpu/drm/rcar-du/rcar_du_regs.h | 5 +
> >>> 3 files changed, 20 insertions(+)
> >>>
> >>> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> >>> b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> >>> index 23f1d6cc1719..3dac605c3a67 100644
> >>> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> >>> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> >>> @@ -21,6 +21,7 @@
> >>> #include
> >>> #include
> >>>
> >>> +#include "rcar_cmm.h"
> >>> #include "rcar_du_crtc.h"
> >>> #include "rcar_du_drv.h"
> >>> #include "rcar_du_encoder.h"
> >>> @@ -619,6 +620,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc
> >>> *rcrtc)
> >>> if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
> >>> rcar_du_vsp_disable(rcrtc);
> >>>
> >>> + if (rcrtc->cmm)
> >>> + rcar_cmm_disable(rcrtc->cmm);
> >>> +
> >>> /*
> >>>* Select switch sync mode. This stops display operation and configures
> >>>* the HSYNC and VSYNC signals as inputs.
> >>> @@ -686,6 +690,9 @@ static void rcar_du_crtc_atomic_enable(struct
> >>> drm_crtc *crtc,
> >>> }
> >>>
> >>> rcar_du_crtc_start(rcrtc);
> >>> +
> >>> + if (rcrtc->cmm)
> >>> + rcar_cmm_enable(rcrtc->cmm);
> >>> }
> >>>
> >>> static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc,
> >>> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c
> >>> b/drivers/gpu/drm/rcar-du/rcar_du_group.c
> >>> index 9eee47969e77..25d0fc125d7a 100644
> >>> --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
> >>> +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
> >>> @@ -147,6 +147,14 @@ static void rcar_du_group_setup(struct rcar_du_group
> >>> *rgrp)
> >>>
> >>> rcar_du_group_setup_pins(rgrp);
> >>>
> >>> + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) {
> >>> + u32 defr7 = DEFR7_CODE
> >>> + | (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0)
> >>> + | (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0);
> >>> +
> >>> + rcar_du_group_write(rgrp, DEFR7, defr7);
> >>> + }
> >>> +
> >>
> >> What's the effect here on platforms with a CMM, but with
> >> CONFIG_DRM_RCAR_CMM unset?
> >>
> >> Will this incorrectly configure the DU ?
> >>
> >> Will it stall the display if the DU tries to interact with another
> >> module which is not enabled?
> >
> > I recall I tested that (that's why I had to add stubs for CMM
> > functions, as I had linkage errors otherwise) and thing seems to be
> > fine as the CMM configuration/enblement resolve to an empty function.
>
> Yes, I see the stubs to allow for linkage, but it's the hardware I'm
> concerned about. If it passes the tests and doesn't break then that's
> probably ok ... but I'm really weary that we're enabling a hardware
> pipeline with a disabled component in the middle.
>
> > Would you prefer to have this guarded by an #if IS_ENABLED() ?
>
> I don't think we need a compile time conditional, but I'd say it
> probably needs to be more about whether the CMM has actually probed or not
>
> Aha, and I see that in rcar_du_cmm_init() we already do a
> call to rcar_cmm_init(), which if fails will leave rcdu->cmms[i] as
> NULL. So that's catered for, which results in the rgrp->cmms_mask being
> correctly representative of whether there is a CMM connected or not.
Doesn't this result in probe failure ?
> ... so I think that means the ...
> "if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM))" is somewhat redundant:
>
>
> This could be:
>
> if (rgrp->cmms_mask) {
> u32 defr7 = DEFR7_CODE
> | (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0)
> | (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0);
>
> rcar_du_group_write(rgrp, DEFR7, defr7);
>
> Or in fact, if we don't mind writing 0 to DEFR7 when there is no CMM
> (which is safe by the looks of things as DEFR7 is available on all
> platforms), then we can even remove the outer conditional, and leave
> this all up to the ternary operators to write the correct value to the
> defr7.
>
> Phew ... net result - your current code *is* safe with the
> CONFIG_DRM_RCAR_CMM option disabled. I'll leave it up to you if you want
> to simplify the code here and remove the RCAR_DU_FEATURE_CMM.
>
> As this RCAR_DU_FEATURE_CMM flag is only checked here, removing it would
> however simplify all of the rcar_du_device_info structures.
>
> So - with or without the
[radeon-alex:amd-mainline-dkms-5.0 2557/3724] cc1: fatal error: dkms/config/config.h: No such file or directory
tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-5.0 head: a51a5ad4b8daf0dd0a437d51a19c2baa98953675 commit: 3bf7319166d86580be7a7c72dbf70546ad1b1e06 [2557/3724] drm/amdgpu/gfx10: set SH_MEM_CONFIG.INITIAL_INST_PREFETCH config: i386-allmodconfig (attached as .config) compiler: gcc-7 (Debian 7.4.0-13) 7.4.0 reproduce: git checkout 3bf7319166d86580be7a7c72dbf70546ad1b1e06 # save the attached .config to linux build tree make ARCH=i386 If you fix the issue, kindly add following tag Reported-by: kbuild test robot All errors (new ones prefixed by >>): >> cc1: fatal error: dkms/config/config.h: No such file or directory compilation terminated. --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v4 3/9] drm: rcar-du: Add support for CMM
Hi Jacopo,
Thank you for the patch.
On Fri, Sep 06, 2019 at 03:54:30PM +0200, Jacopo Mondi wrote:
> Add a driver for the R-Car Display Unit Color Correction Module.
>
> In most of Gen3 SoCs, each DU output channel is provided with a CMM unit
> to perform image enhancement and color correction.
>
> Add support for CMM through a driver that supports configuration of
> the 1-dimensional LUT table. More advanced CMM feature will be
> implemented on top of this basic one.
>
> Signed-off-by: Jacopo Mondi
> ---
> drivers/gpu/drm/rcar-du/Kconfig| 7 +
> drivers/gpu/drm/rcar-du/Makefile | 1 +
> drivers/gpu/drm/rcar-du/rcar_cmm.c | 251 +
> drivers/gpu/drm/rcar-du/rcar_cmm.h | 61 +++
> 4 files changed, 320 insertions(+)
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_cmm.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_cmm.h
>
> diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
> index 1529849e217e..539d232790d1 100644
> --- a/drivers/gpu/drm/rcar-du/Kconfig
> +++ b/drivers/gpu/drm/rcar-du/Kconfig
> @@ -13,6 +13,13 @@ config DRM_RCAR_DU
> Choose this option if you have an R-Car chipset.
> If M is selected the module will be called rcar-du-drm.
>
> +config DRM_RCAR_CMM
> + bool "R-Car DU Color Management Module (CMM) Support"
> + depends on DRM && OF
> + depends on DRM_RCAR_DU
> + help
> + Enable support for R-Car Color Management Module (CMM).
> +
> config DRM_RCAR_DW_HDMI
> tristate "R-Car DU Gen3 HDMI Encoder Support"
> depends on DRM && OF
> diff --git a/drivers/gpu/drm/rcar-du/Makefile
> b/drivers/gpu/drm/rcar-du/Makefile
> index 6c2ed9c46467..4d1187ccc3e5 100644
> --- a/drivers/gpu/drm/rcar-du/Makefile
> +++ b/drivers/gpu/drm/rcar-du/Makefile
> @@ -15,6 +15,7 @@ rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS) += rcar_du_of.o \
> rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
> rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
>
> +obj-$(CONFIG_DRM_RCAR_CMM) += rcar_cmm.o
> obj-$(CONFIG_DRM_RCAR_DU)+= rcar-du-drm.o
> obj-$(CONFIG_DRM_RCAR_DW_HDMI) += rcar_dw_hdmi.o
> obj-$(CONFIG_DRM_RCAR_LVDS) += rcar_lvds.o
> diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.c
> b/drivers/gpu/drm/rcar-du/rcar_cmm.c
> new file mode 100644
> index ..3cacdc4474c7
> --- /dev/null
> +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.c
> @@ -0,0 +1,251 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * rcar_cmm.c -- R-Car Display Unit Color Management Module
> + *
> + * Copyright (C) 2019 Jacopo Mondi
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#include "rcar_cmm.h"
> +
> +#define CM2_LUT_CTRL 0x
> +#define CM2_LUT_CTRL_LUT_EN BIT(0)
> +#define CM2_LUT_TBL_BASE 0x0600
> +#define CM2_LUT_TBL(__i) (CM2_LUT_TBL_BASE + (__i) * 4)
> +
> +struct rcar_cmm {
> + void __iomem *base;
> + bool enabled;
> +
> + /*
> + * @lut:1D-LUT status
> + * @lut.enabled:1D-LUT enabled flag
> + * @lut.table: Table of 1D-LUT entries scaled to hardware
> + * precision (8-bits per color component)
> + */
> + struct {
> + bool enabled;
> + u32 table[CM2_LUT_SIZE];
> + } lut;
> +};
> +
> +static inline int rcar_cmm_read(struct rcar_cmm *rcmm, u32 reg)
> +{
> + return ioread32(rcmm->base + reg);
> +}
> +
> +static inline void rcar_cmm_write(struct rcar_cmm *rcmm, u32 reg, u32 data)
> +{
> + iowrite32(data, rcmm->base + reg);
> +}
> +
> +/*
> + * rcar_cmm_lut_extract() - Scale down to hardware precision the DRM LUT
> table
> + * entries and store them.
"Scale the DRM LUT table entries to hardware precision and store them."
> + * @rcmm: Pointer to the CMM device
> + * @drm_lut: Pointer to the DRM LUT table
> + */
> +static void rcar_cmm_lut_extract(struct rcar_cmm *rcmm,
> + const struct drm_color_lut *drm_lut)
> +{
> + unsigned int i;
> +
> + for (i = 0; i < CM2_LUT_SIZE; ++i) {
> + const struct drm_color_lut *lut = _lut[i];
> +
> + rcmm->lut.table[i] = drm_color_lut_extract(lut->red, 8) << 16
> +| drm_color_lut_extract(lut->green, 8) << 8
> +| drm_color_lut_extract(lut->blue, 8);
> + }
> +}
> +
> +/*
> + * rcar_cmm_lut_write() - Write to hardware the LUT table entries from the
> + * local table.
"Write the LUT table entries from the local table to the hardware."
> + * @rcmm: Pointer to the CMM device
> + */
> +static void rcar_cmm_lut_write(struct rcar_cmm *rcmm)
> +{
> + unsigned int i;
> +
> + for (i = 0; i < CM2_LUT_SIZE; ++i)
> + rcar_cmm_write(rcmm, CM2_LUT_TBL(i), rcmm->lut.table[i]);
> +}
> +
> +/*
> + * rcar_cmm_setup() - Configure the CMM unit.
> + *
Re: [PATCH 01/15] drm/amdgpu: Add encoder atomic check
Haven't looked at these quite yet, but I just wanted to say ahead of time that
from a quick glance these look like a big step in the right direction :).
Awesome work!
I will review this ASAP
On Wed, 2019-09-18 at 16:26 -0400, mikita.lip...@amd.com wrote:
> From: Mikita Lipski
>
> [why]
> In order to comply with new MST atomic check
> we have to find and add VCPI slots to the state
> during atomic check whenever their is a change on
> mode or connector.
> [how]
> - Verify that it is a MST connection
> - Convert new stream's clock and bpp
> - Calculate PBN based on stream parameters
> - Find and add VCPI slots to the state
>
> Cc: Lyude Paul
> Signed-off-by: Mikita Lipski
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 59 +++
> 1 file changed, 59 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 7b0ca2e1ed8b..d700b962d338 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -4432,6 +4432,65 @@ static int dm_encoder_helper_atomic_check(struct
> drm_encoder *encoder,
> struct drm_crtc_state *crtc_state,
> struct drm_connector_state
> *conn_state)
> {
> + struct drm_atomic_state *state = crtc_state->state;
> + struct drm_connector *connector = conn_state->connector;
> + struct amdgpu_dm_connector *aconnector =
> to_amdgpu_dm_connector(connector);
> + struct dm_crtc_state *dm_new_crtc_state =
> to_dm_crtc_state(crtc_state);
> + const struct drm_display_mode *adjusted_mode = _state-
> >adjusted_mode;
> + struct drm_dp_mst_topology_mgr *mst_mgr;
> + struct drm_dp_mst_port *mst_port;
> + int pbn, slots,clock, bpp = 0;
> +
> + if (!dm_new_crtc_state)
> + return 0;
> +
> + if (!aconnector || !aconnector->port)
> + return 0;
> +
> + mst_port = aconnector->port;
> + mst_mgr = >mst_port->mst_mgr;
> +
> + if (!mst_mgr->mst_state)
> + return 0;
> +
> + if (!crtc_state->connectors_changed && !crtc_state->mode_changed)
> + return 0;
> +
> + switch (convert_color_depth_from_display_info(connector, conn_state))
> {
> + case COLOR_DEPTH_666:
> + bpp = 6;
> + break;
> + case COLOR_DEPTH_888:
> + bpp = 8;
> + break;
> + case COLOR_DEPTH_101010:
> + bpp = 10;
> + break;
> + case COLOR_DEPTH_121212:
> + bpp = 12;
> + break;
> + case COLOR_DEPTH_141414:
> + bpp = 14;
> + break;
> + case COLOR_DEPTH_161616:
> + bpp = 16;
> + break;
> + default:
> + ASSERT(bpp != 0);
> + break;
> + }
> +
> + bpp *= 3;
> + clock = adjusted_mode->clock;
> + pbn = drm_dp_calc_pbn_mode(clock, bpp);
> + slots = drm_dp_atomic_find_vcpi_slots(state,
> + mst_mgr,
> + mst_port,
> + pbn);
> + if (slots < 0) {
> + DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
> + return slots;
> + }
> return 0;
> }
>
--
Cheers,
Lyude Paul
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Re: [PATCH libdrm 1/2] modetest: Fix segmentation fault
On Thu, 2019-08-15 at 09:07 -0300, Ezequiel Garcia wrote:
> On Mon, 2019-07-22 at 13:08 -0300, Ezequiel Garcia wrote:
> > When a mode is set with just a connector "-s foo",
> > we get a nasty segmentation fault. Fix it.
> >
> > Signed-off-by: Ezequiel Garcia
>
> There's no rush, but still, here goes a reminder
> of this and the next patch. :-)
>
Still no rush, but a reminder to prevent these patches
from vanishing into thin air.
> > ---
> > tests/modetest/modetest.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
> > index e66be6607e00..5e628127a130 100644
> > --- a/tests/modetest/modetest.c
> > +++ b/tests/modetest/modetest.c
> > @@ -1695,6 +1695,8 @@ static int parse_connector(struct pipe_arg *pipe,
> > const char *arg)
> > return -1;
> >
> > /* Parse the remaining parameters. */
> > + if (!endp)
> > + return -1;
> > if (*endp == '@') {
> > arg = endp + 1;
> > pipe->crtc_id = strtoul(arg, , 10);
>
>
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Re: [PATCH v4 1/9] dt-bindings: display: renesas,cmm: Add R-Car CMM documentation
Hi Jacopo,
Thank you for the patch.
On Fri, Sep 06, 2019 at 03:54:28PM +0200, Jacopo Mondi wrote:
> Add device tree bindings documentation for the Renesas R-Car Display
> Unit Color Management Module.
>
> CMM is the image enhancement module available on each R-Car DU video
> channel on R-Car Gen2 and Gen3 SoCs (V3H and V3M excluded).
>
> Signed-off-by: Jacopo Mondi
With the small issues pointed out by Kieran and Rob fixed,
Reviewed-by: Laurent Pinchart
> ---
> .../bindings/display/renesas,cmm.yaml | 64 +++
> 1 file changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/renesas,cmm.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/renesas,cmm.yaml
> b/Documentation/devicetree/bindings/display/renesas,cmm.yaml
> new file mode 100644
> index ..9e5922689cd7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/renesas,cmm.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/renesas,cmm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas R-Car Color Management Module (CMM)
> +
> +maintainers:
> + - Laurent Pinchart
> + - Kieran Bingham
> + - Jacopo Mondi
> +
> +description: |+
> + Renesas R-Car color management module connected to R-Car DU video channels.
> + It provides image enhancement functions such as 1-D look-up tables (LUT),
> + 3-D look-up tables (CMU), 1D-histogram generation (HGO), and color
> + space conversion (CSC).
> +
> +properties:
> + compatible:
> +items:
> + - enum:
> +- renesas,r8a7795-cmm
> +- renesas,r8a7796-cmm
> +- renesas,r8a77965-cmm
> +- renesas,r8a77990-cmm
> +- renesas,r8a77995-cmm
> + - enum:
> +- renesas,rcar-gen3-cmm
> +- renesas,rcar-gen2-cmm
> + reg:
> +maxItems: 1
> +
> + clocks:
> +maxItems: 1
> +
> + resets:
> +maxItems: 1
> +
> + power-domains:
> +maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> + - power-domains
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> +#include
> +#include
> +
> +cmm0: cmm@fea4 {
> + compatible = "renesas,r8a7796-cmm";
> + reg = <0 0xfea4 0 0x1000>;
> + power-domains = < R8A7796_PD_ALWAYS_ON>;
> + clocks = < CPG_MOD 711>;
> + resets = < 711>;
> +};
--
Regards,
Laurent Pinchart
Re: [RFC][PATCH] libdrm: Convert to Android.mk to Android.bp
On Wed, Sep 18, 2019 at 2:49 PM Eric Engestrom wrote: > On Tuesday, 2019-09-17 19:15:36 +, John Stultz wrote: > > This patch removes the deprecated Android.mk files and replaces > > them with Android.bp files. > > > > This is needed in order to build libdrm/master against recent > > Android releases and AOSP/master, as some of the Treble build > > options required since Android O cannot be expressed in > > Andorid.mk files. > > > > Patch originally by Dan Willemsen with fixes folded in by: > > Jerry Zhang, Eliott Hughes and myself. > > > > With this change, the only patches carried by Android for libdrm > > would be the gerrit OWNERS meta-data file. > > > > Cc: Mauro Rossi > > Cc: Chih-Wei Huang > > Cc: Robert Foss > > Cc: Tapani Pälli > > Cc: Chih-Wei Huang > > Cc: Emil Velikov > > Cc: Sean Paul > > Cc: Rob Clark > > Cc: Eric Anholt > > Cc: Jiyong Park > > Cc: Alistair Strachan > > Cc: Dan Willemsen > > Cc: Sumit Semwal > > Cc: Vishal Bhoj > > Signed-off-by: John Stultz > > --- > > I know last time this was proposed, there was some concern about > > maintaining support for old AOSP releases - and while we could > > still support both with Android.mk that was a fair concern. > > > > However, now that it is a requirement for newer releases, I'd > > contend that being able to build/test libdrm/master against > > AOSP/master and recent releases is more valuable then soley > > maintaining support for old and unsupported Android releases. > > Acked-by: Eric Engestrom > > But to be clear, what's the earliest android version that supports > blueprint? (might be worth adding that to the commit message) I believe it was Android N which was the first to use blueprint. Thanks for the review, I'll add such a note to the commit and resubmit w/o RFC in a few days. thanks -john ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC][PATCH] libdrm: Convert to Android.mk to Android.bp
On Tuesday, 2019-09-17 19:15:36 +, John Stultz wrote: > This patch removes the deprecated Android.mk files and replaces > them with Android.bp files. > > This is needed in order to build libdrm/master against recent > Android releases and AOSP/master, as some of the Treble build > options required since Android O cannot be expressed in > Andorid.mk files. > > Patch originally by Dan Willemsen with fixes folded in by: > Jerry Zhang, Eliott Hughes and myself. > > With this change, the only patches carried by Android for libdrm > would be the gerrit OWNERS meta-data file. > > Cc: Mauro Rossi > Cc: Chih-Wei Huang > Cc: Robert Foss > Cc: Tapani Pälli > Cc: Chih-Wei Huang > Cc: Emil Velikov > Cc: Sean Paul > Cc: Rob Clark > Cc: Eric Anholt > Cc: Jiyong Park > Cc: Alistair Strachan > Cc: Dan Willemsen > Cc: Sumit Semwal > Cc: Vishal Bhoj > Signed-off-by: John Stultz > --- > I know last time this was proposed, there was some concern about > maintaining support for old AOSP releases - and while we could > still support both with Android.mk that was a fair concern. > > However, now that it is a requirement for newer releases, I'd > contend that being able to build/test libdrm/master against > AOSP/master and recent releases is more valuable then soley > maintaining support for old and unsupported Android releases. Acked-by: Eric Engestrom But to be clear, what's the earliest android version that supports blueprint? (might be worth adding that to the commit message) > > So I wanted to submit this again for discussion. > > thanks > -john ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
RE: [PATHC v6] video: hyperv: hyperv_fb: Support deferred IO for Hyper-V frame buffer driver
From: Wei Hu Sent: Tuesday, September 17, 2019 11:03 PM > > Without deferred IO support, hyperv_fb driver informs the host to refresh > the entire guest frame buffer at fixed rate, e.g. at 20Hz, no matter there > is screen update or not. This patch supports deferred IO for screens in > graphics mode and also enables the frame buffer on-demand refresh. The > highest refresh rate is still set at 20Hz. > > Currently Hyper-V only takes a physical address from guest as the starting > address of frame buffer. This implies the guest must allocate contiguous > physical memory for frame buffer. In addition, Hyper-V Gen 2 VMs only > accept address from MMIO region as frame buffer address. Due to these > limitations on Hyper-V host, we keep a shadow copy of frame buffer > in the guest. This means one more copy of the dirty rectangle inside > guest when doing the on-demand refresh. This can be optimized in the > future with help from host. For now the host performance gain from deferred > IO outweighs the shadow copy impact in the guest. > > Signed-off-by: Wei Hu > --- > v2: Incorporated review comments from Michael Kelley > - Increased dirty rectangle by one row in deferred IO case when sending > to Hyper-V. > - Corrected the dirty rectangle size in the text mode. > - Added more comments. > - Other minor code cleanups. > > v3: Incorporated more review comments > - Removed a few unnecessary variable tests > > v4: Incorporated test and review feedback from Dexuan Cui > - Not disable interrupt while acquiring docopy_lock in > hvfb_update_work(). This avoids significant bootup delay in > large vCPU count VMs. > > v5: Completely remove the unnecessary docopy_lock after discussing > with Dexuan Cui. > > v6: Do not request host refresh when the VM guest screen is > closed or minimized. > > drivers/video/fbdev/Kconfig | 1 + > drivers/video/fbdev/hyperv_fb.c | 210 > 2 files changed, 190 insertions(+), 21 deletions(-) > Reviewed-by: Michael Kelley
Re: [RFC][PATCH] libdrm: Convert to Android.mk to Android.bp
John Stultz writes: > This patch removes the deprecated Android.mk files and replaces > them with Android.bp files. > > This is needed in order to build libdrm/master against recent > Android releases and AOSP/master, as some of the Treble build > options required since Android O cannot be expressed in > Andorid.mk files. > > Patch originally by Dan Willemsen with fixes folded in by: > Jerry Zhang, Eliott Hughes and myself. > > With this change, the only patches carried by Android for libdrm > would be the gerrit OWNERS meta-data file. Acked-by: Eric Anholt signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC PATCH] drm:- Add a modifier to denote 'protected' framebuffer
Hi Liviu,
On Wed, 18 Sep 2019 at 13:04, Liviu Dudau wrote:
> On Wed, Sep 18, 2019 at 09:49:40AM +0100, Daniel Stone wrote:
> > I totally agree. Framebuffers aren't about the underlying memory they
> > point to, but about how to _interpret_ that memory: it decorates a
> > pointer with width, height, stride, format, etc, to allow you to make
> > sense of that memory. I see content protection as being the same as
> > physical contiguity, which is a property of the underlying memory
> > itself. Regardless of the width, height, or format, you just cannot
> > access that memory unless it's under the appropriate ('secure enough')
> > conditions.
> >
> > So I think a dmabuf attribute would be most appropriate, since that's
> > where you have to do all your MMU handling, and everything else you
> > need to do to allow access to that buffer, anyway.
>
> Isn't it how AMD currently implements protected buffers as well?
No idea to be honest, I haven't seen anything upstream.
> > There's a lot of complexity beyond just 'it's protected'; for
> > instance, some CP providers mandate that their content can only be
> > streamed over HDCP 2.2 Type-1 when going through an external
> > connection. One way you could do that is to use a secure world
> > (external controller like Intel's ME, or CPU-internal enclave like SGX
> > or TEE) to examine the display pipe configuration, and only then allow
> > access to the buffers and/or keys. Stuff like that is always going to
> > be out in the realm of vendor & product-policy-specific add-ons, but
> > it should be possible to agree on at least the basic mechanics and
> > expectations of a secure path without things like that.
>
> I also expect that going through the secure world will be pretty much
> transparent for
> the kernel driver, as the most likely hardware implementations would enable
> additional signaling that will get trapped and handled by the secure OS. I'm
> not
> trying to simplify things, just taking the stance that it is userspace that is
> coordinating all this, we're trying only to find a common ground on how to
> handle
> this in the kernel.
Yeah, makes sense.
As a strawman, how about a new flag to drmPrimeHandleToFD() which sets
the 'protected' flag on the resulting dmabuf?
Cheers,
Daniel
Re: [PATCH] drm: add drm device name
Let's drop this patch. Mesa will use family_id. Marek On Wed, Sep 18, 2019 at 4:10 PM Marek Olšák wrote: > On Wed, Sep 18, 2019 at 10:03 AM Michel Dänzer wrote: > >> On 2019-09-18 1:41 a.m., Marek Olšák wrote: >> > drmVersion::name = amdgpu, radeon, intel, etc. >> > drmVersion::desc = vega10, vega12, vega20, ... >> > >> > The common Mesa code will use name and desc to select the driver. >> >> Like the Xorg modesetting driver, that code doesn't need this kernel >> functionality or new PCI IDs. It can just select the current driver for >> all devices which aren't supported by older drivers (which is a fixed >> set at this point). >> >> >> > The AMD-specific Mesa code will use desc to identify the chip. >> >> Doesn't libdrm_amdgpu's struct amdgpu_gpu_info::family_id provide the >> same information? >> > > Not for the common code, though I guess common Mesa code could use the > INFO ioctl. Is that what you mean? > > Marek > ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 26999] _mesa_reference_renderbuffer: Assertion `oldRb->Magic == 0xaabbccdd' failed
https://bugs.freedesktop.org/show_bug.cgi?id=26999 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #12 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/openchrome/old-bug-database/issues/9. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 10967] wrong addresses (?) for 3D drawing : clipping or what ?
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[Bug 13923] mesa unichrome crash in draw_rgba_pixels when starting torcs
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[Bug 1633] via_alloc_texture fail
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[Bug 10966] workaround to avoid the assert main/renderbuffer.c:2041: _mesa_add_renderbuffer:...
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[Bug 12037] Background in SuperTux is incorrect with Unichrome driver
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[Bug 11531] Opengl render window have invalid coordinates
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[Bug 12021] unichrome - invalid assert in viaSwapOutWork
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[PATCH 13/15] drm/amd/display: Write DSC enable to MST DPCD
From: David Francis
Rework the dm_helpers_write_dsc_enable callback to
handle the MST case.
Use the cached dsc_aux field.
Reviewed-by: Wenjing Liu
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index aaf3158534ab..a83d7da259fe 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -38,6 +38,7 @@
#include "dc.h"
#include "amdgpu_dm.h"
#include "amdgpu_dm_irq.h"
+#include "amdgpu_dm_mst_types.h"
#include "dm_helpers.h"
@@ -557,8 +558,24 @@ bool dm_helpers_dp_write_dsc_enable(
)
{
uint8_t enable_dsc = enable ? 1 : 0;
+ struct amdgpu_dm_connector *aconnector;
+
+ if (!stream)
+ return false;
+
+ if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
+ aconnector = (struct amdgpu_dm_connector
*)stream->dm_stream_context;
+
+ if (!aconnector->dsc_aux)
+ return false;
+
+ return (drm_dp_dpcd_write(aconnector->dsc_aux, DP_DSC_ENABLE,
_dsc, 1) >= 0);
+ }
+
+ if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT)
+ return dm_helpers_dp_write_dpcd(ctx, stream->link,
DP_DSC_ENABLE, _dsc, 1);
- return dm_helpers_dp_write_dpcd(ctx, stream->sink->link, DP_DSC_ENABLE,
_dsc, 1);
+ return false;
}
#endif
--
2.17.1
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[PATCH 03/15] drm/amdgpu: validate mst topology in atomic check
From: Mikita Lipski
[why]
Validate mst topology and the number of VCPI slots available
for a new state. Fail if topology has no more bandwidth for
a new state.
[how]
Pass the atomic state to drm_dp_mst_atomic_check to verify
if the new topology is possible.
Cc: Lyude Paul
Signed-off-by: Mikita Lipski
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d700b962d338..39c239a08633 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7485,6 +7485,11 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
+ /* Perform validation of MST topology in the state*/
+ ret = drm_dp_mst_atomic_check(state);
+ if (ret)
+ goto fail;
+
if (state->legacy_cursor_update) {
/*
* This is a fast cursor update coming from the plane update
--
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[PATCH 11/15] drm/amd/display: Initialize DSC PPS variables to 0
From: David Francis
For DSC MST, sometimes monitors would break out
in full-screen static. The issue traced back to the
PPS generation code, where these variables were being used
uninitialized and were picking up garbage.
memset to 0 to avoid this
Signed-off-by: David Francis
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 3 +++
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index a519dbc5ecb6..5d6cbaebebc0 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -496,6 +496,9 @@ bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool
enable)
struct dsc_config dsc_cfg;
uint8_t dsc_packed_pps[128];
+ memset(_cfg, 0, sizeof(dsc_cfg));
+ memset(dsc_packed_pps, 0, 128);
+
/* Enable DSC hw block */
dsc_cfg.pic_width = stream->timing.h_addressable +
stream->timing.h_border_left + stream->timing.h_border_right;
dsc_cfg.pic_height = stream->timing.v_addressable +
stream->timing.v_border_top + stream->timing.v_border_bottom;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
index 63eb377ed9c0..296eeff00296 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
@@ -207,6 +207,9 @@ static bool dsc2_get_packed_pps(struct
display_stream_compressor *dsc, const str
struct dsc_reg_values dsc_reg_vals;
struct dsc_optc_config dsc_optc_cfg;
+ memset(_reg_vals, 0, sizeof(dsc_reg_vals));
+ memset(_optc_cfg, 0, sizeof(dsc_optc_cfg));
+
DC_LOG_DSC("Getting packed DSC PPS for DSC Config:");
dsc_config_log(dsc, dsc_cfg);
DC_LOG_DSC("DSC Picture Parameter Set (PPS):");
--
2.17.1
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[PATCH 08/15] drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux
From: David Francis
Add drm_dp_mst_dsc_aux_for_port. To enable DSC, the DSC_ENABLED
register might have to be written on the leaf port's DPCD,
its parent's DPCD, or the MST manager's DPCD. This function
finds the correct aux for the job.
As part of this, add drm_dp_mst_is_virtual_dpcd. Virtual DPCD
is a DP feature new in DP v1.4, which exposes certain DPCD
registers on virtual ports.
v2: Remember to unlock mutex on all paths
v3: Refactor to match coding style and increase brevity
Cc: Lyude Paul
Cc: Jani Nikula
Cc: Harry Wentland
Reviewed-by: Wenjing Liu
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 127 ++
include/drm/drm_dp_mst_helper.h | 2 +
2 files changed, 129 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index ae2f986d76a2..dd2ca065cc92 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -4147,3 +4147,130 @@ static void drm_dp_mst_unregister_i2c_bus(struct
drm_dp_aux *aux)
{
i2c_del_adapter(>ddc);
}
+
+/**
+ * drm_dp_mst_is_virtual_dpcd() - Is the given port a virtual DP Peer Device
+ * @port: The port to check
+ *
+ * A single physical MST hub object can be represented in the topology
+ * by multiple branches, with virtual ports between those branches.
+ *
+ * As of DP1.4, An MST hub with internal (virtual) ports must expose
+ * certain DPCD registers over those ports. See sections 2.6.1.1.1
+ * and 2.6.1.1.2 of Display Port specification v1.4 for details.
+ *
+ * May acquire mgr->lock
+ *
+ * Returns:
+ * true if the port is a virtual DP peer device, false otherwise
+ */
+static bool drm_dp_mst_is_virtual_dpcd(struct drm_dp_mst_port *port)
+{
+ struct drm_dp_mst_port *downstream_port;
+
+ if (!port || port->dpcd_rev < DP_DPCD_REV_14)
+ return false;
+
+ /* Virtual DP Sink (Internal Display Panel) */
+ if (port->port_num >= 8)
+ return true;
+
+ /* DP-to-HDMI Protocol Converter */
+ if (port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV &&
+ !port->mcs &&
+ port->ldps)
+ return true;
+
+ /* DP-to-DP */
+ mutex_lock(>mgr->lock);
+ if (port->pdt == DP_PEER_DEVICE_MST_BRANCHING &&
+ port->mstb &&
+ port->mstb->num_ports == 2) {
+ list_for_each_entry(downstream_port, >mstb->ports, next) {
+ if (downstream_port->pdt == DP_PEER_DEVICE_SST_SINK &&
+ !downstream_port->input) {
+ mutex_unlock(>mgr->lock);
+ return true;
+ }
+ }
+ }
+ mutex_unlock(>mgr->lock);
+
+ return false;
+}
+
+/**
+ * drm_dp_mst_dsc_aux_for_port() - Find the correct aux for DSC
+ * @port: The port to check. A leaf of the MST tree with an attached display.
+ *
+ * Depending on the situation, DSC may be enabled via the endpoint aux,
+ * the immediately upstream aux, or the connector's physical aux.
+ *
+ * This is both the correct aux to read DSC_CAPABILITY and the
+ * correct aux to write DSC_ENABLED.
+ *
+ * This operation can be expensive (up to four aux reads), so
+ * the caller should cache the return.
+ *
+ * Returns:
+ * NULL if DSC cannot be enabled on this port, otherwise the aux device
+ */
+struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port)
+{
+ struct drm_dp_mst_port *immediate_upstream_port;
+ struct drm_dp_mst_port *fec_port;
+
+ if (!port)
+ return NULL;
+
+ if (port->parent)
+ immediate_upstream_port = port->parent->port_parent;
+ else
+ immediate_upstream_port = NULL;
+
+ fec_port = immediate_upstream_port;
+ while (fec_port) {
+ /*
+* Each physical link (i.e. not a virtual port) between the
+* output and the primary device must support FEC
+*/
+ if (!drm_dp_mst_is_virtual_dpcd(fec_port) &&
+ !fec_port->fec_capable)
+ return NULL;
+
+ fec_port = fec_port->parent->port_parent;
+ }
+
+ /* DP-to-DP peer device */
+ if (drm_dp_mst_is_virtual_dpcd(immediate_upstream_port)) {
+ u8 upstream_dsc;
+ u8 endpoint_dsc;
+ u8 endpoint_fec;
+
+ if (drm_dp_dpcd_read(>aux,
+DP_DSC_SUPPORT, _dsc, 1) < 0)
+ return NULL;
+ if (drm_dp_dpcd_read(>aux,
+DP_FEC_CAPABILITY, _fec, 1) < 0)
+ return NULL;
+ if (drm_dp_dpcd_read(_upstream_port->aux,
+DP_DSC_SUPPORT, _dsc, 1) < 0)
+ return NULL;
+
+ /* Enpoint decompression with DP-to-DP peer
[PATCH 14/15] drm/amd/display: MST DSC compute fair share
From: David Francis
If there is limited link bandwidth on a MST network,
it must be divided fairly between the streams on that network
Implement an algorithm to determine the correct DSC config
for each stream
The algorithm:
This
[ ] ( )
represents the range of bandwidths possible for a given stream.
The [] area represents the range of DSC configs, and the ()
represents no DSC. The bandwidth used increases from left to right.
First, try disabling DSC on all streams
[ ] (|)
[ ](|)
Check this against the bandwidth limits of the link and each branch
(including each endpoint). If it passes, the job is done
Second, try maximum DSC compression on all streams
that support DSC
[| ]( )
[|] ( )
If this does not pass, then enabling this combination of streams
is impossible
Otherwise, divide the remaining bandwidth evenly amongst the streams
[| ] ( )
[| ]( )
If one or more of the streams reach minimum compression, evenly
divide the reamining bandwidth amongst the remaining streams
[|] ( )
[ |] ( )
[ | ] ( )
[ | ] ( )
If all streams can reach minimum compression, disable compression
greedily
[ |] ( )
[|]( )
[ ](|)
Perform this algorithm on each full update, on each MST link
with at least one DSC stream on it
After the configs are computed, call
dcn20_add_dsc_to_stream_resource on each stream with DSC enabled.
It is only after all streams are created that we can know which
of them will need DSC.
Do all of this at the end of amdgpu atomic check. If it fails,
fail check; This combination of timings cannot be supported.
Reviewed-by: Wenjing Liu
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 386 ++
.../display/amdgpu_dm/amdgpu_dm_mst_types.h | 4 +
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 +
5 files changed, 400 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1130298c6930..ba017e6bf0b4 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7564,6 +7564,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ if (!compute_mst_dsc_configs_for_state(dm_state->context))
+ goto fail;
+#endif
if (dc_validate_global_state(dc, dm_state->context, false) !=
DC_OK) {
ret = -EINVAL;
goto fail;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 379bc5f388f7..0356688c5ebf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -38,6 +38,8 @@
#include "i2caux_interface.h"
+#include "dc/dcn20/dcn20_resource.h"
+
/* #define TRACE_DPCD */
#ifdef TRACE_DPCD
@@ -490,3 +492,387 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
aconnector->connector_id);
}
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+struct dsc_mst_fairness_params {
+ struct dc_crtc_timing *timing;
+ struct dc_sink *sink;
+ struct dc_dsc_bw_range bw_range;
+ bool compression_possible;
+ struct drm_dp_mst_port *port;
+};
+
+struct dsc_mst_fairness_vars {
+ int pbn;
+ bool dsc_enabled;
+ int bpp_x16;
+};
+
+static bool port_downstream_of_branch(struct drm_dp_mst_port *port,
+ struct drm_dp_mst_branch *branch)
+{
+ while (port->parent) {
+ if (port->parent == branch)
+ return true;
+
+ if (port->parent->port_parent)
+ port = port->parent->port_parent;
+ else
+ break;
+ }
+ return false;
+}
+
+static bool check_pbn_limit_on_branch(struct drm_dp_mst_branch *branch,
+ struct dsc_mst_fairness_params *params,
+ struct dsc_mst_fairness_vars *vars, int count)
+{
+ struct drm_dp_mst_port *port;
+ int i;
+ int pbn_limit = 0;
+ int pbn_used = 0;
+
+ list_for_each_entry(port, >ports, next) {
+ if (port->mstb)
+ if (!check_pbn_limit_on_branch(port->mstb, params,
vars, count))
+ return false;
+
+ if
[PATCH 12/15] drm/amd/display: Validate DSC caps on MST endpoints
From: David Francis
During MST mode enumeration, if a new dc_sink is created,
populate it with dsc caps as appropriate.
Use drm_dp_mst_dsc_aux_for_port to get the raw caps,
then parse them onto dc_sink with dc_dsc_parse_dsc_dpcd.
Reviewed-by: Wenjing Liu
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 ++
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 31 ++-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index c36fe617eac4..1228449bca84 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -268,6 +268,9 @@ struct amdgpu_dm_connector {
struct drm_dp_mst_port *port;
struct amdgpu_dm_connector *mst_port;
struct amdgpu_encoder *mst_encoder;
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ struct drm_dp_aux *dsc_aux;
+#endif
/* TODO see if we can merge with ddc_bus or make a dm_connector */
struct amdgpu_i2c_adapter *i2c;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 4e1bbf5bbe77..379bc5f388f7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -25,6 +25,7 @@
#include
#include
+#include
#include "dm_services.h"
#include "amdgpu.h"
#include "amdgpu_dm.h"
@@ -189,6 +190,28 @@ static const struct drm_connector_funcs
dm_dp_mst_connector_funcs = {
.early_unregister = amdgpu_dm_mst_connector_early_unregister,
};
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector
*aconnector)
+{
+ struct dc_sink *dc_sink = aconnector->dc_sink;
+ struct drm_dp_mst_port *port = aconnector->port;
+ u8 dsc_caps[16] = { 0 };
+
+ aconnector->dsc_aux = drm_dp_mst_dsc_aux_for_port(port);
+
+ if (!aconnector->dsc_aux)
+ return false;
+
+ if (drm_dp_dpcd_read(aconnector->dsc_aux, DP_DSC_SUPPORT, dsc_caps, 16)
< 0)
+ return false;
+
+ if (!dc_dsc_parse_dsc_dpcd(dsc_caps, NULL,
_sink->sink_dsc_caps.dsc_dec_caps))
+ return false;
+
+ return true;
+}
+#endif
+
static int dm_dp_mst_get_modes(struct drm_connector *connector)
{
struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(connector);
@@ -231,10 +254,16 @@ static int dm_dp_mst_get_modes(struct drm_connector
*connector)
/* dc_link_add_remote_sink returns a new reference */
aconnector->dc_sink = dc_sink;
- if (aconnector->dc_sink)
+ if (aconnector->dc_sink) {
amdgpu_dm_update_freesync_caps(
connector, aconnector->edid);
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ if (!validate_dsc_caps_on_connector(aconnector))
+ memset(>dc_sink->sink_dsc_caps,
+ 0,
sizeof(aconnector->dc_sink->sink_dsc_caps));
+#endif
+ }
}
drm_connector_update_edid_property(
--
2.17.1
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[PATCH 06/15] drm/dp_mst: Add MST support to DP DPCD R/W functions
From: David Francis
Instead of having drm_dp_dpcd_read/write and
drm_dp_mst_dpcd_read/write as entry points into the
aux code, have drm_dp_dpcd_read/write handle both.
This means that DRM drivers can make MST DPCD read/writes.
v2: Fix spacing
v3: Dump dpcd access on MST read/writes
Reviewed-by: Lyude Paul
Reviewed-by: Harry Wentland
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_aux_dev.c | 12 ++--
drivers/gpu/drm/drm_dp_helper.c | 30 --
2 files changed, 22 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_aux_dev.c b/drivers/gpu/drm/drm_dp_aux_dev.c
index 00610bd8d6c1..0780fc358389 100644
--- a/drivers/gpu/drm/drm_dp_aux_dev.c
+++ b/drivers/gpu/drm/drm_dp_aux_dev.c
@@ -162,11 +162,7 @@ static ssize_t auxdev_read_iter(struct kiocb *iocb, struct
iov_iter *to)
break;
}
- if (aux_dev->aux->is_remote)
- res = drm_dp_mst_dpcd_read(aux_dev->aux, pos, buf,
- todo);
- else
- res = drm_dp_dpcd_read(aux_dev->aux, pos, buf, todo);
+ res = drm_dp_dpcd_read(aux_dev->aux, pos, buf, todo);
if (res <= 0)
break;
@@ -214,11 +210,7 @@ static ssize_t auxdev_write_iter(struct kiocb *iocb,
struct iov_iter *from)
break;
}
- if (aux_dev->aux->is_remote)
- res = drm_dp_mst_dpcd_write(aux_dev->aux, pos, buf,
- todo);
- else
- res = drm_dp_dpcd_write(aux_dev->aux, pos, buf, todo);
+ res = drm_dp_mst_dpcd_write(aux_dev->aux, pos, buf, todo);
if (res <= 0)
break;
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 54a6414c5d96..0cbf10727bd6 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#include "drm_crtc_helper_internal.h"
@@ -272,7 +273,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8
request,
/**
* drm_dp_dpcd_read() - read a series of bytes from the DPCD
- * @aux: DisplayPort AUX channel
+ * @aux: DisplayPort AUX channel (SST or MST)
* @offset: address of the (first) register to read
* @buffer: buffer to store the register values
* @size: number of bytes in @buffer
@@ -301,13 +302,18 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned
int offset,
* We just have to do it before any DPCD access and hope that the
* monitor doesn't power down exactly after the throw away read.
*/
- ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, buffer,
-1);
- if (ret != 1)
- goto out;
+ if (!aux->is_remote) {
+ ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV,
+buffer, 1);
+ if (ret != 1)
+ goto out;
+ }
- ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
-size);
+ if (aux->is_remote)
+ ret = drm_dp_mst_dpcd_read(aux, offset, buffer, size);
+ else
+ ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset,
+buffer, size);
out:
drm_dp_dump_access(aux, DP_AUX_NATIVE_READ, offset, buffer, ret);
@@ -317,7 +323,7 @@ EXPORT_SYMBOL(drm_dp_dpcd_read);
/**
* drm_dp_dpcd_write() - write a series of bytes to the DPCD
- * @aux: DisplayPort AUX channel
+ * @aux: DisplayPort AUX channel (SST or MST)
* @offset: address of the (first) register to write
* @buffer: buffer containing the values to write
* @size: number of bytes in @buffer
@@ -334,8 +340,12 @@ ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned
int offset,
{
int ret;
- ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
-size);
+ if (aux->is_remote)
+ ret = drm_dp_mst_dpcd_write(aux, offset, buffer, size);
+ else
+ ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset,
+buffer, size);
+
drm_dp_dump_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, ret);
return ret;
}
--
2.17.1
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[PATCH 10/15] drm/amd/display: Use correct helpers to compute timeslots
From: David Francis We were using drm helpers to convert a timing into its bandwidth, its bandwidth into pbn, and its pbn into timeslots These helpers -Did not take DSC timings into account -Used the link rate and lane count of the link's aux device, which are not the same as the link's current cap -Did not take FEC into account (FEC reduces the PBN per timeslot) For converting timing into PBN, use the new function drm_dp_calc_pbn_mode_dsc that handles the DSC case For converting PBN into time slots, amdgpu doesn't use the 'correct' atomic method (drm_dp_atomic_find_vcpi_slots), so don't add a new helper to cover our approach. Use the same means of calculating pbn per time slot as the DSC code. Cc: Jerry Zuo Cc: Nicholas Kazlauskas Signed-off-by: David Francis --- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index b151a5a51a94..aaf3158534ab 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -188,8 +188,8 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( int slots = 0; bool ret; int clock; - int bpp = 0; int pbn = 0; + int pbn_per_timeslot, bpp = 0; aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; @@ -233,11 +233,19 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( bpp = bpp * 3; - /* TODO need to know link rate */ - - pbn = drm_dp_calc_pbn_mode(clock, bpp, false); +#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT + if (stream->timing.flags.DSC) + pbn = drm_dp_calc_pbn_mode(clock, + stream->timing.dsc_cfg.bits_per_pixel, + true); + else +#endif + pbn = drm_dp_calc_pbn_mode(clock, bpp, false); - slots = drm_dp_find_vcpi_slots(mst_mgr, pbn); + /* Convert kilobits per second / 64 (for 64 timeslots) to pbn (54/64 megabytes per second) */ + pbn_per_timeslot = dc_link_bandwidth_kbps( + stream->link, dc_link_get_link_cap(stream->link)) / (8 * 1000 * 54); + slots = DIV_ROUND_UP(pbn, pbn_per_timeslot); ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots); if (!ret) -- 2.17.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 09/15] drm/dp_mst: Add new quirk for Synaptics MST hubs
From: David Francis
Synaptics DP1.4 hubs (BRANCH_ID 0x90CC24) do not
support virtual DPCD registers, but do support DSC.
The DSC caps can be read from the physical aux,
like in SST DSC. These hubs have many different
DEVICE_IDs. Add a new quirk to detect this case.
Change-Id: I9d332f273dfca0cfbced111e62f5a06c5c312893
Cc: Lyude Paul
Cc: Jani Nikula
Cc: Harry Wentland
Reviewed-by: Wenjing Liu
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_helper.c | 4 +++-
drivers/gpu/drm/drm_dp_mst_topology.c | 27 +++
include/drm/drm_dp_helper.h | 7 +++
3 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 0cbf10727bd6..c3e1da78e442 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1288,7 +1288,9 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
/* LG LP140WF6-SPM1 eDP panel */
{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'),
false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
/* Apple panels need some additional handling to support PSR */
- { OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false,
BIT(DP_DPCD_QUIRK_NO_PSR) }
+ { OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false,
BIT(DP_DPCD_QUIRK_NO_PSR) },
+ /* Synaptics DP1.4 MST hubs can support DSC without virtual DPCD */
+ { OUI(0x90, 0xCC, 0x24), DEVICE_ID_ANY, true,
BIT(DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) },
};
#undef OUI
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index dd2ca065cc92..4e493d8af288 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -4219,6 +4219,7 @@ struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct
drm_dp_mst_port *port)
{
struct drm_dp_mst_port *immediate_upstream_port;
struct drm_dp_mst_port *fec_port;
+ struct drm_dp_desc desc = { 0 };
if (!port)
return NULL;
@@ -4271,6 +4272,32 @@ struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct
drm_dp_mst_port *port)
if (drm_dp_mst_is_virtual_dpcd(port))
return >aux;
+ /*
+* Synaptics quirk
+* Applies to ports for which:
+* - Physical aux has Synaptics OUI
+* - DPv1.4 or higher
+* - Port is on primary branch device
+* - Not a VGA adapter (DP_DWN_STRM_PORT_TYPE_ANALOG)
+*/
+ if (!drm_dp_read_desc(port->mgr->aux, , true))
+ return NULL;
+
+ if (drm_dp_has_quirk(, DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) &&
+ port->mgr->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14 &&
+ port->parent == port->mgr->mst_primary) {
+ u8 downstreamport;
+
+ if (drm_dp_dpcd_read(>aux, DP_DOWNSTREAMPORT_PRESENT,
+, 1) < 0)
+ return NULL;
+
+ if ((downstreamport & DP_DWN_STRM_PORT_PRESENT) &&
+ ((downstreamport & DP_DWN_STRM_PORT_TYPE_MASK)
+!= DP_DWN_STRM_PORT_TYPE_ANALOG))
+ return port->mgr->aux;
+ }
+
return NULL;
}
EXPORT_SYMBOL(drm_dp_mst_dsc_aux_for_port);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 6ae1a6765f63..919ad940bfb1 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1414,6 +1414,13 @@ enum drm_dp_quirk {
* driver still need to implement proper handling for such device.
*/
DP_DPCD_QUIRK_NO_PSR,
+ /**
+* @DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD:
+*
+* The device supports MST DSC despite not supporting Virtual DPCD.
+* The DSC caps can be read from the physical aux instead.
+*/
+ DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD,
};
/**
--
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[PATCH 15/15] drm/amd/display: Trigger modesets on MST DSC connectors
From: David Francis
Whenever a connector on an MST network is attached, detached, or
undergoes a modeset, the DSC configs for each stream on that
topology will be recalculated. This can change their required
bandwidth, requiring a full reprogramming, as though a modeset
was performed, even if that stream did not change timing.
Therefore, whenever a crtc has drm_atomic_crtc_needs_modeset,
for each crtc that shares a MST topology with that stream and
supports DSC, add that crtc (and all affected connectors and
planes) to the atomic state and set mode_changed on its state
v2: Do this check only on Navi and before adding connectors
and planes on modesetting crtcs
Cc: Leo Li
Cc: Nicholas Kazlauskas
Cc: Lyude Paul
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 79 +++
1 file changed, 79 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ba017e6bf0b4..f65326e85b86 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6704,6 +6704,74 @@ static int do_aquire_global_lock(struct drm_device *dev,
return ret < 0 ? ret : 0;
}
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+/*
+ * TODO: This logic should at some point be moved into DRM
+ */
+static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct
drm_crtc *crtc)
+{
+ struct drm_connector *connector;
+ struct drm_connector_state *conn_state;
+ struct drm_connector_list_iter conn_iter;
+ struct drm_crtc_state *new_crtc_state;
+ struct amdgpu_dm_connector *aconnector = NULL, *aconnector_to_add;
+ int i, j;
+ struct drm_crtc *crtcs_affected[AMDGPU_MAX_CRTCS] = { 0 };
+
+ for_each_new_connector_in_state(state, connector, conn_state, i) {
+ if (conn_state->crtc != crtc)
+ continue;
+
+ aconnector = to_amdgpu_dm_connector(connector);
+ if (!aconnector->port)
+ aconnector = NULL;
+ else
+ break;
+ }
+
+ if (!aconnector)
+ return 0;
+
+ i = 0;
+ drm_connector_list_iter_begin(state->dev, _iter);
+ drm_for_each_connector_iter(connector, _iter) {
+ if (!connector->state || !connector->state->crtc)
+ continue;
+
+ aconnector_to_add = to_amdgpu_dm_connector(connector);
+ if (!aconnector_to_add->port)
+ continue;
+
+ if (aconnector_to_add->port->mgr != aconnector->port->mgr)
+ continue;
+
+ if (!aconnector_to_add->dc_sink)
+ continue;
+
+ if
(!aconnector_to_add->dc_sink->sink_dsc_caps.dsc_dec_caps.is_dsc_supported)
+ continue;
+
+ if (i >= AMDGPU_MAX_CRTCS)
+ continue;
+
+ crtcs_affected[i] = connector->state->crtc;
+ i++;
+ }
+ drm_connector_list_iter_end(_iter);
+
+ for (j = 0; j < i; j++) {
+ new_crtc_state = drm_atomic_get_crtc_state(state,
crtcs_affected[j]);
+ if (IS_ERR(new_crtc_state))
+ return PTR_ERR(new_crtc_state);
+
+ new_crtc_state->mode_changed = true;
+ }
+
+ return 0;
+
+}
+#endif
+
static void get_freesync_config_for_crtc(
struct dm_crtc_state *new_crtc_state,
struct dm_connector_state *new_con_state)
@@ -7388,6 +7456,17 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ if (adev->asic_type >= CHIP_NAVI10) {
+ for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
+ if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
+ ret = add_affected_mst_dsc_crtcs(state, crtc);
+ if (ret)
+ goto fail;
+ }
+ }
+ }
+#endif
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&
!new_crtc_state->color_mgmt_changed &&
--
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[PATCH 07/15] drm/dp_mst: Fill branch->num_ports
From: David Francis This field on drm_dp_mst_branch was never filled It is initialized to zero when the port is kzallocced. When a port is added to the list, increment num_ports, and when a port is removed from the list, decrement num_ports. v2: remember to decrement on port removal v3: don't explicitly init to 0 Signed-off-by: David Francis Reviewed-by: Lyude Paul Reviewed-by: Harry Wentland --- drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index c1a7ddfdc4bd..ae2f986d76a2 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -1670,6 +1670,7 @@ static void drm_dp_add_port(struct drm_dp_mst_branch *mstb, mutex_lock(>mgr->lock); drm_dp_mst_topology_get_port(port); list_add(>next, >ports); + mstb->num_ports++; mutex_unlock(>mgr->lock); } @@ -1704,6 +1705,7 @@ static void drm_dp_add_port(struct drm_dp_mst_branch *mstb, /* remove it from the port list */ mutex_lock(>mgr->lock); list_del(>next); + mstb->num_ports--; mutex_unlock(>mgr->lock); /* drop port list reference */ drm_dp_mst_topology_put_port(port); -- 2.17.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 02/15] drm/amdgpu: Add connector atomic check
From: Mikita Lipski
[why]
Complying with new MST atomic check requirements.
The driver needs to call this function on every
atomic check to reset the VCPI slots if new state
disables
[how]
- Verify that it is a MST connection
- Verify that old crtc state exists
- Verify the new crtc state disables sink
- Release VCPI slots on the port
Cc: Lyude Paul
Signed-off-by: Mikita Lipski
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 34 +++
1 file changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 16218a202b59..4e1bbf5bbe77 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -252,10 +252,44 @@ static struct drm_encoder *dm_mst_best_encoder(struct
drm_connector *connector)
return _dm_connector->mst_encoder->base;
}
+static int dm_dp_mst_atomic_check(struct drm_connector *connector,
+ struct drm_connector_state *new_conn_state)
+{
+ struct drm_atomic_state *state = new_conn_state->state;
+ struct drm_connector_state *old_conn_state =
+ drm_atomic_get_old_connector_state(state, connector);
+ struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(connector);
+ struct drm_crtc_state *new_crtc_state;
+ struct drm_dp_mst_topology_mgr *mst_mgr;
+ struct drm_dp_mst_port *mst_port;
+
+ if (!aconnector || !aconnector->port)
+ return 0;
+
+ mst_port = aconnector->port;
+ mst_mgr = >mst_port->mst_mgr;
+
+ if (!old_conn_state->crtc)
+ return 0;
+
+ if (new_conn_state->crtc) {
+ new_crtc_state = drm_atomic_get_old_crtc_state(state,
new_conn_state->crtc);
+ if (!new_crtc_state ||
+ !drm_atomic_crtc_needs_modeset(new_crtc_state) ||
+ new_crtc_state->enable)
+ return 0;
+ }
+
+ return drm_dp_atomic_release_vcpi_slots(state,
+ mst_mgr,
+ mst_port);
+}
+
static const struct drm_connector_helper_funcs
dm_dp_mst_connector_helper_funcs = {
.get_modes = dm_dp_mst_get_modes,
.mode_valid = amdgpu_dm_connector_mode_valid,
.best_encoder = dm_mst_best_encoder,
+ .atomic_check = dm_dp_mst_atomic_check,
};
static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
--
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[PATCH 04/15] drm/dp_mst: Add PBN calculation for DSC modes
From: David Francis
With DSC, bpp can be fractional in multiples of 1/16.
Change drm_dp_calc_pbn_mode to reflect this, adding a new
parameter bool dsc. When this parameter is true, treat the
bpp parameter as having units not of bits per pixel, but
1/16 of a bit per pixel
v2: Don't add separate function for this
Change-Id: I33ef6f53c44dc32aa869aa9741ba0339aaf5e54f
Cc: amd-...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Reviewed-by: Manasi Navare
Reviewed-by: Lyude Paul
Reviewed-by: Harry Wentland
Signed-off-by: David Francis
Signed-off-by: Mikita Lipski
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 8 +++-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c| 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c| 16
drivers/gpu/drm/i915/intel_dp_mst.c | 3 ++-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 ++-
drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +-
include/drm/drm_dp_mst_helper.h | 3 +--
7 files changed, 26 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 39c239a08633..1130298c6930 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4482,7 +4482,13 @@ static int dm_encoder_helper_atomic_check(struct
drm_encoder *encoder,
bpp *= 3;
clock = adjusted_mode->clock;
- pbn = drm_dp_calc_pbn_mode(clock, bpp);
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ if (aconnector->dc_sink &&
+ aconnector->dc_sink->sink_dsc_caps.dsc_dec_caps.is_dsc_supported)
+ pbn = drm_dp_calc_pbn_mode(clock, bpp, true);
+ else
+#endif
+ pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
slots = drm_dp_atomic_find_vcpi_slots(state,
mst_mgr,
mst_port,
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 555af4a8c0ef..b151a5a51a94 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -235,7 +235,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
/* TODO need to know link rate */
- pbn = drm_dp_calc_pbn_mode(clock, bpp);
+ pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
slots = drm_dp_find_vcpi_slots(mst_mgr, pbn);
ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots);
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 398e7314ea8b..659099366f8b 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3531,10 +3531,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status);
* drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
* @clock: dot clock for the mode
* @bpp: bpp for the mode.
+ * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel
*
* This uses the formula in the spec to calculate the PBN value for a mode.
*/
-int drm_dp_calc_pbn_mode(int clock, int bpp)
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
{
u64 kbps;
s64 peak_kbps;
@@ -3552,11 +3553,18 @@ int drm_dp_calc_pbn_mode(int clock, int bpp)
* peak_kbps *= (1006/1000)
* peak_kbps *= (64/54)
* peak_kbps *= 8convert to bytes
+*
+* If the bpp is in units of 1/16, further divide by 16. Put this
+* factor in the numerator rather than the denominator to avoid
+* integer overflow
*/
numerator = 64 * 1006;
denominator = 54 * 8 * 1000 * 1000;
+ if (dsc)
+ numerator /= 16;
+
kbps *= numerator;
peak_kbps = drm_fixp_from_fraction(kbps, denominator);
@@ -3567,19 +3575,19 @@ EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
static int test_calc_pbn_mode(void)
{
int ret;
- ret = drm_dp_calc_pbn_mode(154000, 30);
+ ret = drm_dp_calc_pbn_mode(154000, 30, false);
if (ret != 689) {
DRM_ERROR("PBN calculation test failed - clock %d, bpp %d,
expected PBN %d, actual PBN %d.\n",
154000, 30, 689, ret);
return -EINVAL;
}
- ret = drm_dp_calc_pbn_mode(234000, 30);
+ ret = drm_dp_calc_pbn_mode(234000, 30, false);
if (ret != 1047) {
DRM_ERROR("PBN calculation test failed - clock %d, bpp %d,
expected PBN %d, actual PBN %d.\n",
234000, 30, 1047, ret);
return -EINVAL;
}
- ret = drm_dp_calc_pbn_mode(297000, 24);
+ ret = drm_dp_calc_pbn_mode(297000, 24, false);
if (ret != 1063) {
DRM_ERROR("PBN
[PATCH 05/15] drm/dp_mst: Parse FEC capability on MST ports
From: David Francis
As of DP1.4, ENUM_PATH_RESOURCES returns a bit indicating
if FEC can be supported up to that point in the MST network.
The bit is the first byte of the ENUM_PATH_RESOURCES ack reply,
bottom-most bit (refer to section 2.11.9.4 of DP standard,
v1.4)
That value is needed for FEC and DSC support
Store it on drm_dp_mst_port
Signed-off-by: David Francis
Reviewed-by: Lyude Paul
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
include/drm/drm_dp_mst_helper.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 659099366f8b..c1a7ddfdc4bd 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -552,6 +552,7 @@ static bool
drm_dp_sideband_parse_enum_path_resources_ack(struct drm_dp_sideband
{
int idx = 1;
repmsg->u.path_resources.port_number = (raw->msg[idx] >> 4) & 0xf;
+ repmsg->u.path_resources.fec_capable = raw->msg[idx] & 0x1;
idx++;
if (idx > raw->curlen)
goto fail_len;
@@ -2180,6 +2181,7 @@ static int drm_dp_send_enum_path_resources(struct
drm_dp_mst_topology_mgr *mgr,
DRM_DEBUG_KMS("enum path resources %d: %d %d\n",
txmsg->reply.u.path_resources.port_number,
txmsg->reply.u.path_resources.full_payload_bw_number,
txmsg->reply.u.path_resources.avail_payload_bw_number);
port->available_pbn =
txmsg->reply.u.path_resources.avail_payload_bw_number;
+ port->fec_capable =
txmsg->reply.u.path_resources.fec_capable;
}
}
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 9116b2c95239..f113ae04fa88 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -108,6 +108,8 @@ struct drm_dp_mst_port {
* audio-capable.
*/
bool has_audio;
+
+ bool fec_capable;
};
/**
@@ -312,6 +314,7 @@ struct drm_dp_port_number_req {
struct drm_dp_enum_path_resources_ack_reply {
u8 port_number;
+ bool fec_capable;
u16 full_payload_bw_number;
u16 avail_payload_bw_number;
};
--
2.17.1
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[PATCH 01/15] drm/amdgpu: Add encoder atomic check
From: Mikita Lipski
[why]
In order to comply with new MST atomic check
we have to find and add VCPI slots to the state
during atomic check whenever their is a change on
mode or connector.
[how]
- Verify that it is a MST connection
- Convert new stream's clock and bpp
- Calculate PBN based on stream parameters
- Find and add VCPI slots to the state
Cc: Lyude Paul
Signed-off-by: Mikita Lipski
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 59 +++
1 file changed, 59 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7b0ca2e1ed8b..d700b962d338 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4432,6 +4432,65 @@ static int dm_encoder_helper_atomic_check(struct
drm_encoder *encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state
*conn_state)
{
+ struct drm_atomic_state *state = crtc_state->state;
+ struct drm_connector *connector = conn_state->connector;
+ struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(connector);
+ struct dm_crtc_state *dm_new_crtc_state = to_dm_crtc_state(crtc_state);
+ const struct drm_display_mode *adjusted_mode =
_state->adjusted_mode;
+ struct drm_dp_mst_topology_mgr *mst_mgr;
+ struct drm_dp_mst_port *mst_port;
+ int pbn, slots,clock, bpp = 0;
+
+ if (!dm_new_crtc_state)
+ return 0;
+
+ if (!aconnector || !aconnector->port)
+ return 0;
+
+ mst_port = aconnector->port;
+ mst_mgr = >mst_port->mst_mgr;
+
+ if (!mst_mgr->mst_state)
+ return 0;
+
+ if (!crtc_state->connectors_changed && !crtc_state->mode_changed)
+ return 0;
+
+ switch (convert_color_depth_from_display_info(connector, conn_state)) {
+ case COLOR_DEPTH_666:
+ bpp = 6;
+ break;
+ case COLOR_DEPTH_888:
+ bpp = 8;
+ break;
+ case COLOR_DEPTH_101010:
+ bpp = 10;
+ break;
+ case COLOR_DEPTH_121212:
+ bpp = 12;
+ break;
+ case COLOR_DEPTH_141414:
+ bpp = 14;
+ break;
+ case COLOR_DEPTH_161616:
+ bpp = 16;
+ break;
+ default:
+ ASSERT(bpp != 0);
+ break;
+ }
+
+ bpp *= 3;
+ clock = adjusted_mode->clock;
+ pbn = drm_dp_calc_pbn_mode(clock, bpp);
+ slots = drm_dp_atomic_find_vcpi_slots(state,
+ mst_mgr,
+ mst_port,
+ pbn);
+ if (slots < 0) {
+ DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
+ return slots;
+ }
return 0;
}
--
2.17.1
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[PATCH 00/15] DSC MST support for AMDGPU
From: Mikita Lipski This set of patches is a continuation of DSC enablement patches for AMDGPU. This set enables DSC on MST. First 3 patches add atomic check functionality to encoder and connector to allocate and release VCPI slots on each state atomic check. These changes utilize newly added drm_mst_helper functions for better tracking of VCPI slots. Other 12 patches have been introduced in multiple iterations to the mailing list before. These patches were developed by David Francis as part of his work on DSC. David Francis (12): drm/dp_mst: Add PBN calculation for DSC modes drm/dp_mst: Parse FEC capability on MST ports drm/dp_mst: Add MST support to DP DPCD R/W functions drm/dp_mst: Fill branch->num_ports drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux drm/dp_mst: Add new quirk for Synaptics MST hubs drm/amd/display: Use correct helpers to compute timeslots drm/amd/display: Initialize DSC PPS variables to 0 drm/amd/display: Validate DSC caps on MST endpoints drm/amd/display: Write DSC enable to MST DPCD drm/amd/display: MST DSC compute fair share drm/amd/display: Trigger modesets on MST DSC connectors Mikita Lipski (3): drm/amdgpu: Add encoder atomic check drm/amdgpu: Add connector atomic check drm/amdgpu: validate mst topology in atomic check .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 153 ++ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 37 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 451 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 4 + .../drm/amd/display/dc/core/dc_link_hwss.c| 3 + .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 + drivers/gpu/drm/drm_dp_aux_dev.c | 12 +- drivers/gpu/drm/drm_dp_helper.c | 34 +- drivers/gpu/drm/drm_dp_mst_topology.c | 174 ++- drivers/gpu/drm/i915/intel_dp_mst.c | 3 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +- drivers/gpu/drm/radeon/radeon_dp_mst.c| 2 +- include/drm/drm_dp_helper.h | 7 + include/drm/drm_dp_mst_helper.h | 8 +- 17 files changed, 866 insertions(+), 39 deletions(-) -- 2.17.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm: sun8i-ui/vi: Fix layer zpos change/atomic modesetting
On Wed, Sep 18, 2019 at 05:23:09PM +0200, Ondřej Jirman wrote: > Hi, > > On Wed, Sep 18, 2019 at 04:17:34PM +0200, Maxime Ripard wrote: > > Hi, > > > > On Sun, Sep 15, 2019 at 12:03:37AM +0200, meg...@megous.com wrote: > > > From: Ondrej Jirman > > > > > > There are various issues that this re-work of sun8i_[uv]i_layer_enable > > > function fixes: > > > > > > - Make sure that we re-initialize zpos on reset > > > - Minimize register updates by doing them only when state changes > > > - Fix issue where DE pipe might get disabled even if it is no longer > > > used by the layer that's currently calling sun8i_ui_layer_enable > > > - .atomic_disable callback is not really needed because .atomic_update > > > can do the disable too, so drop the duplicate code > > > > > > Signed-off-by: Ondrej Jirman > > > > It looks like these fixes should be in separate patches. Is there any > > reason it's not the case? > > Bullet points just describe the resulting effect/benefits of the change to fix > the pipe control register update issue (see the referenced e-mail). It's definitely ok to have multiple patches needed to address a single perceived issue. A commit is not about what you're fixing but what you're changing. And the fact that you have tha bullet list in the first place proves that you have multiple logical changes in your patch. And even then, your commit log mentions that you're fixing multiple issues (without explaining them). > I can maybe split off the first bullet point into a separate patch. But > I can't guarantee it will not make the original issue worse, because it might > have been hiding the other issue with register updates. > > The rest is just a result of the single logical change. It doesn't work > individually, it all has the goal of fixing the issue as a whole. > > If I were to split it I would have to actually re-implement .atomic_disable > callback only to remove it in the next patch. I don't see the benefit. Your commit log says that you remove atomic_disable. Why would you remove it, to add it back, to remove it again? Maxime signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 3/3] drm: Add self_refresh_state debugfs entry
On Wed, Sep 18, 2019 at 10:07 PM Sean Paul wrote:
>
> From: Sean Paul
>
> This patch adds a debugfs entry to surface the entry and exit times as
> well as the calculated delay.
>
> Suggested-by: Daniel Vetter
> Signed-off-by: Sean Paul
>
> Changes in v2:
> - Added to the set
> ---
>
> Wasn't too sure how to initialize this, as calling the helper function
> from drm_debugfs.c seemed... wrong. However there weren't any other
> compelling solutions, so I figured I'd post this and learn something
> new.
Won't build, because drm.ko can't depend upon stuff in
drm-kms-helper.ko, since that already depends upon the former.
I think we need a drm_self_refresh_helper_register which drivers can
call from their crtc->late_register callback. I think Noralf was
working on some infrastructure to make this neater, but it didn't land
yet.
-Daniel
>
>
>
> drivers/gpu/drm/drm_debugfs.c | 10 +
> drivers/gpu/drm/drm_self_refresh_helper.c | 55 ++-
> include/drm/drm_self_refresh_helper.h | 6 +++
> 3 files changed, 69 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
> index eab0f2687cd6..175c2451ae72 100644
> --- a/drivers/gpu/drm/drm_debugfs.c
> +++ b/drivers/gpu/drm/drm_debugfs.c
> @@ -38,6 +38,9 @@
> #include
> #include
> #include
> +#if defined(CONFIG_DRM_KMS_HELPER)
> +#include
> +#endif
>
> #include "drm_crtc_internal.h"
> #include "drm_internal.h"
> @@ -231,6 +234,13 @@ int drm_debugfs_init(struct drm_minor *minor, int
> minor_id,
> DRM_ERROR("Failed to create atomic debugfs files\n");
> return ret;
> }
> +#if defined(CONFIG_DRM_KMS_HELPER)
> + ret = drm_self_refresh_debugfs_init(minor);
> + if (ret) {
> + DRM_ERROR("Failed to init self refresh debugfs\n");
> + return ret;
> + }
> +#endif
> }
>
> if (drm_core_check_feature(dev, DRIVER_MODESET)) {
> diff --git a/drivers/gpu/drm/drm_self_refresh_helper.c
> b/drivers/gpu/drm/drm_self_refresh_helper.c
> index 68f4765a5896..e7544ae1e47b 100644
> --- a/drivers/gpu/drm/drm_self_refresh_helper.c
> +++ b/drivers/gpu/drm/drm_self_refresh_helper.c
> @@ -14,7 +14,9 @@
> #include
> #include
> #include
> +#include
> #include
> +#include
> #include
> #include
> #include
> @@ -167,6 +169,16 @@ void drm_self_refresh_helper_update_avg_times(struct
> drm_atomic_state *state,
> }
> EXPORT_SYMBOL(drm_self_refresh_helper_update_avg_times);
>
> +static unsigned int
> +drm_self_refresh_calc_idle_delay(struct drm_self_refresh_data *sr_data)
> +{
> + if (WARN_ON(!mutex_is_locked(_data->avg_mutex)))
> + return SELF_REFRESH_AVG_SEED_MS * 4;
> +
> + return (ewma_psr_time_read(_data->entry_avg_ms) +
> + ewma_psr_time_read(_data->exit_avg_ms)) * 2;
> +}
> +
> /**
> * drm_self_refresh_helper_alter_state - Alters the atomic state for SR exit
> * @state: the state currently being checked
> @@ -209,8 +221,7 @@ void drm_self_refresh_helper_alter_state(struct
> drm_atomic_state *state)
> continue;
>
> mutex_lock(_data->avg_mutex);
> - delay = (ewma_psr_time_read(_data->entry_avg_ms) +
> -ewma_psr_time_read(_data->exit_avg_ms)) * 2;
> + delay = drm_self_refresh_calc_idle_delay(sr_data);
> mutex_unlock(_data->avg_mutex);
>
> mod_delayed_work(system_wq, _data->entry_work,
> @@ -275,3 +286,43 @@ void drm_self_refresh_helper_cleanup(struct drm_crtc
> *crtc)
> kfree(sr_data);
> }
> EXPORT_SYMBOL(drm_self_refresh_helper_cleanup);
> +
> +#ifdef CONFIG_DEBUG_FS
> +
> +static int drm_self_refresh_debugfs_state(struct seq_file *m, void *data)
> +{
> + struct drm_info_node *node = (struct drm_info_node *) m->private;
> + struct drm_device *dev = node->minor->dev;
> + struct drm_printer p = drm_seq_file_printer(m);
> + struct drm_crtc *crtc;
> +
> + drm_for_each_crtc(crtc, dev) {
> + struct drm_self_refresh_data *sr_data =
> crtc->self_refresh_data;
> + if (!sr_data)
> + continue;
> +
> + mutex_lock(_data->avg_mutex);
> + drm_printf(, "crtc[%u]: %s\n", crtc->base.id, crtc->name);
> + drm_printf(, "\tentry_avg_ms=%lu\n",
> + ewma_psr_time_read(_data->entry_avg_ms));
> + drm_printf(, "\texit_avg_ms=%lu\n",
> + ewma_psr_time_read(_data->exit_avg_ms));
> + drm_printf(, "\tidle_delay=%u\n",
> + drm_self_refresh_calc_idle_delay(sr_data));
> + mutex_unlock(_data->avg_mutex);
> + }
> + return 0;
> +}
> +
> +static const struct drm_info_list drm_atomic_debugfs_list[] = {
> + {"self_refresh_state",
Re: [PATCH] drm: add drm device name
On Wed, Sep 18, 2019 at 10:03 AM Michel Dänzer wrote: > On 2019-09-18 1:41 a.m., Marek Olšák wrote: > > drmVersion::name = amdgpu, radeon, intel, etc. > > drmVersion::desc = vega10, vega12, vega20, ... > > > > The common Mesa code will use name and desc to select the driver. > > Like the Xorg modesetting driver, that code doesn't need this kernel > functionality or new PCI IDs. It can just select the current driver for > all devices which aren't supported by older drivers (which is a fixed > set at this point). > > > > The AMD-specific Mesa code will use desc to identify the chip. > > Doesn't libdrm_amdgpu's struct amdgpu_gpu_info::family_id provide the > same information? > Not for the common code, though I guess common Mesa code could use the INFO ioctl. Is that what you mean? Marek ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/3] drm: Fix kerneldoc and remove unused struct member in self_refresh helper
From: Sean Paul
Artifacts of previous revisions.
Reviewed-by: Daniel Vetter
Signed-off-by: Sean Paul
Link to v1:
https://patchwork.freedesktop.org/patch/msgid/20190917200443.64481-1-s...@poorly.run
Changes in v2:
- None
---
drivers/gpu/drm/drm_self_refresh_helper.c | 1 -
include/drm/drm_crtc.h| 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_self_refresh_helper.c
b/drivers/gpu/drm/drm_self_refresh_helper.c
index 4b9424a8f1f1..9095cebf2147 100644
--- a/drivers/gpu/drm/drm_self_refresh_helper.c
+++ b/drivers/gpu/drm/drm_self_refresh_helper.c
@@ -53,7 +53,6 @@
struct drm_self_refresh_data {
struct drm_crtc *crtc;
struct delayed_work entry_work;
- struct drm_atomic_state *save_state;
unsigned int entry_delay_ms;
};
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 7e2963cad543..742b31043898 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -1107,7 +1107,7 @@ struct drm_crtc {
/**
* @self_refresh_data: Holds the state for the self refresh helpers
*
-* Initialized via drm_self_refresh_helper_register().
+* Initialized via drm_self_refresh_helper_init().
*/
struct drm_self_refresh_data *self_refresh_data;
};
--
Sean Paul, Software Engineer, Google / Chromium OS
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[PATCH v2 3/3] drm: Add self_refresh_state debugfs entry
From: Sean Paul
This patch adds a debugfs entry to surface the entry and exit times as
well as the calculated delay.
Suggested-by: Daniel Vetter
Signed-off-by: Sean Paul
Changes in v2:
- Added to the set
---
Wasn't too sure how to initialize this, as calling the helper function
from drm_debugfs.c seemed... wrong. However there weren't any other
compelling solutions, so I figured I'd post this and learn something
new.
drivers/gpu/drm/drm_debugfs.c | 10 +
drivers/gpu/drm/drm_self_refresh_helper.c | 55 ++-
include/drm/drm_self_refresh_helper.h | 6 +++
3 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
index eab0f2687cd6..175c2451ae72 100644
--- a/drivers/gpu/drm/drm_debugfs.c
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -38,6 +38,9 @@
#include
#include
#include
+#if defined(CONFIG_DRM_KMS_HELPER)
+#include
+#endif
#include "drm_crtc_internal.h"
#include "drm_internal.h"
@@ -231,6 +234,13 @@ int drm_debugfs_init(struct drm_minor *minor, int minor_id,
DRM_ERROR("Failed to create atomic debugfs files\n");
return ret;
}
+#if defined(CONFIG_DRM_KMS_HELPER)
+ ret = drm_self_refresh_debugfs_init(minor);
+ if (ret) {
+ DRM_ERROR("Failed to init self refresh debugfs\n");
+ return ret;
+ }
+#endif
}
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
diff --git a/drivers/gpu/drm/drm_self_refresh_helper.c
b/drivers/gpu/drm/drm_self_refresh_helper.c
index 68f4765a5896..e7544ae1e47b 100644
--- a/drivers/gpu/drm/drm_self_refresh_helper.c
+++ b/drivers/gpu/drm/drm_self_refresh_helper.c
@@ -14,7 +14,9 @@
#include
#include
#include
+#include
#include
+#include
#include
#include
#include
@@ -167,6 +169,16 @@ void drm_self_refresh_helper_update_avg_times(struct
drm_atomic_state *state,
}
EXPORT_SYMBOL(drm_self_refresh_helper_update_avg_times);
+static unsigned int
+drm_self_refresh_calc_idle_delay(struct drm_self_refresh_data *sr_data)
+{
+ if (WARN_ON(!mutex_is_locked(_data->avg_mutex)))
+ return SELF_REFRESH_AVG_SEED_MS * 4;
+
+ return (ewma_psr_time_read(_data->entry_avg_ms) +
+ ewma_psr_time_read(_data->exit_avg_ms)) * 2;
+}
+
/**
* drm_self_refresh_helper_alter_state - Alters the atomic state for SR exit
* @state: the state currently being checked
@@ -209,8 +221,7 @@ void drm_self_refresh_helper_alter_state(struct
drm_atomic_state *state)
continue;
mutex_lock(_data->avg_mutex);
- delay = (ewma_psr_time_read(_data->entry_avg_ms) +
-ewma_psr_time_read(_data->exit_avg_ms)) * 2;
+ delay = drm_self_refresh_calc_idle_delay(sr_data);
mutex_unlock(_data->avg_mutex);
mod_delayed_work(system_wq, _data->entry_work,
@@ -275,3 +286,43 @@ void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc)
kfree(sr_data);
}
EXPORT_SYMBOL(drm_self_refresh_helper_cleanup);
+
+#ifdef CONFIG_DEBUG_FS
+
+static int drm_self_refresh_debugfs_state(struct seq_file *m, void *data)
+{
+ struct drm_info_node *node = (struct drm_info_node *) m->private;
+ struct drm_device *dev = node->minor->dev;
+ struct drm_printer p = drm_seq_file_printer(m);
+ struct drm_crtc *crtc;
+
+ drm_for_each_crtc(crtc, dev) {
+ struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
+ if (!sr_data)
+ continue;
+
+ mutex_lock(_data->avg_mutex);
+ drm_printf(, "crtc[%u]: %s\n", crtc->base.id, crtc->name);
+ drm_printf(, "\tentry_avg_ms=%lu\n",
+ ewma_psr_time_read(_data->entry_avg_ms));
+ drm_printf(, "\texit_avg_ms=%lu\n",
+ ewma_psr_time_read(_data->exit_avg_ms));
+ drm_printf(, "\tidle_delay=%u\n",
+ drm_self_refresh_calc_idle_delay(sr_data));
+ mutex_unlock(_data->avg_mutex);
+ }
+ return 0;
+}
+
+static const struct drm_info_list drm_atomic_debugfs_list[] = {
+ {"self_refresh_state", drm_self_refresh_debugfs_state, 0},
+};
+
+int drm_self_refresh_debugfs_init(struct drm_minor *minor)
+{
+ return drm_debugfs_create_files(drm_atomic_debugfs_list,
+ ARRAY_SIZE(drm_atomic_debugfs_list),
+ minor->debugfs_root, minor);
+}
+EXPORT_SYMBOL(drm_self_refresh_debugfs_init);
+#endif
diff --git a/include/drm/drm_self_refresh_helper.h
b/include/drm/drm_self_refresh_helper.h
index 5b79d253fb46..779f81e035f1 100644
--- a/include/drm/drm_self_refresh_helper.h
+++ b/include/drm/drm_self_refresh_helper.h
@@ -17,4 +17,10 @@ void drm_self_refresh_helper_update_avg_times(struct
[PATCH v2 2/3] drm: Measure Self Refresh Entry/Exit times to avoid thrashing
From: Sean Paul
Currently the self refresh idle timer is a const set by the crtc. This
is fine if the self refresh entry/exit times are well-known for all
panels used on that crtc. However panels and workloads can vary quite a
bit, and a timeout which works well for one doesn't work well for
another.
In the extreme, if the timeout is too short we could get in a situation
where the self refresh exits are taking so long we queue up a self refresh
entry before the exit commit is even finished.
This patch changes the idle timeout to a moving average of the entry
times + a moving average of exit times + the crtc constant.
This patch was tested on rockchip, with a kevin CrOS panel the idle
delay averages out to about ~235ms (35 entry + 100 exit + 100 const). On
the same board, the bob panel idle delay lands around ~340ms (90 entry
+ 150 exit + 100 const).
WRT the dedicated mutex in self_refresh_data, it would be nice if we
could rely on drm_crtc.mutex to protect the average times, but there are
a few reasons why a separate lock is a better choice:
- We can't rely on drm_crtc.mutex being held if we're doing a nonblocking
commit
- We can't grab drm_crtc.mutex since drm_modeset_lock() doesn't tell us
whether the lock was already held in the acquire context (it eats
-EALREADY), so we can't tell if we should drop it or not
- We don't need such a heavy-handed lock for what we're trying to do,
commit ordering doesn't matter, so a point-of-use lock will be less
contentious
Reviewed-by: Daniel Vetter
Signed-off-by: Sean Paul
Link to v1:
https://patchwork.freedesktop.org/patch/msgid/20190917200443.64481-2-s...@poorly.run
Changes in v2:
- Migrate locking explanation from comment to commit msg (Daniel)
- Turf constant entry delay and multiply the avg times by 2 (Daniel)
---
drivers/gpu/drm/drm_atomic_helper.c | 20 ++
drivers/gpu/drm/drm_self_refresh_helper.c | 72 +++--
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 +-
include/drm/drm_self_refresh_helper.h | 6 +-
4 files changed, 90 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 9d7e4da6c292..3f13fa9a9e24 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -26,6 +26,7 @@
*/
#include
+#include
#include
#include
@@ -1570,9 +1571,23 @@ static void commit_tail(struct drm_atomic_state
*old_state)
{
struct drm_device *dev = old_state->dev;
const struct drm_mode_config_helper_funcs *funcs;
+ ktime_t start;
+ s64 commit_time_ms;
funcs = dev->mode_config.helper_private;
+ /*
+* We're measuring the _entire_ commit, so the time will vary depending
+* on how many fences and objects are involved. For the purposes of self
+* refresh, this is desirable since it'll give us an idea of how
+* congested things are. This will inform our decision on how often we
+* should enter self refresh after idle.
+*
+* These times will be averaged out in the self refresh helpers to avoid
+* overreacting over one outlier frame
+*/
+ start = ktime_get();
+
drm_atomic_helper_wait_for_fences(dev, old_state, false);
drm_atomic_helper_wait_for_dependencies(old_state);
@@ -1582,6 +1597,11 @@ static void commit_tail(struct drm_atomic_state
*old_state)
else
drm_atomic_helper_commit_tail(old_state);
+ commit_time_ms = ktime_ms_delta(ktime_get(), start);
+ if (commit_time_ms > 0)
+ drm_self_refresh_helper_update_avg_times(old_state,
+(unsigned long)commit_time_ms);
+
drm_atomic_helper_commit_cleanup_done(old_state);
drm_atomic_state_put(old_state);
diff --git a/drivers/gpu/drm/drm_self_refresh_helper.c
b/drivers/gpu/drm/drm_self_refresh_helper.c
index 9095cebf2147..68f4765a5896 100644
--- a/drivers/gpu/drm/drm_self_refresh_helper.c
+++ b/drivers/gpu/drm/drm_self_refresh_helper.c
@@ -5,6 +5,7 @@
* Authors:
* Sean Paul
*/
+#include
#include
#include
#include
@@ -50,10 +51,17 @@
* atomic_check when _crtc_state.self_refresh_active is true.
*/
+#define SELF_REFRESH_AVG_SEED_MS 200
+
+DECLARE_EWMA(psr_time, 4, 4)
+
struct drm_self_refresh_data {
struct drm_crtc *crtc;
struct delayed_work entry_work;
- unsigned int entry_delay_ms;
+
+ struct mutex avg_mutex;
+ struct ewma_psr_time entry_avg_ms;
+ struct ewma_psr_time exit_avg_ms;
};
static void drm_self_refresh_helper_entry_work(struct work_struct *work)
@@ -121,6 +129,44 @@ static void drm_self_refresh_helper_entry_work(struct
work_struct *work)
drm_modeset_acquire_fini();
}
+/**
+ * drm_self_refresh_helper_update_avg_times - Updates a crtc's SR time averages
+ * @state: the state which has just been applied to hardware
+ * @commit_time_ms:
[radeon-alex:amd-mainline-dkms-5.0 2219/3724] configure: error: in `drivers/gpu/drm/ttm/dkms':
tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-5.0 head: a51a5ad4b8daf0dd0a437d51a19c2baa98953675 commit: fbb2398b29e0de236e9ee3ad48385095ebcb2a84 [2219/3724] drm/amd/autoconf: fix in-build error for O=... config: ia64-allmodconfig (attached as .config) compiler: ia64-linux-gcc (GCC) 7.4.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout fbb2398b29e0de236e9ee3ad48385095ebcb2a84 # save the attached .config to linux build tree GCC_VERSION=7.4.0 make.cross ARCH=ia64 If you fix the issue, kindly add following tag Reported-by: kbuild test robot All errors (new ones prefixed by >>): >> configure: error: in `drivers/gpu/drm/ttm/dkms': >> configure: error: C compiler cannot create executables See `config.log' for more details --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/msm: include linux/sched/task.h
Without this header file, compile-testing may run into a missing
declaration:
drivers/gpu/drm/msm/msm_gpu.c:444:4: error: implicit declaration of function
'put_task_struct' [-Werror,-Wimplicit-function-declaration]
Fixes: 482f96324a4e ("drm/msm: Fix task dump in gpu recovery")
Signed-off-by: Arnd Bergmann
---
drivers/gpu/drm/msm/msm_gpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index a052364a5d74..edd45f434ccd 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
/*
* Power Management:
--
2.20.0
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[PATCH] drm/amd/display: hide an unused variable
Without CONFIG_DEBUG_FS, we get a warning for an unused
variable:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6020:33: error:
unused variable 'source' [-Werror,-Wunused-variable]
Hide the variable in an #ifdef like its only users.
Fixes: 14b2584636c6 ("drm/amd/display: add functionality to grab DPRX CRC
entries.")
Signed-off-by: Arnd Bergmann
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e1b09bb432bd..74252f57bafb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6017,7 +6017,9 @@ static void amdgpu_dm_enable_crtc_interrupts(struct
drm_device *dev,
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
int i;
+#ifdef CONFIG_DEBUG_FS
enum amdgpu_dm_pipe_crc_source source;
+#endif
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
--
2.20.0
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[Bug 110971] GPU HANG: ecode 6:1:0xfffffffe, in spring-main [8656], hang on rcs0
https://bugs.freedesktop.org/show_bug.cgi?id=110971 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #1 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/793. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 111730] Xorg does not render with mesa 19.1.7
https://bugs.freedesktop.org/show_bug.cgi?id=111730 GitLab Migration User changed: What|Removed |Added Status|NEEDINFO|RESOLVED Resolution|--- |MOVED --- Comment #6 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/795. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 110318] Disabling ARB_fragment_shader causes implementation errors
https://bugs.freedesktop.org/show_bug.cgi?id=110318 GitLab Migration User changed: What|Removed |Added Resolution|--- |MOVED Status|NEW |RESOLVED --- Comment #1 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/792. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 111386] Mesa 19.1.1 introduced Tearing
https://bugs.freedesktop.org/show_bug.cgi?id=111386 GitLab Migration User changed: What|Removed |Added Resolution|--- |MOVED Status|NEW |RESOLVED --- Comment #1 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/794. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 106827] Segmentation fault in i915_validate_state on SolveSpace startup
https://bugs.freedesktop.org/show_bug.cgi?id=106827 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #3 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/787. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 106548] Failed GfxDrv_DriverAcceptanceQuery.GL_GPU_FREQ_OVERRIDE_MDAPI
https://bugs.freedesktop.org/show_bug.cgi?id=106548 GitLab Migration User changed: What|Removed |Added Status|NEEDINFO|RESOLVED Resolution|--- |MOVED --- Comment #14 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/784. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 109102] At dual monitor intel_do_flush_locked failed: Resource deadlock avoided
https://bugs.freedesktop.org/show_bug.cgi?id=109102 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #9 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/790. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[radeon-alex:amd-mainline-dkms-5.0 3697/3724] include/kcl/kcl_fence.h:148:7: error: 'struct dma_fence' has no member named 'status'
tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-5.0
head: a51a5ad4b8daf0dd0a437d51a19c2baa98953675
commit: f460c248a3f0bca3a875602cf40693de672485c4 [3697/3724] drm/amd/autoconf:
refactor dma_fence header check
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-13) 7.4.0
reproduce:
git checkout f460c248a3f0bca3a875602cf40693de672485c4
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
All error/warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/scheduler/backport/backport.h:5:0,
from :0:
include/kcl/kcl_fence.h: In function 'kcl_dma_fence_set_error':
>> include/kcl/kcl_fence.h:148:7: error: 'struct dma_fence' has no member named
>> 'status'
fence->status = error;
^~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: At top level:
>> include/kcl/kcl_drm.h:167:1: error: redefinition of
>> 'drm_fb_helper_remove_conflicting_pci_framebuffers'
drm_fb_helper_remove_conflicting_pci_framebuffers(struct pci_dev *pdev,
^
In file included from include/kcl/kcl_drm.h:7:0,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_fb_helper.h:641:1: note: previous definition of
'drm_fb_helper_remove_conflicting_pci_framebuffers' was here
drm_fb_helper_remove_conflicting_pci_framebuffers(struct pci_dev *pdev,
^
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_encoder_init':
>> include/kcl/kcl_drm.h:307:9: error: too few arguments to function
>> 'drm_encoder_init'
return drm_encoder_init(dev, encoder, funcs,
^~~~
In file included from include/drm/drm_modeset_helper_vtables.h:33:0,
from include/drm/drm_atomic_helper.h:32,
from include/kcl/kcl_drm.h:11,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_encoder.h:183:5: note: declared here
int drm_encoder_init(struct drm_device *dev,
^~~~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_crtc_init_with_planes':
>> include/kcl/kcl_drm.h:322:10: error: too few arguments to function
>> 'drm_crtc_init_with_planes'
return drm_crtc_init_with_planes(dev, crtc, primary,
^
In file included from include/drm/drmP.h:69:0,
from include/kcl/kcl_drm.h:6,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_crtc.h:1120:5: note: declared here
int drm_crtc_init_with_planes(struct drm_device *dev,
^
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_universal_plane_init':
>> include/kcl/kcl_drm.h:343:29: error: incompatible type for argument 7 of
>> 'drm_universal_plane_init'
formats, format_count, type);
^~~~
In file included from include/drm/drm_crtc.h:45:0,
from include/drm/drmP.h:69,
from include/kcl/kcl_drm.h:6,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_plane.h:713:5: note: expected 'const uint64_t * {aka const
long long unsigned int *}' but argument is of type 'enum drm_plane_type'
int drm_universal_plane_init(struct drm_device *dev,
^~~~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
>> include/kcl/kcl_drm.h:342:10: error: too few arguments to function
>> 'drm_universal_plane_init'
return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
^~~~
In file included from include/drm/drm_crtc.h:45:0,
from include/drm/drmP.h:69,
from include/kcl/kcl_drm.h:6,
from drivers/gpu/drm/scheduler/backport/backport.h:6,
from :0:
include/drm/drm_plane.h:713:5: note: declared here
int drm_universal_plane_init(struct drm_device *dev,
^~~~
In file included from drivers/gpu/drm/scheduler/backport/backport.h:6:0,
from :0:
include/kcl/kcl_drm.h: In function 'kcl_drm_gem_object_lookup':
>> include/kcl/kcl_drm.h:354:32: error: passing argument 1
[Bug 109835] [865G] [drm] GPU HANG: ecode 2:0:0x75f4003e, in europa.exe [1323], reason: hang on rcs0, action: reset
https://bugs.freedesktop.org/show_bug.cgi?id=109835 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #5 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/791. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 106601] The internal format RGB32F should be color-renderable for texture, But mesa can not support it
https://bugs.freedesktop.org/show_bug.cgi?id=106601 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #15 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/785. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 105257] GPU HANG: ecode 9:0:0x86dffffd, in Xorg, reason: Hang on render ring, action: reset
https://bugs.freedesktop.org/show_bug.cgi?id=105257 GitLab Migration User changed: What|Removed |Added Resolution|--- |MOVED Status|NEW |RESOLVED --- Comment #7 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/782. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 108086] mesa 18.2.x line is crashing and disabling kwin_x11 and effects thereof, no problem with 18.1.x
https://bugs.freedesktop.org/show_bug.cgi?id=108086 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #8 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/789. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 105934] Gpu Hang with timestamp queries and compute dispatches on Intel HD 5500
https://bugs.freedesktop.org/show_bug.cgi?id=105934 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #3 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/783. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 107155] [i915] [regression] Tray icons are displayed incorrectly with MESA 18.0.5 on Intel
https://bugs.freedesktop.org/show_bug.cgi?id=107155 GitLab Migration User changed: What|Removed |Added Resolution|--- |MOVED Status|NEW |RESOLVED --- Comment #2 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/788. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 106763] thunderbolt 3-way split corruption using OpenGL
https://bugs.freedesktop.org/show_bug.cgi?id=106763 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #1 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/786. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 104599] corrupted desktop graphics with latest git intel driver
https://bugs.freedesktop.org/show_bug.cgi?id=104599 GitLab Migration User changed: What|Removed |Added Resolution|--- |MOVED Status|NEW |RESOLVED --- Comment #7 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/781. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 102574] glDrawBuffer crashes in case of surfaceless context
https://bugs.freedesktop.org/show_bug.cgi?id=102574 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #1 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/778. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 104520] Intermittent X crashes: GPU HANG: ecode 9:0:0x85dffffb, in Xorg [443], reason: Hang on rcs0, action: reset
https://bugs.freedesktop.org/show_bug.cgi?id=104520 GitLab Migration User changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |MOVED --- Comment #25 from GitLab Migration User --- -- GitLab Migration Automatic Message -- This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity. You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/mesa/mesa/issues/779. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 100612] [i915] [SNA] Graphics corruption with QupZilla
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[Bug 104526] 0x00007fce563644fb in update_buffers (dri2_surf=dri2_surf@entry=0x55b5be7fc690) at drivers/dri2/platform_wayland.c:541
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[Bug 102103] after switch to xserver-xorg-video-intel-native-modesetting libreoffice sidebar corrupted
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[Bug 98667] [i915] GPU HANG: ecode 6:0:0xf389fffc (Redie Beta 0.8.4)
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[Bug 98964] Chromium complains about glXGetSyncValuesOML in 13.0.2
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[Bug 96783] Intel 945 GM is very slow on rendering with 4.5 kernel
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[Bug 70402] SIGSEGV when selecting polygons with i915 (libdricore9.2.0.so)
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[Bug 88275] [865G] Intel OpenGL rendering isn't starting
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[Bug 57496] Artefacts when playing OpenGL games
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[Bug 42128] Crash when visiting a site with Firefox
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[Bug 28597] [865G] Segmentation fault in _swrast_logicop_rgba_span
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[Bug 28433] Mesa DRI Intel 845G GEM Drivers returning artifacts in textures that can lockup PC on glxSwapBuffers.
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[Bug 9875] Pixel formats with >8 bits per channel not available via OpenGL although apparently supported by hardware
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[Bug 100189] segfault at 234 error 4 in i915_dri.so
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[Bug 91014] Piglit regression: spec/!OpenGL 1.2/texture-packed-formats
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[Bug 101055] All GL programs segfault: i915_state_derived.c:calculate_vertex_layout: i915->fs == 0
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[Bug 97477] i915g: gl_FragCoord is always (0.0, max_y)
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[Bug 91015] Piglit regression: spec/ARB_occlusion_query2/api
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[Bug 77953] i915 Gallium crashes on 2nd generation i3/5/7 card, and a Weston egl client
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[Bug 91016] Piglit regression: shaders/glsl-floating-constant-120
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[Bug 76044] [i915g+llvm] commit "gallium: Use C11 thread abstractions." breaks memento by conspiracy
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[Bug 51484] [i915g] piglit fbo-srgb fails since 45fc069600ddbfe07a0a0cd5280161a8c7c55dd0
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[Bug 58834] Crash in i915_set_vertex_buffers with kwin
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[Bug 44296] [i915g] SIGSEGV glxcmds.c:1479
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[Bug 44342] [i915g] GPU hang when running Khronos Webgl test suite
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[Bug 44344] [i915g] state_tracker/st_glsl_to_tgsi.cpp:3082:simplify_cmp: Assertion `inst->dst.index < 4096' failed.
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[Bug 43770] [i915g] src/gallium/drivers/i915/i915_fpc_emit.c:153:i915_emit_arith: Assertion `(((dest)>>29)&0x7) != 2' failed.
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[Bug 43769] [i915g] src/gallium/drivers/i915/i915_fpc_translate.c:658:i915_translate_instruction: Assertion `0' failed.
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[Bug 38265] [945gm] gl output in mplayer is wonky
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