v3 is a resend from v2 (https://patchwork.freedesktop.org/series/90693/)
now with dri-devel Cc'ed. Notice that this patch series can be applied
splitting it up through the trees, it's not necessary to apply them
together. The intention is to apply first 3 patches on drm-intel-gt-next
and the
This was done by the following semantic patch:
@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)
@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E
@@ expression dev_priv; expression E; @@
For some reason coccinelle misses a few cases in header files with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
Link:
https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-6-lucas.demar...@intel.com
---
On Mon 24 May 19:01 CDT 2021, Douglas Anderson wrote:
> On its own, this change looks a little strange and doesn't do too much
> useful. To understand why we're doing this we need to look forward to
> future patches where we're going to probe our panel using the new DP
> AUX bus. See the patch
Quoting Bernard Zhao (2021-06-05 05:35:20)
> Unneeded variable: "ret". Return "0" on line 880
But the variable is "rc".
>
> Signed-off-by: Bernard Zhao
> ---
Otherwise
Reviewed-by: Stephen Boyd
Another instance of a report like this here:
https://gitlab.freedesktop.org/drm/nouveau/-/issues/92
On Sat, Jun 5, 2021 at 3:53 PM Ondrej Zary wrote:
>
> Hello,
> I'm testing 5.13.0-rc4 and nouveau crashes with NULL pointer dereference in
> nouveau_bo_sync_for_device.
> Found various reports
On Sat, Jun 05, 2021 at 10:02:05AM +0800, Huacai Chen wrote:
> On Sat, Jun 5, 2021 at 3:56 AM Bjorn Helgaas wrote:
> > On Fri, Jun 04, 2021 at 12:50:03PM +0800, Huacai Chen wrote:
> > > On Thu, Jun 3, 2021 at 2:31 AM Bjorn Helgaas wrote:
> > > > I think the simplest solution, which I suggested
For some reason coccinelle misses a few cases in gt with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 ++--
v3 is a resend from v2 (https://patchwork.freedesktop.org/series/90693/)
now with dri-devel Cc'ed. Notice that this patch series can be applied
splitting it up through the trees, it's not necessary to apply them
together. The intention is to apply first 3 patches on drm-intel-gt-next
and the
This was done by the following semantic patch:
@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)
@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E
@@ expression dev_priv; expression E; @@
For some reason coccinelle misses a few cases in header files with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 37 -
drivers/gpu/drm/i915/i915_reg.h
This was done by the following semantic patch:
@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)
@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E
@@ expression dev_priv; expression E; @@
This was done by the following semantic patch:
@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)
@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E
@@ expression dev_priv; expression E; @@
Hi Linus
Linus Walleij 于2021年6月5日周六 上午7:19写道：
>
> On Tue, Jun 1, 2021 at 11:31 PM Doug Anderson wrote:
>
> > Still hoping that this can work atop DBI so we can avoid the raw SPI
> > writes. You said you're trying for it for v3 so I'm looking forward to
> > checking it out there.
>
> Struggling
Unneeded variable: "ret". Return "0" on line 880
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/msm/dp/dp_panel.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c
b/drivers/gpu/drm/msm/dp/dp_panel.c
index 9cc816663668..8cb3d016101c 100644
remove no need variable, just return the DC_OK
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
NULL check before kvfree functions is not needed.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
NULL check before kvfree functions is not needed.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c
b/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c
index
>> +
>> +maintainers:
>> + - Konrad Dybcio
>> +
>> +description: |+
> Do you need the formatting? If not, drop '|+'.
I'm not sure whether I do, so I guess dropping it is fine.
>> + This panel seems to only be found in SONY Xperia
>> + X, X Performance, X Compact, XZ and XZs
>> +
That was an already known issue and I've just pushed a patch to fix it.
Christian.
Am 05.06.21 um 02:20 schrieb Lucas De Marchi:
Commit 0c6b522abc2a ("dma-buf: cleanup dma-resv shared fence debugging a bit
v2")
turned dma_resv_reset_shared_max() into a function when
CONFIG_DEBUG_MUTEXES is
From: AngeloGioacchino Del Regno
This commit adds support for Synaptics+JDI display panels
used in SONY Xperia X, X Compact, X Performance, XZ and XZs
smartphones.
Due to the nature of phone manufacturing, it is impossible
to retrieve the actual panel names, hence the replacement
ones,
Add bindings for the SONY Synaptics JDI panel used in
Xperia X, X Performance, X Compact, XZ and XZs smartphones.
Due to the nature of phone manufacturing and lack of any docs
whatsoever, replacement names have been used to indicate the
devices that this panel is used on.
Signed-off-by: Konrad
s/than/then/
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 89ebbf363e27..1476236f5c7c 100644
---
From: Piotr Oniszczuk
Currently only linear formats are supported in sun4i-drm driver, but
SoCs like H6 supports AFBC variant of some of them in multiple cores
(GPU, VPU, DE3). Panfrost already implements AFBC compression and is
sometimes confused what should be default choice (linear, AFBC) if
patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Lucas-De-Marchi/dma-buf-fix-build-due-to-missing-export/20210605-082109
base: git://anongit.freedesktop.org/drm/drm-misc for-linux-next
config: arm
On Fri, 04 Jun 2021 16:08:26 +0800,
Christian König wrote:
>
>
>
> Am 04.06.21 um 09:53 schrieb Chen Li:
> > I met a gpu addr bug recently and the kernel log
> > tells me the pc is memcpy/memset and link register is
> > radeon_uvd_resume.
> >
> > As we know, in some architectures, optimized
> From: Dexuan Cui
> Sent: Friday, June 4, 2021 11:17 AM
> > >> ...
> > > I've heard a similar report from Vineeth but we didn't get to the bottom
> > > of this.
> > I have just tried reverting the commit mentioned above and it solves the
> > GUI freeze
> > I was also seeing. Previously, login
Also fix some coding issues reported from sparse.
Signed-off-by: Chen Li
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_uvd.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
changelog:
v1->v2: split sparse and memcp/memset fix
v2->v3: fix coding issue and misuse of le32_to_cpu
v3->v4: merge memcpy_toio's arguments to one line
Chen Li (2):
radeon: fix coding issues reported from sparse
radeon: use memcpy_to/fromio for UVD fw upload
> From: Vineeth Pillai
> Sent: Friday, June 4, 2021 8:47 AM
> To: Wei Liu ; vkuznets
> Cc: Matthew Wilcox ; dri-devel@lists.freedesktop.org;
> linux-hyp...@vger.kernel.org; linux-fb...@vger.kernel.org;
> linux-ker...@vger.kernel.org; Michael Kelley ;
> Dexuan Cui
> Subject: Re: [bug report]
I met a gpu addr bug recently and the kernel log
tells me the pc is memcpy/memset and link register is
radeon_uvd_resume.
As we know, in some architectures, optimized memcpy/memset
may not work well on device memory. Trival memcpy_toio/memset_io
can fix this problem.
BTW, amdgpu has already
Also fix some coding issues reported from sparse.
Signed-off-by: Chen Li
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_uvd.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
I met a gpu addr bug recently and the kernel log
tells me the pc is memcpy/memset and link register is
radeon_uvd_resume.
As we know, in some architectures, optimized memcpy/memset
may not work well on device memory. Trival memcpy_toio/memset_io
can fix this problem.
BTW, amdgpu has already
changelog:
v1->v2: split sparse and memcp/memset fix
v2->v3: fix coding issue and misuse of le32_to_cpu
Chen Li (2):
radeon: fix coding issues reported from sparse
radeon: use memcpy_to/fromio for UVD fw upload
drivers/gpu/drm/radeon/radeon_uvd.c | 30
On Fri, 04 Jun 2021 16:31:28 +0800,
Christian König wrote:
>
>
>
> Am 04.06.21 um 10:28 schrieb Chen Li:
> > On Fri, 04 Jun 2021 16:08:26 +0800,
> > Christian König wrote:
> >>
> >>
> >> Am 04.06.21 um 09:53 schrieb Chen Li:
> >>> I met a gpu addr bug recently and the kernel log
> >>> tells
On 6/4/2021 9:00 AM, Wei Liu wrote:
On Fri, Jun 04, 2021 at 02:25:01PM +0200, Vitaly Kuznetsov wrote:
Hi,
Commit ccf953d8f3d6 ("fb_defio: Remove custom address_space_operations")
seems to be breaking Hyper-V framebuffer
(drivers/video/fbdev/hyperv_fb.c) driver for me: Hyper-V guest boots
Hi,
Sorry to post usage questions here, but I didn't find a better place.
I used libdrm for my wayland based compositor, it generally works but
I've been experiencing hiccups here and there. I have a few questions.
Most of them are generic and one of them is specific.
1. Is there any way to
Add LS7A DC vsync interrupt enable and close function, and
register irq_handler function interface.
Add vbrank event processing flow.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile| 3 +-
drivers/gpu/drm/loongson/loongson_crtc.c | 43 +-
Implement use GPIO and I2C driver to detect connector
and fetch EDID via DDC.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile | 3 +-
drivers/gpu/drm/loongson/loongson_connector.c | 70 -
drivers/gpu/drm/loongson/loongson_drv.c | 16 +-
From: Chenyang Li
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM
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