[TLDR: adding this regression to regzbot; most of this mail is compiled
from a few templates paragraphs some of you might have seen already.]
Hi, this is your Linux kernel regression tracker speaking.
Adding the regression mailing list to the list of recipients, as it
should be in the loop for
This is the format used by the bootloader framebuffer on Apple ARM64
platforms.
Reviewed-by: Thomas Zimmermann
Signed-off-by: Hector Martin
---
drivers/gpu/drm/tiny/simpledrm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tiny/simpledrm.c
Add XRGB emulation support for devices that can only do XRGB2101010.
This is chiefly useful for simpledrm on Apple devices where the
bootloader-provided framebuffer is 10-bit.
Signed-off-by: Hector Martin
---
drivers/gpu/drm/drm_format_helper.c | 62 +
This code is required for both simplefb and simpledrm, so let's move it
into the OF core instead of having it as an ad-hoc initcall in the
drivers.
Signed-off-by: Hector Martin
---
drivers/of/platform.c | 5 +
drivers/video/fbdev/simplefb.c | 21 +
2 files
Hi DRM folks,
This short series makes simpledrm work on Apple M1 (including Pro/Max)
platforms the way simplefb already does, by adding XRGB2101010 support
and making it bind to framebuffers in /chosen the same way simplefb
does.
This avoids breaking the bootloader-provided framebuffer console
Am 07.12.21 um 08:09 schrieb Christian König:
Am 07.12.21 um 02:32 schrieb Bas Nieuwenhuizen:
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
Am 07.12.21 um 08:10 schrieb Lionel Landwerlin:
On 07/12/2021 03:32, Bas Nieuwenhuizen wrote:
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
On 07/12/2021 03:32, Bas Nieuwenhuizen wrote:
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
pretty much useless for all expected uses.
Not 100%
Am 07.12.21 um 02:32 schrieb Bas Nieuwenhuizen:
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
pretty much useless for all expected uses.
Not 100%
On Fri, Dec 03, 2021 at 12:00:59PM -0800, Daniele Ceraolo Spurio wrote:
On 12/2/2021 4:33 PM, Lucas De Marchi wrote:
On Thu, Dec 02, 2021 at 04:06:23PM -0800, john.c.harri...@intel.com
wrote:
From: John Harrison
If the GuC has failed to load for any reason and then the user pokes
the
drm_of_find_panel_or_bridge can lookup panel or bridge for
a given node based on the OF graph port and endpoint and it
fails to use if the given node has a child panel or bridge.
This patch add support to lookup that given node has child
panel or bridge however that child node cannot be a 'port'.
Add of_get_non_port_child() helper that can be used to lookup
non port child nodes.
Some OF graphs don't require 'ports' to represent the next output
instead, it simply adds a child node on a given parent node. This
helper lookup that child node, however that child node is not a
'port' on given
This patch set add support to lookup if child node is panel or bridge
via drm_of_find_panel_or_bridge.
Any inputs?
Jagan.
Jagan Teki (2):
of: Add helper to lookup non port child node
drm: of: Lookup if child node is panel or bridge
drivers/gpu/drm/drm_of.c | 36
Hi
On Mon, Dec 6, 2021 at 4:29 PM Douglas Anderson wrote:
>
> When we added the support for the AUX channel in commit 13afcdd7277e
> ("drm/bridge: parade-ps8640: Add support for AUX channel") we forgot
> to set "drm_dev" to avoid the warning splat at the beginning of
> drm_dp_aux_register().
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
pretty much useless for all expected uses.
Not 100% sure about the transfer to a timeline syncobj but
When we added the support for the AUX channel in commit 13afcdd7277e
("drm/bridge: parade-ps8640: Add support for AUX channel") we forgot
to set "drm_dev" to avoid the warning splat at the beginning of
drm_dp_aux_register(). Since everything was working I guess I never
noticed the splat when
On 12/6/2021 4:21 PM, Dmitry Baryshkov wrote:
On Tue, 7 Dec 2021 at 01:58, Abhinav Kumar wrote:
Hi Dmitry
On 12/6/2021 2:47 PM, Dmitry Baryshkov wrote:
On Mon, 6 Dec 2021 at 23:42, Abhinav Kumar wrote:
On 11/25/2021 4:50 AM, Dmitry Baryshkov wrote:
On 19/10/2021 02:54,
On Tue, 7 Dec 2021 at 01:58, Abhinav Kumar wrote:
>
> Hi Dmitry
>
> On 12/6/2021 2:47 PM, Dmitry Baryshkov wrote:
> > On Mon, 6 Dec 2021 at 23:42, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 11/25/2021 4:50 AM, Dmitry Baryshkov wrote:
> >>> On 19/10/2021 02:54, abhin...@codeaurora.org
Hi Dmitry
On 12/6/2021 2:47 PM, Dmitry Baryshkov wrote:
On Mon, 6 Dec 2021 at 23:42, Abhinav Kumar wrote:
On 11/25/2021 4:50 AM, Dmitry Baryshkov wrote:
On 19/10/2021 02:54, abhin...@codeaurora.org wrote:
On 2021-10-16 07:21, Dmitry Baryshkov wrote:
On Sat, 16 Oct 2021 at 01:25, wrote:
On Mon, 6 Dec 2021 at 23:42, Abhinav Kumar wrote:
>
>
>
> On 11/25/2021 4:50 AM, Dmitry Baryshkov wrote:
> > On 19/10/2021 02:54, abhin...@codeaurora.org wrote:
> >> On 2021-10-16 07:21, Dmitry Baryshkov wrote:
> >>> On Sat, 16 Oct 2021 at 01:25, wrote:
>
> Hi Dmitry
>
> On
On Thu 07 Oct 03:17 PDT 2021, Heikki Krogerus wrote:
> On Wed, Oct 06, 2021 at 01:26:35PM -0700, Prashant Malani wrote:
> > (CC+ Heikki)
[..]
> > On Wed, Oct 6, 2021 at 8:19 AM Doug Anderson wrote:
[..]
> void drm_connector_oob_hotplug_event(struct fwnode_handle
> *connector_fwnode);
>
On 12/3/2021 10:33 AM, john.c.harri...@intel.com wrote:
From: John Harrison
It is possible for platforms to require GuC but not HuC firmware.
Also, the firmware versions for GuC and HuC advance independently. So
split the macros up to allow the lists to be maintained separately.
Convert into YAML format into format, which can be validated.
Changes:
- drop panel from example
Signed-off-by: David Heidelberg
---
.../display/rockchip/dw_mipi_dsi_rockchip.txt | 93
.../rockchip/rockchip,dw-mipi-dsi.yaml| 200 ++
2 files changed, 200
From: Philip Chen
[ Upstream commit cd92cc187c053ab010a1570e2d61d68394a5c725 ]
If "data_lanes" property of the dsi output endpoint is missing in
the DT, num_data_lanes would be 0 by default, which could cause
dsi_host_attach() to fail if dsi->lanes is set to a non-zero value
by the bridge
From: Philip Chen
[ Upstream commit cd92cc187c053ab010a1570e2d61d68394a5c725 ]
If "data_lanes" property of the dsi output endpoint is missing in
the DT, num_data_lanes would be 0 by default, which could cause
dsi_host_attach() to fail if dsi->lanes is set to a non-zero value
by the bridge
From: Perry Yuan
[ Upstream commit 2da34b7bb59e1caa9a336e0e20a76b8b6a4abea2 ]
[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI
From: Mustapha Ghaddar
[ Upstream commit 5ceaebcda9061c04f439c93961f0819878365c0f ]
[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.
[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should
From: Philip Chen
[ Upstream commit cd92cc187c053ab010a1570e2d61d68394a5c725 ]
If "data_lanes" property of the dsi output endpoint is missing in
the DT, num_data_lanes would be 0 by default, which could cause
dsi_host_attach() to fail if dsi->lanes is set to a non-zero value
by the bridge
From: Perry Yuan
[ Upstream commit 2da34b7bb59e1caa9a336e0e20a76b8b6a4abea2 ]
[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI
From: Mustapha Ghaddar
[ Upstream commit 5ceaebcda9061c04f439c93961f0819878365c0f ]
[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.
[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should
From: Philip Chen
[ Upstream commit cd92cc187c053ab010a1570e2d61d68394a5c725 ]
If "data_lanes" property of the dsi output endpoint is missing in
the DT, num_data_lanes would be 0 by default, which could cause
dsi_host_attach() to fail if dsi->lanes is set to a non-zero value
by the bridge
From: Philip Yang
[ Upstream commit 3abfe30d803e62cc75dec254eefab3b04d69219b ]
process_info->lock is used to protect kfd_bo_list, vm_list_head, n_vms
and userptr valid/inval list, svm_range_restore_work and
svm_range_set_attr don't access those, so do not need to take
process_info lock. This
From: Philip Yang
[ Upstream commit 494f2e42ce4a9ddffb5d8c5b2db816425ef90397 ]
drm_gem_object_put calls release_notify callback to free the mem
structure and unreserve_mem_limit, move it down after the last access
of mem and make it conditional call.
Signed-off-by: Philip Yang
Reviewed-by:
From: Perry Yuan
[ Upstream commit 2da34b7bb59e1caa9a336e0e20a76b8b6a4abea2 ]
[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI
From: Mustapha Ghaddar
[ Upstream commit 5ceaebcda9061c04f439c93961f0819878365c0f ]
[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.
[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should
From: Flora Cui
[ Upstream commit 1053b9c948e614473819a1a5bcaff6d44e680dcf ]
since vkms support atomic KMS interface
Signed-off-by: Flora Cui
Reviewed-by: Guchun Chen
Acked-by: Alex Deucher
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Flora Cui
[ Upstream commit 3e467e478ed3a9701bb588d648d6e0ccb82ced09 ]
Signed-off-by: Flora Cui
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
From: Douglas Anderson
[ Upstream commit d03fcc1de0863b1188ceb867cfa84a578fdc96bc ]
If you happened to try to access `/dev/drm_dp_aux` devices provided by
the MSM DP AUX driver too early at bootup you could go boom. Let's
avoid that by only allowing AUX transfers when the controller is
powered
From: Philip Chen
[ Upstream commit cd92cc187c053ab010a1570e2d61d68394a5c725 ]
If "data_lanes" property of the dsi output endpoint is missing in
the DT, num_data_lanes would be 0 by default, which could cause
dsi_host_attach() to fail if dsi->lanes is set to a non-zero value
by the bridge
From: Akhil P Oommen
[ Upstream commit 9ba873e66ed317a1ff645d5e52c2e72597ff3d18 ]
Avoid a possible uninitialized use of gpu_scid variable to fix the
below smatch warning:
drivers/gpu/drm/msm/adreno/a6xx_gpu.c:1480 a6xx_llc_activate()
error: uninitialized symbol 'gpu_scid'.
From: Akhil P Oommen
[ Upstream commit 26d776fd0f79f093a5d0ce1a4c7c7a992bc3264c ]
Fix the below null pointer dereference in msm_ioctl_gem_submit():
26545.260705: Call trace:
26545.263223:kref_put+0x1c/0x60
26545.266452:msm_ioctl_gem_submit+0x254/0x744
26545.270937:
On 11/25/2021 4:50 AM, Dmitry Baryshkov wrote:
On 19/10/2021 02:54, abhin...@codeaurora.org wrote:
On 2021-10-16 07:21, Dmitry Baryshkov wrote:
On Sat, 16 Oct 2021 at 01:25, wrote:
Hi Dmitry
On 2021-10-14 17:11, Dmitry Baryshkov wrote:
> Merge old hdmi_bridge and hdmi_connector
On 12/6/21 19:01, Dave Stevenson wrote:
Hi Marek
Hi,
The TC358767/TC358867/TC9595 are all capable of operating either from
attached Xtal or from DSI clock lane clock. In case the later is used,
all I2C accesses will fail until the DSI clock lane is running and
supplying clock to the chip.
On 11/11/2021 13:20, Matthew Brost wrote:
A weak implementation of parallel submission (multi-bb execbuf IOCTL) for
execlists. Doing as little as possible to support this interface for
execlists - basically just passing submit fences between each request
generated and virtual engines are not
On 11/29/2021 9:04 AM, Kuogee Hsieh wrote:
Currently the msm_dp_*** functions implement the same sequence which would
happen when drm_bridge is used. hence get rid of this intermediate layer
and align with the drm_bridge usage to avoid customized implementation.
Signed-off-by: Kuogee Hsieh
Device Coherent type uses device memory that is coherently accesible by
the CPU. This could be shown as SP (special purpose) memory range
at the BIOS-e820 memory enumeration. If no SP memory is supported in
system, this could be faked by setting CONFIG_EFI_FAKE_MEMMAP.
Currently, test_hmm only
Add two more parameters to set spm_addr_dev0 & spm_addr_dev1
addresses. These two parameters configure the start SP
addresses for each device in test_hmm driver.
Consequently, this configures zone device type as coherent.
Signed-off-by: Alex Sierra
---
v2:
Add more mknods for device coherent
Test cases such as migrate_fault and migrate_multiple, were modified to
explicit migrate from device to sys memory without the need of page
faults, when using device coherent type.
Snapshot test case updated to read memory device type first and based
on that, get the proper returned results
The intention is to test device coherent type pages that have been
called through get user pages with PIN_LONGTERM flag set.
Signed-off-by: Alex Sierra
---
tools/testing/selftests/vm/Makefile| 2 +-
tools/testing/selftests/vm/hmm-tests.c | 81 ++
2 files changed, 82
Avoid long term pinning for Coherent device type pages. This could
interfere with their own device memory manager.
If caller tries to get user device coherent pages with PIN_LONGTERM flag
set, those pages will be migrated back to system memory.
Signed-off-by: Alex Sierra
---
mm/gup.c | 32
new ioctl cmd added to query zone device type. This will be
used once the test_hmm adds zone device coherent type.
Signed-off-by: Alex Sierra
---
lib/test_hmm.c | 14 ++
lib/test_hmm_uapi.h | 8
2 files changed, 22 insertions(+)
diff --git a/lib/test_hmm.c
Coherent device type memory on VRAM to RAM migration, has similar access
as System RAM from the CPU. This flag sets the source from the sender.
Which in Coherent type case, should be set as
MIGRATE_VMA_SELECT_DEVICE_COHERENT.
Signed-off-by: Alex Sierra
Reviewed-by: Felix Kuehling
---
When CPU is connected throug XGMI, it has coherent
access to VRAM resource. In this case that resource
is taken from a table in the device gmc aperture base.
This resource is used along with the device type, which could
be DEVICE_PRIVATE or DEVICE_COHERENT to create the device
page map region.
In order to configure device coherent in test_hmm, two module parameters
should be passed, which correspond to the SP start address of each
device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed,
private device type is configured.
Signed-off-by: Alex Sierra
---
lib/test_hmm.c
This patch series introduces MEMORY_DEVICE_COHERENT, a type of memory
owned by a device that can be mapped into CPU page tables like
MEMORY_DEVICE_GENERIC and can also be migrated like
MEMORY_DEVICE_PRIVATE.
Christoph, the suggestion to incorporate Ralph Campbell???s refcount
cleanup patch into
Device memory that is cache coherent from device and CPU point of view.
This is used on platforms that have an advanced system bus (like CAPI
or CXL). Any page of a process can be migrated to such memory. However,
no one should be allowed to pin such memory so that it can always be
evicted.
This case is used to migrate pages from device memory, back to system
memory. Device coherent type memory is cache coherent from device and CPU
point of view.
Signed-off-by: Alex Sierra
---
v2:
condition added when migrations from device coherent pages.
---
include/linux/migrate.h | 1 +
On 04.12.21 17:40, Stefan Fritsch wrote:
> Hi,
>
> when updating from 5.14 to 5.15 on a system with NVIDIA GP108 [GeForce
> GT 1030] (NV138) and Ryzen 9 3900XT using kde/plasma on X (not wayland),
> there is a regression: There is now some annoying black flickering in
> some applications, for
Hi Marek
On Sat, 27 Nov 2021 at 03:24, Marek Vasut wrote:
>
> The TC358767/TC358867/TC9595 are all capable of operating either from
> attached Xtal or from DSI clock lane clock. In case the later is used,
> all I2C accesses will fail until the DSI clock lane is running and
> supplying clock to
Hi Robin,
Thanks for the feedback.
> Subject: Re: [PATCH v2 1/3] dt-bindings: gpu: mali-bifrost: Document
> RZ/G2L support
>
> On 2021-12-06 15:00, Biju Das wrote:
> > The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31
> > GPU, add a compatible string for it.
> >
> >
From: Zack Rusin
Using MOBFMT_RANGE in the early days of guest backed objects was a major
performance win but that has changed a lot since. There's no more
a performance reason to use MOBFMT_RANGE. The device can/will still
profit from the pages being contiguous but marking them as MOBFMT_RANGE
From: Roland Scheidegger
This adds support for the
SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET commands (which
only update
the offset, but don't rebind the buffer), which saves some overhead.
Signed-off-by: Roland Scheidegger
Reviewed-by: Charmaine Lee
Reviewed-by: Martin
/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -54,9 +54,9 @@
#define VMWGFX_DRIVER_NAME "vmwgfx"
-#define VMWGFX_DRIVER_DATE "20210722"
-#define VMWGFX_DRIVER_MAJOR 2
-#define VMWGFX_DRIVER_MINOR 19
+#define VMWGFX_DRIVER_DATE "20211206"
+#define VMWGFX_DRIVER_MAJOR 3
From: Zack Rusin
To make sure we're running on top of hardware that can support
GL4.3 we need to add a way of querying for those capabilities.
DRM_VMW_PARAM_GL43 allows userspace to check for presence of
GL4.3 capable contexts.
Signed-off-by: Zack Rusin
Reviewed-by: Charmaine Lee
---
From: Roland Scheidegger
This is going to be required for setting the sample count when
rendering with no attachments.
Also cleans up view handling (should fix depthstencil_v2).
Reviewed-by: Charmaine Lee
Signed-off-by: Roland Scheidegger
Signed-off-by: Zack Rusin
---
From: Zack Rusin
If the host supports SVGA3D_DEVCAP_GL43, we can handle 64 instead of
just 8 UAVs.
Based on a patch from Roland Scheidegger .
Signed-off-by: Roland Scheidegger
Signed-off-by: Zack Rusin
---
drivers/gpu/drm/vmwgfx/vmwgfx_binding.c | 4 ++--
From: Zack Rusin
This is initial change adding support for DRIVER_GEM to vmwgfx. vmwgfx
was written before GEM and has always used TTM. Over the years the
TTM buffers started inherting from GEM objects but vmwgfx never
implemented GEM making it quite awkward. We were directly setting
variables
From: Zack Rusin
The fb handle code assumes it deals with GEM objects. Because vmwgfx
buffer objects were not actually GEM objects we were not able to
implement that interface. Now that vmwgfx supports GEM buffer objects
we can trivially implement create_handle for buffer object backed
From: Zack Rusin
Update the headers for GL43 userspace works that landed in Mesa3D. Also
update the license headers to conform to the kernel guidelines.
For GL43 the virtual device got D3D11.1 support with some GL extensions.
Signed-off-by: Zack Rusin
---
From: Zack Rusin
vmwgfx shared very elaborate memory accounting with ttm. It was moved
from ttm to vmwgfx in change
f07069da6b4c ("drm/ttm: move memory accounting into vmwgfx v4")
but because of complexity it was hard to maintain. Some parts of the code
weren't freeing memory correctly and some
From: Zack Rusin
Instead of hardcoding the VMware's PCI ID the code should be using the
public define for it. There's no functional change, it just makes
it obvious what we're dealing with.
Signed-off-by: Zack Rusin
Reviewed-by: Martin Krastev
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 4 ++--
From: Zack Rusin
Mob/GMR id resource manager was lacking the debug print callback
which meant that during memory errors we weren't getting the details
which are needed to fix those errors.
Kernel logs need to contain the information about used/max pages
by the Mob/GMR id resource manager as
From: Zack Rusin
This series lays the groundwork for adding GEM support across vmwgfx an
implements features missing for GL4.3.
It fixes a lot of broken userspace code which was assuming GEM objects
coming via the "dumb"
On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
wrote:
>
> Big delta, but boils down to moving set_pages to i915_vma.c, and removing
> the special handling, all callers use the defaults anyway. We only remap
> in ggtt, so default case will fall through.
>
> Because we still don't require locking
On 2021-12-06 15:00, Biju Das wrote:
The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31 GPU,
add a compatible string for it.
Signed-off-by: Biju Das
Reviewed-by: Lad Prabhakar
---
v1->v2:
* Updated minItems for resets as 2
* Documented optional property reset-names
*
On Mon, 6 Dec 2021 at 15:18, Maarten Lankhorst
wrote:
>
> On 06-12-2021 14:13, Matthew Auld wrote:
> > On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
> > wrote:
> >> Big delta, but boils down to moving set_pages to i915_vma.c, and removing
> >> the special handling, all callers use the defaults
Changes in v2:
-- move "qcom,sc7280-dp" before "qcom,sc7280-edp"
Signed-off-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
Reviewed by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
/pinchartl/media.git tags/du-next-20211206
for you to fetch changes up to 155358310f013c23c2e5533e007afc7310c9a964:
drm: rcar-du: Add R-Car DSI driver (2021-12-06 18:19:49 +0200)
R-Car DU updates:
- DSI output support
- Misc fixes
Den 06.12.2021 16.26, skrev David Lechner:
> On 12/1/21 8:52 AM, Maxime Ripard wrote:
>> Hi Noralf,
>>
>> On Tue, Nov 30, 2021 at 03:30:11PM +0100, Noralf Trønnes wrote:
>>> Den 29.11.2021 10.39, skrev Maxime Ripard:
On Wed, Nov 24, 2021 at 04:03:07PM -0600, David Lechner wrote:
> On
Den 06.12.2021 16.19, skrev David Lechner:
> On 11/24/21 9:07 AM, Noralf Trønnes wrote:
>> The datasheet lists the minimum Serial clock cycle (Write) as 66ns
>> which is
>
> Is this supposed to say "maximum" rather than "minimum"?
>
Minimum cycle time == maximum frequency.
Noralf.
>>
Quoting Laurent Pinchart (2021-12-06 14:06:01)
> When iterating over hsfreqrange_table, rcar_mipi_dsi_parameters_calc()
> may dereference the sentinel table entry. Fix the loop condition to
> break as soon as a suitable entry is found, defined by the lower bound
> of the frequency range stored in
On 12/1/21 8:52 AM, Maxime Ripard wrote:
Hi Noralf,
On Tue, Nov 30, 2021 at 03:30:11PM +0100, Noralf Trønnes wrote:
Den 29.11.2021 10.39, skrev Maxime Ripard:
On Wed, Nov 24, 2021 at 04:03:07PM -0600, David Lechner wrote:
On 11/24/21 9:07 AM, Noralf Trønnes wrote:
I agree that it doesn't
On 11/24/21 9:07 AM, Noralf Trønnes wrote:
The datasheet lists the minimum Serial clock cycle (Write) as 66ns which is
Is this supposed to say "maximum" rather than "minimum"?
15MHz. Mostly it can do much better than that and is in fact often run at
32MHz. With a clever driver that runs
On 11/24/21 9:07 AM, Noralf Trønnes wrote:
There are other ways than using a gpio to reset the controller so make
this property optional.
Signed-off-by: Noralf Trønnes
---
Acked-by: David Lechner
On 11/24/21 9:07 AM, Noralf Trønnes wrote:
The backlight property was lost during conversion to yaml in commit
abdd9e3705c8 ("dt-bindings: display: sitronix,st7735r: Convert to DT schema").
Put it back.
Fixes: abdd9e3705c8 ("dt-bindings: display: sitronix,st7735r: Convert to DT
schema")
On 06-12-2021 14:13, Matthew Auld wrote:
> On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
> wrote:
>> Big delta, but boils down to moving set_pages to i915_vma.c, and removing
>> the special handling, all callers use the defaults anyway. We only remap
>> in ggtt, so default case will fall
On 06/12/2021 14:49, Daniel Stone wrote:
Hi Matthew,
On Mon, 6 Dec 2021 at 13:32, Matthew Auld wrote:
Enable accelerated moves and clearing on DG2. On such HW we have minimum page
size restrictions when accessing LMEM from the GTT, where we now have to use 64K
GTT pages or larger. With the
The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31 GPU,
add a compatible string for it.
Signed-off-by: Biju Das
Reviewed-by: Lad Prabhakar
---
v1->v2:
* Updated minItems for resets as 2
* Documented optional property reset-names
* Documented reset-names as required
RZ/G2L SoC embeds Mali-G31 bifrost GPU.
This patch series aims to add support for the same
It is tested with latest drm-misc-next + mesa 21.3.0 +
out of tree patch for (du + DSI) +
platfrom mesa configuration for RZ/G2L.
Tested the kmscube application.
test logs:-
root@smarc-rzg2l:~# kmscube
Hi Matthew,
On Mon, 6 Dec 2021 at 13:32, Matthew Auld wrote:
> Enable accelerated moves and clearing on DG2. On such HW we have minimum page
> size restrictions when accessing LMEM from the GTT, where we now have to use
> 64K
> GTT pages or larger. With the ppGTT the page-table also has a
On Mon, Dec 06, 2021 at 12:16:24PM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 06.12.21 um 11:42 schrieb Dan Carpenter:
> > On Tue, Nov 30, 2021 at 10:52:55AM +0100, Thomas Zimmermann wrote:
> > > GEM helper libraries use struct drm_driver.gem_create_object to let
> > > drivers override GEM
Hi
Am 06.12.21 um 14:47 schrieb Yannick Fertre:
In case of using simplefb or another conflicting framebuffer,
call drm_aperture_remove_framebuffers() to remove memory allocated.
Signed-off-by: Yannick Fertre
The patch should have contained a note that this is version 2 of the
change with a
When iterating over hsfreqrange_table, rcar_mipi_dsi_parameters_calc()
may dereference the sentinel table entry. Fix the loop condition to
break as soon as a suitable entry is found, defined by the lower bound
of the frequency range stored in the table being equal to or higher than
the target
Hi Thomas,
url:
https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/ast-Fix-I2C-corner-cases-wrt-init-cleanup/20211201-233308
base: 6a8f90ec433e2f5de5fc16d7a4839771b7027cc0
config: i386-randconfig-m021-20211203
On Mon, Dec 06, 2021 at 01:33:36PM +0100, Hans Verkuil wrote:
> I think it might be easiest if it is all going through the media subsystem
> (except for the dts patches, we don't handle those unless specifically
> requested to do so). I need a resend for jpeg bindings txt to yaml
> conversion
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 4/6] dt-bindings: gpu: mali-bifrost: Document RZ/G2L
> support
>
> Hi Biju,
>
> On Fri, Dec 3, 2021 at 12:52 PM Biju Das
> wrote:
> > The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31
> > GPU, add a compatible string
In case of using simplefb or another conflicting framebuffer,
call drm_aperture_remove_framebuffers() to remove memory allocated.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/drv.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/stm/drv.c
Hi Thomas,
On 12/3/21 10:35 AM, Thomas Zimmermann wrote:
Hi
Am 03.12.21 um 09:55 schrieb Yannick Fertre:
In case of using simplefb or another conflicting framebuffer,
call drm_aperture_remove_framebuffers() to remove memory allocated.
Signed-off-by: Yannick Fertre
---
Thanks Thorsten for CCing me on your reply.
I was somehow not CCed on the original problem report.
Am 06.12.21 um 14:19 schrieb Thorsten Leemhuis:
[SNIP]
On 04.12.21 17:40, Stefan Fritsch wrote:
Hi,
when updating from 5.14 to 5.15 on a system with NVIDIA GP108 [GeForce
GT 1030] (NV138) and
This is all kinds of awkward since we now have to contend with using 64K
GTT pages when mapping anything in LMEM(including the page-tables
themselves).
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 189 +++-
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