Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
v1 ->
2016-10-21 19:14 GMT+02:00 Bartosz Golaszewski :
> Revision 1 of the IP doesn't work if we don't load the palette (even
> if it's not used, which is the case for the RGB565 format).
>
> Add a function called from tilcdc_crtc_enable() which performs all
> required actions i
2016-10-21 19:14 GMT+02:00 Bartosz Golaszewski :
> Revision 1 of the IP doesn't work if we don't load the palette (even
> if it's not used, which is the case for the RGB565 format).
>
> Add a function called from tilcdc_crtc_enable() which performs all
> required actions i
Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
v1 ->
2016-10-24 10:43 GMT+02:00 Bartosz Golaszewski :
> Revision 1 of the IP doesn't work if we don't load the palette (even
> if it's not used, which is the case for the RGB565 format).
>
> Add a function called from tilcdc_crtc_enable() which performs all
> required actions i
2016-10-24 11:25 GMT+02:00 Jyri Sarha :
> On 10/24/16 11:43, Bartosz Golaszewski wrote:
>> Revision 1 of the IP doesn't work if we don't load the palette (even
>> if it's not used, which is the case for the RGB565 format).
>>
>> Add a function called from tilcdc_crtc_
Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
v1 ->
2016-10-24 11:13 GMT+02:00 Bartosz Golaszewski :
> Revision 1 of the IP doesn't work if we don't load the palette (even
> if it's not used, which is the case for the RGB565 format).
>
> Add a function called from tilcdc_crtc_enable() which performs all
> required actions i
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8
://lkml.org/lkml/2016/10/17/613
Bartosz Golaszewski (1):
ARM: memory: da8xx-ddrctl: new driver
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8 +
drivers/memory/Makefile| 1 +
drivers/memory/da8xx
2016-10-24 19:00 GMT+02:00 Mark Rutland :
> On Mon, Oct 24, 2016 at 06:46:36PM +0200, Bartosz Golaszewski wrote:
>> +
>> + dev = >dev;
>> + node = dev->of_node;
>> +
>> + /* Find the board name. */
>> + for (parent
ice, not the
driver's functionalities
- switched to using of_machine_is_compatible() instead of handcoding
the same functionality
- used platform_get_resource() instead of ioremapping registers by hand
Bartosz Golaszewski (1):
ARM: memory: da8xx-ddrctl: new driver
.../memory-controllers/ti-da
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8
be straightforward in the
future.
Tested on a da850-lcdk with a display connected over VGA and some
additional work on the tilcdc driver.
NOTE I'm sending this as v1, but it's a follow-up to a series I sent
previously and the RFC with the ddrctl driver. I dropped the dt patch
for now.
Bartosz Golaszewski
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8
Create the driver for the da8xx master peripheral priority
configuration and implement support for writing to the three
Master Priority registers on da850 SoCs.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/bus/ti,da850-mstpri.txt| 20 ++
drivers/bus/Kconfig
2016-10-31 5:30 GMT+01:00 Rob Herring :
> On Wed, Oct 26, 2016 at 07:35:55PM +0200, Bartosz Golaszewski wrote:
>> Create the driver for the da8xx master peripheral priority
>> configuration and implement support for writing to the three
>> Master Priority registers on da850 S
2016-10-31 10:52 GMT+01:00 Sekhar Nori :
> Hi Bartosz,
>
> On Monday 31 October 2016 03:10 PM, Bartosz Golaszewski wrote:
>> 2016-10-31 5:30 GMT+01:00 Rob Herring :
>>> On Wed, Oct 26, 2016 at 07:35:55PM +0200, Bartosz Golaszewski wrote:
>>>> Create the dr
ync lost bit in case of a sync lost
error due to insufficient bandwidth
Bartosz Golaszewski (2):
drm: tilcdc: implement palette loading for rev1
drm: tilcdc: clear the sync lost bit in crtc isr
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 138 +++
drivers/gp
Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
drivers
the input FIFO in the
DMA controller unless a sync lost flood is detected in which case
disable the interrupt.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 50 ++--
drivers/gpu/drm/tilcdc/tilcdc_regs.h | 1 +
2 files changed, 37
adl()/writel() instead of __raw_** versions
- used resource_size() instead of calculating the size by hand
- used ioremap instead of syscon in patch [2/5]
- added the DT nodes in patches [3/5]-[5/5]
Bartosz Golaszewski (5):
ARM: memory: da8xx-ddrctl: new driver
ARM: bus: da8xx-mstpri: new driver
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8
Create the driver for the da8xx master peripheral priority
configuration and implement support for writing to the three
Master Priority registers on da850 SoCs.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/bus/ti,da850-mstpri.txt| 20 ++
drivers/bus/Kconfig
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
) resolutions.
Once the drm bridge support is complete, we'll remove the node added
by this patch and use the correct solution. This change will be
transparent for the user.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850-lcdk.dts | 63
1 file changed
Enable the MSTPRI configuration and DDR2/mDDR memory controller
nodes on da850-lcdk. This is needed in order to adjust the memory
throughput constraints for better tilcdc support.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850-lcdk.dts | 8
1 file changed, 8 insertions
Due to some potential tweaks for the da850 LCDC (for example: the
required memory bandwith settings) we need a separate compatible
for the IP present on the da850 boards.
Suggested-by: Sekhar Nori
Signed-off-by: Bartosz Golaszewski
---
v1 -> v2:
- added the new compatible to the bindi
2016-10-01 11:30 GMT+02:00 Sekhar Nori :
> On Friday 30 September 2016 07:22 PM, Bartosz Golaszewski wrote:
>> Due to some potential tweaks for the da850 LCDC (for example: the
>> required memory bandwith settings) we need a separate compatible
>> for the IP presen
After discussing the matter with Laurent Pinchart it turned out that
using ti,tilcdc,panel was wrong and we should go with the new
simple-vga-dac driver proposed by Maxime Ripard and currently being
reviewed.
The da850-lcdk board on which I'm working has a THS8135 video DAC for
which the new
From: Karl Beldan <kbel...@baylibre.com>
This is required for tilcdc to be able to acquire a functional clock
on da850 SoCs.
Signed-off-by: Karl Beldan
[Bartosz:
- added the commit description
- changed the compatible string to 'ti,da850-tilcdc']
Signed-off-by: Bartosz Golas
ecific compatible string
- removed the tilcdc,panel node
- moved the pins definitions to da850.dtsi as suggested by
Sekhar Nori (was in: da850-lcdk.dts)]
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 29 +
1 file changed, 29 insertions(+)
2016-10-15 19:42 GMT+02:00 Sekhar Nori :
> On Wednesday 05 October 2016 06:35 PM, Bartosz Golaszewski wrote:
>> From: Karl Beldan
>>
>> Add pins used by the LCD controller and a disabled LCDC node to be
>> reused in device trees including da850.dtsi.
>>
>>
2016-10-17 9:12 GMT+02:00 Sekhar Nori :
> On Monday 17 October 2016 11:26 AM, Tomi Valkeinen wrote:
>> On 15/10/16 20:42, Sekhar Nori wrote:
>>
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index f79e1b9..32908ae 100644
--- a/arch/arm/boot/dts/da850.dtsi
2016-10-17 14:29 GMT+02:00 Tomi Valkeinen :
> On 17/10/16 14:40, Laurent Pinchart wrote:
>> Hello,
>>
>> On Monday 17 Oct 2016 10:33:58 Tomi Valkeinen wrote:
>>> On 17/10/16 10:12, Sekhar Nori wrote:
On Monday 17 October 2016 11:26 AM, Tomi Valkeinen wrote:
> On 15/10/16 20:42, Sekhar
priorities, but doesn't know about other syscfg registers yet.
Potential extensions of these drivers should be straightforward in the
future.
The last patch adds disabled nodes for the above drivers to da850.dtsi.
Tested on a da850-lcdk with a display connected over VGA.
Bartosz Golaszewski (3
Add the nodes for the System Configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 25 +++
drivers/memory/Kconfig | 8
Create the driver for the da8xx System Configuration and implement
support for writing to the three Master Priority registers.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/bus/ti,da850-syscfg.txt| 63 +++
drivers/bus/Kconfig| 8
2016-10-18 22:49 GMT+02:00 Laurent Pinchart :
> Hi Bartosz,
>
> Thank you for the patch.
>
> On Monday 17 Oct 2016 18:30:49 Bartosz Golaszewski wrote:
>> Create the driver for the da8xx System Configuration and implement
>> support for writing to the three Master Prior
Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
drivers
.
Tested with a da850-lcdk with an LCD display connected over VGA.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu
+ Sekhar
2016-09-28 13:19 GMT+02:00 Tomi Valkeinen :
> Hi,
>
> On 27/09/16 18:29, Bartosz Golaszewski wrote:
>> Some architectures don't use the common clock framework and don't
>> implement all the clk interfaces for every clock. This is the case
>> for da850-lcdk wher
.
Tested with a da850-lcdk with an LCD display connected over VGA.
Signed-off-by: Bartosz Golaszewski
---
v1 -> v2:
- rebased on top of current drm-next
- removed unnecessary error messages
- removed an extra newline
- added a warning if the effective pixel clock rate differs much f
2016-09-29 9:55 GMT+02:00 Jyri Sarha :
> On 09/28/16 15:41, Bartosz Golaszewski wrote:
>> Some architectures don't use the common clock framework and don't
>> implement all the clk interfaces for every clock. This is the case
>> for da850-lcdk where clk_set_rate() only wo
.
Tested with a da850-lcdk with an LCD display connected over VGA.
Signed-off-by: Bartosz Golaszewski
---
v1 -> v2:
- rebased on top of current drm-next
- removed unnecessary error messages
- removed an extra newline
- added a warning if the effective pixel clock rate differs much f
Due to some potential tweaks for the da850 LCDC (for example: the
required memory bandwith settings) we need a separate compatible
for the IP present on the da850 boards.
Suggested-by: Sekhar Nori
Signed-off-by: Bartosz Golaszewski
---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 +
1 file changed
Due to some potential tweaks for the da850 LCDC (for example: the
required memory bandwith settings) we need a separate compatible
for the IP present on the da850 boards.
Suggested-by: Sekhar Nori
Signed-off-by: Bartosz Golaszewski
---
v1 -> v2:
- added the new compatible to the bindi
2016-09-30 15:00 GMT+02:00 Bartosz Golaszewski :
> Due to some potential tweaks for the da850 LCDC (for example: the
> required memory bandwith settings) we need a separate compatible
> for the IP present on the da850 boards.
>
> Suggested-by: Sekhar Nori
> Signed-off-by: B
2016-11-25 10:13 GMT+01:00 Bartosz Golaszewski :
> This enables the dumb-vga-dac driver by default for davinci boards.
>
> The driver is needed for tilcdc support on da850-lcdk board.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> arch/arm/configs/davinci_all_defconfig | 2
since the last iteration to not disable the added
nodes. Also: the patch enabling the nodes in da850-lcdk.dts has been
dropped too.
The second patch updates the davinci defconfig.
Bartosz Golaszewski (2):
ARM: dts: da850: add the mstpri and ddrctl nodes
ARM: davinci_all_defconfig: enable
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index
With the da8xx memory controller and master peripheral priority
drivers merged and corresponding device tree changes in place we can
now enable appropriate options by default.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/configs/davinci_all_defconfig | 2 ++
1 file changed, 2 insertions
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski
---
v1 -> v2:
- moved the priority controller node above the cfgchip node
- renamed added nodes to better reflect their purpose
arch/arm/boot/dts/da850.dtsi
correctly retrieved from
the display.
Could you take a look at my DT[1] and see if you find it correct?
Best regards,
Bartosz Golaszewski
[1] http://pastebin.com/dfUX7PyL
2016-11-15 21:46 GMT+01:00 Jyri Sarha :
> On 11/15/16 19:36, Bartosz Golaszewski wrote:
>> 2016-11-14 17:54 GMT+01:00 Jyri Sarha :
>>> Adds drm bride support for attaching drm bridge drivers to tilcdc. The
>>> decision whether a video port leads to an external encoder o
2016-10-31 17:05 GMT+01:00 Jyri Sarha :
> On 10/31/16 16:19, Bartosz Golaszewski wrote:
>> Revision 1 of the IP doesn't work if we don't load the palette (even
>> if it's not used, which is the case for the RGB565 format).
>>
>> Add a function called from tilcdc_crtc_
Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
v1 ->
These patches are inspired by this series form Bartosz Golaszewski:
> https://www.spinics.net/lists/arm-kernel/msg539629.html
>
> The patches are based on drm-next plus the earlier patches that I plan
> to send in a pull request for 4.10. The base + these patches are
> pushed here:
>
2016-11-16 19:00 GMT+01:00 Jyri Sarha :
> On 11/16/16 17:18, Bartosz Golaszewski wrote:
>> 2016-11-16 13:40 GMT+01:00 Jyri Sarha :
>>> Changes since first version of the series:
>>>
>>> - Move tilcdc_regs.h changes from "drm/tilcdc: Enable palette loadi
2016-11-17 21:06 GMT+01:00 Jyri Sarha :
> On 11/17/16 13:31, Bartosz Golaszewski wrote:
>> 2016-11-16 19:00 GMT+01:00 Jyri Sarha :
>>> On 11/16/16 17:18, Bartosz Golaszewski wrote:
>>>> 2016-11-16 13:40 GMT+01:00 Jyri Sarha :
>>>>> Changes since fi
queue_work(system_wq,
> + _crtc->recover_work);
> + tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
> +LCDC_SYNC_LOST);
> + tilcdc_crtc->sync_lost_count = 0;
> + }
> + }
The SYNC_LOST bit still needs clearing here - otherwise the flood
never stops even after recovery work completes.
Thanks,
Bartosz Golaszewski
(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, dma_fb_ceiling);
> - tilcdc_write(dev, LCDC_RASTER_CTRL_REG, raster_ctl);
> }
>
Hi Jyri,
I don't know exactly why, but not restoring the RASTER CTRL register
here messes up simple modetest - the image is shifted vertically. The
rest of the patch seems fine.
Thanks,
Bartosz Golaszewski
2016-11-18 16:34 GMT+01:00 Bartosz Golaszewski :
> 2016-11-16 13:41 GMT+01:00 Jyri Sarha :
>> Load palette at the end of mode_set_nofb() and only if the palette has
>> not been loaded since last runtime resume. Moving the palette loading
>> to mode_set_nofb() saves us from
---
I'm not sure yet of the exact error path, but with this patch
tilcdc_crtc_destroy() fails with a NULL-pointer dereference at
dmam_free_coherent() due to crtc->dev being NULL if there are no
panels registered.
Thanks,
Bartosz Golaszewski
2016-11-21 11:24 GMT+01:00 Jyri Sarha :
> On 11/18/16 18:57, Bartosz Golaszewski wrote:
>> 2016-11-02 16:57 GMT+01:00 Jyri Sarha :
>>> Use unload to handle initialization failures instead of complex goto
>>> label mess. To do this the initialization sequence needed sli
2016-11-21 17:33 GMT+01:00 Sekhar Nori :
> On Monday 31 October 2016 08:15 PM, Bartosz Golaszewski wrote:
>> +static int da8xx_ddrctl_probe(struct platform_device *pdev)
>> +{
>> + const struct da8xx_ddrctl_config_knob *knob;
>> + const struct da8xx_ddrctl_settin
While debugging the drm_bridge support for revision 1 I noticed the
driver was selecting the 1024x768 resolution as default from the set
retrieved from EDID. The following patch reduces the max_width for
rev1 in tilcdc.
Bartosz Golaszewski (1):
drm: tilcdc: reduce max_width for revision 1
It has been determined that the highest resolution supported correctly
by LCDC rev1 is 800x600. Reduce the max_width value for rev1 to 800 in
crtc_max_width().
Signed-off-by: Bartosz Golaszewski
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
2016-11-21 18:26 GMT+01:00 Jyri Sarha :
> On 11/21/16 19:16, Bartosz Golaszewski wrote:
>> It has been determined that the highest resolution supported correctly
>> by LCDC rev1 is 800x600. Reduce the max_width value for rev1 to 800 in
>> crtc_max_width().
>>
>
>
The DT binding for tildc is not consistent with the driver code - the
option in the binding is called 'max-width' while the code expects
'ti,max-width'.
Make the driver code consistent with the binding.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 +-
1 file
It has been determined that the highest resolution supported correctly
by LCDC rev1 is 800x600 on da850 due to memory bandwidth constraints.
Set the max_width property in da850.dtsi to 800.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 1 +
1 file changed, 1 insertion
2016-11-22 11:27 GMT+01:00 Tomi Valkeinen :
> On 22/11/16 11:42, Bartosz Golaszewski wrote:
>> It has been determined that the highest resolution supported correctly
>> by LCDC rev1 is 800x600 on da850 due to memory bandwidth constraints.
>>
>> Set the max_width pr
of the root node and
using it instead of of_flat_dt_get_machine_name() in the new drivers.
Bartosz Golaszewski (3):
of: base: add support to get machine compatible string
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name
Add a function allowing to retrieve the compatible string of the root
node of the device tree.
Signed-off-by: Bartosz Golaszewski
---
drivers/of/base.c | 22 ++
include/linux/of.h | 6 ++
2 files changed, 28 insertions(+)
diff --git a/drivers/of/base.c b/drivers
In order to avoid a section mismatch use of_machine_get_compatible()
instead of of_flat_dt_get_machine_name() when printing the error
message.
Signed-off-by: Bartosz Golaszewski
---
drivers/bus/da8xx-mstpri.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/bus/da8xx
In order to avoid a section mismatch use of_machine_get_compatible()
instead of of_flat_dt_get_machine_name() when printing the error
message.
Signed-off-by: Bartosz Golaszewski
---
drivers/memory/da8xx-ddrctl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/memory
2016-11-22 11:53 GMT+01:00 Sudeep Holla :
>
>
> On 22/11/16 10:41, Bartosz Golaszewski wrote:
>>
>> Add a function allowing to retrieve the compatible string of the root
>> node of the device tree.
>>
>
> Rob has queued [1] and it's in -next today. Y
2016-11-22 11:57 GMT+01:00 Bartosz Golaszewski :
> 2016-11-22 11:53 GMT+01:00 Sudeep Holla :
>>
>>
>> On 22/11/16 10:41, Bartosz Golaszewski wrote:
>>>
>>> Add a function allowing to retrieve the compatible string of the root
>>> node of the de
a general function
for that in of/base is merged, we'll remove them.
v1 -> v2:
- drop patch [1/3] from v1
- introduce internal routines in the drivers instead of a general
function in of/base.c
Bartosz Golaszewski (2):
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
mem
In order to avoid a section mismatch use a locally implemented routine
instead of of_flat_dt_get_machine_name() when printing the error
message.
Signed-off-by: Bartosz Golaszewski
---
drivers/bus/da8xx-mstpri.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff
In order to avoid a section mismatch use a locally implemented routine
instead of of_flat_dt_get_machine_name() when printing the error
message.
Signed-off-by: Bartosz Golaszewski
---
drivers/memory/da8xx-ddrctl.c | 22 --
1 file changed, 20 insertions(+), 2 deletions
2016-11-22 23:23 GMT+01:00 David Lechner :
> On 11/15/2016 05:00 AM, Bartosz Golaszewski wrote:
>>
>> Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
>> controller drivers to da850.dtsi.
>>
>> Signed-off-by: Bartosz Golaszewski
>> -
_index() instead of
of_property_read_string() to get the first compatible entry
- s/priotities/priorities
Bartosz Golaszewski (3):
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
bus: da8xx-mstpri: fix
Should have been priorities.
Signed-off-by: Bartosz Golaszewski
---
drivers/bus/da8xx-mstpri.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/bus/da8xx-mstpri.c b/drivers/bus/da8xx-mstpri.c
index 064eeb9..b17ba97 100644
--- a/drivers/bus/da8xx-mstpri.c
+++ b/drivers
In order to avoid a section mismatch use a locally implemented routine
instead of of_flat_dt_get_machine_name() when printing the error
message.
Signed-off-by: Bartosz Golaszewski
---
drivers/memory/da8xx-ddrctl.c | 23 +--
1 file changed, 21 insertions(+), 2 deletions
In order to avoid a section mismatch use a locally implemented routine
instead of of_flat_dt_get_machine_name() when printing the error
message.
Signed-off-by: Bartosz Golaszewski
---
drivers/bus/da8xx-mstpri.c | 23 +--
1 file changed, 21 insertions(+), 2 deletions(-)
diff
c_regs.h
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h
> @@ -61,6 +61,7 @@
> #define LCDC_V2_UNDERFLOW_INT_ENABIT(5)
> #define LCDC_V1_PL_INT_ENA BIT(4)
> #define LCDC_V2_PL_INT_ENA BIT(6)
> +#define LCDC_V1_SYNC_LOST_ENABIT(5)
I'd say we call it LCDC_V1_SYNC_LOST_INT_ENA for consistency.
Thanks,
Bartosz Golaszewski
> #define LCDC_MONOCHROME_MODE BIT(1)
> #define LCDC_RASTER_ENABLE BIT(0)
> #define LCDC_TFT_ALT_ENABLE BIT(23)
> --
> 1.9.1
>
printing altogether as the new function
is not safe
- merge the typo fix into patch [1/2]
Bartosz Golaszewski (2):
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
drivers/bus/da8xx-mstpri.c| 4 +---
In order to avoid a section mismatch drop the call to
of_flat_dt_get_machine_name() when printing the error message.
Signed-off-by: Bartosz Golaszewski
---
drivers/memory/da8xx-ddrctl.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/memory/da8xx-ddrctl.c b
In order to avoid a section mismatch drop the call to
of_flat_dt_get_machine_name() when printing the error message.
While we're at it: fix a typo.
Signed-off-by: Bartosz Golaszewski
---
drivers/bus/da8xx-mstpri.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers
drm_crtc_vblank_off(crtc);
>
> @@ -916,13 +919,8 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)
> dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow",
> __func__, stat);
>
> - if (priv-&
c_regs.h
> index 56dbfbd..4e6975a 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h
> @@ -67,6 +67,7 @@
> #define LCDC_V1_PL_INT_ENA BIT(4)
> #define LCDC_V2_PL_INT_ENA BIT(6)
> #define LCDC_V1_SYNC_LOST_ENABIT(5)
> +#define LCDC_V1_FRAME_DONE_ENA BIT(3)
I'd call it LCDC_V1_FRAME_DONE_INT_ENA for consistency.
Thanks,
Bartosz Golaszewski
> #define LCDC_MONOCHROME_MODE BIT(1)
> #define LCDC_RASTER_ENABLE BIT(0)
> #define LCDC_TFT_ALT_ENABLE BIT(23)
> --
> 1.9.1
>
2016-11-24 6:03 GMT+01:00 Sekhar Nori :
> On Thursday 24 November 2016 04:18 AM, David Lechner wrote:
>> On 11/23/2016 04:32 PM, Kevin Hilman wrote:
>>> David Lechner writes:
>>>
>>>> On 11/23/2016 04:27 AM, Bartosz Golaszewski wrote:
>>>>> 2
.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850-lcdk.dts | 8
arch/arm/boot/dts/da850.dtsi | 2 ++
2 files changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 3b99a88..94504c8 100644
--- a/arch/arm/boot
Add the dumb-vga-dac node to the board DT together with corresponding
ports and vga connector. This allows to retrieve the edid info from
the display automatically.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850-lcdk.dts | 58
arch/arm
This enables the dumb-vga-dac driver by default for davinci boards.
The driver is needed for tilcdc support on da850-lcdk board.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/configs/davinci_all_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs
/tilcdc/tilcdc_drv.c| 11 +-
> drivers/gpu/drm/tilcdc/tilcdc_drv.h| 5 +-
> drivers/gpu/drm/tilcdc/tilcdc_external.c | 260 -
> drivers/gpu/drm/tilcdc/tilcdc_external.h | 5 +-
> 9 files changed, 564 insertions(+), 77 deletions(-)
> rename Documentation/devicetree/bindings/display/{ti =>
> bridge}/ti,tfp410.txt (65%)
> create mode 100644 drivers/gpu/drm/bridge/ti-tfp410.c
>
> --
> 1.9.1
>
For 1/4 and 4/4:
Tested-by: Bartosz Golaszewski
s blanked.
>
> Changes since first version of the series:
>
> - Move tilcdc_regs.h changes from "drm/tilcdc: Enable palette loading
> for revision 2 LCDC too" to "drm/tilcdc: Add tilcdc_write_mask() to
> tilcdc_regs.h"
>
> These patches are inspired by this series form
It has been determined that the maximum resolution supported correctly
by tilcdc rev1 on da850 SoCs is 800x600 at 60. Due to memory throughput
constraints we must filter out higher modes.
Specify the max-bandwidth property for the display node for
da850-based boards.
Signed-off-by: Bartosz
1 - 100 of 283 matches
Mail list logo
