On Tue, Oct 17, 2017 at 5:06 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our
> DT.
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Reviewed-by: Chen-Yu Tsai &
On Tue, Oct 17, 2017 at 5:06 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Add support for the A83T display pipeline.
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
On Tue, Oct 17, 2017 at 5:06 PM, Maxime Ripard
wrote:
> The display pipeline on the A83T is mainly composed of the mixers and
> TCONs, plus various encoders.
>
> Let's add the mixers and TCONs to the DTSI.
You are only adding half of them, i.e. only the first
On Tue, Oct 17, 2017 at 5:06 PM, Maxime Ripard
wrote:
No description?
> Signed-off-by: Maxime Ripard
Changes look good, though unrelated to the rest of the series.
ChenYu
___
On Tue, Oct 17, 2017 at 5:06 PM, Maxime Ripard
wrote:
> The TCON supports the LVDS interface to output to a panel or a bridge.
> Let's add support for it.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/sun4i/Makefile
On Tue, Oct 17, 2017 at 5:06 PM, Maxime Ripard
wrote:
No description?
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 163 +--
> 1 file changed, 154 insertions(+), 9
l.com>
[w...@csie.org: Reworked for A10 and fixed up commit message]
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
.../bindings/display/sunxi/sun4i-drm.txt | 1 +
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c
is not
supported by DRM.
Here we simply pair up backends and TCONs with the same ID.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 52 +--
drivers/gpu/drm/sun4i/sun4i_backend.h | 3 +-
2 files changed, 51 insertions
. Enable HDMI on them as
well.
- Olimex A20-OLinuXino-LIME
- Olimex A20-OLinuXino-LIME2
- Olimex A20-OLinuXino-MICRO
Enable the display pipeline and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Tested-by: Priit Laes <pl...@plaes.org> # Cubietruck, A20-OLinuXino-
adds support for the backend output mux
- 3 patches add A10/A20 compatible strings to the sun4i-drm driver
- 2 patches add the display pipeline nodes to the .dtsi files
- 2 patches enable HDMI output on various boards
Chen-Yu Tsai (6):
drm/sun4i: backend: Support output muxing
drm
shed in HDMI and provided commit message]
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun7i-a20.dtsi | 307 +++
1 file changed, 307 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 2f63ae86
The HDMI controller in the A10 SoC is the same as the one currently
supported in the A10s. It has slightly different setup parameters.
Since these parameters are not thoroughly understood, we add support
for this variant by copying these parameters verbatim.
Signed-off-by: Chen-Yu Tsai &l
*mode)
> +static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
> +const struct drm_display_mode *mode)
> {
> unsigned int bp, hsync, vsync, vtotal;
> u8 clk_delay;
> @@ -324,7 +322,26 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
>
>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Tue, Oct 17, 2017 at 8:18 PM, Chen-Yu Tsai <w...@csie.org> wrote:
> Various A10-based development boards have standard HDMI connectors
> wired to the dedicated HDMI pins on the SoC.
>
> Enable the display pipeline and HDMI output on boards I have or have
>
, it would be nice to document
them somewhere.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 9b97da39927e..b685ee11623d
driver this driver is based on sets this register twice,
though it seems it's only needed for actual display output. Hence
we move it to the mode_set function.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 26 --
1 file chang
, on the A10
it toggles the invert bits documented in the previous patch. This
causes the color to be completed inverted.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (7):
drm/sun4i: don't add components that are already in the queue
drm/sun4i: backend: Create regmap after access is possible
into the backend layer registers
by PHYS_OFFSET to account for this.
Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a
detailed explanation
on why we're doing this.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
n.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 1cc1780f5091..243ddfdc9403 100644
-
The backend has various clocks and reset controls that need to be
enabled and deasserted before register access is possible.
Move the creation of the regmap to after the clocks and reset controls
have been configured where it makes more sense.
Signed-off-by: Chen-Yu Tsai <w...@csie.
.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index a2012638d5f7..b5879d4620d8 100644
--- a/drivers/gpu/drm
On Wed, Oct 11, 2017 at 4:00 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Tue, Oct 10, 2017 at 03:19:57AM +0000, Chen-Yu Tsai wrote:
>> Hi everyone,
>>
>> This is v4 of my A31 HDMI support series. The DTS patches depend on
>> the patch "c
On Tue, Oct 17, 2017 at 4:15 AM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Mon, Oct 16, 2017 at 04:20:32PM +0800, Chen-Yu Tsai wrote:
>> > On Sat, Oct 14, 2017 at 12:02:50PM +0800, Chen-Yu Tsai wrote:
>> >> The display backend, as well as othe
: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
in
n.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 1cc1780f5091..243ddfdc9403 100644
-
The backend has various clocks and reset controls that need to be
enabled and deasserted before register access is possible.
Move the creation of the regmap to after the clocks and reset controls
have been configured where it makes more sense.
Signed-off-by: Chen-Yu Tsai <w...@csie.
detailed explanation
on why we're doing this.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
have a look.
Regards
ChenYu
Chen-Yu Tsai (7):
drm/sun4i: don't add components that are already in the queue
drm/sun4i: backend: Create regmap after access is possible
drm/sun4i: backend: Use drm_fb_cma_get_gem_addr() to get display
memory
drm/sun4i: backend: Add comment explaining why
, it would be nice to document
them somewhere.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 9b97da39927e..b685ee11623d
.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index a2012638d5f7..b5879d4620d8 100644
--- a/drivers/gpu/drm
driver this driver is based on sets this register twice,
though it seems it's only needed for actual display output. Hence
we move it to the mode_set function.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 26 --
1 file chang
On Tue, Oct 17, 2017 at 12:23 PM, Chen-Yu Tsai <w...@csie.org> wrote:
> Hi,
>
> Here's another bunch of cleanups for sun4i-drm. Most of these were
> found while working on A10/A20 DRM and HDMI support. To be clear,
> nothing was broken before these patches.
>
> Changes
On Fri, Sep 8, 2017 at 9:29 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Fri, Sep 08, 2017 at 03:50:09PM +0800, Chen-Yu Tsai wrote:
>> When the second display pipeline device nodes for the A31/A31s were
>> added, it was not known that the
--- DRC 1 --- [1] TCON 1
Add these connection endpoints to the device tree.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/bo
SoC, which we do not support anyway.
Hence we can use a breadth first search traversal order to add
components. We do not need to check for duplicates. The component
matching system handles this for us.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.
-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 25 +++--
drivers/gpu/drm/sun4i/sun4i_tcon.h | 3 +++
2 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
Now that sun4i_tcon_find_engine_traverse() usage is restricted to the
single input case, we can remove the for_each_available_child_of_node
loop.
While at it, consolidate all the of_node_put calls into a common exit
path.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm
, or it could be the SoC only has one pipeline.
In either case we fall back to using the old method of traversing
the input connections to find a matching engine, and then get its
ID.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c
pipeline connections between the DRCs and TCONs on
the A31, conforming to the DT binding and what the hardware is
capable of.
More details are available in each individual commit. Please have a look.
Regards
ChenYu
Chen-Yu Tsai (8):
ARM: dts: sun6i: Fix endpoint IDs in second display
of the A20.
Make sun4i_tcon_find_engine() bail out if the current node has multiple
input connections.
Fixes: b317fa3ba11a ("drm/sun4i: tcon: Find matching display backend
by device node matching")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/d
been set to 1.
Fixes: 9a26882a7378 ("ARM: dts: sun6i: Add second display pipeline device
nodes")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git
. Then we can just pass
mode_config.num_crtc in.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 2ff423
reset_control_reset
to force a reset instead.
Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
Changes since v1:
- Replaced reset_control_assert / reset_control_deassert sequence
with reset_control_reset, which conveys
On Fri, Sep 8, 2017 at 2:42 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Fri, Sep 08, 2017 at 12:15:45PM +0800, Chen-Yu Tsai wrote:
>> When binding the TCON, we were checking the reset control status and
>> asserting reset if it wasn't
the
reset control does no harm, just assert the reset unconditionally.
Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
only adds the regmap. It does not convert the existing
driver accesses to use regmap.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 1 +
drivers/gpu/drm/sun4i/sun4i_hdm
there is a separate DDC parent clock.
If not, the TMDS clock is passed to the DDC clock create function,
as before.
Regmap fields are used to deal with the different register layout
of the DDC block.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-elec
- Separate DDC parent clock
This patch adds support for it.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 3 ++
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 58 +
The HDMI controller in the A31 SoC is slightly different from the
earlier version. In addition to the TMDS clock and DDC controls,
this version now takes a second DDC clock input.
Add a compatible string for it, and add the DDC clock input to the
list of clocks required.
Signed-off-by: Chen-Yu
This patch adds a macro regmap_field_read_poll_timeout that works
similar to the readx_poll_timeout defined in linux/iopoll.h, except
that this can also return the error value returned by a failed
regmap_field_read.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
include/linux/regmap.
() for sun5i-a13 are
moved to a new sun5i-specific callback function.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 45 --
drivers/gpu/drm/sun4i/sun4i_tcon.h | 5 +
2 files changed, 33 insertions(+), 17 deletions(-)
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.
This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dts
The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.
Export them so they can be referenced in the device tree.
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <
ccount [1] to access drm-misc,
Maxime will have to apply the patches for me.
Regards
ChenYu
[1] https://bugs.freedesktop.org/show_bug.cgi?id=102920
Chen-Yu Tsai (14):
clk: sunxi-ng: sun6i: Export video PLLs
clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision
drm/sun4
The DDC block for the HDMI controller is different on the A31.
This patch adds the register definitions.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 31 +++
pipeline (if needed) and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 21 +
arch/arm/boot/dts/sun6i-a31s-primo81.dts| 25 +
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
to the unbind function.
Also rename the err_cleanup_connector label to err_cleanup_encoder,
since it is the encoder that gets cleaned up.
Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electron
On Fri, Sep 29, 2017 at 6:20 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Fri, Sep 29, 2017 at 08:22:56AM +0000, Chen-Yu Tsai wrote:
>> On systems with 2 TCONs such as the A31, it is possible to demux the
>> output of the TCONs to one encod
On Sat, Sep 30, 2017 at 1:35 PM, Julian Calaby <julian.cal...@gmail.com> wrote:
> Hi Chen-Yu,
>
> On Fri, Sep 29, 2017 at 8:22 PM, Chen-Yu Tsai <w...@csie.org> wrote:
>> On Fri, Sep 29, 2017 at 6:20 PM, Maxime Ripard
>> <maxime.rip...@free-electrons.com> w
On Sat, Sep 30, 2017 at 2:26 PM, Julian Calaby <julian.cal...@gmail.com> wrote:
> Hi Chen-Yu,
>
> On Sat, Sep 30, 2017 at 3:58 PM, Chen-Yu Tsai <w...@csie.org> wrote:
>> On Sat, Sep 30, 2017 at 1:35 PM, Julian Calaby <julian.cal...@gmail.com>
>> wrote:
>&
On Fri, Sep 29, 2017 at 6:19 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Fri, Sep 29, 2017 at 08:22:55AM +0000, Chen-Yu Tsai wrote:
>> static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
>> - .has_unknown_mux = true,
>> -
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
b/drivers/clk/sunxi-n
On systems with 2 TCONs such as the A31, it is possible to demux the
output of the TCONs to one encoder.
Add support for this for the A31.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 ++
1 file chang
only adds the regmap. It does not convert the existing
driver accesses to use regmap.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 1 +
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 15 +++
2 files changed, 16 insertions(+)
diff --git a/d
with minimal but proper cross references.
2. Mark can either take the regmap patch on an immutable branch,
which we then merge into drm-misc before applying the drm/sun4i
patches, or give his Ack for us to merge that patch through
drm-misc.
Regards
ChenYu
Chen-Yu Tsai (13
pipeline (if needed) and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 21 +
arch/arm/boot/dts/sun6i-a31s-primo81.dts| 25 +
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
by having all the clock drivers honor clock rate
ranges, and have the consumers use clk_set_rate_min/clk_set_rate_max.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 53 -
1 file changed, 29 insertions(+), 24 del
This patch adds a macro regmap_field_read_poll_timeout that works
similar to the readx_poll_timeout defined in linux/iopoll.h, except
that this can also return the error value returned by a failed
regmap_field_read.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
include/linux/regmap.
there is a separate DDC parent clock.
If not, the TMDS clock is passed to the DDC clock create function,
as before.
Regmap fields are used to deal with the different register layout
of the DDC block.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h
The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.
Export them so they can be referenced in the device tree.
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/clk/sunxi-ng
- Separate DDC parent clock
This patch adds support for it.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 3 ++
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 58 ++
2 files changed, 61 insertions(+)
diff --git a/drivers/g
The DDC block for the HDMI controller is different on the A31.
This patch adds the register definitions.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.
This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dts
to the unbind function.
Also rename the err_cleanup_connector label to err_cleanup_encoder,
since it is the encoder that gets cleaned up.
Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 19 ++
The HDMI controller in the A31 SoC is slightly different from the
earlier version. In addition to the TMDS clock and DDC controls,
this version now takes a second DDC clock input.
Add a compatible string for it, and add the DDC clock input to the
list of clocks required.
Signed-off-by: Chen-Yu
- Separate DDC parent clock
This patch adds support for it.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 3 ++
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 58 +
() for sun5i-a13 are
moved to a new sun5i-specific callback function.
Since the new callback replaces what the .has_unknown_mux field in
tcon quirks did in the past, the field is removed.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.
parent.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 53 -
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/g
pipeline (if needed) and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 21 +
arch/arm/boot/dts/sun6i-a31s-primo81.dts| 25 +
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.
This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dts
only adds the regmap. It does not convert the existing
driver accesses to use regmap.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 1 +
drivers/gpu/drm/sun4i/sun4i_hdm
there is a separate DDC parent clock.
If not, the TMDS clock is passed to the DDC clock create function,
as before.
Regmap fields are used to deal with the different register layout
of the DDC block.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-elec
The HDMI controller in the A31 SoC is slightly different from the
earlier version. In addition to the TMDS clock and DDC controls,
this version now takes a second DDC clock input.
Add a compatible string for it, and add the DDC clock input to the
list of clocks required.
Signed-off-by: Chen-Yu
r resolution, so the
console was limited to the upper left corner.
Note that this series does not deal with conflicting pixel clocks.
As I still don't have a freedesktop.org account [1] to access drm-misc,
Maxime will have to apply the patches for me.
Regards
ChenYu
[1] https://bugs.freedesktop.
to the unbind function.
Also rename the err_cleanup_connector label to err_cleanup_encoder,
since it is the encoder that gets cleaned up.
Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electron
On systems with 2 TCONs such as the A31, it is possible to demux the
output of the TCONs to one encoder.
Add support for this for the A31.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 47 ++
1 file chang
The DDC block for the HDMI controller is different on the A31.
This patch adds the register definitions.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 31 +++
On Tue, Sep 26, 2017 at 5:56 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Tue, Sep 26, 2017 at 06:59:09AM +0000, Chen-Yu Tsai wrote:
>> On systems with 2 TCONs such as the A31, it is possible to demux the
>> output of the TCONs to one
On Tue, Sep 26, 2017 at 5:32 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Tue, Sep 26, 2017 at 06:59:08AM +0000, Chen-Yu Tsai wrote:
>> The HDMI DDC clock found in the CCU is the parent of the actual DDC
>> clock within the HDMI controller. That clock is
On Wed, Oct 18, 2017 at 2:10 AM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Tue, Oct 17, 2017 at 10:38:45PM +0800, Chen-Yu Tsai wrote:
>> > diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
>> > b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.
On Wed, Oct 25, 2017 at 12:01 AM, Rob Herring <r...@kernel.org> wrote:
> On Tue, Oct 17, 2017 at 08:17:59PM +0800, Chen-Yu Tsai wrote:
>> From: Jonathan Liu <net...@gmail.com>
>>
>> The A10 has two TCONs that are similar to the ones found on other SoCs.
>>
On Mon, Nov 27, 2017 at 11:41 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Add support for the A83T display pipeline.
>
> Reviewed-by: Chen-Yu Tsai <w...@csie.org>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
> ---
> Docum
On Tue, Nov 28, 2017 at 6:01 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Mon, Nov 27, 2017 at 04:46:32PM +0800, Chen-Yu Tsai wrote:
>> The sun4i DRM driver maintains a list of compatible strings it uses to
>> check if a device node within
On Wed, Nov 29, 2017 at 5:43 AM, Jernej Škrabec wrote:
> Hi!
>
> Dne torek, 28. november 2017 ob 21:55:50 CET je Maxime Ripard napisal(a):
>> On Mon, Nov 27, 2017 at 09:57:46PM +0100, Jernej Skrabec wrote:
>> > DE2 have many CSC units - channel input CSC, channel output
, export the list from the
TCON driver for the DRM driver to use.
Suggested-by: Rob Herring <r...@kernel.org>
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 8 +---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 +++-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2
On Thu, Dec 7, 2017 at 11:58 PM, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
> group for it.
>
> Reviewed-by: Chen-Yu Tsai <w...@csie.org>
> Signed-off-by: Maxime Ripard <maxime.rip
d_rate)
> + clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);
> +
I think it might be better to set the rate first, then enable the clock.
This is sort of implied by the user manual saying "PLLs other than CPU
do not support DVFS". And it fits better with CLK_S
ng, and we'll deal with the ABI
> stability in the code.
>
> Reviewed-by: Rob Herring <r...@kernel.org>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
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