[PATCH libdrm 1/4] tests/amdgpu: add dispatch hang test
add compute/gfx dispatch hang test for gfx9
Signed-off-by: Flora Cui
---
tests/amdgpu/amdgpu_test.c| 12 +++
tests/amdgpu/amdgpu_test.h| 1 +
tests/amdgpu/basic_tests.c| 67 ---
tests/amdgpu/deadlock_tests.c | 14
4 files changed, 81 insertions(+), 13 deletions(-)
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 94bc3056..3ac9d8d2 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -460,6 +460,18 @@ static void amdgpu_disable_suites()
"illegal mem access test (set amdgpu.vm_fault_stop=2)",
CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+ /* This test was ran on GFX9 only */
+ //if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
+ if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
+ "gfx ring bad dispatch test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
+ fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+
+ /* This test was ran on GFX9 only */
+ //if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
+ if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
+ "compute ring bad dispatch test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
+ fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+
if (amdgpu_set_test_active(BO_TESTS_STR, "Metadata", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 0cb6ee98..2b01bf41 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -241,6 +241,7 @@ CU_BOOL suite_syncobj_timeline_tests_enable(void);
*/
extern CU_TestInfo syncobj_timeline_tests[];
+void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t
ip_type);
/**
* Helper functions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index a57dcbb4..71c9220d 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -311,7 +311,8 @@ static uint32_t shader_bin[] = {
enum cs_type {
CS_BUFFERCLEAR,
- CS_BUFFERCOPY
+ CS_BUFFERCOPY,
+ CS_HANG
};
static const uint32_t bufferclear_cs_shader_gfx9[] = {
@@ -473,6 +474,14 @@ static const uint32_t cached_cmd_gfx9[] = {
0xc0026900, 0x2b0, 0x0, 0x0, 0xc0016900, 0x2f8, 0x0
};
+unsigned int memcpy_ps_hang[] = {
+0x, 0xBEFE0A7E, 0xBEFC0304, 0xC0C20100,
+0xC0800300, 0xC808, 0xC80C0100, 0xC8090001,
+0xC80D0101, 0xBF8C007F, 0xF0800F00, 0x00010002,
+0xBEFE040C, 0xBF8C0F70, 0xBF80, 0xBF80,
+0xF800180F, 0x03020100, 0xBF81
+};
+
int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size,
unsigned alignment, unsigned heap, uint64_t alloc_flags,
uint64_t mapping_flags, amdgpu_bo_handle *bo, void
**cpu,
@@ -2189,6 +2198,10 @@ static int amdgpu_dispatch_load_cs_shader(uint8_t *ptr,
shader = buffercopy_cs_shader_gfx9;
shader_size = sizeof(buffercopy_cs_shader_gfx9);
break;
+ case CS_HANG:
+ shader = memcpy_ps_hang;
+ shader_size = sizeof(memcpy_ps_hang);
+ break;
default:
return -1;
break;
@@ -2409,7 +2422,8 @@ static void
amdgpu_memset_dispatch_test(amdgpu_device_handle device_handle,
static void amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
uint32_t ip_type,
- uint32_t ring)
+ uint32_t ring,
+ int hang)
{
amdgpu_context_handle context_handle;
amdgpu_bo_handle bo_src, bo_dst, bo_shader, bo_cmd, resources[4];
@@ -2425,7 +2439,8 @@ static void
amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
int bo_cmd_size = 4096;
struct amdgpu_cs_request ibs_request = {0};
struct amdgpu_cs_ib_info ib_info= {0};
- uint32_t expired;
+ uint32_t expired, hang_state, hangs;
+ enum cs_type cs_type;
amdgpu_bo_list_handle bo_list;
struct amdgpu_cs_fence fence_status = {0};
@@ -2446,7 +2461,8 @@ static void
amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
CU_ASSERT_EQUAL(r, 0);
memset(ptr_shader, 0, bo_shader_size);
- r = amdgpu_dispatch_load_cs_shader(ptr_shader, CS_BUFFERCOPY );
+ cs_type = hang ? CS_HANG : CS_BUFFERCOPY;
+
[PATCH libdrm 4/4] tests/amdgpu: add gfx ring bad slow draw test
for gfx9
Signed-off-by: Flora Cui
---
tests/amdgpu/amdgpu_test.c| 6 +
tests/amdgpu/amdgpu_test.h| 2 +
tests/amdgpu/basic_tests.c| 239 --
tests/amdgpu/deadlock_tests.c | 18 +++
4 files changed, 251 insertions(+), 14 deletions(-)
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 65f5c301..52c6ae6d 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -489,6 +489,12 @@ static void amdgpu_disable_suites()
"gfx ring bad draw test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+ /* This test was ran on GFX9 only */
+ //if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
+ if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
+ "gfx ring slow bad draw test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
+ fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+
if (amdgpu_set_test_active(BO_TESTS_STR, "Metadata", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 6ca54b86..be9297e0 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -245,6 +245,8 @@ void amdgpu_dispatch_hang_helper(amdgpu_device_handle
device_handle, uint32_t ip
void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle,
uint32_t ip_type);
void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
int hang);
+void amdgpu_memcpy_draw_hang_slow_test(amdgpu_device_handle device_handle,
uint32_t ring);
+
/**
* Helper functions
*/
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index e55e6e14..fae96840 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -363,7 +363,8 @@ static const uint32_t preamblecache_gfx9[] = {
enum ps_type {
PS_CONST,
PS_TEX,
- PS_HANG
+ PS_HANG,
+ PS_HANG_SLOW
};
static const uint32_t ps_const_shader_gfx9[] = {
@@ -515,6 +516,21 @@ struct amdgpu_test_shader memcpy_cs_hang_slow_rv = {
1
};
+unsigned int memcpy_ps_hang_slow_ai_codes[] = {
+0xbefc000c, 0xbe8e017e, 0xbefe077e, 0xd408,
+0xd4090001, 0xd40c0100, 0xd40d0101, 0xf0800f00,
+0x0042, 0xbefe010e, 0xbf8c0f70, 0xbf80,
+0xbf80, 0xbf80, 0xbf80, 0xc400180f,
+0x03020100, 0xbf81
+};
+
+struct amdgpu_test_shader memcpy_ps_hang_slow_ai = {
+memcpy_ps_hang_slow_ai_codes,
+7,
+2,
+9
+};
+
int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size,
unsigned alignment, unsigned heap, uint64_t alloc_flags,
uint64_t mapping_flags, amdgpu_bo_handle *bo, void
**cpu,
@@ -2863,6 +2879,35 @@ void
amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32
}
}
+static int amdgpu_draw_load_ps_shader_hang_slow(uint32_t *ptr, int family)
+{
+ struct amdgpu_test_shader *shader;
+ int i, loop = 0x4;
+
+ switch (family) {
+ case AMDGPU_FAMILY_AI:
+ case AMDGPU_FAMILY_RV:
+ shader = _ps_hang_slow_ai;
+ break;
+ default:
+ return -1;
+ break;
+ }
+
+ memcpy(ptr, shader->shader, shader->header_length * sizeof(uint32_t));
+
+ for (i = 0; i < loop; i++)
+ memcpy(ptr + shader->header_length + shader->body_length * i,
+ shader->shader + shader->header_length,
+ shader->body_length * sizeof(uint32_t));
+
+ memcpy(ptr + shader->header_length + shader->body_length * loop,
+ shader->shader + shader->header_length + shader->body_length,
+ shader->foot_length * sizeof(uint32_t));
+
+ return 0;
+}
+
static int amdgpu_draw_load_ps_shader(uint8_t *ptr, int ps_type)
{
int i;
@@ -2950,7 +2995,8 @@ static int amdgpu_draw_init(uint32_t *ptr)
}
static int amdgpu_draw_setup_and_write_drawblt_surf_info(uint32_t *ptr,
-uint64_t dst_addr)
+uint64_t dst_addr,
+int hang_slow)
{
int i = 0;
@@ -2975,7 +3021,7 @@ static int
amdgpu_draw_setup_and_write_drawblt_surf_info(uint32_t *ptr,
ptr[i++] = 0x318;
ptr[i++] = dst_addr >> 8;
ptr[i++] = dst_addr >> 40;
- ptr[i++] = 0x7c01f;
+ ptr
[PATCH libdrm 2/4] tests/amdgpu: add bad slow dispatch test
add gfx/compute bad slow dispatch test for gfx9
Signed-off-by: Flora Cui
---
tests/amdgpu/amdgpu_test.c| 12 ++
tests/amdgpu/amdgpu_test.h| 1 +
tests/amdgpu/basic_tests.c| 229 +-
tests/amdgpu/deadlock_tests.c | 14 +++
4 files changed, 255 insertions(+), 1 deletion(-)
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 3ac9d8d2..bff90ed6 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -472,6 +472,18 @@ static void amdgpu_disable_suites()
"compute ring bad dispatch test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+ /* This test was ran on GFX9 only */
+ //if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
+ if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
+ "gfx ring bad slow dispatch test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
+ fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+
+ /* This test was ran on GFX9 only */
+ //if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
+ if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
+ "compute ring bad slow dispatch test (set
amdgpu.lockup_timeout=50,50)", CU_FALSE))
+ fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+
if (amdgpu_set_test_active(BO_TESTS_STR, "Metadata", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 2b01bf41..651e4baf 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -242,6 +242,7 @@ CU_BOOL suite_syncobj_timeline_tests_enable(void);
extern CU_TestInfo syncobj_timeline_tests[];
void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t
ip_type);
+void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle,
uint32_t ip_type);
/**
* Helper functions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 71c9220d..20e949cc 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -312,7 +312,8 @@ static uint32_t shader_bin[] = {
enum cs_type {
CS_BUFFERCLEAR,
CS_BUFFERCOPY,
- CS_HANG
+ CS_HANG,
+ CS_HANG_SLOW
};
static const uint32_t bufferclear_cs_shader_gfx9[] = {
@@ -482,6 +483,37 @@ unsigned int memcpy_ps_hang[] = {
0xF800180F, 0x03020100, 0xBF81
};
+struct amdgpu_test_shader {
+ uint32_t *shader;
+ uint32_t header_length;
+ uint32_t body_length;
+ uint32_t foot_length;
+};
+
+unsigned int memcpy_cs_hang_slow_ai_codes[] = {
+0xd1fd, 0x04010c08, 0xe00c2000, 0x8100,
+0xbf8c0f70, 0xe01c2000, 0x80010100, 0xbf81
+};
+
+struct amdgpu_test_shader memcpy_cs_hang_slow_ai = {
+memcpy_cs_hang_slow_ai_codes,
+4,
+3,
+1
+};
+
+unsigned int memcpy_cs_hang_slow_rv_codes[] = {
+0x8e00860c, 0x3200, 0xe00c2000, 0x80010100,
+0xbf8c0f70, 0xe01c2000, 0x80020100, 0xbf81
+};
+
+struct amdgpu_test_shader memcpy_cs_hang_slow_rv = {
+memcpy_cs_hang_slow_rv_codes,
+4,
+3,
+1
+};
+
int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size,
unsigned alignment, unsigned heap, uint64_t alloc_flags,
uint64_t mapping_flags, amdgpu_bo_handle *bo, void
**cpu,
@@ -2183,6 +2215,37 @@ static void amdgpu_sync_dependency_test(void)
free(ibs_request.dependencies);
}
+static int amdgpu_dispatch_load_cs_shader_hang_slow(uint32_t *ptr, int family)
+{
+ struct amdgpu_test_shader *shader;
+ int i, loop = 0x1;
+
+ switch (family) {
+ case AMDGPU_FAMILY_AI:
+ shader = _cs_hang_slow_ai;
+ break;
+ case AMDGPU_FAMILY_RV:
+ shader = _cs_hang_slow_rv;
+ break;
+ default:
+ return -1;
+ break;
+ }
+
+ memcpy(ptr, shader->shader, shader->header_length * sizeof(uint32_t));
+
+ for (i = 0; i < loop; i++)
+ memcpy(ptr + shader->header_length + shader->body_length * i,
+ shader->shader + shader->header_length,
+ shader->body_length * sizeof(uint32_t));
+
+ memcpy(ptr + shader->header_length + shader->body_length * loop,
+ shader->shader + shader->header_length + shader->body_length,
+
[PATCH libdrm 3/4] tests/amdgpu: add gfx ring draw hang test
for gfx9
Signed-off-by: Flora Cui
---
tests/amdgpu/amdgpu_test.c| 5 +
tests/amdgpu/amdgpu_test.h| 3 ++-
tests/amdgpu/basic_tests.c| 41 ---
tests/amdgpu/deadlock_tests.c | 20 +
4 files changed, 55 insertions(+), 14 deletions(-)
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index bff90ed6..65f5c301 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -484,6 +484,11 @@ static void amdgpu_disable_suites()
"compute ring bad slow dispatch test (set
amdgpu.lockup_timeout=50,50)", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+ //if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
+ if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
+ "gfx ring bad draw test (set
amdgpu.lockup_timeout=50)", CU_FALSE))
+ fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
+
if (amdgpu_set_test_active(BO_TESTS_STR, "Metadata", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 651e4baf..6ca54b86 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -243,7 +243,8 @@ extern CU_TestInfo syncobj_timeline_tests[];
void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t
ip_type);
void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle,
uint32_t ip_type);
-
+void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
+int hang);
/**
* Helper functions
*/
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 20e949cc..e55e6e14 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -362,7 +362,8 @@ static const uint32_t preamblecache_gfx9[] = {
enum ps_type {
PS_CONST,
- PS_TEX
+ PS_TEX,
+ PS_HANG
};
static const uint32_t ps_const_shader_gfx9[] = {
@@ -2887,6 +2888,12 @@ static int amdgpu_draw_load_ps_shader(uint8_t *ptr, int
ps_type)
patchinfo_code_size =
ps_tex_shader_patchinfo_code_size_gfx9;
patchcode_offset = ps_tex_shader_patchinfo_offset_gfx9;
break;
+ case PS_HANG:
+ shader = memcpy_ps_hang;
+ shader_size = sizeof(memcpy_ps_hang);
+
+ memcpy(ptr, shader, shader_size);
+ return 0;
default:
return -1;
break;
@@ -3340,7 +3347,7 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle
device_handle,
amdgpu_bo_handle bo_shader_vs,
uint64_t mc_address_shader_ps,
uint64_t mc_address_shader_vs,
- uint32_t ring)
+ uint32_t ring, int hang)
{
amdgpu_context_handle context_handle;
amdgpu_bo_handle bo_dst, bo_src, bo_cmd, resources[5];
@@ -3445,14 +3452,20 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle
device_handle,
r = amdgpu_cs_query_fence_status(_status,
AMDGPU_TIMEOUT_INFINITE,
0, );
- CU_ASSERT_EQUAL(r, 0);
- CU_ASSERT_EQUAL(expired, true);
+ if (!hang) {
+ CU_ASSERT_EQUAL(r, 0);
+ CU_ASSERT_EQUAL(expired, true);
- /* verify if memcpy test result meets with expected */
- i = 0;
- while(i < bo_size) {
- CU_ASSERT_EQUAL(ptr_dst[i], ptr_src[i]);
- i++;
+ /* verify if memcpy test result meets with expected */
+ i = 0;
+ while(i < bo_size) {
+ CU_ASSERT_EQUAL(ptr_dst[i], ptr_src[i]);
+ i++;
+ }
+ } else {
+ r = amdgpu_cs_query_reset_state(context_handle, _state,
);
+ CU_ASSERT_EQUAL(r, 0);
+ CU_ASSERT_EQUAL(hang_state, AMDGPU_CTX_UNKNOWN_RESET);
}
r = amdgpu_bo_list_destroy(bo_list);
@@ -3470,7 +3483,8 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle
device_handle,
CU_ASSERT_EQUAL(r, 0);
}
-static void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle,
uint32_t ring)
+void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
+int hang)
{
amdgpu_bo_handle bo_shader_ps, bo_shader_vs;
void *ptr_shader_ps;
@@ -3478,6 +3492,7 @@ static void amdgpu_memcpy_draw_test(amdgpu_devi
[PATCH libdrm] test/amdgpu: fix test failure for SI
Change-Id: I646f1bf844bd92962b9f71aa287f90173ae233c6
Signed-off-by: Flora Cui <flora@amd.com>
---
tests/amdgpu/basic_tests.c | 273 ++---
tests/amdgpu/cs_tests.c| 41 +++
tests/amdgpu/vce_tests.c | 41 +++
3 files changed, 229 insertions(+), 126 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 1807538..c767f7e 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -40,6 +40,7 @@
static amdgpu_device_handle device_handle;
static uint32_t major_version;
static uint32_t minor_version;
+static uint32_t family_id;
static void amdgpu_query_info_test(void);
static void amdgpu_memory_alloc(void);
@@ -206,22 +207,56 @@ CU_TestInfo basic_tests[] = {
# define PACKET3_DMA_DATA_CMD_DAIC(1 << 29)
# define PACKET3_DMA_DATA_CMD_RAW_WAIT (1 << 30)
+#define SDMA_PACKET_SI(op, b, t, s, cnt) op) & 0xF) << 28) | \
+ (((b) & 0x1) << 26) |
\
+ (((t) & 0x1) << 23) |
\
+ (((s) & 0x1) << 22) |
\
+ (((cnt) & 0xF) << 0))
+#defineSDMA_OPCODE_COPY_SI 3
+#define SDMA_OPCODE_CONSTANT_FILL_SI 13
+#define SDMA_NOP_SI 0xf
+#define GFX_COMPUTE_NOP_SI 0x8000
+#definePACKET3_DMA_DATA_SI 0x41
+# define PACKET3_DMA_DATA_SI_ENGINE(x) ((x) << 27)
+ /* 0 - ME
+* 1 - PFP
+*/
+# define PACKET3_DMA_DATA_SI_DST_SEL(x) ((x) << 20)
+ /* 0 - DST_ADDR using DAS
+* 1 - GDS
+* 3 - DST_ADDR using L2
+*/
+# define PACKET3_DMA_DATA_SI_SRC_SEL(x) ((x) << 29)
+ /* 0 - SRC_ADDR using SAS
+* 1 - GDS
+* 2 - DATA
+* 3 - SRC_ADDR using L2
+*/
+# define PACKET3_DMA_DATA_SI_CP_SYNC (1 << 31)
+
int suite_basic_tests_init(void)
{
+ struct amdgpu_gpu_info gpu_info = {0};
int r;
r = amdgpu_device_initialize(drm_amdgpu[0], _version,
_version, _handle);
- if (r == 0)
- return CUE_SUCCESS;
- else {
+ if (r) {
if ((r == -EACCES) && (errno == EACCES))
printf("\n\nError:%s. "
"Hint:Try to run this test program as root.",
strerror(errno));
return CUE_SINIT_FAILED;
}
+
+ r = amdgpu_query_gpu_info(device_handle, _info);
+ if (r)
+ return CUE_SINIT_FAILED;
+
+ family_id = gpu_info.family_id;
+
+ return CUE_SUCCESS;
}
int suite_basic_tests_clean(void)
@@ -308,7 +343,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
uint32_t expired;
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle, va_handle_ce;
- int r;
+ int r, i = 0;
r = amdgpu_cs_ctx_create(device_handle, _handle);
CU_ASSERT_EQUAL(r, 0);
@@ -333,12 +368,14 @@ static void
amdgpu_command_submission_gfx_separate_ibs(void)
/* IT_SET_CE_DE_COUNTERS */
ptr = ib_result_ce_cpu;
- ptr[0] = 0xc0008900;
- ptr[1] = 0;
- ptr[2] = 0xc0008400;
- ptr[3] = 1;
+ if (family_id != AMDGPU_FAMILY_SI) {
+ ptr[i++] = 0xc0008900;
+ ptr[i++] = 0;
+ }
+ ptr[i++] = 0xc0008400;
+ ptr[i++] = 1;
ib_info[0].ib_mc_address = ib_result_ce_mc_address;
- ib_info[0].size = 4;
+ ib_info[0].size = i;
ib_info[0].flags = AMDGPU_IB_FLAG_CE;
/* IT_WAIT_ON_CE_COUNTER */
@@ -397,7 +434,7 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
uint32_t expired;
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle;
- int r;
+ int r, i = 0;
r = amdgpu_cs_ctx_create(device_handle, _handle);
CU_ASSERT_EQUAL(r, 0);
@@ -416,12 +453,14 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
/* IT_SET_CE_DE_COUNTERS */
ptr = ib_result_cpu;
- ptr[0] = 0xc0008900;
- ptr[1] = 0;
- ptr[2] = 0xc0008400;
- ptr[3] = 1;
+ if (family_id != AMDGPU_FAMILY_SI) {
+ ptr[i++] = 0xc0008900;
+ ptr[i++] = 0;
+ }
+ ptr[i++] = 0xc0008400;
+ ptr[i++] = 1;
ib_info[0].ib_mc_address = ib_result_mc_address;
- ib_info[0].size = 4;
+ ib_info[0].size = i;
ib_info[0].flags = AMDGPU_IB_FLAG_CE;
ptr = (uint32_t *)ib_result_cpu + 4;
@@ -502,12 +541,21 @@ static voi
[PATCH libdrm] amdgpu: update the exported always on CU bitmap
keep cu_ao_mask unchanged for backward compatibility.
Change-Id: I9f497aadd309977468e246fea333b392c0150276
Signed-off-by: Flora Cui <flora@amd.com>
---
This patch should be landed after the kmd patch upsteam. right?
amdgpu/amdgpu.h | 2 ++
amdgpu/amdgpu_gpu_info.c | 1 +
include/drm/amdgpu_drm.h | 3 +++
3 files changed, 6 insertions(+)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index b6779f9..cc80493 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -486,7 +486,9 @@ struct amdgpu_gpu_info {
uint32_t pa_sc_raster_cfg1[4];
/* CU info */
uint32_t cu_active_number;
+ /* NOTE: cu_ao_mask is INVALID, DON'T use it */
uint32_t cu_ao_mask;
+ uint32_t cu_ao_bitmap[4][4];
uint32_t cu_bitmap[4][4];
/* video memory type info*/
uint32_t vram_type;
diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
index 34f77be..7a5feb9 100644
--- a/amdgpu/amdgpu_gpu_info.c
+++ b/amdgpu/amdgpu_gpu_info.c
@@ -230,6 +230,7 @@ drm_private int
amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
dev->info.cu_active_number = dev->dev_info.cu_active_number;
dev->info.cu_ao_mask = dev->dev_info.cu_ao_mask;
+ memcpy(>info.cu_ao_bitmap[0][0],
>dev_info.cu_ao_bitmap[0][0], sizeof(dev->info.cu_ao_bitmap));
memcpy(>info.cu_bitmap[0][0], >dev_info.cu_bitmap[0][0],
sizeof(dev->info.cu_bitmap));
/* TODO: info->max_quad_shader_pipes is not set */
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index df250de..05c4e72 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -832,6 +832,7 @@ struct drm_amdgpu_info_device {
__u64 max_memory_clock;
/* cu information */
__u32 cu_active_number;
+ /* NOTE: cu_ao_mask is INVALID, DON'T use it */
__u32 cu_ao_mask;
__u32 cu_bitmap[4][4];
/** Render backend pipe mask. One render backend is CB+DB. */
@@ -886,6 +887,8 @@ struct drm_amdgpu_info_device {
/* max gs wavefront per vgt*/
__u32 max_gs_waves_per_vgt;
__u32 _pad1;
+ /* always on cu bitmap */
+ __u32 cu_ao_bitmap[4][4];
};
struct drm_amdgpu_info_hw_ip {
--
2.7.4
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Re: [PATCH libdrm] amdgpu: update always on cu bitmap
each SE take 16 bit in cu_ao_mask. For ASICs with 4 SE, cu_ao_mask
has invalid value. so I change cu_ao_mask to cu_ao_bitmap[4][4] and increase
kmd driver version.
On Tue, Jun 20, 2017 at 11:49:23AM +0200, Christian König wrote:
> I'm not 100% sure what this is all about, but it clearly won't work like
> this.
>
> >diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
> >index df250de..dcbe22c 100644
> >--- a/include/drm/amdgpu_drm.h
> >+++ b/include/drm/amdgpu_drm.h
> >@@ -832,7 +832,7 @@ struct drm_amdgpu_info_device {
> > __u64 max_memory_clock;
> > /* cu information */
> > __u32 cu_active_number;
> >-__u32 cu_ao_mask;
> >+__u32 cu_ao_bitmap[4][4];
> > __u32 cu_bitmap[4][4];
> > /** Render backend pipe mask. One render backend is CB+DB. */
> > __u32 enabled_rb_pipes_mask;
> That is a non-backward compatible change to the kernel interface and as such
> forbidden.
>
> Regards,
> Christian.
>
> Am 20.06.2017 um 11:04 schrieb Flora Cui:
> >Change-Id: Ie2a812716a6802f7a5a0bc09b1a8db824c5bf2ed
> >Signed-off-by: Flora Cui <flora@amd.com>
> >---
> > amdgpu/amdgpu.h | 2 +-
> > amdgpu/amdgpu_gpu_info.c | 2 +-
> > include/drm/amdgpu_drm.h | 2 +-
> > 3 files changed, 3 insertions(+), 3 deletions(-)
> >
> >diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> >index b6779f9..34ca5f1 100644
> >--- a/amdgpu/amdgpu.h
> >+++ b/amdgpu/amdgpu.h
> >@@ -486,7 +486,7 @@ struct amdgpu_gpu_info {
> > uint32_t pa_sc_raster_cfg1[4];
> > /* CU info */
> > uint32_t cu_active_number;
> >-uint32_t cu_ao_mask;
> >+uint32_t cu_ao_bitmap[4][4];
> > uint32_t cu_bitmap[4][4];
> > /* video memory type info*/
> > uint32_t vram_type;
> >diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
> >index 34f77be..acfd700 100644
> >--- a/amdgpu/amdgpu_gpu_info.c
> >+++ b/amdgpu/amdgpu_gpu_info.c
> >@@ -229,7 +229,7 @@ drm_private int
> >amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
> > }
> > dev->info.cu_active_number = dev->dev_info.cu_active_number;
> >-dev->info.cu_ao_mask = dev->dev_info.cu_ao_mask;
> >+memcpy(>info.cu_ao_bitmap[0][0],
> >>dev_info.cu_ao_bitmap[0][0], sizeof(dev->info.cu_ao_bitmap));
> > memcpy(>info.cu_bitmap[0][0], >dev_info.cu_bitmap[0][0],
> > sizeof(dev->info.cu_bitmap));
> > /* TODO: info->max_quad_shader_pipes is not set */
> >diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
> >index df250de..dcbe22c 100644
> >--- a/include/drm/amdgpu_drm.h
> >+++ b/include/drm/amdgpu_drm.h
> >@@ -832,7 +832,7 @@ struct drm_amdgpu_info_device {
> > __u64 max_memory_clock;
> > /* cu information */
> > __u32 cu_active_number;
> >-__u32 cu_ao_mask;
> >+__u32 cu_ao_bitmap[4][4];
> > __u32 cu_bitmap[4][4];
> > /** Render backend pipe mask. One render backend is CB+DB. */
> > __u32 enabled_rb_pipes_mask;
>
>
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[PATCH libdrm] amdgpu: update always on cu bitmap
Change-Id: Ie2a812716a6802f7a5a0bc09b1a8db824c5bf2ed
Signed-off-by: Flora Cui <flora@amd.com>
---
amdgpu/amdgpu.h | 2 +-
amdgpu/amdgpu_gpu_info.c | 2 +-
include/drm/amdgpu_drm.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index b6779f9..34ca5f1 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -486,7 +486,7 @@ struct amdgpu_gpu_info {
uint32_t pa_sc_raster_cfg1[4];
/* CU info */
uint32_t cu_active_number;
- uint32_t cu_ao_mask;
+ uint32_t cu_ao_bitmap[4][4];
uint32_t cu_bitmap[4][4];
/* video memory type info*/
uint32_t vram_type;
diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
index 34f77be..acfd700 100644
--- a/amdgpu/amdgpu_gpu_info.c
+++ b/amdgpu/amdgpu_gpu_info.c
@@ -229,7 +229,7 @@ drm_private int
amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
}
dev->info.cu_active_number = dev->dev_info.cu_active_number;
- dev->info.cu_ao_mask = dev->dev_info.cu_ao_mask;
+ memcpy(>info.cu_ao_bitmap[0][0],
>dev_info.cu_ao_bitmap[0][0], sizeof(dev->info.cu_ao_bitmap));
memcpy(>info.cu_bitmap[0][0], >dev_info.cu_bitmap[0][0],
sizeof(dev->info.cu_bitmap));
/* TODO: info->max_quad_shader_pipes is not set */
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index df250de..dcbe22c 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -832,7 +832,7 @@ struct drm_amdgpu_info_device {
__u64 max_memory_clock;
/* cu information */
__u32 cu_active_number;
- __u32 cu_ao_mask;
+ __u32 cu_ao_bitmap[4][4];
__u32 cu_bitmap[4][4];
/** Render backend pipe mask. One render backend is CB+DB. */
__u32 enabled_rb_pipes_mask;
--
2.7.4
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Re: [bug report] drm/amdgpu/gfx6: clean up cu configuration
Hi Dan Carpenter,
Thank you for the info. This commit is just a clean up to keep align
with gfx7/8.
On Fri, Mar 31, 2017 at 06:13:25PM +0300, Dan Carpenter wrote:
> Hello Flora Cui,
>
> The patch 375d6f7057a9: "drm/amdgpu/gfx6: clean up cu configuration"
> from Feb 7, 2017, leads to the following static checker warning:
>
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c:3737 gfx_v6_0_get_cu_info()
> warn: potential off by one cu_info->bitmap[4]
>
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> 3715 static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev)
> 3716 {
> 3717 int i, j, k, counter, active_cu_number = 0;
> 3718 u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;
> 3719 struct amdgpu_cu_info *cu_info = >gfx.cu_info;
> 3720 unsigned disable_masks[4 * 2];
> 3721
> 3722 memset(cu_info, 0, sizeof(*cu_info));
> 3723
> 3724 amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2);
> 3725
> 3726 mutex_lock(>grbm_idx_mutex);
> 3727 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
> 3728 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
> 3729 mask = 1;
> 3730 ao_bitmap = 0;
> 3731 counter = 0;
> 3732 gfx_v6_0_select_se_sh(adev, i, j, 0x);
> 3733 if (i < 4 && j < 2)
>
> If i == 4
>
> 3734 gfx_v6_0_set_user_cu_inactive_bitmap(
> 3735 adev, disable_masks[i * 2 +
> j]);
> 3736 bitmap = gfx_v6_0_get_cu_enabled(adev);
> 3737 cu_info->bitmap[i][j] = bitmap;
>
> then we are beyond the end of this array. Also, why was this patch even
> applied when it has no commit message? It's totally not clear to me
> what the patch is trying to do or why it exists...
adev->gfx.config.max_shader_engines is set in gfx_v6_0_gpu_init() and
it must be < 4 so we'll never be beyond the end of the array.
Regards,
Flora Cui
> 3738
> 3739 for (k = 0; k < 16; k++) {
> 3740 if (bitmap & mask) {
> 3741 if (counter < 2)
> 3742 ao_bitmap |= mask;
> 3743 counter ++;
> 3744 }
> 3745 mask <<= 1;
> 3746 }
> 3747 active_cu_number += counter;
> 3748 ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> 3749 }
> 3750 }
> 3751
> 3752 gfx_v6_0_select_se_sh(adev, 0x, 0x,
> 0x);
> 3753 mutex_unlock(>grbm_idx_mutex);
> 3754
> 3755 cu_info->number = active_cu_number;
> 3756 cu_info->ao_cu_mask = ao_cu_mask;
> 3757 }
>
> regards,
> dan carpenter
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[PATCH 1/2] drm/ttm: remove unused placement flags
yes. please don't do this, I need them.
On Fri, Sep 09, 2016 at 02:41:16PM +0800, zhoucm1 wrote:
>
>
> On 2016å¹´09æ08æ¥ 21:41, Christian König wrote:
> >From: Christian König
> >
> >Either never used or not used in quite a while.
> No, I remember Flora's Direct GMA is using them like GDS use PRIV0-2. And
> you cannot make sure there isn't no one using them in other closed projects,
> right?
> If you removed now, that obviously will break her implementation and brings
> her many troubles.
>
>
> Regards,
> David Zhou
> >
> >Signed-off-by: Christian König
> >---
> > drivers/gpu/drm/ttm/ttm_bo.c| 2 +-
> > include/drm/ttm/ttm_placement.h | 19 ---
> > 2 files changed, 1 insertion(+), 20 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
> >index bc37f02..4d2e8f2 100644
> >--- a/drivers/gpu/drm/ttm/ttm_bo.c
> >+++ b/drivers/gpu/drm/ttm/ttm_bo.c
> >@@ -59,7 +59,7 @@ static inline int ttm_mem_type_from_place(const struct
> >ttm_place *place,
> > {
> > int i;
> >-for (i = 0; i <= TTM_PL_PRIV5; i++)
> >+for (i = 0; i <= TTM_PL_PRIV2; i++)
> > if (place->flags & (1 << i)) {
> > *mem_type = i;
> > return 0;
> >diff --git a/include/drm/ttm/ttm_placement.h
> >b/include/drm/ttm/ttm_placement.h
> >index 8ed44f9..20219d9 100644
> >--- a/include/drm/ttm/ttm_placement.h
> >+++ b/include/drm/ttm/ttm_placement.h
> >@@ -40,10 +40,6 @@
> > #define TTM_PL_PRIV03
> > #define TTM_PL_PRIV14
> > #define TTM_PL_PRIV25
> >-#define TTM_PL_PRIV36
> >-#define TTM_PL_PRIV47
> >-#define TTM_PL_PRIV58
> >-#define TTM_PL_SWAPPED 15
> > #define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM)
> > #define TTM_PL_FLAG_TT (1 << TTM_PL_TT)
> >@@ -51,10 +47,6 @@
> > #define TTM_PL_FLAG_PRIV0 (1 << TTM_PL_PRIV0)
> > #define TTM_PL_FLAG_PRIV1 (1 << TTM_PL_PRIV1)
> > #define TTM_PL_FLAG_PRIV2 (1 << TTM_PL_PRIV2)
> >-#define TTM_PL_FLAG_PRIV3 (1 << TTM_PL_PRIV3)
> >-#define TTM_PL_FLAG_PRIV4 (1 << TTM_PL_PRIV4)
> >-#define TTM_PL_FLAG_PRIV5 (1 << TTM_PL_PRIV5)
> >-#define TTM_PL_FLAG_SWAPPED (1 << TTM_PL_SWAPPED)
> > #define TTM_PL_MASK_MEM 0x
> > /*
> >@@ -72,7 +64,6 @@
> > #define TTM_PL_FLAG_CACHED (1 << 16)
> > #define TTM_PL_FLAG_UNCACHED(1 << 17)
> > #define TTM_PL_FLAG_WC (1 << 18)
> >-#define TTM_PL_FLAG_SHARED (1 << 20)
> > #define TTM_PL_FLAG_NO_EVICT(1 << 21)
> > #define TTM_PL_FLAG_TOPDOWN (1 << 22)
> >@@ -82,14 +73,4 @@
> > #define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
> >-/*
> >- * Access flags to be used for CPU- and GPU- mappings.
> >- * The idea is that the TTM synchronization mechanism will
> >- * allow concurrent READ access and exclusive write access.
> >- * Currently GPU- and CPU accesses are exclusive.
> >- */
> >-
> >-#define TTM_ACCESS_READ (1 << 0)
> >-#define TTM_ACCESS_WRITE(1 << 1)
> >-
> > #endif
>
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