On 2020-10-15 3:40 p.m., Eryk Brol wrote:
[Why]
Missed removing a '!' which results in incorrect behavior
[How]
Remove the offending '!'
Signed-off-by: Eryk Brol
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2
On 2020-10-19 10:55 a.m., Christian König wrote:
Am 19.10.20 um 16:43 schrieb t...@redhat.com:
From: Tom Rix
A break is not needed if it is preceded by a return or break
Signed-off-by: Tom Rix
Acked-by: Christian König
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd
at a patch was added using the old calling conventions
after the type was changed, and the value should actually be 0
(TRANSFER_FUNCTION_SRGB) here instead of 1 (true).
This looks correct to me. Harry, Leo?
Confirmed with Kruno, this is correct.
Reviewed-by: Harry Wentland
Harry
Alex
Cc: Alex Deucher
> Cc: Nicholas Kazlauskas
> Cc: Harry Wentland
> Cc: Rodrigo Siqueira
> Cc: Bhawanpreet Lakha
> Cc: Roman Li
> Cc: Mikita Lipski
> Cc: Stylon Wang
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
; drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2785:6:
> warning: symbol 'dce110_set_cursor_attribute' was not declared. Should
> it be static?
>
> Reported-by: Hulk Robot
> Signed-off-by: Jason Yan
Reviewed-by: Harry Wentland
Harry
> ---
> driv
all patches I feel these are needlessly small.
> Reported-by: Hulk Robot
> Signed-off-by: Jason Yan
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/driv
ebugfs entry.
Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger
debugfs entry")
Reviewed-by: Harry Wentland
Signed-off-by: YueHaibing
Signed-off-by: Alex Deucher
Harry
> 在 2020/9/12 10:22, Jason Yan 写道:
>> The 'trigger_hotplug' entry in
On 2020-09-01 3:54 a.m., Daniel Vetter wrote:
> On Wed, Aug 26, 2020 at 11:24:23AM +0300, Pekka Paalanen wrote:
>> On Tue, 25 Aug 2020 12:58:19 -0400
>> "Kazlauskas, Nicholas" wrote:
>>
>>> On 2020-08-22 5:59 a.m., Michel Dänzer wrote:
On 2020-08-21 8:07 p.m., Kazlauskas, Nicholas wrote:
On 2020-09-09 11:26 p.m., YueHaibing wrote:
If parse_write_buffer_into_params() fails, we should free
wr_buf before return.
Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger debugfs entry")
Signed-off-by: YueHaibing
Reviewed-by: Harry Wentland
Harry
---
drive
On 2020-09-09 11:13 p.m., YueHaibing wrote:
Add trigger_hotplug debugfs entry.
Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger debugfs entry")
Signed-off-by: YueHaibing
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_deb
On 2020-05-15 1:19 a.m., Mario Kleiner wrote:
> Testing on a Polaris11 gpu with DCE-11.2 suggests that it
> seems to work fine there, so optimistically enable it for
> DCE-11 and later.
>
> Signed-off-by: Mario Kleiner
> ---
> drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | 2 +-
> dri
A couple of MST fixes to bugs in the framework that we encountered when
testing with
- three-display daisy-chain configurations
- 4k tiled displays
Andrey Grodzovsky (1):
drm/dp/mst: Reverse order of MST enable and clearing VC payload table.
Harry Wentland (2):
drm: Add
Our PBN value overflows the 20 bits integer part of the 20.12
fixed point. We need to use 31.32 fixed point to avoid this.
This happens with display clocks larger than 293122 (at 24 bpp),
which we see with the Sharp (and similar) 4k tiled displays.
Signed-off-by: Harry Wentland
Reviewed-by
be send from topology
discovery/update work item.
Signed-off-by: Mykola Lysenko
Reviewed-by: Harry Wentland
Acked-by: Alex Deucher
---
drivers/gpu/drm/drm_dp_mst_topology.c | 37 ++-
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu
because 2nd MST branch GUID
is not available.
New Implementation: only create GUID for MST branch and save it within Branch.
Signed-off-by: Hersen Wu
Reviewed-by: Harry Wentland
Acked-by: Alex Deucher
---
drivers/gpu/drm/drm_dp_mst_topology.c | 64 +++
include/drm
From: Andrey Grodzovsky
On DELL U3014 if you clear the table before enabling MST it sometimes
hangs the receiver.
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Harry Wentland
Acked-by: Alex Deucher
---
drivers/gpu/drm/drm_dp_mst_topology.c | 12 ++--
1 file changed, 6 insertions
: Harry Wentland
Reviewed-by: Alex Deucher
---
include/drm/drm_fixed.h | 54 +++--
1 file changed, 52 insertions(+), 2 deletions(-)
diff --git a/include/drm/drm_fixed.h b/include/drm/drm_fixed.h
index d639049a613d..16e725c42422 100644
--- a/include/drm
found port.
For this mstb and port kref's are used in reversed
order to track when port and branch memory could be
freed.
Added additional functions to find appropriate mstb
as described above.
Signed-off-by: Mykola Lysenko
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/drm_dp_mst_topol
We propose to use the Display Core (DC) driver for display support on
AMD's upcoming GPU (referred to by uGPU in the rest of the doc). In
order to avoid a flag day the plan is to only support uGPU initially and
transition to older ASICs gradually.
The DC component has received extensive testing
Hi Daniel,
just a quick clarification in-line about "validation" inside atomic_commit.
On 2016-12-08 04:59 AM, Daniel Vetter wrote:
> Hi Harry,
>
> On Wed, Dec 07, 2016 at 09:02:13PM -0500, Harry Wentland wrote:
>> We propose to use the Display Core (DC) driver for di
On 2016-12-12 02:22 AM, Daniel Vetter wrote:
> On Wed, Dec 07, 2016 at 09:02:13PM -0500, Harry Wentland wrote:
>> Current version of DC:
>>
>> *
>> https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/display?h=amd-staging-4.7
>>
>>
gt; On 8 December 2016 at 12:02, Harry Wentland wrote:
>> We propose to use the Display Core (DC) driver for display support on
>> AMD's upcoming GPU (referred to by uGPU in the rest of the doc). In order to
>> avoid a flag day the plan is to only support uGPU initially a
On 2016-12-11 03:28 PM, Daniel Vetter wrote:
> On Wed, Dec 07, 2016 at 09:02:13PM -0500, Harry Wentland wrote:
>> We propose to use the Display Core (DC) driver for display support on
>> AMD's upcoming GPU (referred to by uGPU in the rest of the doc). In order to
>> avoid
aken, but ...
>>>
>>> On 13 December 2016 at 01:49, Harry Wentland
>>> wrote:
>>>> On 2016-12-11 09:57 PM, Dave Airlie wrote:
>>>>> On 8 December 2016 at 12:02, Harry Wentland
>>>>> wrote:
>>>>> Sharing code
644
> --- a/drivers/gpu/drm/drm_crtc_helper.c
> +++ b/drivers/gpu/drm/drm_crtc_helper.c
> @@ -88,6 +88,7 @@
> bool drm_helper_encoder_in_use(struct drm_encoder *encoder)
> {
> struct drm_connector *connector;
> + struct drm_connector_list_it
drm_connector_unreference(connector);
> }
> + drm_connector_list_iter_put(&conn_iter);
> + WARN_ON(!list_empty(&dev->mode_config.connector_list));
>
> list_for_each_entry_safe(property, pt, &dev->mode_config.property_list,
>head) {
>
Reviewed-by: Harry Wentland
Harry
Reviewed-by: Harry Wentland:
On 2016-12-15 10:58 AM, Daniel Vetter wrote:
> Mostly nothing special (except making sure that really all error paths
> and friends call iter_put).
>
> v2: Don't forget the raw connector_list walking in
> drm_helper_move_panel_connecto
This makes it possibly for drivers to find the associated
mst_port by looking at the payload allocation table.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm
From: Mykola Lysenko
Currently we reply with NACK to UP requests which might
confuse receivers. We haven't seen any actual issues with
this but should still respond to UP requests correctly.
Signed-off-by: Mykola Lysenko
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 +-
1 file changed, 1 inser
Two minor patches for MST here. We were replying NACK to UP requests
when we intended to ACK them. We were also not filling in the vcpi
field for mst_mgr->payloads although it's defined. Saving the vcpi
simplifies the new amdgpu MST implementation that we currently work
on.
Harry Wen
This looks good but we should probably do the same for all return paths
when reference for port has been acquired.
Please see attached patch.
Thanks,
Harry
On 2016-02-01 11:08 AM, Insu Yun wrote:
> In drm_dp_mst_allocate_vcpi, it returns true in two paths,
> but in one path, there is no referen
tree.
Andrey Grodzovsky (1):
drm/amd/dal: Force bw programming for DCE 10 until we start calculate
BW.
Harry Wentland (27):
drm/amd/dal: Add dal headers
drm/amd/dal: Add DAL Basic Types and Logger
drm/amd/dal: Fixed point arithmetic
drm/amd/dal: Asic Capabilities
drm/amd/dal: GPIO (Ge
- Logging functionality
This patch adds Kconfig options to enable the DAL
display driver.
- DRM_AMD_DAL
- DRM_AMD_DAL_VBIOS_PRESENT
- DRM_AMD_DAL_DCE11_0
- DRM_AMD_DAL_DCE10_0
- DEBUG_KERNEL_DAL
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/Kconfig
Add a generic way to manage display HW capabilities
for different ASICs and implement it for Carrizo.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/asic_capability/Makefile| 35
.../amd/dal/dc/asic_capability/asic_capability.c | 190
Arithmetic operations on real numbers represented
as fixed-point numbers.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/basics/Makefile | 2 +-
drivers/gpu/drm/amd/dal/dc/basics/fixpt31_32.c | 692 +
drivers/gpu/drm/amd/dal
Manages all DCE GPIO pins. The pins are represented as generic IO
handles as well as handles dedicated for certain functions, such as
DDC, HPD, and DVO.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/gpio/Makefile | 32 +
.../gpu/drm/amd/dal
Provides information about ASIC features and capabilities. Also provides
access to ASIC resources such as VBIOS, GPIO and I2cAux Manager
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/adapter/Makefile| 24 +
.../gpu/drm/amd/dal/dc/adapter
Interface to set and ack DCE interrupts.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/irq/Makefile| 21 ++
.../drm/amd/dal/dc/irq/dce110/irq_service_dce110.c | 389 +
.../drm/amd/dal/dc/irq/dce110/irq_service_dce110.h
Implements low-level communication layer over I2C and Aux lines using
GPIO handles.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/i2caux/Makefile | 33 +
drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c | 567
drivers/gpu/drm/amd
Encapsulates programming for HW blocks which are shared between display
paths, such as clock sources.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/gpu/Makefile| 22 +
.../gpu/drm/amd/dal/dc/gpu/dc_clock_generator.c| 92 ++
.../gpu/drm
Adds pixel clock programming and functionality to
power down clock sources.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../drm/amd/dal/dc/dce110/dce110_clock_source.c| 1162
.../drm/amd/dal/dc/dce110/dce110_clock_source.h| 64 ++
2 files changed
Responsible for programming the audio encoder in the display path.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/audio/Makefile | 22 +
drivers/gpu/drm/amd/dal/dc/audio/audio.h | 195 ++
drivers/gpu/drm/amd/dal/dc/audio
Responsible for programming back-end of display path, such as DIG,
UNIPHY, DP, DAC, and DVO.
Supports:
- DisplayPort (single stream)
- HDMI
- DVI
- eDP
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../drm/amd/dal/dc/dce110/dce110_link_encoder.c| 1927
Adds ability to validate and program timings, enable, disable, and blank
CRTCs, and get CRTC status information.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../amd/dal/dc/dce110/dce110_timing_generator.c| 1864
.../amd/dal/dc/dce110
Adds framebuffer compression programming. Currently unused.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/dce110/dce110_compressor.c | 886 +
.../gpu/drm/amd/dal/dc/dce110/dce110_compressor.h | 84 ++
2 files changed, 970 insertions
Adds watermark, DMIF, and surface programming.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c | 965 +
.../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h | 117 +++
2 files changed, 1082 insertions(+)
create
Adds programming for color space conversion (CSC),
regamma, and formatter.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.c | 272 +++
drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h | 143 ++
drivers/gpu/drm/amd/dal/dc/dce110
Adds programming of cursor and input gamma.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.c | 65 ++
drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h | 100 +++
.../gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c | 256
Adds scaler, viewport, gamut remap, and pixel depth programming.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/dce110/dce110_transform.c | 91 +++
.../gpu/drm/amd/dal/dc/dce110/dce110_transform.h | 87 +++
.../amd/dal/dc/dce110
Enables HW programming on Tonga and Fiji (DCE 10) ASICs. This
mostly re-uses DCE 11 programming code with minor exceptions
and using DCE 10 register offsets.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce100/Makefile | 23 +
.../drm/amd/dal
Adds empty encoder HW programming functions to support
enablement of virtual pipes (i.e. pipes without actual
display output).
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/virtual/Makefile| 9 ++
.../drm/amd/dal/dc/virtual
-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce110/Makefile | 15 +
.../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c| 1658
.../drm/amd/dal/dc/dce110/dce110_hw_sequencer.h| 36 +
.../gpu/drm/amd/dal/dc/dce110
Implements DRM's atomic KMS interfaces using DC.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/amdgpu_dm/Makefile | 17 +
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c | 1470 +++
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu
Signed-off-by: Harry Wentland
Reviewed-by: Mykola Lysenko
---
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c
b/drivers/gpu/drm/amd/dal/amdgpu_dm
From: Mykola Lysenko
Get on par with buffer management changes made in base driver
Signed-off-by: Mykola Lysenko
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c | 10 --
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c | 17 +++--
2
From: Andrey Grodzovsky
Signed-off-by: Andrey Grodzovsky
Acked-by: Jordan Lazare
Reviewed-by: Harry Wentland
---
.../drm/amd/dal/dc/dce100/dce100_hw_sequencer.c| 28 --
.../gpu/drm/amd/dal/dc/dce100/dce100_resource.c| 3 ++-
2 files changed, 2 insertions(+), 29
Start to use dal by default on Carrizo, Tonga, and Fiji ASICs.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Kconfig | 3 +
drivers/gpu/drm/amd/amdgpu/Makefile| 17 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 10 +-
drivers/gpu
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dal_services.h | 266 ++
drivers/gpu/drm/amd/dal/dal_services_types.h | 62 ++
drivers/gpu/drm/amd/dal/dc/dc.h| 462 ++
drivers/gpu/drm/amd/dal/dc
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/calcs/Makefile | 10 +
drivers/gpu/drm/amd/dal/dc/calcs/bandwidth_calcs.c | 3941
drivers/gpu/drm/amd/dal/dc/calcs/bw_fixed.c| 300 ++
drivers/gpu/drm/amd/dal/dc/calcs
Wrapper to access Video BIOS command and data tables
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/bios/Makefile | 26 +
drivers/gpu/drm/amd/dal/dc/bios/bios_parser.c | 5029
drivers/gpu/drm/amd/dal/dc/bios
display HW
- dc_interrupt_set/ack - set and ack interrupts
- etc.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/Makefile | 28 +
drivers/gpu/drm/amd/dal/dc/core/dc.c | 932 +++
drivers/gpu/drm/amd/dal/dc/core
For sure. Thanks, Oded.
I'll send out squashed patches later today.
Harry
On 2016-02-11 04:00 PM, Oded Gabbay wrote:
> On Thu, Feb 11, 2016 at 7:20 PM, Harry Wentland
> wrote:
>> Signed-off-by: Harry Wentland
>> Reviewed-by: Mykola Lysenko
>> ---
>>
display dongles
- Timing synchronization between DP and HDMI
This patch series is based on Alex Deucher's drm-next-4.6-wip tree.
Harry Wentland (26):
drm/amd/dal: Add dal headers
drm/amd/dal: Add DAL Basic Types and Logger
drm/amd/dal: Fixed point arithmetic
drm/amd/dal: Asic Capabilities
- Logging functionality
This patch adds Kconfig options to enable the DAL
display driver.
- DRM_AMD_DAL
- DRM_AMD_DAL_VBIOS_PRESENT
- DRM_AMD_DAL_DCE11_0
- DRM_AMD_DAL_DCE10_0
- DEBUG_KERNEL_DAL
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/Kconfig
Arithmetic operations on real numbers represented
as fixed-point numbers.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/basics/Makefile | 2 +-
drivers/gpu/drm/amd/dal/dc/basics/fixpt31_32.c | 692 +
drivers/gpu/drm/amd/dal
Add a generic way to manage display HW capabilities
for different ASICs and implement it for Carrizo.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/asic_capability/Makefile| 35
.../amd/dal/dc/asic_capability/asic_capability.c | 190
Manages all DCE GPIO pins. The pins are represented as generic IO
handles as well as handles dedicated for certain functions, such as
DDC, HPD, and DVO.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/gpio/Makefile | 32 +
.../gpu/drm/amd/dal
Implements low-level communication layer over I2C and Aux lines using
GPIO handles.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/i2caux/Makefile | 33 +
drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c | 567
drivers/gpu/drm/amd
Provides information about ASIC features and capabilities. Also provides
access to ASIC resources such as VBIOS, GPIO and I2cAux Manager
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/adapter/Makefile| 24 +
.../gpu/drm/amd/dal/dc/adapter
Interface to set and ack DCE interrupts.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/irq/Makefile| 21 ++
.../drm/amd/dal/dc/irq/dce110/irq_service_dce110.c | 389 +
.../drm/amd/dal/dc/irq/dce110/irq_service_dce110.h
Encapsulates programming for HW blocks which are shared between display
paths, such as clock sources.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/gpu/Makefile| 22 +
.../gpu/drm/amd/dal/dc/gpu/dc_clock_generator.c| 92 ++
.../gpu/drm
Responsible for programming the audio encoder in the display path.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/audio/Makefile | 22 +
drivers/gpu/drm/amd/dal/dc/audio/audio.h | 195 ++
drivers/gpu/drm/amd/dal/dc/audio
Adds pixel clock programming and functionality to
power down clock sources.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../drm/amd/dal/dc/dce110/dce110_clock_source.c| 1162
.../drm/amd/dal/dc/dce110/dce110_clock_source.h| 64 ++
2 files changed
Responsible for programming back-end of display path, such as DIG,
UNIPHY, DP, DAC, and DVO.
Supports:
- DisplayPort (single stream)
- HDMI
- DVI
- eDP
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../drm/amd/dal/dc/dce110/dce110_link_encoder.c| 1927
Adds ability to validate and program timings, enable, disable, and blank
CRTCs, and get CRTC status information.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../amd/dal/dc/dce110/dce110_timing_generator.c| 1864
.../amd/dal/dc/dce110
Adds watermark, DMIF, and surface programming.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c | 965 +
.../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h | 117 +++
2 files changed, 1082 insertions(+)
create
Adds framebuffer compression programming. Currently unused.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/dce110/dce110_compressor.c | 886 +
.../gpu/drm/amd/dal/dc/dce110/dce110_compressor.h | 84 ++
2 files changed, 970 insertions
Adds programming for color space conversion (CSC),
regamma, and formatter.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.c | 272 +++
drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h | 143 ++
drivers/gpu/drm/amd/dal/dc/dce110
Adds programming of cursor and input gamma.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.c | 65 ++
drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h | 100 +++
.../gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c | 256
Adds scaler, viewport, gamut remap, and pixel depth programming.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
.../gpu/drm/amd/dal/dc/dce110/dce110_transform.c | 91 +++
.../gpu/drm/amd/dal/dc/dce110/dce110_transform.h | 87 +++
.../amd/dal/dc/dce110
-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce110/Makefile | 15 +
.../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c| 1658
.../drm/amd/dal/dc/dce110/dce110_hw_sequencer.h| 36 +
.../gpu/drm/amd/dal/dc/dce110
Enables HW programming on Tonga and Fiji (DCE 10) ASICs. This
mostly re-uses DCE 11 programming code with minor exceptions
and using DCE 10 register offsets.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/dce100/Makefile | 23 +
.../drm/amd/dal
Start to use dal by default on Carrizo, Tonga, and Fiji ASICs.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Kconfig | 3 +
drivers/gpu/drm/amd/amdgpu/Makefile| 17 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 10 +-
drivers/gpu
Adds empty encoder HW programming functions to support
enablement of virtual pipes (i.e. pipes without actual
display output).
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dc/virtual/Makefile| 9 ++
.../drm/amd/dal/dc/virtual
Implements DRM's atomic KMS interfaces using DC.
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/amdgpu_dm/Makefile | 17 +
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c | 1468 +++
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu
Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/dal/dal_services.h | 266 ++
drivers/gpu/drm/amd/dal/dal_services_types.h | 62 ++
drivers/gpu/drm/amd/dal/dc/dc.h| 462 ++
drivers/gpu/drm/amd/dal/dc
DVO was mainly used for crossfire pre-DCE 8, and possibly on some DCE 8
(Tonga) SKUs as well. On newer ASICs crossfire uses XDMA so there's no
longer a need for DVO.
It's probably safe to drop it for amdgpu. Radeon driver might still want
to keep it if there's support for it.
Harry
On 2016-0
Patch makes sense to me. It looks like when the receiver detects an
upstream disconnect it will reset its internal state, at least somewhat.
We've seen that happen when system enters S3 and GPU loses power.
Reviewed-by: Harry Wentland
Harry
On 2016-04-13 04:50 PM, Lyude wrote:
> S
Makes sense to me.
Reviewed-by: Harry Wentland
Harry
On 2016-04-14 04:25 AM, Christian König wrote:
> Am 14.04.2016 um 04:56 schrieb Dave Airlie:
>> DAL has a concept of storing the graphics object ids in a special
>> small struct, and adding type safety to them.
>&g
On 2018-10-01 03:15 AM, Daniel Vetter wrote:
> On Mon, Sep 24, 2018 at 02:15:34PM -0400, Nicholas Kazlauskas wrote:
>> These patches are part of a proposed new interface for supporting variable
>> refresh rate via DRM properties.
>>
>> === Changes from v1 ===
>>
>> For drm:
>>
>> * The variable_
ED_HPD_DISCON;
>>> ~ ^~~
>>>
>>> The current enum is incorrect, it should be from aux_transaction_reply,
>>> so use AUX_TRANSACTION_REPLY_HPD_DISCON.
>>>
>>> Reported-by: Nick Desaulniers
>>> Sugge
1a6481 ("drm/amd/display: Use DRM helper for
> best_encoder").
>
> Cc: Ville Syrjälä
> Signed-off-by: Daniel Vetter
> Cc: Alex Deucher
> Cc: Harry Wentland
> Cc: Andrey Grodzovsky
> Cc: Tony Cheng
> Cc: "Leo (Sunpeng) Li"
> Cc: Shirish S
On 2018-10-04 04:24 PM, Daniel Vetter wrote:
> Motivated by review comments from Ville&Sean.
>
> Cc: Ville Syrjälä
> Cc: Sean Paul
> Signed-off-by: Daniel Vetter
Acked-by: Harry Wentland
Harry
> ---
> Documentation/gpu/todo.rst | 10 ++
> 1 file changed
On 2018-10-03 02:35 PM, Manasi Navare wrote:
> On Wed, Oct 03, 2018 at 10:41:20AM +0200, Daniel Vetter wrote:
>> On Tue, Oct 02, 2018 at 10:49:17AM -0400, Harry Wentland wrote:
>>>
>>>
>>> On 2018-10-01 03:15 AM, Daniel Vetter wrote:
>>>> On
On 2018-10-03 04:41 AM, Daniel Vetter wrote:
> On Tue, Oct 02, 2018 at 10:49:17AM -0400, Harry Wentland wrote:
>>
>>
>> On 2018-10-01 03:15 AM, Daniel Vetter wrote:
>>> On Mon, Sep 24, 2018 at 02:15:34PM -0400, Nicholas Kazlauskas wrote:
>>>> These patche
On 2018-10-03 04:25 AM, Mike Lothian wrote:
> Hi
>
> I'm curious to know whether this will/could work over PRIME
>
I don't see why this shouldn't work over PRIME as long as the presenting GPU
supports the new variable refresh rate API, but I know very little about prime,
so maybe someone else
On 2018-10-11 12:39 PM, Nicholas Kazlauskas wrote:
> Support for AMDGPU specific FreeSync properties and ioctls are dropped
> from amdgpu_dm in favor of supporting drm variable refresh rate
> properties.
>
> The drm vrr_capable property is now attached to any DP/HDMI connector.
> Its value is upda
On 2018-10-11 04:56 PM, Kazlauskas, Nicholas wrote:
> On 10/11/2018 04:39 PM, Harry Wentland wrote:
>> On 2018-10-11 12:39 PM, Nicholas Kazlauskas wrote:
>>> Support for AMDGPU specific FreeSync properties and ioctls are dropped
>>> from amdgpu_dm in favor of supportin
The leadership of freedesktop.org (fd.o) has recently expressed interest
in having an elected governing body. Given the tight connection between
fd.o and X.Org and the fact that X.Org has such a governing body it
seemed obvious to consider extending X.Org's mandate to fd.o.
Quite a bit of backgrou
Paul
I'm not familiar with the runtime_pm stuff, as is painfully obvious from the
fact that we missed that with the DC driver. That said, from a cursory look at
runtime_pm.txt, this looks right.
Reviewed-by: Harry Wentland
I'll pull this in through the amd-stg tree.
> ---
>
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