[PATCH] drm/tegra: dpaux: Fix error handling

ODEV; > + return PTR_ERR(dpaux->pinctrl); > } > #endif > /* enable and clear all interrupts */ Thanks for the fix! Acked-by: Jon Hunter Cheers Jon -- nvpublic

[PATCH v8 2/4] drm: Add API for capturing frame CRCs

Hi Tomeu, On 09/09/16 10:56, Tomeu Vizoso wrote: > Adds files and directories to debugfs for controlling and reading frame > CRCs, per CRTC: > > dri/0/crtc-0/crc > dri/0/crtc-0/crc/control > dri/0/crtc-0/crc/data > > Drivers can implement the set_crc_source callback() in drm_crtc_funcs to >

[PATCH v8 2/4] drm: Add API for capturing frame CRCs

On 04/10/16 12:25, Daniel Vetter wrote: > On Tue, Oct 4, 2016 at 12:10 PM, Jon Hunter wrote: >> Looks like crtc is a errno in the above case. I see this function is >> called by looping through all the crtc and we never check to see if >> they are valid. Should we? >

[PATCH 08/12] i2c: core: Add support for 'i2c-bus' subnode

On 02/08/16 07:26, Tomeu Vizoso wrote: > On 23 June 2016 at 17:59, Jon Hunter wrote: >> If the 'i2c-bus' device-tree node is present for an I2C adapter then >> parse this subnode for I2C slaves. >> >> Signed-off-by: Jon Hunter >> --- >> drivers/i2c/i2c-co

[PATCH v2] drm/tegra: dpaux: Modify error handling

> dev_err(>dev, "failed to register pincontrol\n"); > - return -ENODEV; > + return PTR_ERR(dpaux->pinctrl); > } > #endif > /* enable and clear all interrupts */ > Acked-by: Jon Hunter Cheers! Jon -- nvpublic

[RFC PATCH 00/13] Add support for Tegra DPAUX pinctrl

The Display Port Auxiliary (DPAUX) channel pads can be shared with an internal I2C controller. Add pinctrl support for these pads so that the I2C controller can request and use these pads. Jon Hunter (13): drm/tegra: Clean-up if probing DPAUX fails drm/tegra: Add helper functions for setting

[RFC PATCH 02/13] drm/tegra: Add helper functions for setting up DPAUX pads

modes, a case statement is used because when integrating with the pinctrl framework, we need to be able to handle invalid modes that could be passed. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 75 ++- 1 file changed, 45 insertions(+), 30

[RFC PATCH 03/13] dt-bindings: drm/tegra: Update DPAUX documentation

Update the DPAUX compatibility string information for Tegra124, Tegra132 and Tegra210. For Tegra210 an additional clock, 'sor-safe' is also required for DPAUX and so add this clock information as well. Signed-off-by: Jon Hunter --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt

[RFC PATCH 04/13] drm/tegra: Add sor-safe clock for DPAUX on Tegra210

For Tegra210 the 'sor-safe' clock needs to be enabled when using DPAUX. Add support to the DPAUX driver for enabling this clock on Tegra210. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff

[RFC PATCH 05/13] drm/tegra: Prepare DPAUX for supporting generic PM domains

-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 ++ 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index d696a7e45935..289bb064ca1e 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm

[RFC PATCH 01/13] drm/tegra: Clean-up if probing DPAUX fails

If the probing of the DPAUX fails, then clocks are left enabled and the DPAUX reset de-asserted. Add code to perform the necessary clean-up on probe failure by disabling clocks and asserting the reset. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 -- 1

[RFC PATCH 07/13] dt-bindings: i2c: Add support for 'i2c-bus' subnode

driver core by adding support for a 'i2c-bus' subnode where I2C slaves can be placed. If the 'i2c-bus' subnode is present then all I2C slaves must be placed under this subnode. Signed-off-by: Jon Hunter --- Documentation/devicetree/bindings/i2c/i2c.txt | 8 1 file changed, 8 insertions

[RFC PATCH 11/13] arm64: tegra: Add SOR power-domain node

power-domain will be turned on before probing SOR or DPAUX devices and kept on while the devices are bound. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b

[RFC PATCH 06/13] pinctrl: pinconf: Add generic helper function for freeing mappings

The pinconf-generic.h file exposes functions for creating generic mappings but it does not expose a function for freeing the mappings. Add a function for freeing generic mappings. Signed-off-by: Jon Hunter --- drivers/pinctrl/pinconf-generic.c | 8 include/linux/pinctrl/pinconf

[RFC PATCH 08/13] i2c: core: Add support for 'i2c-bus' subnode

If the 'i2c-bus' device-tree node is present for an I2C adapter then parse this subnode for I2C slaves. Signed-off-by: Jon Hunter --- drivers/i2c/i2c-core.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index

[RFC PATCH 09/13] dt-bindings: drm/tegra: Add DPAUX pinctrl documentation

roller binding document and add the 'i2c-bus' subnode. The 'i2c-bus' subnode is used for populating I2C slaves for the DPAUX device so that the I2C driver core does not attempt to add the DPAUX pad controller nodes as I2C slaves. Signed-off-by: Jon Hunter --- .../display/tegra/nvidia,tegra2

[RFC PATCH 10/13] drm/tegra: Add pinctrl support for DPAUX

The DPAUX pins are shared with an internal I2C controller. To allow these pins to be muxed to the I2C controller, register a pinctrl device for the DPAUX device. Make Tegra DRM support dependent on PINCTRL to avoid any compilation issues. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra

[RFC PATCH 12/13] arm64: tegra: Add sor-safe clock to DPAUX binding

Populate the 'sor-safe' clock for DPAUX devices on Tegra210 that require this clock for operation. Update the compatability string for the DPAUX instance at address 0x545c to be "nvidia,tegra210-dpaux" to ensure that the 'sor-safe' clock is enabled for this device. Signed-off-by:

[RFC PATCH 13/13] arm64: tegra: Add DPAUX pinctrl bindings

e, etc) because the SOR driver will directly set the state needed. For I2C clients only the I2C mode is used and so we can simplify matters by using the generic pinctrl states for default and idle. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 48

[RFC PATCH 10/13] drm/tegra: Add pinctrl support for DPAUX

On 17/06/16 13:03, Jon Hunter wrote: > The DPAUX pins are shared with an internal I2C controller. To allow > these pins to be muxed to the I2C controller, register a pinctrl device > for the DPAUX device. Make Tegra DRM support dependent on PINCTRL to > avoid any compilation issue

[RFC PATCH 02/13] drm/tegra: Add helper functions for setting up DPAUX pads

On 17/06/16 17:11, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:36PM +0100, Jon Hunter wrote: >> In preparation for adding pinctrl support for the DPAUX pads, add >> helpers functions for configuring the pads and controlling the

[RFC PATCH 03/13] dt-bindings: drm/tegra: Update DPAUX documentation

On 17/06/16 17:13, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:37PM +0100, Jon Hunter wrote: >> Update the DPAUX compatibility string information for Tegra124, Tegra132 >> and Tegra210. For Tegra210 an additional clock, 'sor-safe

[RFC PATCH 04/13] drm/tegra: Add sor-safe clock for DPAUX on Tegra210

On 17/06/16 17:18, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:38PM +0100, Jon Hunter wrote: >> For Tegra210 the 'sor-safe' clock needs to be enabled when using DPAUX. >> Add support to the DPAUX driver for enabling t

[RFC PATCH 08/13] i2c: core: Add support for 'i2c-bus' subnode

On 17/06/16 17:24, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:42PM +0100, Jon Hunter wrote: >> If the 'i2c-bus' device-tree node is present for an I2C adapter then >> parse this subnode for I2C slaves. >> &

[RFC PATCH 09/13] dt-bindings: drm/tegra: Add DPAUX pinctrl documentation

On 17/06/16 17:31, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:43PM +0100, Jon Hunter wrote: >> On Tegra124, Tegra132 and Tegra210 devices the pads used by the Display >> Port Auxiliary (DPAUX) channel are multiplexed su

[RFC PATCH 11/13] arm64: tegra: Add SOR power-domain node

On 17/06/16 17:42, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: >> Add node for SOR power-domain for Tegra210 and populate the SOR >> power-domain phandle for SOR and DPAUX nodes that are dependent &g

[RFC PATCH 11/13] arm64: tegra: Add SOR power-domain node

On 17/06/16 17:44, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:45PM +0100, Jon Hunter wrote: >> Add node for SOR power-domain for Tegra210 and populate the SOR >> power-domain phandle for SOR and DPAUX nodes that are dependent &g

[RFC PATCH 12/13] arm64: tegra: Add sor-safe clock to DPAUX binding

On 17/06/16 17:47, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:46PM +0100, Jon Hunter wrote: >> Populate the 'sor-safe' clock for DPAUX devices on Tegra210 that require >> this clock for operation. Update the compatability

[RFC PATCH 06/13] pinctrl: pinconf: Add generic helper function for freeing mappings

On 18/06/16 10:04, Linus Walleij wrote: > On Fri, Jun 17, 2016 at 2:03 PM, Jon Hunter wrote: > >> The pinconf-generic.h file exposes functions for creating generic mappings >> but it does not expose a function for freeing the mappings. Add a function >> for

[RFC PATCH 10/13] drm/tegra: Add pinctrl support for DPAUX

On 17/06/16 17:37, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:44PM +0100, Jon Hunter wrote: >> The DPAUX pins are shared with an internal I2C controller. To allow >> these pins to be muxed to the I2C controller, regi

[RFC PATCH 07/13] dt-bindings: i2c: Add support for 'i2c-bus' subnode

On 17/06/16 17:45, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 05:30:54PM +0100, Mark Rutland wrote: >> On Fri, Jun 17, 2016 at 01:03:41PM +0100, Jon Hunter wrote: >>> The I2C driver core for boards using device-tree assumes a

[PATCH 00/12] Add support for Tegra DPAUX pinctrl

tables, and functions may not be defined). - Updated SOR power partition device-tree node to include all clocks and resets as described in the Tegra210 TRM. [0] http://marc.info/?l=linux-tegra=146667915802019=2 Jon Hunter (12): soc/tegra: pmc: Initialise resets associated with a power partition

[PATCH 01/12] soc/tegra: pmc: Initialise resets associated with a power partition

in the correct state (based upon the partition's current state) when obtaining the resets for a partition. Signed-off-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c

[PATCH 02/12] drm/tegra: Clean-up if probing DPAUX fails

If the probing of the DPAUX fails, then clocks are left enabled and the DPAUX reset de-asserted. Add code to perform the necessary clean-up on probe failure by disabling clocks and asserting the reset. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 -- 1

[PATCH 03/12] drm/tegra: Add helper functions for setting up DPAUX pads

modes, a case statement is used because when integrating with the pinctrl framework, we need to be able to handle invalid modes that could be passed. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 81 +++ 1 file changed, 51 insertions(+), 30

[PATCH 04/12] dt-bindings: display: Update Tegra DPAUX documentation

Update the DPAUX compatibility string information for Tegra124, Tegra132 and Tegra210. Signed-off-by: Jon Hunter --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings

[PATCH 05/12] drm/tegra: Prepare DPAUX for supporting generic PM domains

-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 ++ 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 4014ec57ed31..61821f457209 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm

[PATCH 06/12] pinctrl: pinconf: Add generic helper function for freeing mappings

The pinconf-generic.h file exposes functions for creating generic mappings but it does not expose a function for freeing the mappings. Add a function for freeing generic mappings. Signed-off-by: Jon Hunter Acked-by: Linus Walleij --- drivers/pinctrl/pinconf-generic.c | 8

[PATCH 07/12] dt-bindings: i2c: Add support for 'i2c-bus' subnode

driver core by adding support for a 'i2c-bus' subnode where I2C slaves can be placed. If the 'i2c-bus' subnode is present then all I2C slaves must be placed under this subnode. Signed-off-by: Jon Hunter Acked-by: Thierry Reding --- Documentation/devicetree/bindings/i2c/i2c.txt | 8 1

[PATCH 08/12] i2c: core: Add support for 'i2c-bus' subnode

If the 'i2c-bus' device-tree node is present for an I2C adapter then parse this subnode for I2C slaves. Signed-off-by: Jon Hunter --- drivers/i2c/i2c-core.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index

[PATCH 09/12] dt-bindings: Add bindings for Tegra DPAUX pinctrl driver

ate the main DPAUX binding documentation to reference the DPAUX pad controller binding document and add the 'i2c-bus' subnode. The 'i2c-bus' subnode is used for populating I2C slaves for the DPAUX device so that the I2C driver core does not attempt to add the DPAUX pad controller nodes as I2C slaves. Sig

[PATCH 10/12] drm/tegra: Add pinctrl support for DPAUX

-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 122 -- 1 file changed, 119 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 61821f457209..7b2abaf33a7a 100644 --- a/drivers/gpu/drm/tegra/dpaux.c

[PATCH 12/12] arm64: tegra: Add DPAUX pinctrl bindings

e, etc) because the SOR driver will directly set the state needed. For I2C clients only the I2C mode is used and so we can simplify matters by using the generic pinctrl states for default and idle. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 54

[PATCH 11/12] arm64: tegra: Add SOR power-domain node

power-domain will be turned on before probing SOR or DPAUX devices and kept on while the devices are bound. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi

[PATCH 1/3] drm/tegra: Prepare DSI for supporting generic PM domains

because we cannot guarantee that the reset will be asserted/de-asserted at the appropriate time. Therefore, given that the Tegra generic PM domain code will handle the resets, do not request the reset in the DSI driver if the DSI device has a PM domain associated. Signed-off-by: Jon Hunter

[PATCH 2/3] drm/tegra: Prepare SOR for supporting generic PM domains

because we cannot guarantee that the reset will be asserted/de-asserted at the appropriate time. Therefore, given that the Tegra generic PM domain code will handle the resets, do not request the reset in the SOR driver if the SOR device has a PM domain associated. Signed-off-by: Jon Hunter

[PATCH 3/3] arm64: tegra: Populate SOR power domain for DSI

The DSI device requires that the SOR power partition is enabled when active. Populate this power partition for the Tegra210 DSI nodes. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210

[PATCH] drm/tegra: dsi: Enhance runtime power management

unter > Signed-off-by: Thierry Reding This patch along with the fix from Vince [0] fixes the hang during boot on Tegra114. So ... Tested-by: Jon Hunter Cheers Jon [0] http://marc.info/?l=linux-kernel=144017122430016=2 -- nvpublic

[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

On 04/05/16 12:39, Laxman Dewangan wrote: > The function tegra_pmc_readl() returns the u32 type data and hence > change the data type of variable where this data is stored to u32 > type. > > Signed-off-by: Laxman Dewangan > > --- > Changes from V1: > -This is new in series as per discussion on

[PATCH V3 3/4] soc/tegra: pmc: Add support for IO pads power state and voltage

On 04/05/16 12:39, Laxman Dewangan wrote: > The IO pins of Tegra SoCs are grouped for common control of IO > interface like setting voltage signal levels and power state of > the interface. The group is generally referred as IO pads. The > power state and voltage control of IO pins can be done at

[PATCH V3 4/4] soc/tegra: pmc: Register PMC child devices as platform device

On 04/05/16 12:39, Laxman Dewangan wrote: > Power Management Controller(PMC) of Tegra does the multiple chip > power related functionality for internal and IO interfacing. > Some of the functionalities are power gating of IP blocks, IO pads > voltage and power state configuration, system power

[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

On 05/05/16 10:52, Laxman Dewangan wrote: > > On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote: >> On 04/05/16 12:39, Laxman Dewangan wrote: >>> The function tegra_pmc_readl() returns the u32 type data and hence >>> change the data type of variable where this

[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

On 05/05/16 13:35, Laxman Dewangan wrote: > > On Thursday 05 May 2016 06:13 PM, Jon Hunter wrote: >> On 05/05/16 10:52, Laxman Dewangan wrote: >>> On Thursday 05 May 2016 03:19 PM, Jon Hunter wrote: >>>> On 04/05/16 12:39, Laxman Dewangan wrote: >>>

[PATCH V3 3/4] soc/tegra: pmc: Add support for IO pads power state and voltage

On 05/05/16 11:32, Laxman Dewangan wrote: > > On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote: >> On 04/05/16 12:39, Laxman Dewangan wrote: > >> +return -EINVAL; >> + >> +for (i = 0; i < soc->num_io_pads; ++i) { >> +

[PATCH V3 3/4] soc/tegra: pmc: Add support for IO pads power state and voltage

On 05/05/16 14:09, Laxman Dewangan wrote: > > On Thursday 05 May 2016 06:38 PM, Jon Hunter wrote: >> On 05/05/16 11:32, Laxman Dewangan wrote: >>> On Thursday 05 May 2016 03:43 PM, Jon Hunter wrote: >>>> On 04/05/16 12:39, Laxman Dewangan wr

[PATCH V3 3/4] soc/tegra: pmc: Add support for IO pads power state and voltage

On 05/05/16 14:35, Laxman Dewangan wrote: > > On Thursday 05 May 2016 07:03 PM, Jon Hunter wrote: >> On 05/05/16 14:09, Laxman Dewangan wrote: >>> On Thursday 05 May 2016 06:38 PM, Jon Hunter wrote: >>>> On 05/05/16 11:32, Laxman Dewangan wrote: >>>>&

[PATCH V4 1/3] soc/tegra: pmc: Use BIT macro for register field definition

lt; 30) > +#define IO_DPD_REQ_CODE_MASK (3U << 30) > > #define IO_DPD_STATUS0x1bc > #define IO_DPD2_REQ 0x1c0 > @@ -96,10 +96,10 @@ > #define PMC_SCRATCH54_ADDR_SHIFT 0 > > #define PMC_SCRATCH55

[PATCH V4 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

owergates_lock); > @@ -935,8 +936,9 @@ EXPORT_SYMBOL(tegra_io_rail_power_on); > > int tegra_io_rail_power_off(unsigned int id) > { > - unsigned long request, status, value; > - unsigned int bit, mask; > + unsigned long request, status; > + unsigned int bit; > + u32 value, mask; > int err; > > mutex_lock(>powergates_lock); > Reviewed-by: Jon Hunter Cheers Jon

[PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 06/05/16 11:45, Laxman Dewangan wrote: > The IO pins of Tegra SoCs are grouped for common control of IO > interface like setting voltage signal levels and power state of > the interface. The group is generally referred as IO pads. The > power state and voltage control of IO pins can be done at

[PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 06/05/16 16:32, Laxman Dewangan wrote: > > On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: >> On 06/05/16 11:45, Laxman Dewangan wrote: >> + >> +/* Last entry */ >> +TEGRA_IO_PAD_MAX, >> Nit should these be TEGRA_IO_PADS_xxx? > > Because th

[PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 11/05/16 14:28, Laxman Dewangan wrote: > On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote: >> On 06/05/16 16:32, Laxman Dewangan wrote: >>> On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: >>>> On 06/05/16 11:45, Laxman Dewangan wrote:

[PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 11/05/16 18:22, Laxman Dewangan wrote: > > On Wednesday 11 May 2016 09:05 PM, Jon Hunter wrote: >> On 11/05/16 14:28, Laxman Dewangan wrote: >>> On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote: >>>> On 06/05/16 16:32, Laxman Dewangan wrote: >>>>

[PATCH] drm/tegra: Fix crash caused by reference count imbalance

r. Finally, add a warning if allocating memory for the state information fails in tegra_dsi_connector_reset(). Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)") Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dsi.c | 16 1 file changed, 12 insertion

[PATCH] drm/tegra: Fix crash caused by reference count imbalance

On 17/05/16 17:46, Daniel Vetter wrote: > On Tue, May 17, 2016 at 05:27:15PM +0100, Jon Hunter wrote: >> Commit d2307dea14a4 ("drm/atomic: use connector references (v3)") added >> reference counting for DRM connectors and this caused a crash when >> exercising sys

[PATCH] drm/tegra: Fix crash caused by reference count imbalance

On 17/05/16 18:36, Daniel Vetter wrote: > On Tue, May 17, 2016 at 7:29 PM, Jon Hunter wrote: >>>> @@ -764,6 +769,9 @@ tegra_dsi_connector_duplicate_state(struct >>>> drm_connector *connector) >>>> if (!copy) >>>>

[PATCH V2] drm/tegra: Fix crash caused by reference count imbalance

ector_destroy_state() in order to put the reference for the connector. Finally, add a warning if allocating memory for the state information fails in tegra_dsi_connector_reset(). Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)") Signed-off-by: Jon Hunter --- V2 changes: -

[PATCH V3] drm/tegra: Fix crash caused by reference count imbalance

ector_destroy_state() in order to put the reference for the connector. Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)") Signed-off-by: Jon Hunter Reviewed-by: Daniel Vetter Acked-by: Thierry Reding --- V3 changes: - Dropped WARN_ON V2 changes: - Updated to next

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 12/05/16 13:21, Laxman Dewangan wrote: > The IO pins of Tegra SoCs are grouped for common control of IO > interface like setting voltage signal levels and power state of > the interface. The group is generally referred as IO pads. The > power state and voltage control of IO pins can be done at

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 19/05/16 17:13, Laxman Dewangan wrote: > On Thursday 19 May 2016 09:24 PM, Jon Hunter wrote: >> On 12/05/16 13:21, Laxman Dewangan wrote: >>> The IO pins of Tegra SoCs are grouped for common control of IO >>> interface like setting voltage signal levels and power

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 19/05/16 16:54, Jon Hunter wrote: > > On 12/05/16 13:21, Laxman Dewangan wrote: >> The IO pins of Tegra SoCs are grouped for common control of IO >> interface like setting voltage signal levels and power state of >> the interface. The group is generally referred as IO

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 12/05/16 13:21, Laxman Dewangan wrote: > The IO pins of Tegra SoCs are grouped for common control of IO > interface like setting voltage signal levels and power state of > the interface. The group is generally referred as IO pads. The > power state and voltage control of IO pins can be done at

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 20/05/16 10:59, Laxman Dewangan wrote: > > On Friday 20 May 2016 03:32 PM, Jon Hunter wrote: >> On 12/05/16 13:21, Laxman Dewangan wrote: >> +#define TEGRA_IO_PADS_T124_T210(TEGRA_IO_PADS_T124 |\ >> +TEGRA_IO_PADS_T210) >> + >&

[PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 20/05/16 12:59, Laxman Dewangan wrote: > The IO pins of Tegra SoCs are grouped for common control of IO > interface like setting voltage signal levels and power state of > the interface. The group is generally referred as IO pads. The > power state and voltage control of IO pins can be done at

[PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 20/05/16 14:34, Laxman Dewangan wrote: > > On Friday 20 May 2016 07:02 PM, Jon Hunter wrote: >> On 20/05/16 12:59, Laxman Dewangan wrote: >>> +/* tegra_io_pads_config_info: Tegra IO pads bit config info. >>> + * @dpd_config_bit: DPD configuration bit pos

[PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 20/05/16 14:34, Laxman Dewangan wrote: > > On Friday 20 May 2016 07:02 PM, Jon Hunter wrote: >> On 20/05/16 12:59, Laxman Dewangan wrote: >>> +/* tegra_io_pads_config_info: Tegra IO pads bit config info. >>> + * @dpd_config_bit: DPD configuration bit pos

[PATCH V7 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

ra132 and Tegra210. The SOR > driver is modified to use the new APIs. > > Signed-off-by: Laxman Dewangan Thanks. I will defer to Thierry on how this should be organised for merging but I am happy with the code. There is one minor typo below, but otherwise ... Acked-by: Jon Hunte

[PATCH V7 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On 23/05/16 10:03, Jon Hunter wrote: > > On 20/05/16 15:45, Laxman Dewangan wrote: >> The IO pins of Tegra SoCs are grouped for common control of IO >> interface like setting voltage signal levels and power state of >> the interface. The group is generally referred as IO

[PATCH 07/12] dt-bindings: i2c: Add support for 'i2c-bus' subnode

On 27/06/16 13:04, Peter Rosin wrote: > On 2016-06-23 17:59, Jon Hunter wrote: >> The I2C driver core for boards using device-tree assumes any subnode of >> an I2C adapter in the device-tree blob as being a I2C slave device. >> Although this makes complete sense, some

[PATCH 07/12] dt-bindings: i2c: Add support for 'i2c-bus' subnode

On 28/06/16 22:32, Wolfram Sang wrote: > * PGP Signed by an unknown key > >> For >> example some Tegra devices have an I2C interface which may share its >> pins with other devices and to share these pins subnodes for >> representing these pins so they have be shared via the pinctrl framework >>

[PATCH V2 00/11] Add support for Tegra DPAUX pinctrl

in the Tegra210 TRM. [0] http://marc.info/?l=linux-tegra=146667915802019=2 [1] http://marc.info/?l=linux-tegra=146669759407988=2 Jon Hunter (11): soc/tegra: pmc: Initialise resets associated with a power partition drm/tegra: Clean-up if probing DPAUX fails drm/tegra: Add helper functions for setting up

[PATCH V2 01/11] soc/tegra: pmc: Initialise resets associated with a power partition

in the correct state (based upon the partition's current state) when obtaining the resets for a partition. Signed-off-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c

[PATCH V2 02/11] drm/tegra: Clean-up if probing DPAUX fails

If the probing of the DPAUX fails, then clocks are left enabled and the DPAUX reset de-asserted. Add code to perform the necessary clean-up on probe failure by disabling clocks and asserting the reset. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 -- 1

[PATCH V2 03/11] drm/tegra: Add helper functions for setting up DPAUX pads

modes, a case statement is used because when integrating with the pinctrl framework, we need to be able to handle invalid modes that could be passed. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 81 +++ 1 file changed, 51 insertions(+), 30

[PATCH V2 04/11] dt-bindings: display: Update Tegra DPAUX documentation

Update the DPAUX compatibility string information for Tegra124, Tegra132 and Tegra210. Signed-off-by: Jon Hunter Acked-by: Rob Herring --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[PATCH V2 05/11] drm/tegra: Prepare DPAUX for supporting generic PM domains

-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 ++ 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 4014ec57ed31..61821f457209 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm

[PATCH V2 06/11] dt-bindings: i2c: Add support for 'i2c-bus' subnode

that are not parsed by the I2C driver core, add support for an optional 'i2c-bus' subnode where I2C slaves can be placed. If the 'i2c-bus' subnode is present then all I2C slaves must be placed under this subnode. Signed-off-by: Jon Hunter Acked-by: Thierry Reding Acked-by: Rob Herring --- Documentation

[PATCH V2 07/11] i2c: core: Add support for 'i2c-bus' subnode

If the 'i2c-bus' device-tree node is present for an I2C adapter then parse this subnode for I2C slaves. Signed-off-by: Jon Hunter Acked-by: Wolfram Sang --- drivers/i2c/i2c-core.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/i2c-core.c b/drivers

[PATCH V2 09/11] drm/tegra: Add pinctrl support for DPAUX

-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 122 -- 1 file changed, 119 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 61821f457209..7b2abaf33a7a 100644 --- a/drivers/gpu/drm/tegra/dpaux.c

[PATCH V2 10/11] arm64: tegra: Add SOR power-domain node

power-domain will be turned on before probing SOR or DPAUX devices and kept on while the devices are bound. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi

[PATCH V2 08/11] dt-bindings: Add bindings for Tegra DPAUX pinctrl driver

ate the main DPAUX binding documentation to reference the DPAUX pad controller binding document and add the 'i2c-bus' subnode. The 'i2c-bus' subnode is used for populating I2C slaves for the DPAUX device so that the I2C driver core does not attempt to add the DPAUX pad controller nodes as I2C slaves.

[PATCH V2 11/11] arm64: tegra: Add DPAUX pinctrl bindings

e, etc) because the SOR driver will directly set the state needed. For I2C clients only the I2C mode is used and so we can simplify matters by using the generic pinctrl states for default and idle. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 54

[PATCH v2 1/2] clk: change clk_ops' ->round_rate() prototype

Hi Boris, On 05/06/15 12:39, Boris Brezillon wrote: > Hi Jon, > > On Fri, 5 Jun 2015 09:46:09 +0100 > Jon Hunter wrote: > >> >> On 05/06/15 00:02, Paul Walmsley wrote: >>> Hi folks >>> >>> just a brief comment on this one: >>>

[PATCH v2 2/4] drm/tegra: Add VIC support

Hi Mikko, On 20/07/15 08:54, Mikko Perttunen wrote: > From: Arto Merilainen > > This patch adds support for Video Image Compositor engine which > can be used for 2d operations. > > Signed-off-by: Andrew Chew > Signed-off-by: Arto Merilainen > Signed-off-by: Mikko Perttunen > --- >

[PATCH v2 2/4] drm/tegra: Add VIC support

On 20/07/15 09:51, Mikko Perttunen wrote: > On 07/20/2015 11:28 AM, Jon Hunter wrote: >> Hi Mikko, > > Hi! > >> ... >>> +static int vic_runtime_resume(struct device *dev) >>> +{ >>> + struct vic *vic = dev_g

[PATCH v2 1/2] clk: change clk_ops' ->round_rate() prototype

On 05/06/15 00:02, Paul Walmsley wrote: > Hi folks > > just a brief comment on this one: > > On Thu, 30 Apr 2015, Boris Brezillon wrote: > >> Clock rates are stored in an unsigned long field, but ->round_rate() >> (which returns a rounded rate from a requested one) returns a long >> value

[PATCH] drm/dp: Fix comment in DP helper

inal names was not updated in the DP helper header file. Hence, correct these names. Signed-off-by: Jon Hunter --- include/drm/drm_dp_helper.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 523f04c90dea..2e86f642f

Re: [PATCH] drm: tegra: add CONFIG_OF dependency

epends on OF > select DRM_KMS_HELPER > select DRM_MIPI_DSI > select DRM_PANEL Thanks Arnd. I am curious if it can still fail if PINCTRL is not selected in whatever config you are using? That said ... Acked-by: Jon Hunter <jonath...@nvidia.com> Cheers Jon -- n

Re: [PATCH] drm/tegra: sor: add NULL check on of_match_device() return value

On 07/07/17 07:11, Gustavo A. R. Silva wrote: > Check return value from call to of_match_device() > in order to prevent a NULL pointer dereference. > > In case of NULL print error message and return. > > Signed-off-by: Gustavo A. R. Silva > --- >

Re: [PATCH -next] gpu: host1x: Fix wrong pointer passed to PTR_ERR()

On 16/04/17 05:08, Wei Yongjun wrote: > From: Wei Yongjun > > PTR_ERR should access the value just tested by IS_ERR, otherwise > the wrong error code will be returned. > > Fixes: b386c6b73ac6 ("gpu: host1x: Support module reset") > Signed-off-by: Wei Yongjun

Re: Build error for NVIDIA Tegra DRM since 4.14-rc1

Hi Linus, On 28/09/17 08:10, Linus Lüssing wrote: > Hi, > > Sorry, did not search for the exact commit yet, but since v4.14-rc1 > I get a build error when trying to build the ARM multi_v7_defconfig > target: > > ~~ > $ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- LOADADDR=0x00208000

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