Hi Heiko,
CEC is not working when CEC 5V is enabled
On 2018-09-10 11:22, Heiko Stuebner wrote:
> The rk3328 uses a dw-hdmi controller with an external hdmi phy from
> Innosilicon which uses the generic phy framework for access.
> Add the necessary data and the compatible for the rk3328 to the
>
On 2018-11-02 15:13, Shankar, Uma wrote:
>
>> -Original Message-
>> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>> Sent: Friday, November 2, 2018 5:00 PM
>> To: Maarten Lankhorst
>> Cc: Shankar, Uma ; dri-devel@lists.freedesktop.org;
>> intel-...@lists.freedesktop.org;
On 2019-04-02 22:20, Uma Shankar wrote:
> This patch adds a blob property to get HDR metadata
> information from userspace. This will be send as part
> of AVI Infoframe to panel.
>
> It also implements get() and set() functions for HDR output
> metadata property.The blob data is received from
.
Fixes: 4c156c21c794 ("drm/rockchip: vop: support plane scale")
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
b/drive
The Rockchip RK3288 SoC (v2.00a) and RK3328/RK3399 SoCs (v2.11a) have
also been identified as needing this workaround with a single iteration.
Fixes: be41fc55f1aa ("drm: bridge: dw-hdmi: Handle overflow workaround based on
device version")
Signed-off-by: Jonas Karlman
---
drive
On 2019-05-15 21:45, Ville Syrjälä wrote:
> On Wed, May 15, 2019 at 07:33:10PM +0000, Jonas Karlman wrote:
>> On 2019-05-15 21:10, Ville Syrjälä wrote:
>>> On Tue, May 14, 2019 at 11:06:23PM +0530, Uma Shankar wrote:
>>>> This patch adds a blob property to get HDR
nts
>> as per Ville's POC changes.
>>
>> v3: No Change
>>
>> v4: Addressed Shashank's review comments
>>
>> v5: Rebase.
>>
>> v6: Addressed Brian Starkey's review comments, defined
>> new structure with header for dynamic metadata sca
/rockchip-linux/kernel/commit/d1943fde81ff41d7cca87f4a42f03992e90bddd5
Cc: Zheng Yang
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 109 ++
drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 37
include/drm/bridge/dw_hdmi.h | 1 +
3
Dynamic Range and Mastering InfoFrame.
Note that this was based on top of drm-misc-next and Neil Armstrong's
"drm/meson: Add support for HDMI2.0 YUV420 4k60" series at [1]
[1] https://patchwork.freedesktop.org/series/58725/#rev2
Jonas Karlman (4):
drm/bridge: dw-hdmi: Add Dyn
This patch enables Dynamic Range and Mastering InfoFrame on RK3328 and RK3399.
Cc: Sandy Huang
Cc: Heiko Stuebner
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
b
This patch enables Dynamic Range and Mastering InfoFrame on GXL, GXM and G12A.
Cc: Neil Armstrong
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
b/drivers/gpu/drm/meson
This patch enables Dynamic Range and Mastering InfoFrame on H6.
Cc: Maxime Ripard
Cc: Jernej Skrabec
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 2 ++
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/sun4i
On 2019-06-24 11:08, Neil Armstrong wrote:
> Add myself as co-maintainer of DRM Bridge Drivers then add Jonas Karlman
> and Jernej Škrabec as Reviewers of DRM Bridge Drivers.
>
> Cc: Laurent Pinchart
> Cc: Jonas Karlman
> Cc: Andrzej Hajda
> Cc: Jernej Škrabec
> Cc: Dan
ashed 2 patches, dropped 1 change and addressed Brian Starkey's and
> Shashank's review comments.
>
> v8: Addressed Jonas Karlman review comments. Added Shashank's RB to the
> series,
> fixed a WARN_ON on BYT/CHT.
>
> v9: Addressed Ville and Jonas Karlman's review c
ments
>
> v5: Rebase.
>
> v6: Addressed Brian Starkey's review comments, defined
> new structure with header for dynamic metadata scalability.
> Merge get/set property functions for metadata in this patch.
>
> v7: Addressed Jonas Karlman review comments and defined separate
On 2019-07-05 06:26, Cheng-Yi Chiang wrote:
> Allow codec driver register callback function for plug event.
>
> The callback registration flow:
> dw-hdmi <--- hw-hdmi-i2s-audio <--- hdmi-codec
>
> dw-hdmi-i2s-audio implements hook_plugged_cb op
> so codec driver can register the callback.
>
>
he i2c adapter when calling drm_scdc_*().
Also report that SCDC is not supported when there is no DDC bus.
Fixes: 264fce6cc2c1 ("drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling
support")
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 12
1
On 2019-08-12 14:50, Jerome Brunet wrote:
> Provide the eld to the generic hdmi-codec driver.
> This will let the driver enforce the maximum channel number and set the
> channel allocation depending on the hdmi sink.
>
> Cc: Jonas Karlman
> Signed-off-by: Jerome Brunet
Tested
As an alternative I have a patch [1] to submit that moves
cec_notifier_phys_addr_invalidate() call
from dw_hdmi_irq() to dw_hdmi_connector_detect() in order to address an issue
with
stale CEC phys addr and stale EDID/ELD data after TV or AVR uses a 100ms HPD
pulse
to signal EDID has changed,
On 2019-08-13 13:27, Hans Verkuil wrote:
> On 8/13/19 12:18 PM, Jonas Karlman wrote:
>> As an alternative I have a patch [1] to submit that moves
>> cec_notifier_phys_addr_invalidate() call
>> from dw_hdmi_irq() to dw_hdmi_connector_detect() in order to address an
>> i
,
Jonas
Jonas Karlman (5):
drm: dw-hdmi: extract dw_hdmi_connector_update_edid()
drm: dw-hdmi: move dw_hdmi_connector_detect()
drm: dw-hdmi: update CEC phys addr and EDID on HPD event
Revert "drm/edid: make drm_edid_to_eld() static"
drm: dw-hdmi: update ELD on HPD event
drivers/gpu/
Update CEC phys addr and EDID on HPD event, fixes lost CEC phys addr and
stale EDID when HDMI cable is unplugged/replugged or AVR is powered on/off.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions
Move dw_hdmi_connector_detect() it will call dw_hdmi_connector_update_edid().
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 30 +++
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b
Update connector ELD on HPD event, fixes stale ELD when
HDMI cable is unplugged/replugged or AVR is powered on/off.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b
Extract code that updates EDID into a dw_hdmi_connector_update_edid()
helper, it will be called from dw_hdmi_connector_detect().
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
drm_edid_to_eld() is needed to update stale connector ELD on HPD event.
This reverts part of commit 79436a1c9bcc ("drm/edid: make drm_edid_to_eld()
static").
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/drm_edid.c | 5 +++--
include/drm/drm_edid.h | 1 +
2 files changed, 4
eters.
I used to carry [1] to fix that issue, but this seems like a more sane fix.
[1]
https://github.com/Kwiboo/linux-rockchip/commit/4862e4044532b8b480fa3a0faddc197586623808
With above fixed,
Reviewed-by: Jonas Karlman
Regards,
Jonas
> .hw_params = dw_hdmi_i2s_hw_params,
> .audio_shutd
On 2019-09-03 20:08, Jernej Škrabec wrote:
> Hi!
>
> Dne torek, 03. september 2019 ob 20:00:33 CEST je Neil Armstrong napisal(a):
>> Hi,
>>
>> Le 03/09/2019 à 11:53, Neil Armstrong a écrit :
>>> Hi,
>>>
>>> On 03/09/2019 07:51, Cheng-Yi Chiang wrote:
From: Yakir Yang
When
On 2019-09-02 10:10, Neil Armstrong wrote:
> On 01/09/2019 18:14, Jonas Karlman wrote:
>> Update CEC phys addr and EDID on HPD event, fixes lost CEC phys addr and
>> stale EDID when HDMI cable is unplugged/replugged or AVR is powered on/off.
>>
>> Signed-off-by: Jonas
_param ops after
>> setting format.
>>
>> On some monitors, there is a possibility that audio does not come out.
>> Fix this by enabling audio clock in audio_startup ops
>> before hw_param ops setting format.
>>
>> Signed-off-by: Cheng-Yi Chiang
>&
Hi Neil,
On 2019-09-18 10:05, Neil Armstrong wrote:
> Hi Jonas,
>
> On 26/05/2019 23:18, Jonas Karlman wrote:
>> Add support for HDR metadata using the hdr_output_metadata connector
>> property,
>> configure Dynamic Range and Mastering InfoFrame accordingly.
>>
;>> hpd, bool rx_sense);>
>>>> void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
>>>> void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt);
>>>>
>>>> +void dw_hdmi_set_channel_status(struct dw_hdmi *h
On 2019-08-05 15:41, Jerome Brunet wrote:
> Provide the eld to the generic hdmi-codec driver.
> This will let the driver enforce the maximum channel number and set the
> channel allocation depending on the hdmi sink.
>
> Cc: Jonas Karlman
> Signed-off-by: Jerome Brunet
> -
to use_drm_infoframe
- use hdmi_drm_infoframe_pack and a loop to write regs
- remove hdmi version check in hdmi_config_drm_infoframe
Jonas Karlman (4):
drm/bridge: dw-hdmi: Add Dynamic Range and Mastering InfoFrame support
drm/rockchip: Enable DRM InfoFrame support on RK3328 and RK3399
drm/meson
/rockchip-linux/kernel/commit/d1943fde81ff41d7cca87f4a42f03992e90bddd5
Cc: Zheng Yang
Signed-off-by: Jonas Karlman
Reviewed-by: Neil Armstrong
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 81 +++
drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 37 +++
include/drm
This patch enables Dynamic Range and Mastering InfoFrame on GXL, GXM and G12A.
Cc: Neil Armstrong
Signed-off-by: Jonas Karlman
Reviewed-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
This patch enables Dynamic Range and Mastering InfoFrame on RK3328 and RK3399.
Cc: Sandy Huang
Cc: Heiko Stuebner
Signed-off-by: Jonas Karlman
Reviewed-by: Heiko Stuebner
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff
This patch enables Dynamic Range and Mastering InfoFrame on H6.
Cc: Maxime Ripard
Cc: Jernej Skrabec
Signed-off-by: Jonas Karlman
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 2 ++
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 +
2 files changed, 3 insertions(+)
diff
Hi Jernej,
On 2020-02-29 08:42, Jernej Škrabec wrote:
> Hi Neil!
>
> Dne četrtek, 06. februar 2020 ob 20:18:27 CET je Neil Armstrong napisal(a):
>> Add the atomic_get_output_bus_fmts, atomic_get_input_bus_fmts to negociate
>> the possible output and input formats for the current mode and
On 2020-02-29 12:07, Jernej Škrabec wrote:
> Dne sobota, 29. februar 2020 ob 11:09:14 CET je Jonas Karlman napisal(a):
>> Hi Jernej,
>>
>> On 2020-02-29 08:42, Jernej Škrabec wrote:
>>> Hi Neil!
>>>
>>> Dne četrtek, 06. februar 2020 ob 20:18:
On 2020-01-23 08:39, Boris Brezillon wrote:
> On Wed, 22 Jan 2020 23:44:28 + (UTC)
> Jonas Karlman wrote:
>
>>> +static int
>>> +drm_atomic_bridge_chain_select_bus_fmts(struct drm_bridge *bridge,
>>> +
y: Boris Brezillon
> Signed-off-by: Neil Armstrong
> [narmstrong: fixed doc in include/drm/drm_bridge.h:69 fmt->format]
> Reviewed by: Jernej Skrabec
> Tested-by: Jonas Karlman
> ---
> Changes in v7:
> * Adapt the code to deal with the fact that not all bridges in the
On 2020-01-10 12:01, Kishon Vijay Abraham I wrote:
>
>
> On 09/01/20 2:37 AM, Jonas Karlman wrote:
>> This series make it possible to use more HDMI modes on RK3328,
>> and presumably also on RK3228. It also prepares for a future YUV420 and
>> 10-bit output series.
-off-by: Jonas Karlman
Acked-by: Heiko Stuebner
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 74 ---
1 file changed, 49 insertions(+), 25 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index
Add the hdmiphy clock as the vpll in hdmi node.
Signed-off-by: Jonas Karlman
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index fee896338cc1..5d8807aca62e
RK3228/RK3328 does not provide a stable hdmi signal at TMDS rates
above 371.25MHz (340MHz pixel clock).
Limit the pixel clock rate to 340MHz to provide a stable signal.
Also limit the pixel clock to the display reported max tmds clock.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip
Add the hdmiphy clock as the vpll in hdmi node.
Signed-off-by: Jonas Karlman
---
arch/arm/boot/dts/rk322x.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 340ed6ccb08f..16ad240d5f7f 100644
--- a/arch
-bit and Deep Color.
This result in pre/post pll not being re-configured when switching between
regular 8-bit and Deep Color video formats.
Fix this by calling set_rate in power_on to force pre pll re-configuration.
Signed-off-by: Huicong Xu
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip
a rounded pixel rate that exist
in the pre pll config table.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Zheng Yang
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 8 +---
1 file changed, 5 insertions(+), 3 deletion
for consistency.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
b/drivers/phy/ro
The VOP on RK3328 needs to run at higher rate in order to
produce a proper 3840x2160 signal.
Signed-off-by: Jonas Karlman
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64
Signed-off-by: Jonas Karlman
---
drivers/clk/rockchip/clk-rk3228.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c
b/drivers/clk/rockchip/clk-rk3228.c
index d17cfb7a3ff4..25f79af22cb8 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b
no_c is not used in any calculation, lets remove it.
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
b/drivers/phy/rockchip/phy-rockchip-inno
Prepare support for High TMDS Bit Rates used by HDMI2.0 display modes.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
inno_hdmi_phy_rk3328_clk_set_rate() is using the RK3228 macro
when configuring vco_div_5 on RK3328.
Fix this by using correct vco_div_5 macro for RK3328.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-roc
mpll_cfg/cur_ctr/phy_config is not used when phy_force_vendor is true,
lets remove them.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
b/drivers/gpu/drm/rockchip
RK3228/RK3328 can only support clock rates defined in the pre pll table.
Lets validate the mode clock rate against the pre pll config and filter
out any mode with a clock rate returning error from clk_round_rate().
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
/linux-rockchip/commits/next-20200108-inno-hdmi-phy
[2] https://github.com/Kwiboo/linux-rockchip/commits/next-20200108-bus-format
Regards,
Jonas
Algea Cao (1):
phy/rockchip: inno-hdmi: Support more pre-pll configuration
Huicong Xu (1):
phy/rockchip: inno-hdmi: force set_rate on power_on
Jonas
y rounding the rate down to closest 1000 Hz in round_rate func,
this allows an exact match to be found in pre pll config table.
Fixes: 287422a95fe2 ("drm/rockchip: Round up _before_ giving to the clock
framework")
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inn
On 2020-01-06 22:18, Heiko Stübner wrote:
> Hi Jonas,
>
> Am Montag, 6. Januar 2020, 21:48:25 CET schrieb Jonas Karlman:
>> Using a destination width that is more then 3840 pixels
>> is not supported in scl_vop_cal_scl_fac().
>>
>> Work around this limitation by fi
no_c is not used in any calculation, lets remove it.
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
b/drivers/phy/rockchip/phy-rockchip-inno
Prepare support for High TMDS Bit Rates used by HDMI2.0 display modes.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
inno_hdmi_phy_rk3328_clk_set_rate() is using the RK3228 macro
when configuring vco_div_5 on RK3328.
Fix this by using correct vco_div_5 macro for RK3328.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-roc
Using a destination width that is more then 3840 pixels
is not supported in scl_vop_cal_scl_fac().
Work around this limitation by filtering all modes with
a width above 3840 pixels.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 10 ++
1 file changed, 10
-bit and Deep Color.
This result in pre/post pll not being re-configured when switching between
regular 8-bit and Deep Color video formats.
Fix this by calling set_rate in power_on to force pre pll re-configuration.
Signed-off-by: Huicong Xu
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip
RK3228/RK3328 can only support clock rates defined in the pre pll table.
Lets validate the mode clock rate against the pre pll config and filter
out any mode with a clock rate returning error from clk_round_rate().
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
for consistency.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
b/drivers/phy/ro
Signed-off-by: Jonas Karlman
---
drivers/clk/rockchip/clk-rk3228.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c
b/drivers/clk/rockchip/clk-rk3228.c
index d17cfb7a3ff4..25f79af22cb8 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b
y).
I have tested this series on a Rockchip RK3328 Rock64 device along with early
work
on rockchip dw-hdmi bus format negotiation at [1]. All output modes supported
on RK3328 works (RGB444, YUV420/444, 8/10-bit).
So for this entire series:
Tested-by: Jonas Karlman
[1] https://github.co
mpll_cfg/cur_ctr/phy_config is not used when phy_force_vendor is true,
lets remove them.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
b/drivers/gpu/drm/rockchip
RK3228/RK3328 does not provide a stable hdmi signal at TMDS rates
above 371.25MHz (340MHz pixel clock).
Limit the pixel clock rate to 340MHz to provide a stable signal.
Also limit the pixel clock to the display reported max tmds clock.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip
-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 74 ---
1 file changed, 49 insertions(+), 25 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 3719309ad0d0..bb8bdf5e3301 100644
Add the hdmiphy clock as the vpll in hdmi node.
Signed-off-by: Jonas Karlman
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index ee4b6170a9e6..987c04abb387
The VOP on RK3328 needs to run at higher rate in order to
produce a proper 3840x2160 signal.
Signed-off-by: Jonas Karlman
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64
Add the hdmiphy clock as the vpll in hdmi node.
Signed-off-by: Jonas Karlman
---
arch/arm/boot/dts/rk322x.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 340ed6ccb08f..16ad240d5f7f 100644
--- a/arch
a rounded pixel rate that exist
in the pre pll config table.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Zheng Yang
Signed-off-by: Jonas Karlman
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 8 +---
1 file changed, 5 insertions(+), 3 deletion
set_rate on power_on
Jonas Karlman (12):
phy/rockchip: inno-hdmi: use correct vco_div_5 macro on rk3328
phy/rockchip: inno-hdmi: remove unused no_c from rk3328 recalc_rate
phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write
drm/rockchip: vop: limit resolution width to 3840
On 2020-05-26 14:50, Neil Armstrong wrote:
> On 26/05/2020 03:15, Laurent Pinchart wrote:
>> On all platforms except i.MX and Rockchip, the dw-hdmi DT bindings
>> require a video output port connected to an HDMI sink (most likely an
>> HDMI connector, in rare cases another bridges converting HDMI
Hi,
On 2020-05-15 15:37, Brian Starkey wrote:
> Hi Ben,
>
> On Wed, May 06, 2020 at 03:41:26PM +0100, Ben Davis wrote:
>> Hi all, any feedback on this patch?
>> Thanks, Ben
>> On Wed, Apr 22, 2020 at 12:13:49PM +0100, Ben Davis wrote:
>>> DRM_FORMAT_NV15 is a 2 plane format suitable for linear
Hi Brian,
On 2020-05-26 15:52, Brian Starkey wrote:
> Hi Jonas,
>
> On Mon, May 25, 2020 at 11:08:11AM +0000, Jonas Karlman wrote:
>> Hi,
>>
>> On 2020-05-15 15:37, Brian Starkey wrote:
>>> Hi Ben,
>>>
>>> On Wed, May 06, 2020 at 03:41:
onker
>
> https://lore.kernel.org/lkml/20200620134659.4592-1-jbx6...@gmail.com/
>
> On 1/8/20 10:07 PM, Jonas Karlman wrote:
>> From: Algea Cao
>>
>> Adding the following freq cfg in 8-bit and 10-bit color depth:
>>
>> {
>> 4000, 6
On 2020-06-17 14:07, Huang Jiachai wrote:
> Hi Jonas Karlman,
>
> Is there an another yuv 10bit format with 4:4:4 sub-simpling but
> has no padding?
>
> Maybe we can call it DRM_FORMAT_NV30:
>
> { .format = DRM_FORMAT_NV30, .depth = 0,
>.num_
Add support for displaying 10-bit 4:2:0 and 4:2:2 formats produced by the
Rockchip Video Decoder on RK322X, RK3288, RK3328, RK3368 and RK3399.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 27 --
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1
= UVUV = 4 * 10 bits = 40 bits = 5 bytes
The '20' suffix refers to the optimum effective bits per pixel which is
achieved when the total number of luminance samples is a multiple of 4.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/drm_fourcc.c | 4
include/uapi/drm/drm_fourcc.h | 1 +
2
[2] https://github.com/Kwiboo/linux-rockchip/commits/next-20200605-fmt_10
[3] https://github.com/Kwiboo/linux-rockchip/commits/next-20200605-rkvdec
[4] https://github.com/Kwiboo/FFmpeg/commits/v4l2-request-hwaccel-4.2.2-rkvdec
Regards,
Jonas
Jonas Karlman (2):
drm: drm_fourcc: add NV20 YUV fo
Hi,
On 2020-06-03 11:12, Pekka Paalanen wrote:
> On Wed, 3 Jun 2020 10:50:28 +0530
> Yogish Kulkarni wrote:
>
>> Inline..
>>
>> On Mon, Jun 1, 2020 at 2:19 PM Pekka Paalanen wrote:
>>
>>> On Mon, 1 Jun 2020 09:22:27 +0530
>>> Yogish Kulkarni wrote:
>>>
Hi,
For letting DRM
Add support for displaying 10-bit 4:2:0 and 4:2:2 formats produced by the
Rockchip Video Decoder on RK322X, RK3288, RK3328, RK3368 and RK3399.
Also add support for 10-bit 4:4:4 format while at it.
V2: Added NV30 support
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip
-high-10-v2
Regards,
Jonas
Jonas Karlman (2):
drm: drm_fourcc: add NV20 and NV30 YUV formats
drm: rockchip: add NV15, NV20 and NV30 support
drivers/gpu/drm/drm_fourcc.c| 8 ++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 29 +--
drivers/gpu/drm/rockchip
= 4 * 10 bits = 40 bits = 5 bytes
The '20' and '30' suffix refers to the optimum effective bits per pixel
which is achieved when the total number of luminance samples is a multiple
of 4.
V2: Added NV30 format
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/drm_fourcc.c | 8
include
://gitlab.freedesktop.org/mesa/drm/-/merge_requests/329
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 5 +
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 2 ++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
b/drivers/gpu
Hi Chris,
On 2023-10-23 19:52, Christopher Obbard wrote:
> Hi Jonas,
>
> On Mon, 2023-10-23 at 17:37 +0000, Jonas Karlman wrote:
>> This series add support for displaying 10-bit 4:2:0 and 4:2:2 formats
>> produced
>> by the Rockchip Video Decoder on RK322X, RK3288
on VOP
full (major = 3).
Fix colors by applying rb swap similar to vendor 4.4 kernel.
Signed-off-by: Jonas Karlman
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
b/drivers/gpu
on VOP
full framework (IP version 3.x) compared to VOP little framework (2.x).
Fix colors by applying different rb swap for VOP full framework (3.x)
and VOP little framework (2.x) similar to vendor 4.4 kernel.
Fixes: 85a359f25388 ("drm/rockchip: Add BGR formats to VOP")
Signed-off-by: Jon
Hi Chris,
On 2023-10-26 22:02, Christopher Obbard wrote:
> Hi Jonas,
>
> On Thu, 2023-10-26 at 19:14 +0000, Jonas Karlman wrote:
>> Use of DRM_FORMAT_RGB888 and DRM_FORMAT_BGR888 on e.g. RK3288, RK3328
>> and RK3399 result in wrong colors being displayed.
>>
>>
available at [1] and libdrm/modetest patch at [2].
[1] https://github.com/Kwiboo/linux-rockchip/commits/v6.6-rc7-vop-nv15
[2] https://github.com/Kwiboo/libdrm/commits/nv15
Jonas Karlman (2):
drm/fourcc: Add NV20 and NV30 YUV formats
drm/rockchip: vop: Add NV15, NV20 and NV30 support
drivers/gpu/drm
RK3328/RK3399 win0/1 data to not affect RK3368
V2: Added NV30 support
Signed-off-by: Jonas Karlman
Reviewed-by: Sandy Huang
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 36 ---
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 +
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 66
= 4 * 10 bits = 40 bits = 5 bytes
The '20' and '30' suffix refers to the optimum effective bits per pixel
which is achieved when the total number of luminance samples is a multiple
of 4.
V2: Added NV30 format
Signed-off-by: Jonas Karlman
Reviewed-by: Sandy Huang
---
drivers/gpu/drm/drm_fourcc.c
On 2023-10-24 14:41, Andy Yan wrote:
> Hi:
>
> On 10/24/23 16:49, Christopher Obbard wrote:
>> Hi Jonas,
>>
>> On Mon, 2023-10-23 at 21:11 +, Jonas Karlman wrote:
>>> Use of DRM_FORMAT_RGB888 and DRM_FORMAT_BGR888 on e.g. RK3288, RK3328
>>> and
Hi Andy,
On 2023-10-13 14:21, Andy Yan wrote:
> From: Andy Yan
>
> Add the missing 10 bit RGB format for cluster window.
> The cluster windows on rk3568/6 only support afbc format,
> so change the linear yuv format NV12/16/24 to non-Linear
> YUV420_8BIT/YUV420_10BIT/YUYV/Y210.
>
> Add NV15
Hi,
On 2023-02-03 14:09, Sascha Hauer wrote:
> Hi,
>
> On Wed, Feb 01, 2023 at 09:23:56AM +0900, FUKAUMI Naoki wrote:
>> hi,
>>
>> I'm trying this patch series with 6.1.x kernel. it works fine on rk356x
>> based boards (ROCK 3), but it has a problem on rk3399 boards (ROCK 4).
>>
>> on rk3399 with
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