.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c
b/drivers/gpu/drm/panel/panel-novatek-nt39016.c
index 39f7be679da5..292ad1d58313 100644
in devicetree (but then IPU support is disabled of course).
Fixes: fc1acf317b01 ("drm/ingenic: Add support for the IPU")
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/d
is registered with it.
This TinyDRM driver expects that a DCS-compliant protocol is used by the
DSI/DBI panel and can only be used with these.
v2: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/tiny/Kconfig| 8 +
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/gpu/drm/tiny
ult to
MIPI_DCS_BUS_TYPE_DSI if the bitmask is not populated.
- Create a 'enum mipi_dcs_bus_type' instead of macros
- Rename values to avoid confusion about SPI modes
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/drm_mipi_dsi.c | 9 +
include/drm/drm_mipi_dsi.h |
description to avoid confusion about 'driver'
- Use 4-space indent in example
Signed-off-by: Paul Cercueil
---
.../display/panel/newvision,nv3052c.yaml | 100 ++
1 file changed, 100 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/newvision
This driver is for the Ilitek ILI9341 based YX240QV29-T 2.4" 240x320 TFT
LCD panel from Adafruit.
v2: - Remove custom handling of backlight
- Call drm_panel_disable() / drm_panel_unprepare() on module exit
- drm_panel_add() is a void function now
Signed-off-by: Paul Cer
are} on module exit,
and various small fixes.
For a more detailed changelog, see the header of each individual patch.
Paul Cercueil (6):
dt-bindings: display: Document NewVision NV3052C DT node
drm: dsi: Let host and device specify supported bus
drm: Add SPI DBI host driver
drm/tiny: Ad
full frames
v4: Avoid dma_pgprot() which is not exported. Using vm_get_page_prot()
is enough in this case.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 107 +-
drivers/gpu/drm/ingenic/ingenic-drm.h | 4 +
drivers/gpu/drm/ingenic/ingenic
stead of
nv3052c_{disable,unprepare}
- Silence error when backlight probe defers
- Remove 'dev' field in priv structure, use drm_panel->dev instead
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
...
MIPI Display Bus Interface (DBI) SPI support
+ *
+ * Copyright 2016 Noralf Trønnes
+ * Copyright 2020 Paul Cercueil
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+struct dbi_spi {
+ struct mipi_dsi_host host;
+ struct mipi_dsi_host_ops host_ops;
+
+ st
Le mer. 30 sept. 2020 à 18:11, Christoph Hellwig a écrit
:
On Wed, Sep 30, 2020 at 03:33:13PM +0200, Paul Cercueil wrote:
One thing missing for remap_pfn_range(), I have no alternative for
this:
vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot,
DMA_ATTR_NON_CONSISTENT);
Hi Christoph,
Le mer. 30 sept. 2020 à 11:02, Christoph Hellwig a écrit
:
On Mon, Sep 28, 2020 at 03:31:28PM +0200, Paul Cercueil wrote:
It's allocated with dma_alloc_wc, but then it's only accessed as
non-coherent.
Anyway, for the time being I guess you could revert 37054fc81443.
But I
The DMA API changed at the same time commit 37054fc81443 ("gpu/drm:
ingenic: Add option to mmap GEM buffers cached") was added. Rework the
code to work with the new DMA API.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 24 +++
1 fi
Add and export the function drm_gem_cma_create_noalloc(), which is just
__drm_gem_cma_create() renamed.
This function can be used by drivers that need to create a GEM object
without allocating the backing memory.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/drm_gem_cma_helper.c | 11
Le mer. 30 sept. 2020 à 18:40, Christoph Hellwig a écrit
:
On Wed, Sep 30, 2020 at 06:39:18PM +0200, Paul Cercueil wrote:
dma_alloc_pages gives you cached memory, so you can't just use an
uncached protection for the userspace mmap here. If you want
uncached
memory you need to use
dma_alloc_noncoherent() if non-coherent memory is what we want.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 48 ++-
1 file changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm
, for an unknown reason.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 51 +--
1 file changed, 28 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index d34e76f5f57d
Le dim. 27 sept. 2020 à 22:27, Sam Ravnborg a
écrit :
On Sun, Sep 27, 2020 at 09:36:45PM +0200, Paul Cercueil wrote:
On JZ4725B and newer, the F0 plane supports paletted 8bpp with a
256-entry palette. Add support for it.
v3: Only accept a full 256-entry palette.
Signed-off-by: Paul
Signed-off-by: Paul Cercueil
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 61 ++-
1 file changed, 60 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index 937d080f5d06
fine provided the kernel configuration is sane.
Signed-off-by: Paul Cercueil
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic
On JZ4725B and newer, the F0 plane supports paletted 8bpp with a
256-entry palette. Add support for it.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 60 +--
1 file changed, 56 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/ingenic
Starting from the JZ4725B SoC, the primary and overlay planes support
24-bit pixel modes (8 bits per color component, without dummy byte).
Add support for these in the ingenic-drm driver.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 8
drivers/gpu/drm
Starting from the JZ4760 SoC, the primary and overlay planes support
30-bit pixel modes (10 bits per color component). Add support for these
in the ingenic-drm driver.
Signed-off-by: Paul Cercueil
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 8
drivers/gpu
Hi Sam,
Le jeu. 24 sept. 2020 à 22:22, Sam Ravnborg a
écrit :
Hi Paul.
On Tue, Sep 15, 2020 at 02:38:17PM +0200, Paul Cercueil wrote:
Old Ingenic SoCs can overclock very well, up to +50% of their
nominal
clock rate, whithout requiring overvolting or anything like that,
just
by changing
On JZ4725B and newer, the F0 plane supports paletted 8bpp with a
256-entry palette. Add support for it.
v3: Only accept a full 256-entry palette.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 66 +--
1 file changed, 62 insertions(+), 4
in JZ4725B, 30bpp was added in
JZ4770.
Prepare the inclusion of paletted 8bpp, 24bpp and 30bpp support by
having separate pixel format lists for F0 and F1 planes.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 57 +++
1 file changed, 47
ed, I kept your
acked-by on them, please tell me if that's OK.
Cheers,
-Paul
Paul Cercueil (7):
drm/ingenic: Reset pixclock rate when parent clock rate changes
drm/ingenic: Add support for reserved memory
drm/ingenic: Alloc F0 and F1 DMA descriptors at once
drm/ingenic: Support handling diffe
mplete 256-entry palette is accepted.
Cheers,
-Paul
Paul Cercueil (1):
drm/ingenic: Add support for paletted 8bpp
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 66 +--
1 file changed, 62 insertions(+), 4 deletions(-)
--
2.28.0
___
Hi,
Le sam. 26 sept. 2020 à 20:25, Sam Ravnborg a
écrit :
Hi Paul.
On Sat, Sep 26, 2020 at 07:04:54PM +0200, Paul Cercueil wrote:
Hi,
This is a V2 of my small patchset "Small improvements to
ingenic-drm"
that I sent about two weeks ago. In that time, I worked on new
improv
Le lun. 28 sept. 2020 à 14:10, Christoph Hellwig a écrit
:
On Mon, Sep 28, 2020 at 01:46:55PM +0200, Paul Cercueil wrote:
dma_mmap_attrs can only be used on allocations from dma_mmap_attrs
with
the same attrs. As there is no allocation using
DMA_ATTR_NON_CONSISTENT
in the drm core
Hi Christoph,
Le lun. 28 sept. 2020 à 8:04, Christoph Hellwig a écrit :
On Mon, Sep 28, 2020 at 01:54:05PM +1000, Stephen Rothwell wrote:
Hi all,
After merging the drm tree, today's linux-next build (x86_64
allmodconfig)
failed like this:
The driver needs to switch do
Le lun. 28 sept. 2020 à 13:34, Christoph Hellwig a écrit
:
On Mon, Sep 28, 2020 at 12:15:56PM +0200, Paul Cercueil wrote:
Hi Christoph,
Le lun. 28 sept. 2020 à 8:04, Christoph Hellwig a
écrit :
On Mon, Sep 28, 2020 at 01:54:05PM +1000, Stephen Rothwell wrote:
Hi all,
After
Hi Neil,
Le lun. 25 mai 2020 à 16:58, Neil Armstrong
a écrit :
Hi,
On 24/05/2020 21:50, Paul Cercueil wrote:
Hi Daniel,
Le dim. 24 mai 2020 à 20:35, Daniel Vetter a
écrit :
On Sun, May 24, 2020 at 7:46 PM Noralf Trønnes
wrote:
Den 24.05.2020 18.13, skrev Paul Cercueil:
>
Hi Noralf,
Le dim. 24 mai 2020 à 19:46, Noralf Trønnes a
écrit :
Den 24.05.2020 18.13, skrev Paul Cercueil:
Hi list,
I'd like to open a discussion about the current support of MIPI DSI
and
DBI panels.
Both are standards from the MIPI alliance, both are communication
protocols
Hi Daniel,
Le dim. 24 mai 2020 à 20:35, Daniel Vetter a écrit :
On Sun, May 24, 2020 at 7:46 PM Noralf Trønnes
wrote:
Den 24.05.2020 18.13, skrev Paul Cercueil:
> Hi list,
>
> I'd like to open a discussion about the current support of MIPI
DSI and
> DBI panels
Le dim. 24 mai 2020 à 22:14, Noralf Trønnes a
écrit :
Den 24.05.2020 21.54, skrev Paul Cercueil:
Hi Noralf,
Le dim. 24 mai 2020 à 19:46, Noralf Trønnes
a écrit :
Den 24.05.2020 18.13, skrev Paul Cercueil:
Hi list,
I'd like to open a discussion about the current support
Hi Sam,
Le dim. 24 mai 2020 à 22:06, Sam Ravnborg a écrit :
Hi Paul.
On Sun, May 24, 2020 at 06:13:16PM +0200, Paul Cercueil wrote:
Hi list,
I'd like to open a discussion about the current support of MIPI DSI
and DBI
panels.
Both are standards from the MIPI alliance, both
Hi list,
I'd like to open a discussion about the current support of MIPI DSI and
DBI panels.
Both are standards from the MIPI alliance, both are communication
protocols between a LCD controller and a LCD panel, they generally both
use the same commands (DCS), the main difference is that DSI
Le dim. 24 mai 2020 à 23:24, Noralf Trønnes a
écrit :
Den 24.05.2020 22.42, skrev Paul Cercueil:
Le dim. 24 mai 2020 à 22:14, Noralf Trønnes
a écrit :
Den 24.05.2020 21.54, skrev Paul Cercueil:
Hi Noralf,
Le dim. 24 mai 2020 à 19:46, Noralf Trønnes
a
écrit :
Den
Le lun. 25 mai 2020 à 2:46, Noralf Trønnes a
écrit :
Den 24.05.2020 23.33, skrev Paul Cercueil:
Le dim. 24 mai 2020 à 23:24, Noralf Trønnes
a écrit :
Den 24.05.2020 22.42, skrev Paul Cercueil:
Le dim. 24 mai 2020 à 22:14, Noralf Trønnes
a
écrit :
Den 24.05.2020
-off-by: Thomas Zimmermann
Tested-by: Paul Cercueil
Reviewed-by: Paul Cercueil
Cheers,
-Paul
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c
b/drivers/gpu/drm/ingenic/ingenic
IDs
- Add a bit more code comments
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 303 ++
drivers/gpu/drm/ingenic/ingenic-drm.h | 35 +++
2 files changed, 288 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic
Add documentation of the Device Tree bindings for the Image Processing
Unit (IPU) found in most Ingenic SoCs.
v2: Add missing 'const' in items list
v3: No change
Signed-off-by: Paul Cercueil
Reviewed-by: Rob Herring
Acked-by: Sam Ravnborg
---
.../bindings/display/ingenic,ipu.yaml
Move the register definitions to ingenic-drm.h, to keep
ingenic-drm-drv.c tidy.
v2: Fix SPDX license tag
v3: No change
Signed-off-by: Paul Cercueil
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 116 +---
drivers/gpu/drm/ingenic/ingenic-drm.h | 126
Use dmam_alloc_coherent() instead of dma_alloc_coherent(). Then we don't
need to register a custom cleanup handler.
v3: New patch
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git
panel: simple: Add support for the Frida FRD350H54004
panel")
Cc: sta...@vger.kernel.org # v5.5
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/p
Hi Sam,
Le jeu. 16 juil. 2020 à 19:43, Sam Ravnborg a
écrit :
Hi Paul.
On Thu, Jul 16, 2020 at 06:38:35PM +0200, Paul Cercueil wrote:
plane->index is NOT the index of the color plane in a YUV frame.
Actually, a YUV frame is represented by a single drm_plane, even
though
it conta
Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
In the process, the new ingenic,jz4780-lcd compatible string has been
added.
v2: Add info about IPU at port@8
v3: No change
Signed-off-by: Paul Cercueil
Reviewed-by: Rob Herring
Acked-by: Sam Ravnborg
---
.../bindings/display
a bit more code comments
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/Kconfig | 11 +
drivers/gpu/drm/ingenic/Makefile | 3 +-
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 171 -
drivers/gpu/drm/ingenic/ingenic-drm.h | 12 +
drivers/gpu/drm/ingenic
The address of the DMA descriptor never changes. It can therefore be set
in the probe function.
v2-v3: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic
By changing the pixel clock and the length of the back porch, it is
possible to obtain a perfect 50 Hz refresh rate.
v2: Rebase on drm-misc-next
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 40 +++-
1 file changed, 27 insertions(+), 13
Full rename without any modification, except to the Makefile.
Renaming ingenic-drm.c to ingenic-drm-drv.c allow to decouple the module
name from the source file name in the Makefile. This will be useful
later when more source files are added.
v2: New patch
v3: No change
Signed-off-by: Paul
nse
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 71 +--
1 file changed, 40 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index 296d21d203b8..443c5a30396d 100
If you pass a string that is not terminated with a carriage return to
dev_err(), it will eventually be printed with a carriage return, but
not right away, since the kernel will wait for a pr_cont().
v2: New patch
v3: No change
Signed-off-by: Paul Cercueil
Acked-by: Sam Ravnborg
---
drivers
Bump version to 1.1 and set date to 2020-07-16.
v3: New patch
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm
7xx SoCs")
Signed-off-by: Paul Cercueil
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c
b/drivers/gpu/drm/ingenic/ingenic-drm.c
index deb37b4a8e91..606d8acb0954 100644
---
.
Cheers,
-Paul
Paul Cercueil (3):
drm/ingenic: ipu: Only restart manually on older SoCs
drm/ingenic: ipu: Remove YUV422 from supported formats on JZ4725B
drm/ingenic: ipu: Only enable clock when needed
drivers/gpu/drm/ingenic/ingenic-ipu.c | 38 +++
1 file changed
frame restart signal.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c
b/drivers/gpu/drm/ingenic/ingenic-ipu.c
index 7a0a8bd865d3..7eae56fa92ea 100644
around, address this issue by removing
support for YUV 4:2:2 on the IPU of the JZ4725B.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c
b/drivers/gpu/drm/ingenic/ingenic-ipu.c
index
Instead of keeping the IPU clock enabled constantly, enable and disable
it on demand, when the IPU plane is used.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
If you pass a string that is not terminated with a carriage return to
dev_err(), it will eventually be printed with a carriage return, but
not right away, since the kernel will wait for a pr_cont().
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 18
Convert the Sharp LS020B1DD01D panel entry from using a struct
display_timing to using a struct drm_display_mode, as display_timing
seems to be the old and legacy format.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 28 +++-
1 file changed, 15
, to
make it use 'struct drm_display_mode' instead of 'struct
display_timing', modify the timings to get a perfect 60.00 Hz rate, and
add a 50 Hz mode.
Cheers,
-Paul
Paul Cercueil (5):
drm/panel: novatek,nt39016: Handle backlight the standard way
drm/panel: novatek,nt39016: Add missing CR
Instead of manipulating the backlight directly in this driver, register
it in the probe using drm_panel_of_backlight() and let the drm_panel
framework code handle it.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 16
1 file changed, 4
Add a perfect 50.00 Hz frame rate mode to the list of available modes
for the Sharp LS020B1DD01D panel.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm
Modify the video mode in order to obtain a perfect 60.00 Hz frame rate
using a 3 MHz pixel clock.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b
Support multiple panels or bridges connected to the same DPI output of
the SoC. This setup can be found for instance on the GCW Zero, where the
same DPI output interfaces the internal 320x240 TFT panel, and the ITE
IT6610 HDMI chip.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
In the process, the new ingenic,jz4780-lcd compatible string has been
added.
Reviewed-by: Rob Herring
Acked-by: Sam Ravnborg
Signed-off-by: Paul Cercueil
---
Notes:
v2: Add info about IPU at port@8
.../bindings/display/ingenic
The address of the DMA descriptor never changes. It can therefore be set
in the probe function.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic
the overlay plane.
Signed-off-by: Paul Cercueil
---
Notes:
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
Add documentation of the Device Tree bindings for the Image Processing
Unit (IPU) found in most Ingenic SoCs.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Add missing 'const' in items list
.../bindings/display/ingenic,ipu.yaml | 65 +++
1 file changed, 65 insertions
plane->index is NOT the index of the color plane in a YUV frame.
Actually, a YUV frame is represented by a single drm_plane, even though
it contains three Y, U, V planes.
Cc: sta...@vger.kernel.org # v5.3
Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx SoCs")
Signed
Move the register definitions to ingenic-drm.h, to keep
ingenic-drm-drv.c tidy.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Fix SPDX license tag
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 116 +---
drivers/gpu/drm/ingenic/ingenic-drm.h | 126 ++
2
All Ingenic SoCs starting from the JZ4725B support OSD mode.
In this mode, two separate planes can be used. They can have different
positions and sizes, and one can be overlayed on top of the other.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Use fallthrough; instead of /* fall-through
If you pass a string that is not terminated with a carriage return to
dev_err(), it will eventually be printed with a carriage return, but
not right away, since the kernel will wait for a pr_cont().
Signed-off-by: Paul Cercueil
---
Notes:
v2: New patch
drivers/gpu/drm/ingenic/ingenic-drm
Full rename without any modification, except to the Makefile.
Renaming ingenic-drm.c to ingenic-drm-drv.c allow to decouple the module
name from the source file name in the Makefile. This will be useful
later when more source files are added.
Signed-off-by: Paul Cercueil
---
Notes:
v2: New
0 at 06:36:22PM +0200, Noralf Trønnes wrote:
>>
>>
>> Den 07.06.2020 15.38, skrev Paul Cercueil:
>>> Hi,
>>>
>>> Here's a follow-up on the previous discussion about the current
state of
>>> DSI/DBI panel drivers, TinyDRM, and th
over SPI
the two panel maybe display same/different conctent at same time.
Yes, should be totally possible.
Cheers,
-Paul
在 2020/6/7 21:38, Paul Cercueil 写道:
The new API function mipi_dsi_maybe_register_tiny_driver() is
supposed
to be called by DSI/DBI panel drivers at the end of th
By changing the pixel clock and the length of the back porch, it is
possible to obtain a perfect 50 Hz refresh rate.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 43 +++-
1 file changed, 29 insertions(+), 14 deletions(-)
diff --git a/drivers
pport for the Frida FRD350H54004
panel")
Cc: sta...@vger.kernel.org # v5.5
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index 51
Hi,
Le mar. 7 juil. 2020 à 11:04, Randy Dunlap a
écrit :
Drop the doubled word "to".
Signed-off-by: Randy Dunlap
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Cc: Paul Cercueil
Cc: Thomas Bogendoerfer
Cc: linux-m...@vger.kernel.org
Reviewed-by: Paul Cercueil
Che
169 ("drm/tinydrm: Add MIPI DBI support")
Cc: # 4.10
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/drm_mipi_dbi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c
index bb27c82757f1..bf7888ad9ad4 100644
Hi Noralf,
Le dim. 5 juil. 2020 à 17:58, Noralf Trønnes a
écrit :
Den 03.07.2020 16.13, skrev Paul Cercueil:
The function mipi_dbi_spi1_transfer() will transfer its payload as
9-bit
data, the 9th (MSB) bit being the data/command bit. In order to do
that,
it unpacks the 8-bit values
Hi Sam,
Le mar. 30 juin 2020 à 14:05, Sam Ravnborg a écrit
:
Hi Paul.
On Tue, Jun 30, 2020 at 01:52:08AM +0200, Paul Cercueil wrote:
All Ingenic SoCs starting from the JZ4725B support OSD mode.
In this mode, two separate planes can be used. They can have
different
positions and sizes
Hi Sam,
Le mar. 30 juin 2020 à 13:44, Sam Ravnborg a écrit
:
Hi Paul.
On Tue, Jun 30, 2020 at 01:52:06AM +0200, Paul Cercueil wrote:
The address of the DMA descriptor never changes. It can therefore
be set
in the probe function.
Signed-off-by: Paul Cercueil
---
Notes:
v2
Hi Sam,
Le mar. 30 juin 2020 à 14:16, Sam Ravnborg a écrit
:
Hi Paul.
On Tue, Jun 30, 2020 at 01:52:09AM +0200, Paul Cercueil wrote:
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging
Hi Emil,
Le mar. 16 juin 2020 à 18:47, Emil Velikov
a écrit :
Hi all,
Allow me to compare this approach with some work Linus W [1] did a
while back, which I've just noticed.
Pauls' approach:
- Perhaps the shortest one possible
Porting an existing DSI panel to DBI is 3 lines of code -
Hi Noralf,
Le dim. 14 juin 2020 à 18:36, Noralf Trønnes a
écrit :
Den 07.06.2020 15.38, skrev Paul Cercueil:
Hi,
Here's a follow-up on the previous discussion about the current
state of
DSI/DBI panel drivers, TinyDRM, and the need of a cleanup.
This patchset introduces
Hi Emil,
Le mar. 16 juin 2020 à 18:47, Emil Velikov
a écrit :
Hi all,
Allow me to compare this approach with some work Linus W [1] did a
while back, which I've just noticed.
Pauls' approach:
- Perhaps the shortest one possible
Porting an existing DSI panel to DBI is 3 lines of code -
This driver will register a DBI host driver for panels connected over
SPI.
For now, only DBI type c3 is supported, which is a SPI protocol with 8
bits per word, with the data/command information carried by a separate
GPIO.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/bridge/Kconfig | 8
This driver is for the Ilitek ILI9341 based YX240QV29-T 2.4" 240x320 TFT
LCD panel from Adafruit.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/Kconfig| 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ilitek-ili9341.c
is registered with it.
This TinyDRM driver expects that a DCS-compliant protocol is used by the
DSI/DBI panel and can only be used with these.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/tiny/Kconfig| 8 +
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/gpu/drm/tiny/tiny-dsi.c | 262
with.
The DSI host driver can then use the information provided by the DBI/DSI
device driver, such as the bus type and the number of lanes, to
configure its hardware properly.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/drm_mipi_dsi.c | 9 +
include/drm/drm_mipi_dsi.h | 12
us, and the ILI9341
DRM panel driver will probe. The driver will detect that no controller
is linked to the panel, and eventually register the DBI/DSI TinyDRM
driver.
I can't stress it enough that this is a RFC, so it still has very rough
edges.
Cheers,
-Paul
Paul Cercueil (4):
gpu/drm: dsi: Let host an
Here are a few cleanups to the ingenic-drm driver.
- some error paths were missing and have been added;
- the mode validation has been moved to the .mode_valid helper callback.
Cheers,
-Paul
Paul Cercueil (2):
drm/ingenic: Handle errors of drm_atomic_get_plane_state
drm/ingenic: Validate
drm_atomic_get_plane_state() can return errors, so we need to handle
these.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm
Validate modes in the drm_crtc_helper_funcs.mode_valid() callback, which
is designed for this purpose, instead of doing it in
drm_crtc_helper_funcs.atomic_check().
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 34 +--
1 file changed, 20
Le mer. 29 juil. 2020 à 0:00, dan...@ffwll.ch a écrit :
On Tue, Jul 28, 2020 at 10:17:36PM +0200, Sam Ravnborg wrote:
Hi Paul.
On Tue, Jul 28, 2020 at 05:16:39PM +0200, Paul Cercueil wrote:
> Here are a few cleanups to the ingenic-drm driver.
> - some error paths were missing an
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/Kconfig | 9 +
dr
by a separate GPIO.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/bridge/Kconfig | 8 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/dbi-spi.c | 261 +++
3 files changed, 270 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/dbi-spi.c
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