Hello Logan
Thank You very much for respond.
Could be I have done is stupid...
But at first sight it has to be simple:
The PCIe Write transactions are address routed, so if in the packet header the
other endpoint address is written the TLP has to be routed (by PCIe Switch to
the endpoint), the
for help
regards
Ludwig
- Original Message -
From: "Logan Gunthorpe" <log...@deltatee.com>
To: "David Laight" <david.lai...@aculab.com>, "Petrosyan, Ludwig"
<ludwig.petros...@desy.de>
Cc: "Alexander Deucher" <alexander.deuc...@amd
- Original Message -
> From: "David Laight" <david.lai...@aculab.com>
> To: "Petrosyan, Ludwig" <ludwig.petros...@desy.de>, "Logan Gunthorpe"
> <log...@deltatee.com>
> Cc: "Alexander Deucher" <alexander.deuc..
