From: Rob Clark
Move the hwcg tables into the hw catalog.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 619 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 617
From: Rob Clark
Split each gen's gpu table into it's own file. Only code-motion, no
functional change.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/Makefile | 5 +
drivers/gpu/drm/msm/adreno/a2xx_catalo
From: Rob Clark
Split into a separate table per generation, in preparation to move each
gen's device table to it's own file.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 67 +
From: Rob Clark
Split the single flat gpulist table into per-gen tables that exist in
their own per-gen files, and start moving more info into the device
table. This at least gets all the big tables of register settings out
of the heart of the a6xx_gpu code. Probably more could be moved, to
On Tue, Jun 18, 2024 at 1:30 AM Dmitry Baryshkov
wrote:
>
> On Mon, Jun 17, 2024 at 03:51:14PM GMT, Rob Clark wrote:
> > From: Rob Clark
> >
> > Introduce a6xx_info where we can stash gen specific stuff without
> > polluting the toplevel adreno_info struct.
&g
From: Rob Clark
Move the CP_PROTECT settings into the hw catalog.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 247 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 257 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2
From: Rob Clark
Introduce a6xx_info where we can stash gen specific stuff without
polluting the toplevel adreno_info struct.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 65 +--
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +--
drivers/gpu/drm
From: Rob Clark
Move the hwcg tables into the hw catalog.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 619 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 617 -
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 -
3 files
From: Rob Clark
Split each gen's gpu table into it's own file. Only code-motion, no
functional change.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Makefile | 5 +
drivers/gpu/drm/msm/adreno/a2xx_catalog.c | 52 ++
drivers/gpu/drm/msm/adreno/a3xx_catalo
From: Rob Clark
Split into a separate table per generation, in preparation to move each
gen's device table to it's own file.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 67 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 10 +++
From: Rob Clark
Split the single flat gpulist table into per-gen tables that exist in
their own per-gen files, and start moving more info into the device
table. This at least gets all the big tables of register settings out
of the heart of the a6xx_gpu code. Probably more could be moved, to
From: Rob Clark
Move the CP_PROTECT settings into the hw catalog.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 247 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 257 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2
From: Rob Clark
Introduce a6xx_info where we can stash gen specific stuff without
polluting the toplevel adreno_info struct.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 65 +--
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +--
drivers/gpu/drm
From: Rob Clark
Move the hwcg tables into the hw catalog.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 619 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 617 -
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 -
3 files
From: Rob Clark
Split each gen's gpu table into it's own file. Only code-motion, no
functional change.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Makefile | 5 +
drivers/gpu/drm/msm/adreno/a2xx_catalog.c | 52 ++
drivers/gpu/drm/msm/adreno/a3xx_catalo
From: Rob Clark
Split into a separate table per generation, in preparation to move each
gen's device table to it's own file.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 67 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 10 +++
From: Rob Clark
Split the single flat gpulist table into per-gen tables that exist in
their own per-gen files, and start moving more info into the device
table. This at least gets all the big tables of register settings out
of the heart of the a6xx_gpu code. Probably more could be moved, to
From: Rob Clark
Add the SQE fw version to dmesg and devcoredump.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 32 +++--
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 ++
3 files changed, 33
From: Rob Clark
In the case of iova fault triggered devcore dumps, include additional
debug information based on what we think is the current page tables,
including the TTBR0 value (which should match what we have in
adreno_smmu_fault_info unless things have gone horribly wrong), and
the
From: Rob Clark
Add an io-pgtable method to walk the pgtable returning the raw PTEs that
would be traversed for a given iova access.
Signed-off-by: Rob Clark
---
drivers/iommu/io-pgtable-arm.c | 51 --
include/linux/io-pgtable.h | 4 +++
2 files changed
From: Rob Clark
This series extends io-pgtable-arm with a method to retrieve the page
table entries traversed in the process of address translation, and then
beefs up drm/msm gpu devcore dump to include this (and additional info)
in the devcore dump.
This is a respin of https
From: Rob Clark
Add an io-pgtable method to walk the pgtable returning the raw PTEs that
would be traversed for a given iova access.
Signed-off-by: Rob Clark
---
drivers/iommu/io-pgtable-arm.c | 50 --
include/linux/io-pgtable.h | 4 +++
2 files changed
From: Rob Clark
In the case of iova fault triggered devcore dumps, include additional
debug information based on what we think is the current page tables,
including the TTBR0 value (which should match what we have in
adreno_smmu_fault_info unless things have gone horribly wrong), and
the
From: Rob Clark
This series extends io-pgtable-arm with a method to retrieve the page
table entries traversed in the process of address translation, and then
beefs up drm/msm gpu devcore dump to include this (and additional info)
in the devcore dump.
This is a respin of https
From: Rob Clark
This should allow disabling the zap node via an overlay, for slbounce.
Suggested-by: Nikita Travkin
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
On Mon, May 13, 2024 at 11:27 AM Christian König
wrote:
>
> Am 10.05.24 um 18:34 schrieb Zack Rusin:
> > Hey,
> >
> > so this is a bit of a silly problem but I'd still like to solve it
> > properly. The tldr is that virtualized drivers abuse
> > drm_driver::gem_prime_import_sg_table (at least vmwg
From: Rob Clark
When debugging faults, it is useful to know how the BO is mapped (cached
vs WC, gpu readonly, etc).
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 1 +
drivers/gpu/drm/msm/msm_gpu.c | 6 --
drivers/gpu/drm/msm/msm_gpu.h | 1 +
3
On Fri, May 10, 2024 at 3:09 AM Jani Nikula wrote:
>
> On Fri, 10 May 2024, Mauro Carvalho Chehab wrote:
> > Em Fri, 10 May 2024 11:08:38 +0300
> > Jani Nikula escreveu:
> >
> >> On Thu, 09 May 2024, Dmitry Baryshkov wrote:
> >> > The drm/msm driver had adopted using Python3 script to generate
On Tue, May 7, 2024 at 11:17 AM T.J. Mercier wrote:
>
> On Tue, May 7, 2024 at 7:04 AM Christian König
> wrote:
> >
> > Am 07.05.24 um 15:39 schrieb Daniel Vetter:
> > > On Tue, May 07, 2024 at 12:10:07PM +0200, Christian König wrote:
> > >> Am 06.05.24 um 21:04 schrieb T.J. Mercier:
> > >>> On
On Tue, May 7, 2024 at 8:40 AM Rob Clark wrote:
>
> Hi Dave,
>
> This is the main pull for v6.10. It includes a merge of
> phy_dp_modes_6.10 to pick up DP subnode API, so we can add support to
> configure phy as either DP or eDP depending on hw configuration.
>
> We might
drm/msm/dpu: Always flush the slave INTF on the CTL
drm/msm/dpu: Allow configuring multiple active DSC blocks
drm/msm/dpu: Rename `ctx` parameter to `intf` to match other functions
Rob Clark (1):
drm/msm/a6xx: Cleanup indexed regs const'ness
Zan Dobersek (2):
drm/msm/a7x
From: Rob Clark
These tables were made non-const in commit 3cba4a2cdff3 ("drm/msm/a6xx:
Update ROQ size in coredump") in order to avoid powering up the GPU when
reading back a devcoredump. Instead let's just stash the count that is
potentially read from hw in struct a6xx_gpu_stat
On Wed, May 1, 2024 at 9:19 AM Lucas De Marchi wrote:
>
> On Wed, May 01, 2024 at 04:58:05PM GMT, Tvrtko Ursulin wrote:
> >
> >Hi,
> >
> >On 24/04/2024 15:48, Adrián Larumbe wrote:
> >>Hi Tvrtko,
> >>
> >>On 15.04.2024 13:50, Tvrtko Ursul
Hi Dave,
Fixes for v6.9, description below
The following changes since commit 4be445f5b6b6810baf397b2d159bd07c3573fd75:
drm/msm/dpu: capture snapshot on the first commit_done timeout
(2024-03-04 11:44:03 +0200)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/msm.
On Tue, Apr 9, 2024 at 8:23 AM Dmitry Baryshkov
wrote:
>
> On Tue, Apr 09, 2024 at 05:12:46PM +0200, Konrad Dybcio wrote:
> >
> >
> > On 4/6/24 04:56, Dmitry Baryshkov wrote:
> > > On Fri, Apr 05, 2024 at 10:41:31AM +0200, Konrad Dybcio wrote:
> > > > From: Neil Armstrong
> > > >
> > > > Usually,
On Wed, Apr 3, 2024 at 11:37 AM Adrián Larumbe
wrote:
>
> Up to this day, all fdinfo-based GPU profilers must traverse the entire
> /proc directory structure to find open DRM clients with fdinfo file
> descriptors. This is inefficient and time-consuming.
>
> This patch adds a new device class attr
On Thu, Mar 28, 2024 at 11:54 AM Simon Ser wrote:
>
> On Thursday, March 28th, 2024 at 19:47, Rob Clark wrote:
>
> > any chance I could talk you into pushing to drm-misc-fixes?
>
> Oh sorry, I thought you had access… Pushed with a minor edit to remove
> unnecessary parent
On Tue, Mar 26, 2024 at 2:15 AM Simon Ser wrote:
>
> Makes sense to me!
>
> Reviewed-by: Simon Ser
Thanks.. any chance I could talk you into pushing to drm-misc-fixes?
BR,
-R
minik Behr wrote:
>
> It also fixes importing virtgpu blobs into real hardware, for instance amdgpu
> for DRI_PRIME rendering.
>
> On Fri, Mar 22, 2024 at 2:48 PM Rob Clark wrote:
>>
>> From: Rob Clark
>>
>> virtgpu "vram" GEM objects do not
From: Rob Clark
virtgpu "vram" GEM objects do not implement obj->get_sg_table(). But
they also don't use drm_gem_map_dma_buf(). In fact they may not even
have guest visible pages. But it is perfectly fine to export and share
with other virtual devices.
Reported-by: D
On Thu, Mar 2, 2023 at 6:35 AM Simon Ser wrote:
>
> drm_gem_map_dma_buf() requires drm_gem_object_funcs.get_sg_table
> to be implemented, or else WARNs.
>
> Allow drivers to leave this hook unimplemented to implement purely
> local DMA-BUFs (ie, DMA-BUFs which cannot be imported anywhere
> else bu
On Fri, Mar 15, 2024 at 4:46 AM Dmitry Baryshkov
wrote:
>
> Currently display-related register headers are generated from XML files
> shipped withing Mesa source tree. This is not fully optimal: it requires
> multi-stage process of the changes first being landed to Mesa and only
> then synced to t
On Fri, Mar 15, 2024 at 2:28 AM Jani Nikula wrote:
>
> On Thu, 14 Mar 2024, Rob Clark wrote:
> > When we first merged drm/ci I was unsure if it would need it's own
> > -next branch. But after using it for a couple releases, a few times
> > I've found myself w
When we first merged drm/ci I was unsure if it would need it's own
-next branch. But after using it for a couple releases, a few times
I've found myself wanting to backmerge drm/ci changes without
necessarily backmerging all of drm-misc-next.
So, maybe it makes some sense to have a drm-ci-next br
Hi Dave,
This is the last bit for v6.9, which was waiting on
drm-misc-next-2024-02-29. Description below.
The following changes since commit 177bce60cd10a4ffdc9881bf6f2dff7880408c1d:
Merge tag 'drm-misc-next-2024-02-29' into msm-next (2024-03-03 18:32:11 -0800)
are available in the Git repos
On Wed, Mar 6, 2024 at 3:24 PM Ville Syrjälä
wrote:
>
> On Wed, Mar 06, 2024 at 07:37:16AM -0800, Rob Clark wrote:
> > On Wed, Mar 6, 2024 at 7:06 AM Ville Syrjälä
> > wrote:
> > >
> > > On Wed, Mar 06, 2024 at 06:49:15AM -0800, Rob Clark wrote:
> >
On Wed, Mar 6, 2024 at 7:06 AM Ville Syrjälä
wrote:
>
> On Wed, Mar 06, 2024 at 06:49:15AM -0800, Rob Clark wrote:
> > On Wed, Mar 6, 2024 at 4:18 AM Thomas Zimmermann
> > wrote:
> > >
> > > Hi,
> > >
> > > sorry that I did not see the
On Wed, Mar 6, 2024 at 4:18 AM Thomas Zimmermann wrote:
>
> Hi,
>
> sorry that I did not see the patch before.
>
> Am 27.02.24 um 23:19 schrieb Douglas Anderson:
> > Even though the UDL driver converts to RGB565 internally (see
> > pixel32_to_be16() in udl_transfer.c), it advertises XRGB for
>
On Mon, Mar 4, 2024 at 5:38 PM Gurchetan Singh
wrote:
>
>
>
>
> On Fri, Mar 1, 2024 at 10:54 AM Rob Clark wrote:
>>
>> From: Rob Clark
>>
>> Perfetto can use these traces to track global and per-process GPU memory
>> usage.
>>
>> Sign
On Fri, Mar 1, 2024 at 10:53 AM Rob Clark wrote:
>
> From: Rob Clark
>
> Perfetto can use these traces to track global and per-process GPU memory
> usage.
>
> Signed-off-by: Rob Clark
> ---
> I realized the tracepoint that perfetto uses to show GPU memory usage
>
From: Rob Clark
Perfetto can use these traces to track global and per-process GPU memory
usage.
Signed-off-by: Rob Clark
---
I realized the tracepoint that perfetto uses to show GPU memory usage
globally and per-process was already upstream, but with no users.
This overlaps a bit with fdinfo
unction
drm/msm/dpu: Only enable DSC_MODE_MULTIPLEX if dsc_merge is enabled
Neil Armstrong (4):
dt-bindings: display/msm/gmu: Document Adreno 750 GMU
dt-bindings: arm-smmu: fix SM8[45]50 GPU SMMU if condition
dt-bindings: arm-smmu: Document SM8650 GPU SMMU
drm/msm:
Hi Dave,
A late revert to address a displayport hpd regression.
The following changes since commit 8c7bfd8262319fd3f127a5380f593ea76f1b88a2:
drm/msm: Wire up tlb ops (2024-02-15 08:51:31 -0800)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/msm.git tags/drm-msm-
On Wed, Feb 21, 2024 at 6:36 PM Dmitry Baryshkov
wrote:
>
> On Tue, 20 Feb 2024 at 16:31, Helen Koike wrote:
> >
> >
> >
> > On 20/02/2024 09:17, Dmitry Baryshkov wrote:
> > > Bump IGT revision to pick up Rob Clark's fixes for the msm driver:
> > >
> > > - msm_submit@invalid-duplicate-bo-submit,F
n fix
Dmitry Baryshkov (1):
drm/msm/a6xx: set highest_bank_bit to 13 for a610
Rob Clark (3):
drm/msm/gem: Fix double resv lock aquire
Revert "drm/msm/gpu: Push gpu lock down past runpm"
drm/msm: Wire up tlb ops
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
driv
On Wed, Feb 14, 2024 at 11:34 PM Johan Hovold wrote:
>
> On Tue, Feb 13, 2024 at 09:23:40AM -0800, Rob Clark wrote:
> > From: Rob Clark
> >
> > The brute force iommu_flush_iotlb_all() was good enough for unmap, but
> > in some cases a map operation could require rem
From: Rob Clark
The brute force iommu_flush_iotlb_all() was good enough for unmap, but
in some cases a map operation could require removing a table pte entry
to replace with a block entry. This also requires tlb invalidation.
Missing this was resulting an obscure iova fault on what should be a
On Mon, Feb 12, 2024 at 1:55 PM Rob Clark wrote:
>
> From: Rob Clark
>
> DRM_MODESET_LOCK_ALL_BEGIN() has a hidden trap-door (aka retry loop),
> which means we can't rely too much on variable initializers.
>
> Fixes: 6e455f5dcdd1 ("drm/crtc: fix uninitialized vari
From: Rob Clark
DRM_MODESET_LOCK_ALL_BEGIN() has a hidden trap-door (aka retry loop),
which means we can't rely too much on variable initializers.
Fixes: 6e455f5dcdd1 ("drm/crtc: fix uninitialized variable use")
Signed-off-by: Rob Clark
---
I have mixed
Hi Dave,
A few fixes for v6.8, description below
The following changes since commit d4ca26ac4be0d9aea7005c40df75e6775749671b:
drm/msm/dp: call dp_display_get_next_bridge() during probe
(2023-12-14 09:27:46 +0200)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/ms
Hi Dave,
A few fixes for v6.8, description below
The following changes since commit d4ca26ac4be0d9aea7005c40df75e6775749671b:
drm/msm/dp: call dp_display_get_next_bridge() during probe
(2023-12-14 09:27:46 +0200)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/ms
From: Rob Clark
Since commit 79e2cf2e7a19 ("drm/gem: Take reservation lock for vmap/vunmap
operations"), the resv lock is already held in the prime vmap path, so
don't try to grab it again.
v2: This applies to vunmap path as well
v3: Fix fixes commit
Fixes: 79e2cf2e7a19
From: Rob Clark
Since commit 56e5abba8c3e ("dma-buf: Add unlocked variant of vmapping
functions"), the resv lock is already held in the prime vmap path, so
don't try to grab it again.
v2: This applies to vunmap path as well
Fixes: 56e5abba8c3e ("dma-buf: Add unlocked
From: Rob Clark
Since commit 56e5abba8c3e ("dma-buf: Add unlocked variant of vmapping
functions"), the resv lock is already held in the prime vmap path, so
don't try to grab it again.
Fixes: 56e5abba8c3e ("dma-buf: Add unlocked variant of vmapping functions")
On Fri, Jan 12, 2024 at 7:57 AM Rob Clark wrote:
>
> On Fri, Jan 12, 2024 at 3:42 AM Vignesh Raman
> wrote:
> >
> > Hi Rob,
> >
> >
> > On 09/01/24 01:20, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > The msm tests shoul
On Fri, Jan 12, 2024 at 3:42 AM Vignesh Raman
wrote:
>
> Hi Rob,
>
>
> On 09/01/24 01:20, Rob Clark wrote:
> > From: Rob Clark
> >
> > The msm tests should skip on non-msm hw, so I think it should be safe to
> > enable everywhere.
> >
> > Sign
On Wed, Jan 10, 2024 at 2:50 AM Daniel Vetter wrote:
>
> On Tue, Jan 09, 2024 at 10:22:17AM -0800, Rob Clark wrote:
> > From: Rob Clark
> >
> > This reverts commit abe2023b4cea192ab266b351fd38dc9dbd846df0.
> >
> > Changing the locking order means that sched
From: Rob Clark
This reverts commit abe2023b4cea192ab266b351fd38dc9dbd846df0.
Changing the locking order means that scheduler/msm_job_run() can race
with the recovery kthread worker, with the result that the GPU gets an
extra runpm get when we are trying to power it off. Leaving the GPU in
an
On Mon, Jan 8, 2024 at 6:13 PM Rob Clark wrote:
>
> On Mon, Jan 8, 2024 at 2:58 PM Abhinav Kumar
> wrote:
> >
> >
> >
> > On 1/8/2024 11:50 AM, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > The msm tests should skip on non-msm
On Mon, Jan 8, 2024 at 2:58 PM Abhinav Kumar wrote:
>
>
>
> On 1/8/2024 11:50 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > The msm tests should skip on non-msm hw, so I think it should be safe to
> > enable everywhere.
> >
> > Signed-off
From: Rob Clark
The msm tests should skip on non-msm hw, so I think it should be safe to
enable everywhere.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/ci/testlist.txt | 49 +
1 file changed, 49 insertions(+)
diff --git a/drivers/gpu/drm/ci/testlist.txt b
On Thu, Dec 7, 2023 at 10:02 AM Alex Deucher wrote:
>
> Show buffers as shared if they are shared via dma-buf as well
> (e.g., shared with v4l or some other subsystem).
>
> Signed-off-by: Alex Deucher
> Cc: Rob Clark
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/drm
On Tue, Jan 2, 2024 at 12:12 PM Konrad Dybcio wrote:
>
> On 2.01.2024 20:33, Rob Clark wrote:
> > From: Rob Clark
> >
> > We'd miss actually activating LLC.
> >
> > Signed-off-by: Rob Clark
> > ---
> > drivers/gpu/drm/msm/adreno/a6xx_gpu.c |
From: Rob Clark
We'd miss actually activating LLC.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index a5660d6
On Fri, Dec 22, 2023 at 11:58 AM Akhil P Oommen
wrote:
>
> On Mon, Dec 18, 2023 at 07:59:24AM -0800, Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > a6xx_recover() is relying on the gpu lock to serialize against incoming
> > submits doing a runpm get, as it
From: Rob Clark
a6xx_recover() is relying on the gpu lock to serialize against incoming
submits doing a runpm get, as it tries to temporarily balance out the
runpm gets with puts in order to power off the GPU. Unfortunately this
gets worse when we (in a later patch) will move the runpm get out
On Mon, Dec 11, 2023 at 2:09 PM Marijn Suijten
wrote:
>
> On 2023-12-11 10:19:55, Rob Clark wrote:
> > From: Rob Clark
> >
> > When we start getting these, we get a *lot*. So ratelimit it to not
> > flood dmesg.
> >
> > Signed-off-by: Rob Clark
> &
From: Rob Clark
When we start getting these, we get a *lot*. So ratelimit it to not
flood dmesg.
Signed-off-by: Rob Clark
---
dpu should probably stop rolling it's own trace macros, but that would
be a larger cleanup.
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 -
drivers/gp
On Wed, Dec 6, 2023 at 4:29 AM Konrad Dybcio wrote:
>
>
>
> On 12/5/23 23:03, Rob Clark wrote:
> > From: Rob Clark
> >
> > Split into a separate table per generation, in preparation to move each
> > gen's device table to it's own file.
> >
>
From: Rob Clark
Move the CP_PROTECT settings into the hw catalog.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 246 -
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 255 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2
From: Rob Clark
Introduce a6xx_info where we can stash gen specific stuff without
polluting the toplevel adreno_info struct.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 55 +--
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 +-
drivers/gpu/drm
From: Rob Clark
Move the hwcg tables into the hw catalog.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 560 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 558 -
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 -
3 files
From: Rob Clark
Split each gen's gpu table into it's own file. Only code-motion, no
functional change.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Makefile | 5 +
drivers/gpu/drm/msm/adreno/a2xx_catalog.c | 53 ++
drivers/gpu/drm/msm/adreno/a3xx_catalo
From: Rob Clark
Split into a separate table per generation, in preparation to move each
gen's device table to it's own file.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 59 +++---
1 file changed, 51 insertions(+), 8 deletions(-)
di
From: Rob Clark
Split the single flat gpulist table into per-gen tables that exist in
their own per-gen files, and start moving more info into the device
table. This at least gets all the big tables of register settings out
of the heart of the a6xx_gpu code. Probably more could be moved, to
From: Rob Clark
This does unfortunately require a mesa fix to avoid turnip hanging, but
we don't have a good way to know the userspace version. Fortunately
that fix is now in mesa-23.3.0-rc3 and later[1].
[1]
https://gitlab.freedesktop.org/mesa/mesa/-/c
From: Rob Clark
Container fences have burner contexts, which makes the trick to store at
most one fence per context somewhat useless if we don't unwrap array or
chain fences.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/scheduler/sched_main.c | 47 ++
1 file ch
On Tue, Dec 5, 2023 at 8:56 AM Rob Clark wrote:
>
> On Tue, Dec 5, 2023 at 7:58 AM Christian König
> wrote:
> >
> > Am 05.12.23 um 16:41 schrieb Rob Clark:
> > > On Mon, Dec 4, 2023 at 10:46 PM Christian König
> > > wrote:
> > >> Am 04.12.23
On Tue, Dec 5, 2023 at 7:58 AM Christian König wrote:
>
> Am 05.12.23 um 16:41 schrieb Rob Clark:
> > On Mon, Dec 4, 2023 at 10:46 PM Christian König
> > wrote:
> >> Am 04.12.23 um 22:54 schrieb Rob Clark:
> >>> On Thu, Mar 23, 2023 at 2:30 PM Rob Clark wr
On Mon, Dec 4, 2023 at 10:46 PM Christian König
wrote:
>
> Am 04.12.23 um 22:54 schrieb Rob Clark:
> > On Thu, Mar 23, 2023 at 2:30 PM Rob Clark wrote:
> >> [SNIP]
> > So, this patch turns out to blow up spectacularly with dma_fence
> > refcnt underflows when
On Thu, Mar 23, 2023 at 2:30 PM Rob Clark wrote:
>
> On Thu, Mar 23, 2023 at 7:03 AM Christian König
> wrote:
> >
> > Am 23.03.23 um 14:54 schrieb Rob Clark:
> > > On Thu, Mar 23, 2023 at 12:35 AM Christian König
> > > wrote:
> > >> Am 22.
From: Rob Clark
The UBWC settings need to match between the display and GPU. When we
updated the GPU settings, we forgot to make the corresponding update on
the display side.
Reported-by: Steev Klimaszewski
Fixes: 07e6de738aa6 ("drm/msm/a690: Fix reg values for a690")
Signed-off-by:
On Thu, Nov 30, 2023 at 5:13 AM Christian König
wrote:
>
> Am 28.11.23 um 18:52 schrieb Rob Clark:
> > On Tue, Nov 28, 2023 at 6:28 AM Alex Deucher wrote:
> >> On Tue, Nov 28, 2023 at 9:17 AM Christian König
> >> wrote:
> >>> Am 17.11.23 um 20:56 sch
On Tue, Nov 28, 2023 at 6:28 AM Alex Deucher wrote:
>
> On Tue, Nov 28, 2023 at 9:17 AM Christian König
> wrote:
> >
> > Am 17.11.23 um 20:56 schrieb Alex Deucher:
> > > Add shared stats. Useful for seeing shared memory.
> > >
> > > Signed-off-by: Alex Deucher
> > > ---
> > > drivers/gpu/drm/
On Tue, Nov 21, 2023 at 5:14 AM Dmitry Baryshkov
wrote:
>
> On Tue, 21 Nov 2023 at 04:26, Rob Clark wrote:
> >
> > On Wed, Nov 15, 2023 at 11:33 AM Dmitry Baryshkov
> > wrote:
> > >
> > > On Wed, 15 Nov 2023 at 20:46, Dipam Turkar wrote:
> > &
From: Danylo Piliaiev
KGSL doesn't support a690 so all reg values were the same as
on a660. Now we know the values and they are different from the
windows driver.
This fixes hangs on D3D12 games and some CTS tests.
Signed-off-by: Danylo Piliaiev
Signed-off-by: Rob Clark
---
drivers/gp
From: Danylo Piliaiev
Downstream always set BIT(7)
Signed-off-by: Danylo Piliaiev
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno
On Tue, Nov 21, 2023 at 4:41 PM Abhinav Kumar wrote:
>
>
>
> On 10/24/2023 12:01 PM, Abhinav Kumar wrote:
> >
> >
> > On 10/23/2023 4:03 PM, Dmitry Baryshkov wrote:
> >> On Tue, 24 Oct 2023 at 01:36, Rob Clark wrote:
> >>>
> >>>
Hi Dave,
A few fixes for v6.7, description below
The following changes since commit b08d26dac1a1075c874f40ee02ec8ddc39e20146:
drm/msm/a7xx: actually use a7xx state registers (2023-10-16 09:38:56 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/msm.git tags/
From: Danylo Piliaiev
KGSL doesn't support a690 so all reg values were the same as
on a660. Now we know the values and they are different from the
windows driver.
This fixes hangs on D3D12 games and some CTS tests.
Signed-off-by: Danylo Piliaiev
Signed-off-by: Rob Clark
---
drivers/gp
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