On Tue, Feb 14, 2023 at 4:38 PM Konrad Dybcio wrote:
>
>
>
> On 15.02.2023 01:10, Dmitry Baryshkov wrote:
> > On 14/02/2023 23:56, Rob Clark wrote:
> >> On Tue, Feb 14, 2023 at 9:32 AM Konrad Dybcio
> >> wrote:
> >>>
> >>> One of
+ Akhil
On Tue, Feb 14, 2023 at 10:03 AM Konrad Dybcio wrote:
>
>
> v1 -> v2:
> - Fix A630 values in [2/14]
> - Fix [6/14] for GMU-equipped GPUs
>
> Link to v1:
> https://lore.kernel.org/linux-arm-msm/20230126151618.225127-1-konrad.dyb...@linaro.org/
>
> This series concludes my
On Tue, Feb 14, 2023 at 9:32 AM Konrad Dybcio wrote:
>
> One of the protected ranges was too small (compared to the data we
> have downstream). Fix it.
>
> Fixes: 408434036958 ("drm/msm/a6xx: update/fix CP_PROTECT initialization")
> Signed-off-by: Konrad Dybcio
> ---
>
On Tue, Feb 14, 2023 at 11:14 AM Rob Clark wrote:
>
> On Fri, Feb 10, 2023 at 5:07 AM Tvrtko Ursulin
> wrote:
> >
> > From: Tvrtko Ursulin
> >
> > In i915 we have this concept of "wait boosting" where we give a priority
> > boost
> > for
On Fri, Feb 10, 2023 at 5:07 AM Tvrtko Ursulin
wrote:
>
> From: Tvrtko Ursulin
>
> In i915 we have this concept of "wait boosting" where we give a priority boost
> for instance to fences which are actively waited upon from userspace. This has
> it's pros and cons and can certainly be discussed
dr
> setting to the a5xx_preempt_hw_init() which is called after setting the
> shadow_iova, getting the correct value for the address.
>
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as
> privileged")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7555
&g
On Fri, Feb 3, 2023 at 10:12 AM Bjorn Andersson
wrote:
>
> When any of the components in the mdss hierarchy fails to bind,
> previously bound components are being unbound again.
>
> One such case happens when the DP controller fails to find its bridge or
> panel, where adreno_unbind() will be
On Tue, Feb 7, 2023 at 7:41 PM Bjorn Andersson
wrote:
>
> From: Bjorn Andersson
>
> Introduce support for the Adreno A690, found in Qualcomm SC8280XP.
>
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 120
On Mon, Feb 6, 2023 at 8:05 AM Christian König wrote:
>
> Am 06.02.23 um 16:52 schrieb Rob Clark:
> > On Mon, Feb 6, 2023 at 2:15 AM Christian König
> > wrote:
> >> Am 03.02.23 um 19:10 schrieb Rob Clark:
> >>> From: Rob Clark
> >>>
> &g
On Mon, Feb 6, 2023 at 2:15 AM Christian König wrote:
>
> Am 03.02.23 um 19:10 schrieb Rob Clark:
> > From: Rob Clark
> >
> > If userspace calls the AMDGPU_CS ioctl from multiple threads, because
> > the vm is global to the drm_file, you can end up wi
On Fri, Feb 3, 2023 at 8:49 AM Rob Clark wrote:
>
> From: Rob Clark
>
> Because eb_composite_fence_create() drops the fence_array reference
> after creation of the sync_file, only the sync_file holds a ref to the
> fence. But fd_install() makes that reference visable to users
From: Rob Clark
If userspace calls the AMDGPU_CS ioctl from multiple threads, because
the vm is global to the drm_file, you can end up with multiple threads
racing in amdgpu_vm_clear_freed(). So the freed list should be
protected with the status_lock, similar to other vm lists.
Fixes
From: Rob Clark
Because eb_composite_fence_create() drops the fence_array reference
after creation of the sync_file, only the sync_file holds a ref to the
fence. But fd_install() makes that reference visable to userspace, so
it must be the last thing we do with the fence.
Signed-off-by: Rob
On Wed, Feb 1, 2023 at 5:28 AM Dmitry Osipenko
wrote:
>
> On 1/27/23 01:58, Ryan Neph wrote:
> > An interrupted dma_fence_wait() becomes an -ERESTARTSYS returned
> > to userspace ioctl(DRM_IOCTL_VIRTGPU_EXECBUFFER) calls, prompting to
> > retry the ioctl(), but the passed exbuf->fence_fd has been
support for SM8550
dt-bindings: display/msm: document the SM8550 DSI PHY
drm/msm/dsi: add support for DSI-PHY on SM8550
drm/msm/dsi: add support for DSI 2.7.0
Rob Clark (5):
drm/msm: Add MSM_SUBMIT_BO_NO_IMPLICIT
drm/msm/gpu: Add devfreq tuning debugfs
drm/msm/
From: Rob Clark
A userspace with multiple threads racing I915_GEM_SET_TILING to set the
tiling to I915_TILING_NONE could trigger a double free of the bit_17
bitmask. (Or conversely leak memory on the transition to tiled.) Move
allocation/free'ing of the bitmask within the section protected
From: Rob Clark
No longer needed since the removal of dependency on DMA helper.
Fixes: 2ea8aec56bf1 ("drm/mediatek: Remove dependency on GEM DMA helper")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
synchronization")
> Signed-off-by: Ryan Neph
Reviewed-by: Rob Clark
> ---
>
> drivers/gpu/drm/virtio/virtgpu_ioctl.c | 9 ++---
> include/uapi/drm/virtgpu_drm.h | 3 +++
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/v
On Tue, Jan 24, 2023 at 9:46 PM MyungJoo Ham wrote:
>
> >On Tue, Jan 24, 2023 at 8:04 PM MyungJoo Ham
> >wrote:
> >>
> >> >Sender : Rob Clark
> >> >Date : 2023-01-24 00:37 (GMT+9)
> >> >Title : [PATCH] PM / devfreq: Fix bui
On Tue, Jan 24, 2023 at 8:04 PM MyungJoo Ham wrote:
>
> >Sender : Rob Clark
> >Date : 2023-01-24 00:37 (GMT+9)
> >Title : [PATCH] PM / devfreq: Fix build issues with devfreq disabled
> >
> >From: Rob Clark
> >
> >The existing no-op shims for when P
From: Rob Clark
Once we create the handle, the handle owns the reference. Currently
nothing was doing anything with the shmem ptr after the handle was
created, but let's change drm_gem_shmem_create_with_handle() to not
return the pointer, so-as to not encourage problematic use of this
function
On Mon, Jan 23, 2023 at 4:38 AM Krzysztof Kozlowski wrote:
>
> On 11/01/2023 00:14, Rob Clark wrote:
> > From: Rob Clark
> >
> > Make the handful of tuning knobs available visible via debugfs.
> >
> > v2: select DEVFREQ_GOV_SIMPLE_ONDEMAND be
From: Rob Clark
The existing no-op shims for when PM_DEVFREQ (or an individual governor)
only do half the job. The governor specific config/tuning structs need
to be available to avoid compile errors in drivers using devfreq.
Fixes: 6563f60f14cb ("drm/msm/gpu: Add devfreq tuning de
From: Rob Clark
In the error path, exynos_drm_gem_mmap() was dropping an obj reference
that it doesn't own.
Fixes: 832316c704fe ("drm/exynos: use drm generic mmap interface")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/exynos/exynos_drm_gem.c | 12 +---
1 file changed, 1
From: Rob Clark
In the error path, rockchip_drm_gem_object_mmap() is dropping an obj
reference that it doesn't own.
Fixes: 41315b793e13 ("drm/rockchip: use drm_gem_mmap helpers")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 3 ---
1 file changed, 3
From: Rob Clark
In the error path, mtk_drm_gem_object_mmap() is dropping an obj
reference that it doesn't own.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/mediatek/mtk_drm_gem.c | 2 --
1 file changed, 2
From: Rob Clark
Once we create the handle, the handle owns the reference. Currently
nothing was doing anything with the shmem ptr after the handle was
created, but let's change drm_gem_shmem_create_with_handle() to not
return the pointer, so-as to not encourage problematic use of this
function
From: Rob Clark
It appears that the dependency on the DMA helpers was only for
drm_gem_dma_vm_ops.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/mediatek/Kconfig | 1 -
drivers/gpu/drm/mediatek/mtk_drm_gem.c | 7 ++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git
From: Rob Clark
In the error path, drm_gem_dma_mmap() is dropping an obj reference that
it doesn't own.
Fixes: f5ca8eb6f9bd ("drm/cma-helper: Implement mmap as GEM CMA object
functions")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_gem_dma_helper.c | 2 --
1 file changed, 2
From: Rob Clark
Once we create the handle, the handle owns the reference. Currently
nothing was doing anything with the shmem ptr after the handle was
created, but let's change drm_gem_shmem_create_with_handle() to not
return the pointer, so-as to not encourage problematic use of this
function
From: Rob Clark
Adding the vm to the vm_xa table makes it visible to userspace, which
could try to race with us to close the vm. So we need to take our extra
reference before putting it in the table.
Signed-off-by: Rob Clark
---
Note, you could list commit e1a7ab4fca0c ("drm/i915: R
Joel Fernandes (Google) (1):
adreno: Shutdown the GPU properly
Rob Clark (1):
drm/msm/gpu: Fix potential double-free
drivers/gpu/drm/msm/adreno/adreno_device.c | 5 +++--
drivers/gpu/drm/msm/adreno/adreno_gpu.c| 4
Hi Dave,
A few fixes for the v6.3 cycle. Summary below.
The following changes since commit 8d1d17d47eaebe4466459846d07e4ba8953fa585:
Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu',
'msm-next-lumag-dp', 'msm-next-lumag-dsi', 'msm-next-lumag-hdmi' and
'msm-next-lumag-mdp5' into
On Tue, Jan 10, 2023 at 1:29 PM Rob Clark wrote:
>
> From: Rob Clark
>
> If userspace was calling the MSM_SET_PARAM ioctl on multiple threads to
> set the COMM or CMDLINE param, it could trigger a race causing the
> previous value to be kfree'd multiple times. Fix t
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index e578d74d402f..1f31e72ca0cf 100644
--- a/drivers/gpu/drm/msm
From: Rob Clark
Change idle freq clamping back to the direct method, bypassing PM QoS
requests. The problem with using PM QoS requests is they call
(indirectly) the governors ->get_target_freq() which goes thru a
get_dev_status() cycle. The problem comes when the GPU becomes active
ag
From: Rob Clark
Make the handful of tuning knobs available visible via debugfs.
v2: select DEVFREQ_GOV_SIMPLE_ONDEMAND because for some reason
struct devfreq_simple_ondemand_data depends on this
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm
From: Rob Clark
Rob Clark (3):
drm/msm/gpu: Add devfreq tuning debugfs
drm/msm/gpu: Bypass PM QoS constraint for idle clamp
drm/msm/gpu: Add default devfreq thresholds
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm
From: Rob Clark
If userspace was calling the MSM_SET_PARAM ioctl on multiple threads to
set the COMM or CMDLINE param, it could trigger a race causing the
previous value to be kfree'd multiple times. Fix this by serializing on
the gpu lock.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm
From: Rob Clark
Change idle freq clamping back to the direct method, bypassing PM QoS
requests. The problem with using PM QoS requests is they call
(indirectly) the governors ->get_target_freq() which goes thru a
get_dev_status() cycle. The problem comes when the GPU becomes active
ag
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index e578d74d402f..1f31e72ca0cf 100644
--- a/drivers/gpu/drm/msm
From: Rob Clark
Make the handful of tuning knobs available visible via debugfs.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_debugfs.c | 12
drivers/gpu/drm/msm/msm_drv.h | 9 +
drivers/gpu/drm/msm
From: Rob Clark
Rob Clark (3):
drm/msm/gpu: Add devfreq tuning debugfs
drm/msm/gpu: Bypass PM QoS constraint for idle clamp
drm/msm/gpu: Add default devfreq thresholds
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_debugfs.c | 12 +++
drivers/gpu/drm/msm
0x1a8
> [ 192.649034] msm_job_run+0xb0/0x11c
> [ 192.649058] drm_sched_main+0x170/0x434
> [ 192.649086] kthread+0x134/0x300
> [ 192.649114] ret_from_fork+0x10/0x20
>
> Fix by calling adreno_system_suspend() in the device_shutdown() path.
>
> [ Applied Rob Clark feedbac
On Mon, Jan 9, 2023 at 3:28 PM Dmitry Osipenko
wrote:
>
> On 12/17/22 02:33, Rob Clark wrote:
> > From: Rob Clark
> >
> > Userspace can guess the handle value and try to race GEM object creation
> > with handle close, resulting in a use-after-free if we dereference
From: Rob Clark
Make the handful of tuning knobs available visible via debugfs.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_debugfs.c | 12
drivers/gpu/drm/msm/msm_drv.h | 9 +
drivers/gpu/drm/msm
On Thu, Jan 5, 2023 at 4:49 AM Daniel Vetter wrote:
>
> On Tue, Dec 06, 2022 at 11:21:23AM -0800, Rob Clark wrote:
> > From: Rob Clark
> >
> > In cases where implicit sync is used, it is still useful (for things
> > like sub-allocation, etc) to allow userspace t
dc5 00090acc
> 1fe0: 0058 becc9c64 b6e97e05 b6e0e5f6
> Code: 15922088 1184421c e153 1af8 (e5953000)
> ---[ end trace ]---
>
> Fixes: 0a58d2ae572a ("drm/msm: Make .remove and .shutdown HW shutdown
> consistent")
> Reported-by
On Wed, Jan 4, 2023 at 10:09 AM Abhinav Kumar wrote:
>
>
>
> On 1/3/2023 7:51 AM, Dmitry Baryshkov wrote:
> > Fix another oops reproducible when rebooting the board with the Adreno
> > GPU wokring in the headless mode (e.g. iMX platforms).
> wokring ---> working
> >
> > Unable to handle kernel
On Wed, Jan 4, 2023 at 1:34 AM Tvrtko Ursulin
wrote:
>
>
> On 03/01/2023 23:49, Rob Clark wrote:
> > From: Rob Clark
> >
> > gem_context_register() makes the context visible to userspace, and which
> > point a separate thread can trigger the I915_GEM_CONT
On Tue, Jan 3, 2023 at 5:11 PM Maíra Canal wrote:
>
> On 1/3/23 19:46, Rob Clark wrote:
> > drive-by thought/concern, what are the odds that there is some wayland
> > compositor out there that creates an fb for every window surface, even
> > if it later decides to comp
From: Rob Clark
gem_context_register() makes the context visible to userspace, and which
point a separate thread can trigger the I915_GEM_CONTEXT_DESTROY ioctl.
So we need to ensure that nothing uses the ctx ptr after this. And we
need to ensure that adding the ctx to the xarray is the *last
drive-by thought/concern, what are the odds that there is some wayland
compositor out there that creates an fb for every window surface, even
if it later decides to composite on the GPU because the display does
not support the format? It seems like there is a non-zero chance of
breaking
versions floating around out there, esp back to the pre-qc days, to
know if this is a good enough check. But I guess we can go with it,
and in the worst case later add an allowlist table of fw checksums (or
similar) if this doesn't turn out to be sufficient, so the overall
approach isn't
oint, but it would conflict for stable
backports prior to adding LMLOADKILL_DISABLE.
with the fixes msg corrected,
Reviewed-by: Rob Clark
> - Marijn
>
> > ---
> > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 10 --
> > 1 file changed, 4 insertions(+), 6 deletions(-)
> &
From: Rob Clark
RB_MRT_FLAG_BUFFER is 0x8903->0xa91a inclusive.. don't split it (with a
hole) in the ps_cluster_rac and don't accidentially re-dump part of the
range in ps_cluster_rbp.
Signed-off-by: Rob Clark
---
I'm not 100% sure about this, because the RB_RB_SUB_BLOCK_SEL_CNTL_CD
st
On Wed, Dec 28, 2022 at 8:27 AM Rob Clark wrote:
>
> On Thu, Nov 17, 2022 at 7:12 AM Dmitry Osipenko
> wrote:
> >
> > On 11/17/22 18:09, Christian König wrote:
> > > Am 17.11.22 um 15:41 schrieb Dmitry Osipenko:
> > >> [SNIP]
> > >>>
On Thu, Nov 17, 2022 at 7:12 AM Dmitry Osipenko
wrote:
>
> On 11/17/22 18:09, Christian König wrote:
> > Am 17.11.22 um 15:41 schrieb Dmitry Osipenko:
> >> [SNIP]
> >>> drm_sched_entity_flush() should be called from the flush callback from
> >>> the file_operations structure of panfrost. See
On Thu, Dec 22, 2022 at 2:29 PM Matthew Brost wrote:
>
> In XE, the new Intel GPU driver, a choice has made to have a 1 to 1
> mapping between a drm_gpu_scheduler and drm_sched_entity. At first this
> seems a bit odd but let us explain the reasoning below.
>
> 1. In XE the submission order from
ng_get() fails then this means that user space has
> indeed gone behind our back and freed the handle. In which case just
> return an error code.
>
> Reported-by: Rob Clark
Yeah, I like getting rid of the _create_with_handle() pattern, the
only place where that pattern works is if you
On Fri, Dec 16, 2022 at 3:59 PM Chia-I Wu wrote:
>
> On Fri, Dec 16, 2022 at 3:34 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > Relying on an unreturned handle to hold a reference to an object we
> > dereference is not safe. Userspace can guess t
From: Rob Clark
Userspace can guess the handle value and try to race GEM object creation
with handle close, resulting in a use-after-free if we dereference the
object after dropping the handle's reference. For that reason, dropping
the handle's reference must be done *after* we are done
From: Rob Clark
Relying on an unreturned handle to hold a reference to an object we
dereference is not safe. Userspace can guess the handle and race us
by closing the handle from another thread. The _create_with_handle()
that returns an object ptr is pretty much a pattern to avoid
On Wed, Dec 7, 2022 at 2:15 AM Lucas Stach wrote:
>
> Hi Rob,
>
> Am Dienstag, dem 06.12.2022 um 11:21 -0800 schrieb Rob Clark:
> > From: Rob Clark
> >
> > In cases where implicit sync is used, it is still useful (for things
> > like sub-allocation, etc) to al
From: Rob Clark
In cases where implicit sync is used, it is still useful (for things
like sub-allocation, etc) to allow userspace to opt-out of implicit
sync on per-BO basis.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c| 3 ++-
drivers/gpu/drm/msm/msm_gem_submit.c | 11
On Sun, Dec 4, 2022 at 12:45 PM Dmitry Osipenko
wrote:
>
> On 11/30/22 21:57, Rob Clark wrote:
> > From: Rob Clark
> >
> > drm_gem_shmem_mmap() doesn't own this reference, resulting in the GEM
> > object getting prematurely freed leading to a later use-a
On Thu, Dec 1, 2022 at 12:08 PM Joel Fernandes wrote:
>
> On Sat, Nov 12, 2022 at 6:44 PM Rob Clark wrote:
> >
> > On Fri, Nov 11, 2022 at 1:08 PM Joel Fernandes
> > wrote:
> > >
> > >
> > >
> > > > On Nov 11, 2022, at 2:50 PM, J
On Thu, Dec 1, 2022 at 10:42 AM Joel Fernandes wrote:
>
> On Sat, Nov 12, 2022 at 6:35 PM Rob Clark wrote:
> >
> > On Fri, Nov 11, 2022 at 1:28 PM Akhil P Oommen
> > wrote:
> > >
> > > On 11/12/2022 1:19 AM, Joel Fernandes (Google) wrote:
> > &g
From: Rob Clark
drm_gem_shmem_mmap() doesn't own this reference, resulting in the GEM
object getting prematurely freed leading to a later use-after-free.
Link: https://syzkaller.appspot.com/bug?extid=c8ae65286134dd1b800d
Reported-by: syzbot+c8ae65286134dd1b8...@syzkaller.appspotmail.com
Fixes
From: Rob Clark
vm_open() is not allowed to fail. Fortunately we are guaranteed that
the pages are already pinned, thanks to the initial mmap which is now
being cloned into a forked process, and only need to increment the
refcnt. So just increment it directly. Previously if a signal
From: Rob Clark
A couple fixes for error paths that userspace could manage to trigger.
Rob Clark (2):
drm/shmem-helper: Remove errant put in error path
drm/shmem-helper: Avoid vm_open error paths
drivers/gpu/drm/drm_gem_shmem_helper.c | 18 --
1 file changed, 12 insertions
From: Rob Clark
Add a sequence # for more easily matching up cmd/resp, and the # of free
slots in the virtqueue to more easily see starvation issues.
v2: Fix handling of string fields as well
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/virtgpu_drv.h
On Tue, Nov 29, 2022 at 12:32 PM Guenter Roeck wrote:
>
> On Tue, Nov 29, 2022 at 12:02:42PM -0800, Rob Clark wrote:
> > From: Rob Clark
> >
> > vm_open() is not allowed to fail. Fortunately we are guaranteed that
> > the pages are already pinned, and only nee
From: Rob Clark
drm_gem_shmem_mmap() doesn't own this reference!
Fixes: 2194a63a818d ("drm: Add library for shmem backed GEM objects")
Cc: sta...@vger.kernel.org
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/d
From: Rob Clark
vm_open() is not allowed to fail. Fortunately we are guaranteed that
the pages are already pinned, and only need to increment the refcnt. So
just increment it directly.
Fixes: 2194a63a818d ("drm: Add library for shmem backed GEM objects")
Cc: sta...@vger.kernel.org
From: Rob Clark
A couple fixes for error paths that userspace could manage to trigger.
Rob Clark (2):
drm/shmem-helper: Remove errant put in error path
drm/shmem-helper: Avoid vm_open error paths
drivers/gpu/drm/drm_gem_shmem_helper.c | 15 +++
1 file changed, 11 insertions
From: Rob Clark
Add a sequence # for more easily matching up cmd/resp, and the # of free
slots in the virtqueue to more easily see starvation issues.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 3 +++
drivers/gpu/drm/virtio/virtgpu_trace.h | 20
loop.
>
> This problem was found during shrinker/madvise IOCTL testing of
> virtio-gpu driver. The MSM driver is affected in the same way.
>
> Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/drm_gem.c | 9 +++--
&
-bin detection vs. probe-defer
- Enable clamp_to_idle on 7c3
- Improved hangcheck detection
----
Rob Clark (6):
drm/msm: Remove exclusive-fence hack
drm/msm/a6xx: Fix speed-bin detection vs probe-defer
drm/msm: En
On Thu, Nov 17, 2022 at 7:38 AM Nicolas Dufresne wrote:
>
> Le jeudi 17 novembre 2022 à 13:10 +0100, Christian König a écrit :
> > > > DMA-Buf let's the exporter setup the DMA addresses the importer uses to
> > > > be able to directly decided where a certain operation should go. E.g. we
> > > >
From: Rob Clark
We've had this enabled in the CrOS kernel for a while now without seeing
issues, so let's flip the switch upstream now.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_shrinker.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm
From: Rob Clark
This was overlooked.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index ebe9599a8316
From: Rob Clark
If we get an error (other than -ENOENT) we need to propagate that up the
stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up
end up claiming that we support all the OPPs which is not likely to be
true (and on some generations impossible to be true, ie
From: Rob Clark
If we get an error (other than -ENOENT) we need to propagate that up the
stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up
end up claiming that we support all the OPPs which is not likely to be
true (and on some generations impossible to be true, ie
On Mon, Nov 14, 2022 at 11:59 AM Akhil P Oommen
wrote:
>
> On 11/15/2022 1:11 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > If we get an error (other than -ENOENT) we need to propagate that up the
> > stack. Otherwise if the nvmem driver hasn't probed yet, we'l
On Mon, Nov 14, 2022 at 12:27 PM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Nov 14, 2022 at 11:41 AM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > If we get an error (other than -ENOENT) we need to propagate that up the
> > stack. Otherwise if the nv
From: Rob Clark
If we get an error (other than -ENOENT) we need to propagate that up the
stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up with
whatever OPP(s) are represented by bit zero.
Fixed: fe7952c629da ("drm/msm: Add speed-bin support to a618 gpu")
Signed-o
From: Rob Clark
The _HI reg is always following the _LO reg, so no need to pass these
offsets seprately.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 3 +--
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
From: Rob Clark
If the hangcheck timer expires, check if the fw's position in the
cmdstream has advanced (changed) since last timer expiration, and
allow it up to three additional "extensions" to it's alotted time.
The intention is to continue to catch "shader stuck in a loop"
From: Rob Clark
Try to detect when submit jobs are making forward progress and give them
a bit more time.
Rob Clark (2):
drm/msm/adreno: Simplify read64/write64 helpers
drm/msm: Hangcheck progress detection
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 3 +-
drivers/gpu/drm/msm/adreno
0x5c/0x1a8
> > [ 192.649034] msm_job_run+0xb0/0x11c
> > [ 192.649058] drm_sched_main+0x170/0x434
> > [ 192.649086] kthread+0x134/0x300
> > [ 192.649114] ret_from_fork+0x10/0x20
> >
> > Fix by calling adreno_system_suspend() in the device_shutdown() path.
>
2.534461] invoke_syscall+0x4c/0x118
> > [ 292.534467] el0_svc_common+0x98/0x104
> > [ 292.534473] do_el0_svc+0x30/0x80
> > [ 292.534478] el0_svc+0x20/0x50
> > [ 292.534481] el0t_64_sync_handler+0x78/0x108
> > [ 292.534485] el0t_64_sync+0x1a4/0x1a8
> > [
On Mon, Nov 7, 2022 at 4:22 PM Jessica Zhang wrote:
>
>
>
> On 11/7/2022 2:09 PM, Rob Clark wrote:
> > On Mon, Nov 7, 2022 at 1:32 PM Jessica Zhang
> > wrote:
> >>
> >>
> >>
> >> On 11/7/2022 11:37 AM, Ville Syrjälä wrote:
> &g
On Mon, Nov 7, 2022 at 1:32 PM Jessica Zhang wrote:
>
>
>
> On 11/7/2022 11:37 AM, Ville Syrjälä wrote:
> > On Fri, Oct 28, 2022 at 03:59:49PM -0700, Jessica Zhang wrote:
> >> Introduce and add support for COLOR_FILL and COLOR_FILL_FORMAT
> >> properties. When the color fill value is set, and the
On Mon, Nov 7, 2022 at 1:29 AM Maxime Ripard wrote:
>
> On Thu, Oct 27, 2022 at 08:08:28AM -0700, Rob Clark wrote:
> > On Wed, Oct 26, 2022 at 1:17 AM wrote:
> > >
> > > Hi Rob,
> > >
> > > On Mon, Oct 24, 2022 at 08:48:15AM -0700, Rob Clark wrote
From: Rob Clark
Minimize interactive latency by boosting frequency when userspace is
waiting on the GPU to finish.
Signed-off-by: Rob Clark
---
I did contemplate also boosting on dma_fence_wait(), but (a) that would
require some extra plumbing thru gpu-sched, (b) that only captures a
sub-set
From: Rob Clark
If the hangcheck timer expires, check if the fw's position in the
cmdstream has advanced (changed) since last timer expiration, and
allow it up to three additional "extensions" to it's alotted time.
The intention is to continue to catch "shader stuck in a loop"
From: Rob Clark
The _HI reg is always following the _LO reg, so no need to pass these
offsets seprately.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 3 +--
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
From: Rob Clark
Try to detect when submit jobs are making forward progress and give them
a bit more time.
Rob Clark (2):
drm/msm/adreno: Simplify read64/write64 helpers
drm/msm: Hangcheck progress detection
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 3 +-
drivers/gpu/drm/msm/adreno
On Wed, Nov 2, 2022 at 5:21 AM Christian König
wrote:
>
> Hi Lucas,
>
> Am 02.11.22 um 12:39 schrieb Lucas Stach:
> > Hi Christian,
> >
> > going to reply in more detail when I have some more time, so just some
> > quick thoughts for now.
> >
> > Am Mittwoch, dem 02.11.2022 um 12:18 +0100 schrieb
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