Heiko, Sandy,
Ok to apply these patches?
Sascha
On Wed, Jan 18, 2023 at 02:22:10PM +0100, Sascha Hauer wrote:
> It's been some time since I last sent this series. This version fixes
> a regression Dan Johansen reported. The reason turned out to be simple,
> I used the YUV420 regist
On Tue, Mar 07, 2023 at 11:21:16PM +0100, Heiko Stübner wrote:
> Hi Sascha,
>
> Am Donnerstag, 16. Februar 2023, 11:24:44 CET schrieb Sascha Hauer:
> > The different VOP variants support different maximum resolutions. Reject
> > resolutions that are not supported
On Sun, Mar 12, 2023 at 02:28:45PM -0500, Adam Ford wrote:
> I am trying to work through a series that was submitted for enabling
> the DSI on the i.MX8M Mini and Nano. I have extended this series to
> route the DSI to an HDMI bridge, and I am able to get several
> resolutions to properly sync on
On Mon, Mar 13, 2023 at 06:08:05AM -0500, Adam Ford wrote:
> On Mon, Mar 13, 2023 at 3:51 AM Sascha Hauer wrote:
> >
> > On Sun, Mar 12, 2023 at 02:28:45PM -0500, Adam Ford wrote:
> > > I am trying to work through a series that was submitted for enabling
> > > th
values for mpll_cfg
> - Add patch to discard modes we cannot achieve
>
> Changes since v1:
> - Allow non standard clock rates only on Synopsys phy as suggested by
> Robin Murphy
>
> Sascha Hauer (4):
> drm/rockchip: vop: limit maximium resolution to hardware capabilities
by all VOP variants. Now with higher resolutions
supported in the HDMI driver we have to limit the resolutions to the
ones supported by the VOP.
The actual maximum resolutions are taken from the Rockchip downstream
Kernel.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v5:
- fix
Tested-by: Michael Riesch
Tested-by: Dan Johansen
Link: https://lore.kernel.org/r/20230118132213.2911418-4-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v3:
- only check for rate when clk != NULL
Changes since v2:
- new patch
drivers/gpu/drm
non standard clock rates only on Synopsys phy as suggested by
Robin Murphy
Sascha Hauer (4):
drm/rockchip: vop: limit maximium resolution to hardware capabilities
drm/rockchip: dw_hdmi: relax mode_valid hook
drm/rockchip: dw_hdmi: Add support for 4k@30 resolution
drm/rockchip: dw_hdmi
work
with non standard clock rates.
Tested-by: Michael Riesch
Link: https://lore.kernel.org/r/20220926080435.259617-2-s.ha...@pengutronix.de
Tested-by: Nicolas Frattaroli
Tested-by: Dan Johansen
Link: https://lore.kernel.org/r/20230118132213.2911418-2-s.ha...@pengutronix.de
Signed-off-by: Sascha
Link: https://lore.kernel.org/r/20230118132213.2911418-3-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v2:
- Use correct mpll_cfg values, previously the 420 values were used
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8
1 file changed, 8 insertions
On Fri, Apr 14, 2023 at 04:20:10PM +0200, Paul Kocialkowski wrote:
> Hi,
>
> On Thu 13 Apr 23, 10:27, Chris Morgan wrote:
> > On Thu, Apr 13, 2023 at 04:43:47PM +0200, Sascha Hauer wrote:
> > > During a suspend/resume cycle the VO power domain will be disabled and
;)
Cc: sta...@vger.kernel.org
Signed-off-by: Sascha Hauer
---
Changes since v1:
- Use regcache_mark_dirty()/regcache_sync() instead of regmap_reinit_cache()
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
w-up patch.
Fixes: afa965a45e01 ("drm/rockchip: vop2: fix suspend/resume")
Cc: sta...@vger.kernel.org
Link: https://lore.kernel.org/r/20230417094215.2049231-1-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 10 +++---
1 file changed
On Mon, Apr 17, 2023 at 12:46:05PM +0200, Heiko Stübner wrote:
> Hi Sascha,
>
> Am Montag, 17. April 2023, 11:42:15 CEST schrieb Sascha Hauer:
> > During a suspend/resume cycle the VO power domain will be disabled and
> > the VOP2 registers will reset to their
this by re-initializing the register cache each time we
enable the VOP2. With this the VOP2 will show a picture after a
suspend/resume cycle whereas without this the screen stays dark.
Fixes: 604be85547ce4 ("drm/rockchip: Add VOP2 driver")
Cc: sta...@vger.kernel.org
Signed-off-by: Sa
resolutions on RK3568 where we know it works.
Sascha
>
> --
> FUKAUMI Naoki
>
> On 1/31/23 17:09, Sascha Hauer wrote:
> > Heiko, Sandy,
> >
> > Ok to apply these patches?
> >
> > Sascha
> >
> > On Wed, Jan 18, 2023 at 02:22:10P
On Mon, Feb 06, 2023 at 03:04:48PM +0100, Sascha Hauer wrote:
> On Wed, Feb 01, 2023 at 09:23:56AM +0900, FUKAUMI Naoki wrote:
> > hi,
> >
> > I'm trying this patch series with 6.1.x kernel. it works fine on rk356x
> > based boards (ROCK 3), but it has a probl
On Wed, Feb 01, 2023 at 09:23:56AM +0900, FUKAUMI Naoki wrote:
> hi,
>
> I'm trying this patch series with 6.1.x kernel. it works fine on rk356x
> based boards (ROCK 3), but it has a problem on rk3399 boards (ROCK 4).
>
> on rk3399 with this patch, I can see large noise area (about one third
work
with non standard clock rates.
Tested-by: Michael Riesch
Link: https://lore.kernel.org/r/20220926080435.259617-2-s.ha...@pengutronix.de
Tested-by: Nicolas Frattaroli
Tested-by: Dan Johansen
Link: https://lore.kernel.org/r/20230118132213.2911418-2-s.ha...@pengutronix.de
Signed-off-by: Sascha
Changes since v2:
- Use correct register values for mpll_cfg
- Add patch to discard modes we cannot achieve
Changes since v1:
- Allow non standard clock rates only on Synopsys phy as suggested by
Robin Murphy
Sascha Hauer (4):
drm/rockchip: vop: limit maximium resolution to hardware
by all VOP variants. Now with higher resolutions
supported in the HDMI driver we have to limit the resolutions to the
ones supported by the VOP.
The actual maximum resolutions are taken from the Rockchip downstream
Kernel.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v3:
- new
Link: https://lore.kernel.org/r/20230118132213.2911418-3-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
b/drivers/gpu/drm/rockchip/dw_hdmi
Tested-by: Michael Riesch
Tested-by: Dan Johansen
Link: https://lore.kernel.org/r/20230118132213.2911418-4-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
On Tue, Feb 07, 2023 at 10:46:49AM +, Jonas Karlman wrote:
> Hi Sascha,
> On 2023-02-07 09:44, Sascha Hauer wrote:
> > The different VOP variants support different maximum resolutions. Reject
> > resolutions that are not supported by a specific variant.
> >
> &
On Tue, Feb 07, 2023 at 11:01:26AM +, Jonas Karlman wrote:
> Hi Sascha,
>
> On 2023-02-07 09:44, Sascha Hauer wrote:
> > The Rockchip PLL drivers are currently table based and support only
> > the most common pixelclocks. Discard all modes we cannot achieve
> > a
t do. Now my "userspace" is in kernel and the kernel shouldn't try
to solve this problem. We're trapped :-/
Sascha
>
> --
> FUKAUMI Naoki
>
> On 2/8/23 18:08, Sascha Hauer wrote:
> > Some more small changes to this series, see changelog.
> >
> > Sas
work
with non standard clock rates.
Tested-by: Michael Riesch
Link: https://lore.kernel.org/r/20220926080435.259617-2-s.ha...@pengutronix.de
Tested-by: Nicolas Frattaroli
Tested-by: Dan Johansen
Link: https://lore.kernel.org/r/20230118132213.2911418-2-s.ha...@pengutronix.de
Signed-off-by: Sascha
by all VOP variants. Now with higher resolutions
supported in the HDMI driver we have to limit the resolutions to the
ones supported by the VOP.
The actual maximum resolutions are taken from the Rockchip downstream
Kernel.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v4:
- Use
Tested-by: Michael Riesch
Tested-by: Dan Johansen
Link: https://lore.kernel.org/r/20230118132213.2911418-4-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v3:
- only check for rate when clk != NULL
Changes since v2:
- new patch
drivers/gpu/drm
values for mpll_cfg
- Add patch to discard modes we cannot achieve
Changes since v1:
- Allow non standard clock rates only on Synopsys phy as suggested by
Robin Murphy
Sascha Hauer (4):
drm/rockchip: vop: limit maximium resolution to hardware capabilities
drm/rockchip: dw_hdmi: relax
Link: https://lore.kernel.org/r/20230118132213.2911418-3-s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v2:
- Use correct mpll_cfg values, previously the 420 values were used
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8
1 file changed, 8 insertions
On Tue, Feb 07, 2023 at 10:16:57AM +0100, Dan Johansen wrote:
>
> Den 07.02.2023 kl. 09.44 skrev Sascha Hauer:
> > The different VOP variants support different maximum resolutions. Reject
> > resolutions that are not supported by a specific variant.
> >
> &
tc_state struct.
>
> Fixes: 4e257d9eee23 ("drm/rockchip: get rid of rockchip_drm_crtc_mode_config")
> Signed-off-by: Jonas Karlman
Reviewed-by: Sascha Hauer
Sascha
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 de
lman
Reviewed-by: Sascha Hauer
Sascha
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 16 +++-
> 1 file changed, 3 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> ind
ady guard this
> with a WARN_ON() instead of crashing, so let's do that here too.
>
> Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
> Signed-off-by: Jonas Karlman
Reviewed-by: Sascha Hauer
Sascha
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8 +---
> 1 fi
On Tue, Jun 20, 2023 at 06:47:39AM +, Jonas Karlman wrote:
> Add missing call to crtc reset helper to properly vblank reset.
>
> Also move vop2_crtc_reset and call vop2_crtc_destroy_state to simplify
> and remove duplicated code.
>
> Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
>
ckchip: Add VOP2 driver")
> Signed-off-by: Jonas Karlman
> ---
> v2:
> - Add check for allocation failure (Sascha)
Reviewed-by: Sascha Hauer
Sascha
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 31 +---
> 1 file changed, 14 insertions(+), 17 deleti
ixes: 01e2eaf40c9d ("drm/rockchip: Convert to using
> __drm_atomic_helper_crtc_reset() for reset.")
> Signed-off-by: Jonas Karlman
Reviewed-by: Sascha Hauer
Sascha
> ---
> v2:
> - New patch
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 -
> 1 fi
activated modules
>
> Signed-off-by: Andy Yan
Reviewed-by: Sascha Hauer
Sascha
>
> ---
>
> Changes in v4:
> - check NULL pointer at right place
> - fix the index of fb->obj
> - drop explicitly cast of void pointer
> - make the register dump code as a common f
Yan
> ---
Reviewed-by: Sascha Hauer
Sascha
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2 +-
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 2 +-
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 8
> 3 files changed, 6 insertions
On Mon, Nov 27, 2023 at 06:56:34PM +0800, Andy Yan wrote:
>Hi Sascha:
>
>thanks for you review.
>
>On 11/27/23 18:13, Sascha Hauer wrote:
>
> On Wed, Nov 22, 2023 at 08:56:01PM +0800, Andy Yan wrote:
>
> From: Andy Yan [1]
>
> /sys/kernel/
On Wed, Nov 22, 2023 at 08:53:49PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> The output interface related definition can shared between
> vop and vop2, move them to rockchip_drm_drv.h can avoid duplicated
> definition.
>
> Signed-off-by: Andy Yan
Reviewed-by:
ockchip: vop2: fix suspend/resume")
>
> Signed-off-by: Andy Yan
Reviewed-by: Sascha Hauer
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 10 +++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff
t in
> all case.
>
> Signed-off-by: Andy Yan
Reviewed-by: Sascha Hauer
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 25 ++--
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/d
On Wed, Nov 22, 2023 at 08:54:54PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> The vop2 need to reference more grf(system grf, vop grf, vo0/1 grf,etc)
> in the upcoming rk3588.
>
> So we rename the current system grf to sys_grf.
>
> Signed-off-by: Andy Yan
Reviewed-b
On Wed, Nov 22, 2023 at 08:54:38PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> Set overlay mode register according to the
> output mode is yuv or rgb.
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
>
On Wed, Nov 22, 2023 at 08:54:25PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> The enable bit and transform offset of cluster windows should be
> cleared when it work at linear mode, or we may have a iommu fault
> issue.
>
> Signed-off-by: Andy Yan
Reviewed-by:
On Thu, Nov 30, 2023 at 08:24:49PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> /sys/kernel/debug/dri/vop2/summary: dump vop display state
> /sys/kernel/debug/dri/vop2/regs: dump whole vop registers
> /sys/kernel/debug/dri/vop2/active_regs: only dump the registers of
> activated modules
>
>
On Tue, Dec 05, 2023 at 05:44:03PM +0800, Andy Yan wrote:
> Hi Sascha:
>
> On 12/5/23 17:29, Sascha Hauer wrote:
> > On Thu, Nov 30, 2023 at 08:24:39PM +0800, Andy Yan wrote:
> > > From: Andy Yan
> > >
> > > VOP2 on rk3588:
> > >
> >
YUV support
> 4 4K Esmart windows with line RGB/YUV support
>
> Signed-off-by: Andy Yan
With the two nits below feel free to add my:
Reviewed-by: Sascha Hauer
Thanks for working on this.
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h
> b/drivers/gpu/drm/rockchip/rockch
On Wed, Dec 06, 2023 at 06:20:58PM +0800, Andy Yan wrote:
> Hi Sascha:
>
> > > + unsigned int n = vop2->data->regs_dump_size;
> >
> > 'n' is used only once, it might be clearer just to use the value where
> > needed and drop the extra variable.
>
> Okay, will do.
> >
> > > + unsigned int i;
>
Hi Andy,
Looks good overall, two small things inside.
On Wed, Nov 22, 2023 at 08:55:44PM +0800, Andy Yan wrote:
>
> +#define vop2_output_if_is_hdmi(x)(x == ROCKCHIP_VOP2_EP_HDMI0 || x ==
> ROCKCHIP_VOP2_EP_HDMI1)
> +#define vop2_output_if_is_dp(x) (x == ROCKCHIP_VOP2_EP_DP0
On Wed, Nov 22, 2023 at 08:56:01PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> /sys/kernel/debug/dri/vop2/summary: dump vop display state
> /sys/kernel/debug/dri/vop2/regs: dump whole vop registers
> /sys/kernel/debug/dri/vop2/active_regs: only dump the registers of
> activated modules
>
>
On Wed, Nov 29, 2023 at 07:01:37PM +0800, Andy Yan wrote:
> Hi Sascha:
>
>
>
> On 11/29/23 16:52, Sascha Hauer wrote:
> > On Mon, Nov 27, 2023 at 06:56:34PM +0800, Andy Yan wrote:
> > > Hi Sascha:
> > >
> > > thanks for you review.
> &
On Fri, Jan 19, 2024 at 11:08:40AM -0800, Harshit Mogalapalli wrote:
> Unlock before returning on the error path.
>
> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> Signed-off-by: Harshit Mogalapalli
Reviewed-by: Sascha Hauer
Thanks fo
Hi Andy,
Thanks for your patches, some remarks inline.
On Tue, Nov 14, 2023 at 07:28:55PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> VOP2 on rk3588:
>
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4 4K Cluster windows with AFBC/line
On Thu, Nov 16, 2023 at 03:24:54PM +0800, Andy Yan wrote:
> > case ROCKCHIP_VOP2_EP_HDMI0:
> > case ROCKCHIP_VOP2_EP_HDMI1:
> > ...
> > }
> >
> > would look a bit better overall.
> >
> > > + /*
> > > + * K = 2: dclk_core = if_pixclk_rate > if_dclk_rate
> > >
On Fri, Nov 17, 2023 at 03:06:35PM +0800, Andy Yan wrote:
> Hi Sebastian:
>
> On 11/16/23 21:47, Sebastian Reichel wrote:
> > Hi,
> >
> > On Thu, Nov 16, 2023 at 06:39:40PM +0800, Andy Yan wrote:
> > > > > vop2->sys_grf = syscon_regmap_lookup_by_phandle(dev->of_node,
> > > > >
d 10bit formats")
> Signed-off-by: Andy Yan
> ---
Acked-by: Sascha Hauer
Sascha
>
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> b/drivers/gpu/drm/rockchip
On Mon, Apr 22, 2024 at 06:19:05PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> The port mux of VP2 should be RK3568_OVL_PORT_SET__PORT2_MUX.
>
> Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
> Signed-off-by: Andy Yan
Acked-by: Sascha Hauer
Sascha
&g
801 - 860 of 860 matches
Mail list logo
