From: J?r?me Glisse
When accel is not working on device with virtual address space radeon
segfault because the ib buffer is NULL and trying to map it inside the
virtual address space trigger segfault. This patch only map the ib
buffer if accel is working.
Cc:
Signed-off-by:
From: Jerome Glisse
This is a halfway fix for hawaii acceleration. More fixes to come
but hopefully isolated to userspace.
Signed-off-by: J?r?me Glisse
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/radeon/cik.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Jerome Glisse
Heresy should not be tolerated, any ioctl that rely on pure luck
should die. Violating memory pining kernel policy and all the
reasonable expection kernel have about user of mmu_notifier api
is not tolerable.
Because we can neither broke old userspace the
From: Jerome Glisse
get_user_pages gives no garanty that page it returns are still
the one backing the vma by the time it returns. Thus any ioctl
that rely on this behavior is broken and rely on pure luck. To
avoid any false hope from userspace stop such useage by simply
flat
From: Jerome Glisse
Need to free the uvd ring. Also reshuffle gart tear down to
happen after uvd tear down.
Signed-off-by: J?r?me Glisse
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/radeon/evergreen.c | 2 +-
drivers/gpu/drm/radeon/radeon_uvd.c | 2 ++
From: Jerome Glisse
Fix regresson since the introduction of command stream checking on
evergreen (thread referenced below). Issue is cause by ddx allocating
bo with formula width*height*bpp while programming the GPU command
stream with ALIGN(height, 8). In some case (where
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
cc: stable at vger.kernel.org
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To
From: Jerome Glisse
Print various CP register that have valuable informations regarding
GPU lockup.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c | 16
drivers/gpu/drm/radeon/evergreend.h |4
drivers/gpu/drm/radeon/ni.c
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To
From: Jerome Glisse
For 6xx+. Required for mesa to use htile support for HiZ/HiS.
Userspace will check radeon version 2.14 with is bumped either
by tiling patch or stream out patch. This patch only add support
for htile relocation which should be enough for any userspace
to
So it's pretty much the same patchset except for patch 7 (use mutex
instead of spinlock) and 9 & 10 which correspond to previous patch 9
split in two and the sa allocation being simplified.
The patchset can be found at :
http://people.freedesktop.org/~glisse/reset/
Cheers,
Jerome Glisse
From: Christian K?nig
Different rings have different criteria to test
if they are stuck.
v2: rebased on current drm-next
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |4 +-
From: Christian K?nig
It makes no sense at all to have more than one flag.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c |1 -
drivers/gpu/drm/radeon/r300.c |1 -
From: Christian K?nig
Just register the debugfs files on init instead of
checking the chipset type multiple times.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c | 31
From: Christian K?nig
Removing all the different error messages and
having just one standard behaviour over all
chipset generations.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |7
From: Christian K?nig
Previusly multiple rings could trigger multiple GPU
resets at the same time.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |3 +-
drivers/gpu/drm/radeon/radeon_fence.c | 150
From: Christian K?nig
Aligning offset can make it bigger than tmp->offset
leading to an overrun bug in the following subtraction.
v2: Against initial suspicions this can't happen in mainline,
so no need to push it into stable.
Signed-off-by: Christian K?nig
From: Christian K?nig
Make the suballocator self containing to locking.
v2: split the bugfix into a seperate patch.
v3: Jerome Glisse use mutex, no reason to use spinlock that
are more heavyweight than mutex
Signed-off-by: Christian K?nig
Signed-off-by: Jerome
From: Christian K?nig
Dumping the current allocations.
v2: convert to mutex
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.h |5 +
drivers/gpu/drm/radeon/radeon_ring.c | 22 ++
From: Jerome Glisse
The sa allocator is suppose to be a ring allocator, ie allocation
happen first at the end and if there is no more room we start at
the begining again. This patch make the code match this design.
sa_manager keep track of the start & end hole, it first try
From: Jerome Glisse
wakequeue is use in case we want to wait until we got something
that allow to allocate the object.
Signed-off-by: Christian K?nig
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_gart.c |
From: Christian K?nig
Instead of hacking the calculation multiple times.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_gart.c |6 ++
drivers/gpu/drm/radeon/radeon_object.h | 11 +++
From: Christian K?nig
Directly use the suballocator to get small chunks
of memory. It's equally fast and doesn't crash when
we encounter a GPU reset.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c|1 -
From: Christian K?nig
We should signal the caller that we haven't waited at all.
v2: only change fence_wait_next not fence_wait_last.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_fence.c |
From: Christian K?nig
As discussed with Michel that name better
describes the behavior of this function.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|2 +-
From: Christian K?nig
Should be used to free resource that are protected by a fence.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |8 -
drivers/gpu/drm/radeon/radeon_fence.c | 50
From: Christian K?nig
It's never used and so practically superfluous.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |1 -
drivers/gpu/drm/radeon/radeon_fence.c |7 ---
2 files changed, 0 insertions(+),
From: Christian K?nig
To prevent deadlocks under extreme conditions.
v2: rebase on top of new sa_manager patch
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_gart.c |
From: Christian K?nig
It isn't necessary any more and the suballocator
seems to perform even better.
v2: ignore ERESTARTSYS in error reporting,
split fence changes into seperate patch,
use try_free SA callback to avoid lockups
v3: rebase on top of sa manager new
From: Christian K?nig
Rings need to lock in order, otherwise
the ring subsystem can deadlock.
v2: fix error handling and number of locked doublewords.
v3: stop creating unneeded semaphores.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
From: Christian K?nig
Instead of all this humpy pumpy with recursive
mutex (which also fixes only halve of the problem)
move the actual gpu reset out of the fence code,
return -EDEADLK and then reset the gpu in the
calling ioctl function.
v2: Split removal of
From: Christian K?nig
Not needed anymore.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h| 44 +---
drivers/gpu/drm/radeon/radeon_cs.c | 10 +++---
From: Christian K?nig
It isn't chipset specific, so it makes no sense
to have that inside r100.c.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |5 +--
drivers/gpu/drm/radeon/ni.c |5 +--
From: Christian K?nig
Don't hard code the 10 seconds timeout. Compute jobs
can run much longer.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |1 +
drivers/gpu/drm/radeon/radeon_drv.c |4
From: Christian K?nig
Fixing just another deadlock problem with gpu reset tests.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git
From: Christian K?nig
Nothing chipset or ring specific with it,
so also move it to radon_ring.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c | 10 +-
drivers/gpu/drm/radeon/ni.c | 11
From: Christian K?nig
Since it is now identical to r100_gpu_is_lockup.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r300.c| 14 --
drivers/gpu/drm/radeon/radeon_asic.c | 16
From: Christian K?nig
Since it is now identical to evergreen_gpu_is_lockup.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/ni.c | 19 ---
drivers/gpu/drm/radeon/radeon_asic.c | 12 ++--
Ok so i reread stuff and the :
drm/radeon: add general purpose fence signaled callback
is a big NAK actually. It change the paradigm. Moving most of
the handling into the irq process which is something i am intimatly
convinced we should avoid.
Here is the patchset up to ib pool cleanup. I have
From: Christian K?nig
Different rings have different criteria to test
if they are stuck.
v2: rebased on current drm-next
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |4 +-
From: Christian K?nig
It makes no sense at all to have more than one flag.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c |1 -
drivers/gpu/drm/radeon/r300.c |1 -
From: Christian K?nig
Just register the debugfs files on init instead of
checking the chipset type multiple times.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c | 31
From: Christian K?nig
Removing all the different error messages and
having just one standard behaviour over all
chipset generations.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |7
From: Christian K?nig
Previusly multiple rings could trigger multiple GPU
resets at the same time.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |3 +-
drivers/gpu/drm/radeon/radeon_fence.c | 150
From: Christian K?nig
Aligning offset can make it bigger than tmp->offset
leading to an overrun bug in the following subtraction.
v2: Against initial suspicions this can't happen in mainline,
so no need to push it into stable.
Signed-off-by: Christian K?nig
From: Christian K?nig
Make the suballocator self containing to locking.
v2: split the bugfix into a seperate patch.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_sa.c | 17
From: Christian K?nig
Dumping the current allocations.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.h |5 +
drivers/gpu/drm/radeon/radeon_ring.c | 22 ++
From: Jerome Glisse
The sa allocator is suppose to be a ring allocator, ie allocation
happen first at the end and if there is no more room we start at
the begining again. This patch make the code match this design.
sa_manager keep track of the start & end hole, it first try
From: Christian K?nig
We should signal the caller that we haven't waited at all.
v2: only change fence_wait_next not fence_wait_last.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_fence.c |
From: Christian K?nig
As discussed with Michel that name better
describes the behavior of this function.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|2 +-
From: Christian K?nig
It's never used and so practically superfluous.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |1 -
drivers/gpu/drm/radeon/radeon_fence.c |7 ---
2 files changed, 0 insertions(+),
From: Jerome Glisse
This allow to associate a fence with sa bo and retry and
wait if sa bo alloc can block.
v2: bug fixes
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 10 ++-
drivers/gpu/drm/radeon/radeon_cs.c|4 +-
So here are sa improvement, ib pool cleanup and semaphore cleanup.
Those are Christian patches rebased on top of its last 17 patchset
and on top of sa allocator change.
The idea is that the sa_bo struct is not free until associated fence
is signaled. Meanwhile the ib structure or the
From: Jerome Glisse
This patch is ground work for having the sa allocator as a standalone
self contained helper. Each sa_bo can be associated with a fence and
when allocating new one you can ask to block until there is room for
satisfying your request.
It also change the sa
From: Christian K?nig
It isn't necessary any more and the suballocator
seems to perform even better.
v2: ignore ERESTARTSYS in error reporting,
split fence changes into seperate patch,
use try_free SA callback to avoid lockups
v3: rebase on top of sa manager new
From: Jerome Glisse
Both ib and semaphore are always associated with a fence, rework the
sa allocator to store the fence in the sa_bo allowing sa allocator
to wait for a fence and retry allocation. This also simplify the ib
& semaphore code. Simpify semaphore code to use the
So this patchset convert the fence to use 64bits sequence and simplify
the fence code (dropping fence lock). I am still convinced that the
best solution is to have the various helper code deals with fence
cleanup/processing. The last patch show an example of what can be
done to improve sa
From: Jerome Glisse
This convert fence to use uint64_t sequence number intention is
to use the fact that uin64_t is big enough that we don't need to
care about wrap around.
Tested with and without writeback using 0xF000 as initial
fence sequence and thus allowing to test
From: Jerome Glisse
This add the number of adjacent scratch reg you want to allocate
or free to the scratch alloc/free function.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c | 12 ++--
drivers/gpu/drm/radeon/r420.c |4 ++--
From: Jerome Glisse
Using 64bits fence sequence we can directly compare sequence
number to know if a fence is signaled or not. Thus the fence
list became useless, so does the fence lock that mainly
protected the fence list.
Things like ring.ready are no longer behind a lock,
From: Jerome Glisse
With fence rework it's now easier to agressivly free idle bo
when there is no hole to satisfy current allocation request.
The hit of some cs ioctl to have to go through the sa bo list
and free them is minimal, it happens once in while and avoid
some fence
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_cs.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c
b/drivers/gpu/drm/radeon/radeon_cs.c
index 82f2e7b0..b3800cb 100644
---
From: Jerome Glisse
We need to sync with the GFX ring as ttm might have schedule bo move
on it and new command scheduled for other ring need to wait for bo
data to be in place.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_cs.c | 12 ++--
From: Jerome Glisse
This add a per ring allocation management and load balance the
chunk of the temp buffer between each ring. A ring that often
fail to find a hole or worse have to wait for previous fence
will have more chance to grow over other ring. This ring is
properly
From: Jerome Glisse
It seems imac pannel doesn't like whe we change the hot plug setup
and then refuse to work. This should fix :
https://bugzilla.redhat.com/show_bug.cgi?id=726143
Signed-off-by: Matthew Garrett
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
It seems imac pannel doesn't like whe we change the hot plug setup
and then refuse to work. This help but doesn't fully fix:
https://bugzilla.redhat.com/show_bug.cgi?id=726143
v2: fix typo and improve commit message
Signed-off-by: Matthew Garrett
From: Jerome Glisse
It seems imac pannel doesn't like whe we change the hot plug setup
and then refuse to work. This help but doesn't fully fix:
https://bugzilla.redhat.com/show_bug.cgi?id=726143
v2: fix typo and improve commit message
Signed-off-by: Matthew Garrett
First chunk rework fence to use uin64_t, unlike previous patch,
we only emit the lower 32 bits with the hw. The upper 32bits is
handled in the fence process function where a lenghty comment
discuss all the possible things that can go wrong and why it
doesn't matter.
Then taking advantage of
From: Christian K?nig
A single global mutex for ring submissions seems sufficient.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |3 +-
drivers/gpu/drm/radeon/radeon_device.c|3 +-
drivers/gpu/drm/radeon/radeon_pm.c|
From: Jerome Glisse
This convert fence to use uint64_t sequence number intention is
to use the fact that uin64_t is big enough that we don't need to
care about wrap around.
Tested with and without writeback using 0xF000 as initial
fence sequence and thus allowing to test
From: Jerome Glisse
Using 64bits fence sequence we can directly compare sequence
number to know if a fence is signaled or not. Thus the fence
list became useless, so does the fence lock that mainly
protected the fence list.
Things like ring.ready are no longer behind a lock,
From: Christian K?nig
We are locking the ring emission mutex anyway, so
there is no harm in doing it a bit earlier and
prevent multiple resets to happen at the same time.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_fence.c | 10 +-
From: Christian K?nig
Instead of hacking the calculation multiple times.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_gart.c |6 ++
drivers/gpu/drm/radeon/radeon_object.h| 11 +++
drivers/gpu/drm/radeon/radeon_ring.c
From: Christian K?nig
Make the suballocator self containing to locking.
v2: split the bugfix into a seperate patch.
v3: remove some unreleated changes.
Sig-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_sa.c |
From: Christian K?nig
Dumping the current allocations.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_object.h |5 +
drivers/gpu/drm/radeon/radeon_ring.c | 22 ++
drivers/gpu/drm/radeon/radeon_sa.c | 14
From: Christian K?nig
Instead of offset + size keep start and end offset directly.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h|4 ++--
drivers/gpu/drm/radeon/radeon_cs.c |4 ++--
drivers/gpu/drm/radeon/radeon_object.h |4
From: Christian K?nig
Allocating and freeing it seperately.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |4 ++--
drivers/gpu/drm/radeon/radeon_cs.c|4 ++--
drivers/gpu/drm/radeon/radeon_gart.c |4 ++--
From: Christian K?nig
Define the interface without modifying the allocation
algorithm in any way.
v2: rebase on top of fence new uint64 patch
Signed-off-by: Jerome Glisse
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h |1 +
From: Jerome Glisse
Use one wait queue for all rings. When one ring progress, other
likely does to and we are not expecting to have a lot of waiter
anyway.
Also add a fence_wait_any that will wait until the first fence
in the fence array (one fence per ring) is signaled.
From: Christian K?nig
A startover with a new idea for a multiple ring allocator.
Should perform as well as a normal ring allocator as long
as only one ring does somthing, but falls back to a more
complex algorithm if more complex things start to happen.
We store the
From: Jerome Glisse
Directly use the suballocator to get small chunks of memory.
It's equally fast and doesn't crash when we encounter a GPU reset.
v2: rebased on new SA interface.
Signed-off-by: Christian K?nig
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
It isn't necessary any more and the suballocator seems to perform
even better.
Signed-off-by: Christian K?nig
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 17 +--
drivers/gpu/drm/radeon/radeon_device.c|1 -
From: Christian K?nig
We can now protected the semaphore ram by a
fence, so free it immediately.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_ttm.c |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git
From: Jerome Glisse
It never really belonged there in the first place.
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h | 16
drivers/gpu/drm/radeon/radeon_cs.c|4 ++--
drivers/gpu/drm/radeon/radeon_fence.c |3 ---
From: Christian K?nig
If we don't store local data into global variables
it isn't necessary to lock anything.
v2: rebased on new SA interface
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/evergreen_blit_kms.c |1 -
drivers/gpu/drm/radeon/r600.c
From: Jerome Glisse
No need to malloc it any more.
Signed-off-by: Jerome Glisse
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/evergreen_cs.c | 10 +++---
drivers/gpu/drm/radeon/r100.c | 38 ++--
drivers/gpu/drm/radeon/r200.c
Attached is 2 patch for dumping everything needed to replay faulty
command stream. I haven't add a module option in the radeon patch
but the idea would be to enable the dumping only if it's requested.
I know AMD folks would like to reuse AMD internal format, but unless
we can quickly get ACK to
From: Jerome Glisse
Allow driver to provide a custom read callback for debugfs file.
Usefull if driver try to dump big buffer, avoid double buffering.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/drm_debugfs.c | 19 ---
From: Jerome Glisse
This try to identify the faulty user command stream that caused
lockup. If it finds one it create big blob that contains all
information needed to replay the faulty command stream.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c
So here is improved patchset, where i splited ground work necessary
for the dumping into their own patch. The debugfs improvement could
probably be usefull to intel instead of having i915 have it's own
debugfs file stuff.
The lockup dumping public api have been move into radeon_drm.h
Stressing
From: Jerome Glisse
Allow driver to provide a custom read callback for debugfs file.
Usefull if driver try to dump big buffer, avoid double buffering.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/drm_debugfs.c | 19 ---
From: Jerome Glisse
Allow radeon debugfs file to provide a custom read function. This
is usefull in case you don't want to double buffer with seq_file,
or simply in case the buffer data is too big to be buffered by
seq_file.
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
Allow caller of radeon_vm_bo_update_pte to get the virtual bo offset.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |3 ++-
drivers/gpu/drm/radeon/radeon_cs.c |2 +-
drivers/gpu/drm/radeon/radeon_gart.c | 11
From: Jerome Glisse
This try to identify the faulty user command stream that caused
lockup. If it finds one it create big blob that contains all
information, this include packet stream but also snapshot of all
bo used by the faulty packet stream.
This means that the blod is
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 528 +-
drivers/gpu/drm/radeon/radeon_ring.c |3 +-
2 files changed, 267 insertions(+), 264 deletions(-)
diff --git
Make the format more future proof reliable by adding a total chunk
size field that allow old userspace to skip over potentialy new
chunk. Not sure this is really needed but hey.
Jerome
From: Jerome Glisse
Allow driver to provide a custom read callback for debugfs file.
Usefull if driver try to dump big buffer, avoid double buffering.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/drm_debugfs.c | 19 ---
1 - 100 of 361 matches
Mail list logo