On 4/9/24 7:06 AM, Pascal FONTAIN wrote:
From: Andrew Davis
This new export type exposes to userspace the SRAM area as a DMA-BUF
Heap,
this allows for allocations of DMA-BUFs that can be consumed by various
DMA-BUF supporting devices.
Signed-off-by: Andrew Davis
Tested-by: Pascal Fontain
On 3/10/24 7:48 AM, Paul Cercueil wrote:
Add the necessary infrastructure to the IIO core to support a new
optional DMABUF based interface.
With this new interface, DMABUF objects (externally created) can be
attached to a IIO buffer, and subsequently used for data transfer.
A userspace
: Set the DMA mask for the udmabuf
device (v2)")
Signed-off-by: Andrew Davis
---
drivers/dma-buf/udmabuf.c | 41 +++
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dma-buf/udmabuf.c
index 3a23f0a
On 1/25/24 2:30 PM, Daniel Vetter wrote:
On Tue, Jan 23, 2024 at 04:12:26PM -0600, Andrew Davis wrote:
Currently this driver creates a SGT table using the CPU as the
target device, then performs the dma_sync operations against
that SGT. This is backwards to how DMA-BUFs are supposed to behave
9e9fa6a9198b ("udmabuf: Set the DMA mask for the udmabuf
device (v2)")
Signed-off-by: Andrew Davis
---
drivers/dma-buf/udmabuf.c | 41 +++
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dma-buf/udmabuf.c
index
as part of {map,unmap}_udmabuf().
Signed-off-by: Andrew Davis
---
drivers/dma-buf/udmabuf.c | 43
+--
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dma-buf/udmabuf.c
index c406459996489..3a23f0a7d112a 100644
On 1/24/24 4:58 AM, Paul Cercueil wrote:
Hi Christian,
Le mardi 23 janvier 2024 à 14:28 +0100, Christian König a écrit :
Am 23.01.24 um 14:02 schrieb Paul Cercueil:
[SNIP]
That an exporter has to call extra functions to access his
own
buffers
is a complete no-go for the
l this and perform the correct action by doing the dma_sync
operations for each device currently attached to the backing buffer.
[0] commit 1ffe09590121 ("udmabuf: fix dma-buf cpu access")
[1] commit 9e9fa6a9198b ("udmabuf: Set the DMA mask for the udmabuf device
(v2)")
Now that we do not need to call dma_coerce_mask_and_coherent() on our
miscdevice device, use the module_misc_device() helper for registering
and module init/exit.
Signed-off-by: Andrew Davis
---
drivers/dma-buf/udmabuf.c | 30 +-
1 file changed, 1 insertion(+), 29
When a device attaches to and maps our buffer we need to keep track
of this mapping/device. This is needed for synchronization with these
devices when beginning and ending CPU access for instance. Add a list
that tracks device mappings as part of {map,unmap}_udmabuf().
Signed-off-by: Andrew Davis
On 1/10/24 2:29 AM, Tony Lindgren wrote:
* Andrew Davis [240109 17:20]:
--- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
@@ -850,12 +850,19 @@ target-module@5600 {
;
ti,sysc-sidle
On 1/11/24 3:20 AM, Paul Cercueil wrote:
Hi Andrew,
Le lundi 08 janvier 2024 à 15:12 -0600, Andrew Davis a écrit :
On 12/19/23 11:50 AM, Paul Cercueil wrote:
[V4 was: "iio: Add buffer write() support"][1]
Hi Jonathan,
This is a respin of the V3 of my patchset that introduced a new
On 1/9/24 1:17 PM, Krzysztof Kozlowski wrote:
On 09/01/2024 20:04, Andrew Davis wrote:
On 1/9/24 12:59 PM, Krzysztof Kozlowski wrote:
On 09/01/2024 18:19, Andrew Davis wrote:
This binding will be used for GPUs starting from Series6 (Rogue)
and later. A different binding document will describe
On 1/9/24 12:59 PM, Krzysztof Kozlowski wrote:
On 09/01/2024 18:19, Andrew Davis wrote:
This binding will be used for GPUs starting from Series6 (Rogue)
and later. A different binding document will describe Series5.
With that the name "img,powervr" is too generic, rename to
"im
The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors. Describe how the SGX GPU is integrated in these SoC,
including register space and interrupts. Clocks, reset, and power domain
information is SoC specific.
Signed-off-by: Andrew Davis
Reviewed-
Add SGX GPU device entry to base jz4780 dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic
Add SGX GPU device entry to base AM654 dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am65
name Rogue+ binding to img,powervr-rogue.yaml
- Locked all property item counts
- Removed nodename pattern check
Andrew Davis (11):
dt-bindings: gpu: Rename img,powervr to img,powervr-rogue
dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
ARM: dts: omap3: Add device tree entry for SGX GPU
ARM:
This binding will be used for GPUs starting from Series6 (Rogue)
and later. A different binding document will describe Series5.
With that the name "img,powervr" is too generic, rename to
"img,powervr-rogue" to avoid confusion.
Suggested-by: Maxime Ripard
Signed-off-by: An
Add SGX GPU device entry to base OMAP5 dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/ti/omap/omap5.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap5.dtsi
b/arch/arm/boot/dts/ti
Add SGX GPU device entry to base DRA7x dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/ti/omap/dra7.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi
b/arch/arm/boot/dts/ti
Add SGX GPU device entry to base OMAP4 dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/ti/omap/omap4.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap4.dtsi
b/arch/arm/boot/dts/ti
Add SGX GPU device entry to base sun6i-a31 dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/allwinner/sun6i-a31.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
b/arch/arm/boot/dts
Add SGX GPU device entries to base OMAP3 dtsi files.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/ti/omap/am3517.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap34xx.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 9
Add SGX GPU device entry to base AM33xx dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/ti/omap/am33xx.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi
b/arch/arm/boot/dts
Add SGX GPU device entry to base AM437x dtsi file.
Signed-off-by: Andrew Davis
Reviewed-by: Javier Martinez Canillas
---
arch/arm/boot/dts/ti/omap/am4372.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi
b/arch/arm/boot/dts/ti/omap/am4372
On 1/9/24 5:32 AM, Krzysztof Kozlowski wrote:
On 08/01/2024 19:32, Andrew Davis wrote:
The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors. Describe how the SGX GPU is integrated in these SoC,
including register space and interrupts. Clocks, reset,
On 1/9/24 5:28 AM, Krzysztof Kozlowski wrote:
On 08/01/2024 19:32, Andrew Davis wrote:
Signed-off-by: Andrew Davis
---
.../bindings/gpu/{img,powervr.yaml => img,powervr-rogue.yaml} | 4 ++--
MAINTAINERS | 2 +-
2 files changed, 3 inserti
On 12/19/23 11:50 AM, Paul Cercueil wrote:
[V4 was: "iio: Add buffer write() support"][1]
Hi Jonathan,
This is a respin of the V3 of my patchset that introduced a new
interface based on DMABUF objects [2].
The V4 was a split of the patchset, to attempt to upstream buffer
write() support
Add SGX GPU device entries to base OMAP3 dtsi files.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am3517.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap34xx.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 9 +
3 files changed, 17 insertions(+), 14
,powervr-rogue.yaml
- Locked all property item counts
- Removed nodename pattern check
Andrew Davis (11):
dt-bindings: gpu: Rename img,powervr to img,powervr-rogue
dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
ARM: dts: omap3: Add device tree entry for SGX GPU
ARM: dts: omap4: Add device
Add SGX GPU device entry to base OMAP4 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/omap4.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap4.dtsi
b/arch/arm/boot/dts/ti/omap/omap4.dtsi
index 2bbff9032be3e
Add SGX GPU device entry to base jz4780 dtsi file.
Signed-off-by: Andrew Davis
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 18a85ce38
Add SGX GPU device entry to base DRA7x dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/dra7.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi
b/arch/arm/boot/dts/ti/omap/dra7.dtsi
index 6509c742fb58c
Add SGX GPU device entry to base AM33xx dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am33xx.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi
b/arch/arm/boot/dts/ti/omap/am33xx.dtsi
index
Add SGX GPU device entry to base AM654 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index fcea544656360
Add SGX GPU device entry to base sun6i-a31 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/allwinner/sun6i-a31.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
index
Signed-off-by: Andrew Davis
---
.../bindings/gpu/{img,powervr.yaml => img,powervr-rogue.yaml} | 4 ++--
MAINTAINERS | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
rename Documentation/devicetree/bindings/gpu/{img,powervr.yaml =>
The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors. Describe how the SGX GPU is integrated in these SoC,
including register space and interrupts. Clocks, reset, and power domain
information is SoC specific.
Signed-off-by: Andrew Davis
---
.../bi
Add SGX GPU device entry to base OMAP5 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/omap5.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap5.dtsi
b/arch/arm/boot/dts/ti/omap/omap5.dtsi
index bac6fa8387936
Add SGX GPU device entry to base AM437x dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am4372.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi
b/arch/arm/boot/dts/ti/omap/am4372.dtsi
index 9d2c064534f7d..5fd1b380ece62
On 12/18/23 4:54 AM, H. Nikolaus Schaller wrote:
Am 18.12.2023 um 11:14 schrieb Maxime Ripard :
On Mon, Dec 18, 2023 at 10:28:09AM +0100, H. Nikolaus Schaller wrote:
Hi Maxime,
Am 15.12.2023 um 14:33 schrieb Maxime Ripard :
It's for a separate architecture, with a separate driver,
On 12/6/23 10:02 AM, Conor Dooley wrote:
On Tue, Dec 05, 2023 at 07:04:05PM +0100, H. Nikolaus Schaller wrote:
Am 05.12.2023 um 18:33 schrieb Andrew Davis :
On 12/5/23 2:17 AM, H. Nikolaus Schaller wrote:
+ - enum:
+ - ti,omap3430-gpu # Rev 121
+ - ti
On 12/5/23 2:17 AM, H. Nikolaus Schaller wrote:
Hi Andrew,
Am 04.12.2023 um 19:22 schrieb Andrew Davis :
The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors.
Great and thanks for the new attempt to get at least the Device Tree side
upstre
Add SGX GPU device entries to base OMAP3 dtsi files.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am3517.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap34xx.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 9 +
3 files changed, 17 insertions(+), 14
Add SGX GPU device entry to base sun6i-a31 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/allwinner/sun6i-a31.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
index
Add SGX GPU device entry to base OMAP4 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/omap4.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap4.dtsi
b/arch/arm/boot/dts/ti/omap/omap4.dtsi
index 2bbff9032be3e
Add SGX GPU device entry to base jz4780 dtsi file.
Signed-off-by: Andrew Davis
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 18a85ce38
Add SGX GPU device entry to base AM437x dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am4372.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi
b/arch/arm/boot/dts/ti/omap/am4372.dtsi
index 9d2c064534f7d..5fd1b380ece62
Add SGX GPU device entry to base OMAP5 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/omap5.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap5.dtsi
b/arch/arm/boot/dts/ti/omap/omap5.dtsi
index bac6fa8387936
Add SGX GPU device entry to base AM654 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 29048d6577cf6
Add SGX GPU device entry to base AM33xx dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am33xx.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi
b/arch/arm/boot/dts/ti/omap/am33xx.dtsi
index
The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors. Describe how the SGX GPU is integrated in these SoC,
including register space and interrupts. Clocks, reset, and power domain
information is SoC specific.
Signed-off-by: Andrew Davis
---
.../
Add SGX GPU device entry to base DRA7x dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/dra7.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi
b/arch/arm/boot/dts/ti/omap/dra7.dtsi
index 6509c742fb58c
on for Series6+, but otherwise most
is the same as we have been using in our vendor tree for many years.
Thanks,
Andrew
Based on next-20231204.
[0]: https://lkml.org/lkml/2020/4/24/1222
[1]: https://github.com/openpvrsgx-devgroup
Andrew Davis (10):
dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
While a scatter-gather table having only 1 entry does imply it is
contiguous, it is a logic error to assume the inverse. Tables can have
more than 1 entry and still be contiguous. Use a proper check here.
Signed-off-by: Andrew Davis
---
Changes from v2:
- Double check that these multi-segment
On 9/22/23 12:57 PM, Adam Jackson wrote:
On Wed, Sep 6, 2023 at 5:57 AM Sarah Walker mailto:sarah.wal...@imgtec.com>> wrote:
+ * :BYPASS_CACHE: There are very few situations where this flag is
useful.
Could you also expand on what these few useful situations are?
Andrew
+ *
On 7/13/23 2:27 PM, Greg Kroah-Hartman wrote:
On Thu, Jul 13, 2023 at 02:13:16PM -0500, Andrew Davis wrote:
+int sram_add_dma_heap(struct sram_dev *sram,
+ struct sram_reserve *block,
+ phys_addr_t start,
+ struct sram_partition *part
This new export type exposes to userspace the SRAM area as a DMA-BUF Heap,
this allows for allocations of DMA-BUFs that can be consumed by various
DMA-BUF supporting devices.
Signed-off-by: Andrew Davis
---
Changes from v2:
- Make sram_dma_heap_allocate static (kernel test robot)
- Rebase
On 6/13/23 9:47 AM, Sarah Walker wrote:
Acquire clock, regulator and register resources, and enable/map as
appropriate.
Signed-off-by: Sarah Walker
---
drivers/gpu/drm/imagination/Makefile | 1 +
drivers/gpu/drm/imagination/pvr_device.c | 271 +++
On 6/13/23 9:47 AM, Sarah Walker wrote:
Add the device tree binding documentation for the Series AXE GPU used in
TI AM62 SoCs.
Signed-off-by: Sarah Walker
---
.../devicetree/bindings/gpu/img,powervr.yaml | 71 +++
MAINTAINERS | 7 ++
2
On 4/14/23 12:44 AM, Christian Gmeiner wrote:
Hi Andrew
Am Di., 4. Apr. 2023 um 17:02 Uhr schrieb Christian Gmeiner
:
Hi Andrew
Okay, will split for v2.
Was there a follow-up v2 of this patchset? AFAICT this series did not
make it into the mainline kernel.
Do you have any plans to
On 4/1/23 3:35 AM, Christian Gmeiner wrote:
Hi Andrew
Okay, will split for v2.
Was there a follow-up v2 of this patchset? AFAICT this series did not
make it into the mainline kernel.
Do you have any plans to work on it? If not I would like to help out
as we have a use case where we want
This new export type exposes to userspace the SRAM area as a DMA-BUF Heap,
this allows for allocations of DMA-BUFs that can be consumed by various
DMA-BUF supporting devices.
Signed-off-by: Andrew Davis
---
Changes from v1:
- Use existing DT flags, if both pool(device usable) and export
On 3/6/23 8:48 PM, John Stultz wrote:
On Mon, Mar 6, 2023 at 8:52 AM Andrew Davis wrote:
Although there is usually not such a limitation (and when there is it is
often only because the driver forgot to change the super small default),
it is still correct here to break scatterlist element
drivers. If
bisecting has landed you on this commit, make sure your drivers both set
dma_set_max_seg_size() and are checking for contiguousness correctly.
Signed-off-by: Andrew Davis
---
Changes from v2:
- Rebase v6.3-rc1
Changes from v1:
- Fixed mixed declarations and code warning
drivers/dma
On 1/9/23 5:47 AM, Jacek Lawrynowicz wrote:
Hi,
On 06.01.2023 14:29, Stanislaw Gruszka wrote:
Hi
On Thu, Jan 05, 2023 at 12:46:51PM -0600, Andrew Davis wrote:
On 12/8/22 5:07 AM, Jacek Lawrynowicz wrote:
Adds four types of GEM-based BOs for the VPU:
- shmem
- userptr
Do you have
On 12/8/22 5:07 AM, Jacek Lawrynowicz wrote:
Adds four types of GEM-based BOs for the VPU:
- shmem
- userptr
Do you have some specific need for userptr that would not
be covered by prime import + heaps? I'm just trying to get
a feel for the typical use-cases for these.
Andrew
-
been for Alpha-X instead.
Fixes 32a1795f57eecc
Acked-by: Andrew Davis
Signed-off-by: Randolph Sapp
---
drivers/gpu/drm/tidss/tidss_dispc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
b/drivers/gpu/drm/tidss/tidss_dispc.c
index
On 8/22/22 7:16 PM, Andrew Davis wrote:
We have no segment size limitations. Set to unlimited.
Signed-off-by: Andrew Davis
---
Ping, still valid.
Andrew
drivers/gpu/drm/tidss/tidss_dispc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
b
uot;)
Signed-off-by: Dawei Li
LGTM, Thanks,
Acked-by: Andrew Davis
---
v1:
https://lore.kernel.org/all/tycp286mb2323950197f60fc3473123b7ca...@tycp286mb2323.jpnp286.prod.outlook.com/
v1->v2: Narrow down locking scope, check the existence of heap before
insertion, as suggested by Andrew Davis.
v2
23b7ca...@tycp286mb2323.jpnp286.prod.outlook.com/
v1->v2: Narrow down locking scope, check the existence of heap before
insertion, as suggested by Andrew Davis.
v2->v3: Remove double checking.
The above version info should be in a cover letter or below
the --- line so it doesn't end up in the co
On 10/30/22 6:37 AM, Dawei Li wrote:
Racing conflict could be:
task A task B
list_for_each_entry
strcmp(h->name))
list_for_each_entry
strcmp(h->name)
kzallockzalloc
.. .
device_create
Most Kconfig options to enable a driver are in the Kconfig file
inside the relevant directory, move these two to the same.
Signed-off-by: Andrew Davis
Reviewed-by: Christian König
---
Changes from v2:
- Rebased on latest
Changes from v1:
- Fix whitespace issue pointed out by Randy
drivers
Most Kconfig options to enable a driver are in the Kconfig file
inside the relevant directory, move these two to the same.
Signed-off-by: Andrew Davis
Reviewed-by: Christian König
---
Changes from v1:
- Fix whitespace issue pointed out by Randy
drivers/gpu/drm/Kconfig| 42
While a scatter-gather table having only 1 entry does imply it is
contiguous, it is a logic error to assume the inverse. Tables can have
more than 1 entry and still be contiguous. Use a proper check here.
Signed-off-by: Andrew Davis
---
Changes from v1:
- Sent correct version of patch
On 8/22/22 7:03 PM, Andrew Davis wrote:
While a scatter-gather table having only 1 entry does imply it is
contiguous, it is a logic error to assume the inverse. Tables can have
more than 1 entry and still be contiguous. Use a proper check here.
Signed-off-by: Andrew Davis
---
Looks like
drivers. If
bisecting has landed you on this commit, make sure your drivers both set
dma_set_max_seg_size() and are checking for contiguousness correctly.
Signed-off-by: Andrew Davis
---
Changes from v1:
- Fixed mixed declarations and code warning
drivers/dma-buf/heaps/cma_heap.c | 10
On 8/22/22 7:06 PM, Randy Dunlap wrote:
Hi--
On 8/22/22 17:01, Andrew Davis wrote:
Most Kconfig options to enable a driver are in the Kconfig file
inside the relevant directory, move these two to the same.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/Kconfig| 42
We have no segment size limitations. Set to unlimited.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/tidss/tidss_dispc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
b/drivers/gpu/drm/tidss/tidss_dispc.c
index dd3c6a606ae2..624545e4636c 100644
While a scatter-gather table having only 1 entry does imply it is
contiguous, it is a logic error to assume the inverse. Tables can have
more than 1 entry and still be contiguous. Use a proper check here.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/omapdrm/omap_gem.c | 14 ++
1
Most Kconfig options to enable a driver are in the Kconfig file
inside the relevant directory, move these two to the same.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/Kconfig| 42 --
drivers/gpu/drm/amd/amdgpu/Kconfig | 22
drivers
drivers. If
bisecting has landed you on this commit, make sure your drivers both set
dma_set_max_seg_size() and are checking for contiguousness correctly.
Signed-off-by: Andrew Davis
---
drivers/dma-buf/heaps/cma_heap.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git
83 matches
Mail list logo
