Re: [PATCH] [Draft]: media: videobuf2-dma-heap: add a vendor defined memory runtine

2022-08-02 Thread ayaka
Sorry, the previous one contains html data. > On Aug 2, 2022, at 3:33 PM, Tomasz Figa wrote: > > On Mon, Aug 1, 2022 at 8:43 PM ayaka wrote: >> Sent from my iPad >>>> On Aug 1, 2022, at 5:46 PM, Tomasz Figa wrote: >>> CAUTION: Email originated ex

Re: [PATCH] [Draft]: media: videobuf2-dma-heap: add a vendor defined memory runtine

2022-08-02 Thread ayaka
Sent from my iPad > On Aug 2, 2022, at 3:33 PM, Tomasz Figa wrote: > > On Mon, Aug 1, 2022 at 8:43 PM ayaka wrote: >> >> >> >> Sent from my iPad >> >>>> On Aug 1, 2022, at 5:46 PM, Tomasz Figa wrote: >>> >>&

Re: [PATCH] [Draft]: media: videobuf2-dma-heap: add a vendor defined memory runtine

2022-08-01 Thread ayaka
Sent from my iPad > On Aug 1, 2022, at 5:46 PM, Tomasz Figa wrote: > > CAUTION: Email originated externally, do not click links or open attachments > unless you recognize the sender and know the content is safe. > > >> On Mon, Aug 1, 2022 at 3:44 PM Hsia-Jun Li wrote: >> >> >> >>> On

Re: [PATCH] [Draft]: media: videobuf2-dma-heap: add a vendor defined memory runtine

2022-08-01 Thread ayaka
 Sent from my iPad > On Aug 1, 2022, at 5:46 PM, Tomasz Figa wrote: > > CAUTION: Email originated externally, do not click links or open attachments > unless you recognize the sender and know the content is safe. > > >> On Mon, Aug 1, 2022 at 3:44 PM Hsia-Jun Li wrote: >>> On 8/1/22

Re: [PATCH v6 1/2] drm_fourcc: Add new P010, P016 video format

2017-10-18 Thread ayaka
On 10/12/2017 07:56 PM, Tapani Pälli wrote: Is this one going to land soon? The discussion was a bit hard to read but it looks like in the end consensus was that everything looks good in this patch. I am very sorry, I am too busy with  the other dma problem in rockchip. The main problem is

Re: [PATCH v6 2/3] v4l: Add 10/16-bits per channel YUV pixel formats

2017-04-22 Thread ayaka
On 04/18/2017 03:33 AM, Mauro Carvalho Chehab wrote: Em Sun, 5 Mar 2017 18:00:32 +0800 Randy Li escreveu: The formats added by this patch are: V4L2_PIX_FMT_P010 V4L2_PIX_FMT_P010M V4L2_PIX_FMT_P016 V4L2_PIX_FMT_P016M Currently, none of

Re: [PATCH v6 1/3] drm_fourcc: Add new P010, P016 video format

2017-03-28 Thread Ayaka
從我的 iPad 傳送 > Clint Taylor <clinton.a.tay...@intel.com> 於 2017年3月28日 上午6:49 寫道： > >> On 03/26/2017 09:05 PM, Ayaka wrote: >> >> >> 從我的 iPad 傳送 >> >>>> Ander Conselvan De Oliveira <conselv...@gmail.com> 於 2017年3月14日 下午9:53 寫

Re: [PATCH v6 1/3] drm_fourcc: Add new P010, P016 video format

2017-03-27 Thread Ayaka
從我的 iPad 傳送 > Ander Conselvan De Oliveira <conselv...@gmail.com> 於 2017年3月14日 下午9:53 寫道： > >> On Tue, 2017-03-07 at 04:27 +0800, Ayaka wrote: >> >> 從我的 iPad 傳送 >> >>>> Ville Syrjälä <ville.syrj...@linux.intel.com> 於 2017年3月7日 上午2:34 寫

Re: [PATCH v6 1/3] drm_fourcc: Add new P010, P016 video format

2017-03-06 Thread Ayaka
從我的 iPad 傳送 > Ville Syrjälä <ville.syrj...@linux.intel.com> 於 2017年3月7日 上午2:34 寫道： > >> On Tue, Mar 07, 2017 at 01:58:23AM +0800, Ayaka wrote: >> >> >> 從我的 iPad 傳送 >> >>>> Ville Syrjälä <ville.syrj...@linux.intel.com> 於 2017年3

Re: [PATCH v6 1/3] drm_fourcc: Add new P010, P016 video format

2017-03-06 Thread Ayaka
從我的 iPad 傳送 > Ville Syrjälä 於 2017年3月6日 下午9:06 寫道： > >> On Sun, Mar 05, 2017 at 06:00:31PM +0800, Randy Li wrote: >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits >> per channel video format. >> >> P016 is a planar 4:2:0 YUV with interleaved UV

Re: [PATCH v5 1/2] drm_fourcc: Add new P010, P016 video format

2017-02-28 Thread ayaka
On 02/28/2017 06:57 AM, clinton.a.tay...@intel.com wrote: From: Clint Taylor P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per channel video format. Rockchip's vop support this video format(little endian only) as the input video format. P016 is a

Re: [PATCH v2 2/2] [media] v4l: Add 10/16-bits per channel YUV pixel formats

2017-02-08 Thread Ayaka
從我的 iPad 傳送 > Mauro Carvalho Chehab <mche...@s-opensource.com> 於 2017年2月3日 下午10:04 寫道： > > Em Thu, 5 Jan 2017 20:27:17 +0200 > Sakari Ailus <sakari.ai...@iki.fi> escreveu: > >> Hi Randy, >> >>> On Thu, Jan 05, 2017 at 11:22:26PM +0800, ay

Re: Request API: stateless VPU: the buffer mechanism and DPB management

2017-01-17 Thread ayaka
On 01/17/2017 10:59 PM, Nicolas Dufresne wrote: Le mardi 17 janvier 2017 à 20:46 +0800, herman.c...@rock-chips.com a écrit : If we move parser or part of DPB management mechanism into kernel we will face a issue as follows: One customer requires dpb management do a flush when stream occurs in

rockchip: edp: Meet a problem with supporting eDP panel at firefly release

2017-01-16 Thread ayaka
Hello: I meet a problem when I want to add support for a lg,lp079qx1-sp0v eDP panel at firefly release rk3288 platform. I could hardly make the eDP work both on firefly release and firefly reload. Does you have any idea about that? [ 11.136586] i2c i2c-6: of_i2c: modalias failure on

[PATCH v2 2/2] [media] v4l: Add 10/16-bits per channel YUV pixel formats

2017-01-05 Thread ayaka
On 01/05/2017 06:30 PM, Sakari Ailus wrote: > Hi Randy, > > Thanks for the update. > > On Thu, Jan 05, 2017 at 12:29:11AM +0800, Randy Li wrote: >> The formats added by this patch are: >> V4L2_PIX_FMT_P010 >> V4L2_PIX_FMT_P010M >> V4L2_PIX_FMT_P016 >> V4L2_PIX_FMT_P016M >>

[PATCH v2 1/2] drm_fourcc: Add new P010, P016 video format

2017-01-05 Thread Ayaka
從我的 iPad 傳送 > Daniel Stone 於 2017年1月5日 上午1:02 > 寫道： > > Hi Randy, > >> On 4 January 2017 at 16:29, Randy Li wrote: >> index 90d2cc8..23c8e99 100644 >> --- a/drivers/gpu/drm/drm_fourcc.c >> +++ b/drivers/gpu/drm/drm_fourcc.c >> @@ -165,6 +165,9 @@ const struct

[PATCH 1/2] drm_fourcc: Add new P010 video format

2017-01-05 Thread ayaka
On 01/04/2017 11:56 PM, Ville Syrjälä wrote: > On Mon, Jan 02, 2017 at 04:50:03PM +0800, Randy Li wrote: >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits >> per channel video format. Rockchip's vop support this >> video format(little endian only) as the input video format. >>

[PATCH 2/2] [media] v4l: Add 10-bits per channel YUV pixel formats

2017-01-02 Thread ayaka
On 01/02/2017 07:07 PM, Sakari Ailus wrote: > Hi, > > On Mon, Jan 02, 2017 at 06:53:16PM +0800, ayaka wrote: >> >> On 01/02/2017 05:10 PM, Sakari Ailus wrote: >>> Hi Randy, >>> >>> Thanks for the patch. >>> >>> On Mon, Jan 02

[PATCH 2/2] [media] v4l: Add 10-bits per channel YUV pixel formats

2017-01-02 Thread ayaka
On 01/02/2017 05:10 PM, Sakari Ailus wrote: > Hi Randy, > > Thanks for the patch. > > On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote: >> The formats added by this patch are: >> V4L2_PIX_FMT_P010 >> V4L2_PIX_FMT_P010M >> Currently, none of driver uses those format, but some

[RFC PATCH v3 2/2] drm/panel: Add support for Chunghwa CLAA070WP03XG panel

2016-12-22 Thread ayaka
On 12/07/2016 10:55 PM, Daniel Vetter wrote: > On Wed, Dec 07, 2016 at 08:57:23AM +0800, Ayaka wrote: >> >> 從我的 iPad 傳送 >> >>> Thierry Reding 於 2016年12月6日 >>> 下午11:46 寫道： >>> >>>> On Tue, Sep 20,

[RFC PATCH v3 2/2] drm/panel: Add support for Chunghwa CLAA070WP03XG panel

2016-12-07 Thread Ayaka
從我的 iPad 傳送 > Thierry Reding 於 2016年12月6日 下午11:46 > 寫道： > >> On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote: >> The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be >> supported by the simple panel driver. >> >> Signed-off-by: Randy Li >>

[PATCH] drm/rockchip: analogix_dp: add supports for regulators in edp IP

2016-11-09 Thread ayaka
On 10/28/2016 05:29 PM, Randy Li wrote: > > > On 10/28/2016 05:11 PM, Shawn Lin wrote: >> On 2016/10/23 3:18, Randy Li wrote: >>> I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at >>> RK3288, once trying to enable the pclk clock, the kernel would dead. >>> This patch would try to

[PATCH] drm/rockchip: analogix_dp: add supports for regulators in edp IP

2016-11-09 Thread ayaka
On 10/28/2016 05:29 PM, Randy Li wrote: > > > On 10/28/2016 05:11 PM, Shawn Lin wrote: >> On 2016/10/23 3:18, Randy Li wrote: >>> I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at >>> RK3288, once trying to enable the pclk clock, the kernel would dead. >>> This patch would try to

rockchip: drm: analogix_dp-rockchip would stock the kernel

2016-10-16 Thread ayaka
Hello: I meet a problem with eDP in rk3288 with the linux next 20161006, it is just like the early stage of 4.4 kernel. I have added a eDP panel entry in the firefly reload board, once the kernel loaded analogix_dp-rockchip.ko, after printed the following two lines, the kernel stop

[RFC PATCH v3 2/2] drm/panel: Add support for Chunghwa CLAA070WP03XG panel

2016-09-29 Thread ayaka
On 09/24/2016 02:00 AM, Rob Herring wrote: > On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote: >> The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be >> supported by the simple panel driver. >> >> Signed-off-by: Randy Li >> --- >>

[RFC PATCH v3 1/2] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-20 Thread ayaka
On 09/20/2016 03:12 AM, Fabio Estevam wrote: > On Mon, Sep 19, 2016 at 4:02 PM, Randy Li wrote: > >> + vcc_sys_lcd: sys-lcd { >> + compatible = "regulator-fixed"; >> + regulator-name = "vcc_5v"; >> + regulator-min-microvolt = <500>; >> +

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-01 Thread Ayaka
從我的 iPad 傳送 Thank you > Andrzej Hajda 於 2016年9月1日 下午3:04 > 寫道： > >> On 08/31/2016 07:55 PM, ayaka wrote: >> >>> On 08/31/2016 08:30 PM, Andrzej Hajda wrote: >>> Hi, >>> >>> >>>> On 08/30/2016

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-01 Thread ayaka
On 08/31/2016 08:30 PM, Andrzej Hajda wrote: > Hi, > > > On 08/30/2016 12:50 AM, Randy Li wrote: >> It is actually a lvds panel connected through a rga-lvds bridge. >> But I really have no idea about what does a port mean in fimd node. >> >> Also how should I configure this panel size? I think

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-01 Thread ayaka
On 08/31/2016 08:30 PM, Andrzej Hajda wrote: > Hi, > > > On 08/30/2016 12:50 AM, Randy Li wrote: >> It is actually a lvds panel connected through a rga-lvds bridge. >> But I really have no idea about what does a port mean in fimd node. >> >> Also how should I configure this panel size? I think