Re: [PATCH 44/59] drm/mediatek: Use drm_atomic_helper_wait_for_fences

2019-06-16 Thread CK Hu
own. > Note that this relies on mtk setting drm_fb->obj, which is already > done in mtk_drm_framebuffer_init(). Reviewed-by: CK Hu > > Aside: Probably can use the default commit_tail with this again, but I > didn't check for that. > > Signed-off-by: Daniel Vetter > Cc: CK Hu >

Re: [PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183

2019-06-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:43 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add support for mediatek SOC MT8183 > 1.ovl_2l share driver with ovl > 2.rdma1 share drive with rdma0, but fifo size is different > 3.add mt8183 mutex private data, and mmsys

Re: [PATCH v3, 26/27] drm/mediatek: add clock property check before get it

2019-06-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:43 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add clock property check before get it In the binding document [1], clock is required property. In this patch, you change it to optional property. I think you should change

Re: [PATCH v3, 19/27] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link

2019-06-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add function to background color input select for ovl/ovl_2l > direct link > for ovl/ovl_2l direct link usecase, we need set background color > input select for these

Re: [PATCH 19/59] drm/mtk: Drop drm_gem_prime_export/import

2019-06-16 Thread CK Hu
Hi, Daniel: On Fri, 2019-06-14 at 22:35 +0200, Daniel Vetter wrote: > They're the default. > > Aside: Would be really nice to switch the others over to > drm_gem_object_funcs. Reviewed-by: CK Hu > > Signed-off-by: Daniel Vetter > Cc: CK Hu > Cc: Philipp Zabel >

Re: [PATCH v3, 20/27] drm/mediatek: add background color input select function for ovl/ovl_2l

2019-06-13 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add background color input select function for ovl/ovl_2l > > ovl include 4 DRAM layer and 1 background color layer > ovl_2l include 4 DRAM layer and 1 background color

Re: [PATCH v3, 18/27] drm/medaitek: add layer_nr for ovl private data

2019-06-13 Thread CK Hu
reparation for ovl-2l and > ovl share the same driver. This patch is identical to v2, and I've give a 'Reviewed-by' for v2, so you should keep this 'Reviewed-by' tag in this patch, so I still give you a Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gp

Re: [PATCH v3, 17/27] drm/mediatek: add gmc_bits for ovl private data

2019-06-13 Thread CK Hu
hd_l not > used. This patch is identical to v2, and I've give a 'Reviewed-by' for v2, so you should keep this 'Reviewed-by' tag in this patch, so I still give you a Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 23 +++

Re: [PATCH v3, 16/27] drm/mediatek: add component DITHER

2019-06-13 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add component DITHER Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mt

Re: [PATCH v3, 15/27] drm/mediatek: add component OVL_2L1

2019-06-13 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add component OVL_2L1 Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 + >

Re: [PATCH v3, 14/27] drm/mediatek: add commponent OVL_2L0

2019-06-13 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add commponent OVL_2L0 Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ >

Re: [PATCH v3, 13/27] drm/mediatek: add ddp component CCORR

2019-06-13 Thread CK Hu
give you a Reviewed-by: CK Hu [1] https://patchwork.kernel.org/patch/10872697/ > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 32 > + > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++ >

Re: [PATCH v3, 11/27] drm/mediatek: add mmsys private data for ddp path config

2019-06-13 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add mmsys private data for ddp path config > all these register offset and value will be different in future SOC > add these define into mmsys private data > u32

Re: [PATCH v3, 10/27] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case

2019-06-13 Thread CK Hu
+Bibby: Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > Here is two modifition in this patch: > 1.bls->dpi0 and rdma1->dsi are differen usecase, > Split DISP_REG_CONFIG_DSI_SEL setting into anther usecase > 2.remove

Re: [GIT,PULL] mediatek drm fixes for 5.2

2019-06-13 Thread CK Hu
On Thu, 2019-06-13 at 10:27 +0200, Daniel Vetter wrote: > On Thu, Jun 13, 2019 at 02:31:18PM +0800, CK Hu wrote: > > Hi, Daniel: > > > > On Wed, 2019-06-12 at 18:25 +0200, Daniel Vetter wrote: > > > On Wed, Jun 12, 2019 at 03:51:08PM +0800, CK Hu

Re: [PATCH v3, 09/27] drm/mediatek: add mutex sof register offset into ddp private data

2019-06-13 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > mutex sof register offset will be private data of ddp > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 13 ++--- > 1 file changed, 10

Re: [GIT,PULL] mediatek drm fixes for 5.2

2019-06-13 Thread CK Hu
Hi, Daniel: On Wed, 2019-06-12 at 18:25 +0200, Daniel Vetter wrote: > On Wed, Jun 12, 2019 at 03:51:08PM +0800, CK Hu wrote: > > Hi Dave, Daniel: > > > > This include unbind error fix, clock control flow refinement, and PRIME > > mmap with page offse

[GIT,PULL] mediatek drm fixes for 5.2

2019-06-12 Thread CK Hu
Hi Dave, Daniel: This include unbind error fix, clock control flow refinement, and PRIME mmap with page offset. Regards, CK The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9: Linux 5.2-rc1 (2019-05-19 15:47:09 -0700) are available in the Git repository at:

Re: [v4 5/7] drm/mediatek: add mt8183 dsi driver support

2019-06-10 Thread CK Hu
Hi, Jitao: On Sat, 2019-06-01 at 17:26 +0800, Jitao Shi wrote: > Add mt8183 dsi driver data. Enable size control and > reg commit control. > > Signed-off-by: Jitao Shi > Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 8 > 1 file changed, 8

Re: [PATCH 5/5] drm/mtk: add panel orientation property

2019-06-10 Thread CK Hu
Hi, Derek: On Mon, 2019-06-10 at 17:22 -0700, Derek Basehore wrote: > This inits the panel orientation property for the mediatek dsi driver > if the panel orientation (connector.display_info.panel_orientation) is > not DRM_MODE_PANEL_ORIENTATION_UNKNOWN. > Looks good to me, Ack

Re: [PATCH v3, 08/27] drm/mediatek: add mutex sof into ddp private data

2019-06-06 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > mutex sof will be ddp private data > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 44 > +++--- > 1 file changed, 36

Re: [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data

2019-06-05 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > except mutex mod, mutex mod reg,mutex sof reg, > and mutex sof id will be ddp private data > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 53 >

Re: [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display

2019-06-05 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > Update device tree binding documention for the display subsystem for > Mediatek MT8183 SOCs > > Signed-off-by: Yongqiang Niu > --- > .../bindings/display/mediatek/mediatek,disp.txt

Re: [PATCH v4] gpu/drm: mediatek: call mtk_dsi_stop() after mtk_drm_crtc_atomic_disable()

2019-06-03 Thread CK Hu
Hi, Hsin-Yi: On Thu, 2019-05-30 at 17:18 +0800, Hsin-Yi Wang wrote: > mtk_dsi_stop() should be called after mtk_drm_crtc_atomic_disable(), which > needs > ovl irq for drm_crtc_wait_one_vblank(), since after mtk_dsi_stop() is called, > ovl irq will be disabled. If drm_crtc_wait_one_vblank() is

Re: [PATCH v2 0/4] fix mediatek drm, dis, and disp-* unbind/bind

2019-06-03 Thread CK Hu
Hi, Hsin-Yi: On Wed, 2019-05-29 at 18:25 +0800, Hsin-Yi Wang wrote: > There are some errors when unbinding and rebinding mediatek drm, dsi, > and disp-* drivers. This series is to fix those errors and warnings. > > Hsin-Yi Wang (4): > drm: mediatek: fix unbind functions > drm: mediatek:

Re: [v4 3/3] drm/mediatek: add mipi_tx driver for mt8183

2019-06-02 Thread CK Hu
Hi, Jitao: On Sat, 2019-06-01 at 17:52 +0800, Jitao Shi wrote: > This patch add mt8183 mipi_tx driver. > And also support other chips that use the same binding and driver. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/Makefile | 1 + >

Re: [v4 6/7] drm/mediatek: change the dsi phytiming calculate method

2019-06-02 Thread CK Hu
+ DSI_PHY_TIMECON1); > @@ -418,7 +451,8 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > u32 horizontal_sync_active_byte; > u32 horizontal_backporch_byte; > u32 horizontal_frontporch_byte; > - u32 dsi_tmp_buf_bpp; > + u32 dsi_tmp_buf_b

Re: [v4 3/7] drm/mediatek: add dsi reg commit disable control

2019-06-02 Thread CK Hu
tion is defualt on. But this driver doesn't use this > function. So add the disable control. Reviewed-by: CK Hu > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/

Re: [v4 2/7] drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701

2019-06-02 Thread CK Hu
Hi, Jitao: On Sat, 2019-06-01 at 17:26 +0800, Jitao Shi wrote: > Config the different CMDQ reg address in driver data. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 29 - > 1 file changed, 24 insertions(+), 5 deletions(-) > > diff --git

Re: [v4 1/7] drm/mediatek: move mipi_dsi_host_register to probe

2019-06-02 Thread CK Hu
_ddp_comp_unregister: > mtk_ddp_comp_unregister(drm, >ddp_comp); > return ret; > } > @@ -1097,31 +1089,37 @@ static int mtk_dsi_probe(struct platform_device *pdev) > > dsi->host.ops = _dsi_ops; > dsi->host.dev = dev; > + dsi->dev = d

Re: [v3 7/7] drm: mediatek: adjust dsi and mipi_tx probe sequence

2019-05-30 Thread CK Hu
Hi, Jitao: On Sun, 2019-05-19 at 17:25 +0800, Jitao Shi wrote: > mtk_mipi_tx is the phy of mtk_dsi. > mtk_dsi get the phy(mtk_mipi_tx) in probe(). > > So, mtk_mipi_tx init should be ahead of mtk_dsi. Or mtk_dsi will > defer to wait mtk_mipi_tx probe done. Reviewed-by: CK Hu

Re: [v3 3/7] drm/mediatek: add dsi reg commit disable control

2019-05-30 Thread CK Hu
Hi, Jitao: On Sun, 2019-05-19 at 17:25 +0800, Jitao Shi wrote: > New DSI IP has shadow register and working reg. The register > values are writen to shadow register. And then trigger with > commit reg, the register values will be moved working register. > > This fucntion is defualt on. But this

Re: [PATCH] drm/mediatek: add dsi module reset driver

2019-05-30 Thread CK Hu
Hi, Jitao: On Sun, 2019-05-19 at 19:15 +0800, Jitao Shi wrote: > Reset dsi HW to default when power on. Prevent the setting differet > between bootloader and kernel. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 35 ++ > 1 file changed,

Re: [PATCH v4] gpu/drm: mediatek: call mtk_dsi_stop() after mtk_drm_crtc_atomic_disable()

2019-05-30 Thread CK Hu
gt; ... >--> mtk_dsi_ddp_stop() > --> mtk_dsi_poweroff(); > > mtk_dsi_poweroff() has reference count design, change to make mtk_dsi_stop() > called in mtk_dsi_poweroff() when refcount is 0. Reviewed-by: CK Hu > > Fixes: 0707632b5bac ("drm/mediatek: update

Re: [PATCH v3] gpu/drm: mediatek: call mtk_dsi_stop() after mtk_drm_crtc_atomic_disable()

2019-05-30 Thread CK Hu
Hi, Hsin-Yi: On Thu, 2019-05-30 at 10:55 +0800, Hsin-Yi Wang wrote: > On Tue, May 28, 2019 at 4:53 PM CK Hu wrote: > > > I think we've already discussed in [1]. I need a reason to understand > > this is hardware behavior or software bug. If this is a software bug, we >

Re: [PATCH v2 4/4] drm: mediatek: clear num_pipes when unbind driver

2019-05-29 Thread CK Hu
10 mutex id. Clear this number so it starts from 0 in every rebind. Reviewed-by: CK Hu > > Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") > Signed-off-by: Hsin-Yi Wang > --- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 + > 1 file changed,

Re: [PATCH v2 3/4] drm: mediatek: call drm_atomic_helper_shutdown() when unbinding driver

2019-05-29 Thread CK Hu
Hi, Hsin-Yi: On Wed, 2019-05-29 at 18:25 +0800, Hsin-Yi Wang wrote: > shutdown all CRTC when unbinding drm driver. > Reviewed-by: CK Hu > Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") > Signed-off-by: Hsin-Yi Wang > --- &g

Re: [PATCH v2 2/4] drm: mediatek: unbind components in mtk_drm_unbind()

2019-05-29 Thread CK Hu
() is called, and the components are added back. > > .unbind() should call mtk_drm_kms_deinit() to unbind components. > > And since component_master_del() in .remove() will trigger .unbind(), > which will also unregister device, it's fine to remove original functions > ca

Re: [PATCH v2 1/4] drm: mediatek: fix unbind functions

2019-05-29 Thread CK Hu
Hi, Hsin-Yi: On Wed, 2019-05-29 at 18:25 +0800, Hsin-Yi Wang wrote: > detatch panel in mtk_dsi_destroy_conn_enc(), since .bind will try to > attach it again. > Reviewed-by: CK Hu > Fixes: 2e54c14e310f ("drm/mediatek: Add DSI sub driver") > Signed-off-by: Hsin-Yi Wa

Re: [PATCH 3/3] drm: mediatek: unbind components in mtk_drm_unbind()

2019-05-29 Thread CK Hu
Hi, Hsin-Yi: On Mon, 2019-05-27 at 12:50 +0800, Hsin-Yi Wang wrote: > Unbinding components (i.e. mtk_dsi and mtk_disp_ovl/rdma/color) will > trigger master(mtk_drm)'s .unbind(), and currently mtk_drm's unbind > won't actually unbind components. During the next bind, > mtk_drm_kms_init() is

Re: [PATCH 1/3] drm: mediatek: fix unbind functions

2019-05-29 Thread CK Hu
Hi, Hsin-Yi: On Wed, 2019-05-29 at 15:06 +0800, Hsin-Yi Wang wrote: > On Wed, May 29, 2019 at 9:35 AM CK Hu wrote: > > > > > I think mtk_dsi_destroy_conn_enc() has much thing to do and I would like > > you to do more. You could refer to [2] for complete implementatio

Re: [PATCH 2/3] drm: mediatek: remove clk_unprepare() in mtk_drm_crtc_destroy()

2019-05-29 Thread CK Hu
Hi, Hsin-Yi: On Wed, 2019-05-29 at 14:08 +0800, Hsin-Yi Wang wrote: > On Wed, May 29, 2019 at 1:58 PM CK Hu wrote: > > > > Hi, Hsin-Yi: > > > > On Mon, 2019-05-27 at 12:50 +0800, Hsin-Yi Wang wrote: > > > There is no clk_prepare() called in mtk_drm_crtc_rese

Re: [PATCH 2/3] drm: mediatek: remove clk_unprepare() in mtk_drm_crtc_destroy()

2019-05-28 Thread CK Hu
Hi, Hsin-Yi: On Mon, 2019-05-27 at 12:50 +0800, Hsin-Yi Wang wrote: > There is no clk_prepare() called in mtk_drm_crtc_reset(), when unbinding > drm device, mtk_drm_crtc_destroy() will be triggered, and the clocks will > be disabled and unprepared in mtk_crtc_ddp_clk_disable. If clk_unprepare() >

Re: [PATCH 1/3] drm: mediatek: fix unbind functions

2019-05-28 Thread CK Hu
Hi, Hsin-yi: On Mon, 2019-05-27 at 12:50 +0800, Hsin-Yi Wang wrote: > move mipi_dsi_host_unregister() to .remove since mipi_dsi_host_register() > is called in .probe. In the latest kernel [1], mipi_dsi_host_register() is called in mtk_dsi_bind(), I think we don't need this part. [1]

Re: [PATCH v3] gpu/drm: mediatek: call mtk_dsi_stop() after mtk_drm_crtc_atomic_disable()

2019-05-28 Thread CK Hu
Hi, Hsin-Yi: On Tue, 2019-05-28 at 15:39 +0800, Hsin-Yi Wang wrote: > mtk_dsi_stop() should be called after mtk_drm_crtc_atomic_disable(), which > needs > ovl irq for drm_crtc_wait_one_vblank(), since after mtk_dsi_stop() is called, > ovl irq will be disabled. If drm_crtc_wait_one_vblank() is

Re: [PATCH v2 24/25] drm/mediatek: respect page offset for PRIME mmap calls

2019-05-27 Thread CK Hu
Hi, Yongqiang: On Tue, 2019-04-16 at 16:33 +0800, CK Hu wrote: > Hi, Yongqiang: > > On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > > From: Yongqiang Niu > > > > Respect page offset for PRIME mmap calls > > Reviewed-by: CK Hu This

Re: [PATCH v2 22/25] drm/mediatek: adjust ddp clock control flow

2019-05-27 Thread CK Hu
Hi, Yongqiang: On Tue, 2019-04-16 at 16:24 +0800, CK Hu wrote: > Hi, Yongqiang: > > On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > > From: Yongqiang Niu > > > > display hardware clock will not unprepare when > > crtc is

Re: [PATCH] drm/mediatek: Fix warning about unhandled enum value

2019-05-23 Thread CK Hu
ced with the addition of HDMI_INFOFRAME_TYPE_DRM in the commit > below, but the code really should have been future-proofed from the > start. Acked-by: CK Hu > > Fixes: 2cdbfd66a829 ("drm: Enable HDR infoframe support") I think "drm: Enable HDR infoframe support" exist o

Re: [v2 2/5] drm/mediatek: CMDQ reg address of mt8173 is different with mt2701

2019-05-20 Thread CK Hu
Hi, Jitao: On Sun, 2019-05-19 at 17:33 +0800, Jitao Shi wrote: > On Wed, 2019-05-08 at 10:39 +0800, CK Hu wrote: > > On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > > > Config the different CMDQ reg address in driver data. > > > > > For MT8173, you chang

Re: [v3 1/7] drm/mediatek: move mipi_dsi_host_register to probe

2019-05-20 Thread CK Hu
Hi, Jitao: On Sun, 2019-05-19 at 17:25 +0800, Jitao Shi wrote: > DSI panel driver need attach function which is inculde in > mipi_dsi_host_ops. > > If mipi_dsi_host_register is not in probe, dsi panel will > probe fail or more delay. In [1], you have agreed this patch just for delay not for

Re: [v2 1/5] drm/mediatek: move mipi_dsi_host_register to probe

2019-05-20 Thread CK Hu
On Sun, 2019-05-19 at 17:36 +0800, Jitao Shi wrote: > On Tue, 2019-05-07 at 17:52 +0800, CK Hu wrote: > > Hi, Jitao: > > > > On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > > > DSI panel driver need attach function which is incu

Re: [v4 4/5] drm/mediatek: control dpi pins dpi or gpio mode in on or off

2019-05-20 Thread CK Hu
Hi, Jitao: On Sat, 2019-05-18 at 17:56 +0800, Jitao Shi wrote: > Pull dpi pins low when dpi has nothing to display. Aovid leakage > current from some dpi pins (Hsync Vsync DE ... ). > > Some chips have dpi pins, but there are some chip don't have pins. > So this function is controlled by chips

Re: [v4 2/5] drm/mediatek: dpi dual edge support

2019-05-19 Thread CK Hu
Hi, Jitao: On Sat, 2019-05-18 at 17:56 +0800, Jitao Shi wrote: > DPI sample the data both rising and falling edge. > It can reduce half data io pins. All the registers which you control in this patch exist in MT8173. So I think this is not a SoC-level feature. This feature depends on how much io

Re: [v2 3/3] drm/mediatek: add mipi_tx driver for mt8183

2019-05-19 Thread CK Hu
On Sat, 2019-05-18 at 15:51 +0800, Jitao Shi wrote: > On Mon, 2019-05-06 at 17:17 +0800, CK Hu wrote: > > Hi, Jitao: > > > > On Tue, 2019-04-16 at 13:42 +0800, Jitao Shi wrote: > > > This patch add mt8183 mipi_tx driver. > > > And also support other chi

Re: [v3 2/3] drm/mediatek: separate mipi_tx to different file

2019-05-19 Thread CK Hu
viewed-by: CK Hu > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/Makefile | 1 + > drivers/gpu/drm/mediatek/mtk_mipi_tx.c| 342 ++ > drivers/gpu/drm/mediatek/mtk_mipi_tx.h| 49 +++ > drivers/gpu/drm/mediatek

Re: [v2 5/5] drm/mediatek: add mt8183 dsi driver support

2019-05-07 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 14:05 +0800, Jitao Shi wrote: > Add mt8183 dsi driver data. Enable size control and > reg commit control. > Reviewed-by: CK Hu > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 8 > 1 file changed, 8 in

Re: [v2 4/5] drm/mediatek: add frame size control

2019-05-07 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 14:05 +0800, Jitao Shi wrote: > Our new DSI chip has frame size control. > So add the driver data to control for different chips. > Reviewed-by: CK Hu > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 5 + &g

Re: [v2 3/5] drm/mediatek: add dsi reg commit control

2019-05-07 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > New DSI IP has shadow register and working reg. The register > values are writen to shadow register. And then trigger with > commit reg, the register values will be moved working register. This patch looks good, but the message is

Re: [v2 2/5] drm/mediatek: CMDQ reg address of mt8173 is different with mt2701

2019-05-07 Thread CK Hu
On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > Config the different CMDQ reg address in driver data. > For MT8173, you change reg_cmd_off from 0x180 to 0x200, so this patch is a bug fix. You should add a 'Fixes' tag. > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c

Re: [v2 1/5] drm/mediatek: move mipi_dsi_host_register to probe

2019-05-07 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > DSI panel driver need attach function which is inculde in > mipi_dsi_host_ops. > > If mipi_dsi_host_register is not in probe, dsi panel will > probe fail or more delay. I think this patch just prevent delay, not to prevent dsi

Re: [v3 3/3] drm/mediatek: add mt8183 dpi support

2019-05-07 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 13:52 +0800, Jitao Shi wrote: I need the commit message. Even though the code is easy to understand, words for this patch is still necessary. Regards, CK > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 19 +++ > 1 file

Re: [v3 2/3] drm/mediatek: dpi dual edge support

2019-05-07 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 13:52 +0800, Jitao Shi wrote: Where is the commit message? I think you could introduce what is dual edge (Maybe it's trivial for you, but not for me) Regards, CK > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 10 ++ > 1 file

Re: [v2 3/3] drm/mediatek: add mipi_tx driver for mt8183

2019-05-06 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 13:42 +0800, Jitao Shi wrote: > This patch add mt8183 mipi_tx driver. > And also support other chips that use the same binding and driver. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/Makefile | 1 + >

Re: [PATCH 1/2] arm64: dts: mt8183: add dsi node

2019-04-19 Thread CK Hu
Hi, Jitao: On Tue, 2019-04-16 at 16:54 +0800, Jitao Shi wrote: > Add dsi and mipitx nodes to the mt8183 > > Signed-off-by: Jitao Shi > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 25 > 1 file changed, 25 insertions(+) > > diff --git

Re: [PATCH v1 3/4] drm/mediatek: fix boot up for 720 and 480 but 1080

2019-04-16 Thread CK Hu
Hi, Frank: On Tue, 2019-04-16 at 16:58 +0200, Frank Wunderlich wrote: > From: chunhui dai > > - 1080 plg in/out with ng/ok > - support other resolutions like 1280x1024 The description is so simple and I could not understand why pll_default_off could fix this problem. And why only MT2701 has

Re: Aw: Re: [PATCH v1 0/4] make hdmi work on bananapi-r2

2019-04-16 Thread CK Hu
Hi, Frank: On Wed, 2019-04-17 at 07:30 +0200, Frank Wunderlich wrote: > Hi CK Hu, > > you mean the problematic patch is fix possible_crtcs (4/4) and the others are > ok? > > can you push the first 3 while working on the last one? I think 3 patches is related to possible

Re: [PATCH v1 0/4] make hdmi work on bananapi-r2

2019-04-16 Thread CK Hu
Hi, Frank: On Tue, 2019-04-16 at 16:58 +0200, Frank Wunderlich wrote: > This Patch-Series adds missing Patches/Bugfixes to get hdmi working on BPI-R2 > > first 2 Patches were already posted, but not yet merged into mainline > i found no hint why > - config component output by device node port >

Re: [PATCH v2 24/25] drm/mediatek: respect page offset for PRIME mmap calls

2019-04-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > Respect page offset for PRIME mmap calls Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_gem.c | 7 ++-

Re: [PATCH v2 23/25] drm/mediatek: add vmap support for mediatek drm

2019-04-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add add vmap support for mediatek drm I think the upstreamed patch 'drm/mediatek: Implement gem prime vmap/vunmap function' [1] has the same function of this patch. You

Re: [PATCH v2 22/25] drm/mediatek: adjust ddp clock control flow

2019-04-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > display hardware clock will not unprepare when > crtc is disable, until crtc is destroyed. > with this patch, hard clock will disable and unprepare > at the same time

Re: [PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase

2019-04-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add ovl0/ovl0_2l usecase > in ovl->ovl0_2l direct link usecase: > 1. the crtc support layer number will 4+2 > 2. ovl0_2l background color input select ovl0 when crtc init >

Re: [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle

2019-04-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add RDMA fifo size error handle > rdma fifo size will not always bigger than the calculated threshold > if that case happened, we need set fifo size as the threshold > >

Re: [PATCH v2 17/25] drm/mediatek: add background color input select function for ovl/ovl_2l

2019-04-16 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add background color input select function for ovl/ovl_2l > > ovl include 4 DRAM layer and 1 background color layer > ovl_2l include 4 DRAM layer and 1 background color

Re: [PATCH v2 16/25] drm/mediatek: add ddp write register common api

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add ddp write register common api > this is preparation patch for ovl/ovl_2l direct link > usecase. > in that case, we need this funtion to set one bit of ovl_2l > register

Re: [PATCH v2 15/25] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add function to background color input select for ovl/ovl_2l > direct link > for ovl/ovl_2l direct link usecase, we need set background color > input select for these

Re: [PATCH v2 14/25] drm/medaitek: add layer_nr for ovl private data

2019-04-11 Thread CK Hu
reparation for ovl-2l and > ovl share the same driver. Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 7 ++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mt

Re: [PATCH v2 09/25] drm/mediatek: add mmsys private data for ddp path config

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add mmsys private data for ddp path config > all these register offset and value will be different in future SOC > add these define into mmsys private data > u32

Re: [PATCH v2 21/25] drm/mediatek: add support for mediatek SOC MT8183

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add support for mediatek SOC MT8183 > 1.ovl_2l share driver with ovl > 2.rdma1 share drive with rdma0, but fifo size is different > 3.add mt8183 mutex private data, and mmsys

Re: [PATCH v2 13/25] drm/mediatek: add gmc_bits for ovl private data

2019-04-11 Thread CK Hu
hd_l not > used. Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 23 +-- > 1 file changed, 21 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > b/drive

Re: [PATCH v2 12/25] drm/mediatek: add component DITHER

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add component DITHER Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mt

Re: [PATCH v2 10/25] drm/mediatek: add commponent OVL0_2L

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add commponent OVL0_2L > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++ >

Re: [PATCH v2 06/25] drm/mediatek: redefine mtk_ddp_sout_sel

2019-04-11 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > the format of "mtk_ddp_sout_sel"was not flexible, after we add more > mediatek SOC support, that will be redundant It looks like this patch is part of patch 'add mmsys private data for

Re: [PATCH v2 08/25] drm/mediatek: add ddp component CCORR

2019-04-10 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > This patch add ddp component CCORR Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mt

Re: [PATCH v2 07/25] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel

2019-04-10 Thread CK Hu
secase should move to mtk_ddp_sout_sel Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 90 > +- > 1 file changed, 45 insertions(+), 45 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/m

[GIT,PULL] mediatek drm fixes for 5.1

2019-04-09 Thread CK Hu
) CK Hu (2): drm/mediatek: Implement gem prime vmap/vunmap function drm/mediatek: Add Mediatek framebuffer device Dan Carpenter (1): drm/mediatek: Fix an error code in mtk_hdmi_dt_parse_pdata() Wangyan Wang (5): drm/mediatek: fix the rate and divder of hdmi phy

Re: [PATCH V10 0/5] make mt7623 clock of hdmi stable

2019-04-09 Thread CK Hu
Hi, Wangyan: This version still has alignment problem, but I've fixed it and for this series, Applied to mediatek-drm-fixes-5.1 [1], thanks. [1] https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-fixes-5.1 Regards, CK On Tue, 2019-04-09 at 14:53 +0800, wangyan wang wrote: >

Re: [PATCH V9 5/5] drm/mediatek: no change parent rate in round_rate() for mt2701 hdmi phy

2019-04-08 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-09 at 11:07 +0800, wangyan wang wrote: > From: Wangyan Wang > > This is the third step to make MT2701 HDMI stable. > We should not change the rate of parent for hdmi phy when > doing round_rate for this clock. The parent clock of hdmi > phy must be the same as it.

Re: [PATCH V9 4/5] drm/mediatek: make implementation of recalc_rate() to match the definition

2019-04-08 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-09 at 11:07 +0800, wangyan wang wrote: > From: Wangyan Wang > > Recalculate the rate of this clock, by querying hardware to > make implementation of recalc_rate() to match the definition. > > Signed-off-by: Wangyan Wang > --- >

Re: [PATCH V9 1/5] drm/mediatek: remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy to not propagate rate change to parent

2019-04-08 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-09 at 11:07 +0800, wangyan wang wrote: > From: Wangyan Wang > > This is the first step to make MT2701 hdmi stable. > The parent rate of hdmi phy had set by DPI driver. > We should not set or change the parent rate of MT2701 hdmi phy, > as a result we should remove

Re: [PATCH 1/7] drm/mediatek: fix possible object reference leak

2019-04-08 Thread CK Hu
d a node pointer with refcount incremented on line 1509, but without a > corresponding object release within this function. For this patch, applied to mediatek-drm-fixes-5.1 [1], thanks. [1] https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-fixes-5.1 Regards, CK > > Sig

Re: [PATCH V8 5/5] drm/mediatek: make implementation of recalc_rate() to match the definition

2019-04-07 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-02 at 17:36 +0800, wangyan wang wrote: > From: Wangyan Wang > > Recalculate the rate of this clock, by querying hardware to > make implementation of recalc_rate() to match the definition. > > Signed-off-by: Wangyan Wang > --- >

Re: [PATCH V8 4/5] drm/mediatek: no change parent rate in round_rate() for mt2701 hdmi phy

2019-04-07 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-02 at 17:36 +0800, wangyan wang wrote: > From: Wangyan Wang > > This is the third step to make MT2701 HDMI stable. > We should not change the rate of parent for hdmi phy when > doing round_rate for this clock. The parent clock of hdmi > phy must be the same as it.

Re: [PATCH V8 3/5] drm/mediatek: using new factor for tvdpll in MT2701

2019-04-07 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-02 at 17:36 +0800, wangyan wang wrote: > From: Wangyan Wang > > This is the second step to make MT2701 HDMI stable. > The factor depends on the divider of DPI in MT2701, therefore, > we should fix this factor to the right and new one. Rev

Re: [PATCH V8 1/5] drm/mediatek: remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy to not propagate rate change to parent

2019-04-07 Thread CK Hu
Hi, Wangyan: On Tue, 2019-04-02 at 17:36 +0800, wangyan wang wrote: > From: Wangyan Wang > > This is the first step to make MT2701 hdmi stable. > The parent rate of hdmi phy had set by DPI driver. > We should not set or change the parent rate of MT2701 hdmi phy, > as a result we should remove

Re: [PATCH] drm/mediatek: Fix an error code in mtk_hdmi_dt_parse_pdata()

2019-04-01 Thread CK Hu
Hi, Dan: On Thu, 2019-03-28 at 17:31 +0300, Dan Carpenter wrote: > We don't want to overwrite "ret", it already holds the correct error > code. The "regmap" variable might be a valid pointer as this point. > > Fixes: 8f83f26891e1 ("drm/mediatek: Add HDMI support") > Signed-off-by: Dan Carpenter

Re: [PATCH V7 6/6] drm/mediatek: fix the rate of parent for hdmi phy in MT2701

2019-04-01 Thread CK Hu
Hi, Wangyan: I would like the title to more clear about what this patch do. For example: drm/mediatek: no change parent rate in round_rate() for MT2701 HDMI phy On Wed, 2019-03-27 at 17:19 +0800, wangyan wang wrote: > From: chunhui dai > > We should not change the rate of parent for hdmi phy

Re: [PATCH V7 3/6] drm/mediatek: using different flags of clk for HDMI phy

2019-04-01 Thread CK Hu
Hi, Wangyan: As offline discuss, I think you could just remove the flag CLK_SET_RATE_PARENT and do not add CLK_SET_RATE_NO_REPARENT. I would like the title to be more clear about what you do so we could quickly understand what this patch do. For example: drm/mediatek: remove flag

Re: [PATCH V7 2/6] drm/mediatek: move the setting of fixed divider

2019-04-01 Thread CK Hu
Hi, Wangyan: On Wed, 2019-03-27 at 17:19 +0800, wangyan wang wrote: > From: chunhui dai > > move the setting of fixed divider from enable/disable > to the function of setting rate. > > the patch is for hdmi pll divider, the divder should > be configured before clock calculation to ensure the >

Re: [PATCH V7 1/6] drm/mediatek: recalculate hdmi phy clock of MT2701 by querying hardware

2019-04-01 Thread CK Hu
On Wed, 2019-03-27 at 17:19 +0800, wangyan wang wrote: > From: chunhui dai > > Recalculate the rate of this clock, by querying hardware. You just describe _WHAT_ do you do here, I would like you to describe _WHT_ do you do here. I think this patch is to make implementation of recalc_rate() to

Re: [PATCH v2 05/25] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case

2019-03-27 Thread CK Hu
Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang@mediatek.com wrote: > From: Yongqiang Niu > > Here is two modifition in this patch: > 1.bls->dpi0 and rdma1->dsi are differen usecase, > Split DISP_REG_CONFIG_DSI_SEL setting into anther usecase > 2.remove DISP_REG_CONFIG_DPI_SEL

  1   2   3   4   5   >