On Tue, Sep 10, 2024 at 5:01 PM AngeloGioacchino Del Regno
wrote:
>
> Changes in v9:
> - Rebased on next-20240910
> - Removed redundant assignment and changed a print to dev_err()
> - Dropped if branch to switch conversion as requested; this will
>be sent as a separate commit out of this se
On Tue, Aug 20, 2024 at 8:59 PM Rong Qianfeng wrote:
>
> Replace devm_clk_get() and clk_prepare_enable() with
> devm_clk_get_enabled() that also disables and unprepares it on
> driver detach.
>
> Signed-off-by: Rong Qianfeng
> ---
> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 13 +++--
>
On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin wrote:
>
> The Allwinner H616 and variants have a new display engine revision
> (DE33).
>
> Add a clock binding for the DE33.
>
> Signed-off-by: Ryan Walklin
Reviewed-by: Chen-Yu Tsai
cks,
> therefore a fallback for the mixer compatible is not provided.
>
> Add a display engine mixer binding for the DE33.
>
> Signed-off-by: Ryan Walklin
> Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin wrote:
>
> The Allwinner H616 and variants have a new display engine revision
> (DE33).
>
> Add a display engine bus binding for the DE33.
>
> Signed-off-by: Ryan Walklin
> Acked-by: Conor Dooley
Reviewed-by: Chen-Yu Tsai
&
by: Jernej Skrabec
> Co-developed-by: Ryan Walklin
> Signed-off-by: Ryan Walklin
Reviewed-by: Chen-Yu Tsai
On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin wrote:
>
> From: Jernej Skrabec
>
> The DE33 is a newer version of the Allwinner Display Engine IP block,
> found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
> supported by the mainline driver.
>
> The DE33 in the H616 has mixer0 and
On Tue, Jul 30, 2024 at 7:24 AM Dmitry Baryshkov
wrote:
>
> On Sat, Jul 27, 2024 at 08:33:10PM GMT, Alper Nebi Yasak wrote:
> > Hi,
> >
> > I have a MT8186 "Magneton" Chromebook that I'm trying to boot a kernel
> > based on Collabora's for-kernelci branch [1], using a config from
> > postmarketOS
(CC-ed Fei Shao)
On Thu, Jul 18, 2024 at 4:24 PM AngeloGioacchino Del Regno
wrote:
>
> Hardware-speaking, there is no feature-reduced cursor specific
> plane, so this driver reserves the last all Overlay plane as a
> Cursor plane, but sets the maximum cursor width/height to the
> maximum value th
On Fri, Jun 28, 2024 at 6:31 PM Luca Ceresoli wrote:
>
> Hello Chen-Yu,
>
> +Rob
>
> On Thu, 27 Jun 2024 15:19:03 +0800
> Chen-Yu Tsai wrote:
>
> > Add OF notifier handler needed for creating/destroying MIPI DSI devices
> > according to dynamic runtime chang
Add OF notifier handler needed for creating/destroying MIPI DSI devices
according to dynamic runtime changes in the DT live tree. This code is
enabled when CONFIG_OF_DYNAMIC is selected.
This is based on existing code for I2C and SPI subsystems.
Signed-off-by: Chen-Yu Tsai
---
Changes since v1
On Thu, Jun 27, 2024 at 9:23 AM Pafford, Robert J.
wrote:
>
> Frank Oltmanns writes:
>
> > Hi Robert,
> >
> > 26.06.2024 18:03:24 Pafford, Robert J. :
> >
> >> Hi Frank,
> >>
> >> Moving to a new for loop makes sense. Let me know when you have a patch
> >
> > The patch is here, strange you didn't
Hi Thomas,
On Thu, Jun 20, 2024 at 10:20 PM Chun-Kuang Hu wrote:
>
> Hi, Chen-Yu:
>
> Chen-Yu Tsai 於 2024年6月20日 週四 下午1:47寫道：
> >
> > With the recent switch from fbdev-generic to fbdev-dma, the driver now
> > requires the DRM GEM DMA helpers. This dependency is miss
Add OF notifier handler needed for creating/destroying MIPI DSI devices
according to dynamic runtime changes in the DT live tree. This code is
enabled when CONFIG_OF_DYNAMIC is selected.
This is based on existing code for I2C and SPI subsystems.
Signed-off-by: Chen-Yu Tsai
---
This is a patch I
On Thu, Jun 20, 2024 at 2:37 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 20.06.24 um 07:47 schrieb Chen-Yu Tsai:
> > With the recent switch from fbdev-generic to fbdev-dma, the driver now
> > requires the DRM GEM DMA helpers. This dependency is missing, and will
> >
With the recent switch from fbdev-generic to fbdev-dma, the driver now
requires the DRM GEM DMA helpers. This dependency is missing, and will
cause a link failure if fbdev emulation is enabled.
Add the missing dependency.
Fixes: 0992284b4fe4 ("drm/mediatek: Use fbdev-dma")
Signed-off-b
On Tue, Jun 4, 2024 at 12:18 PM Chen-Yu Tsai wrote:
>
> On Fri, May 31, 2024 at 9:37 PM Frank Binns wrote:
> >
> > Hi ChenYu,
> >
> > On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, w
On Wed, Jun 5, 2024 at 7:15 PM AngeloGioacchino Del Regno
wrote:
>
> Il 05/06/24 03:38, CK Hu (胡俊光) ha scritto:
> > Hi, Angelo:
> >
> > On Tue, 2024-05-21 at 09:57 +0200, AngeloGioacchino Del Regno wrote:
> >> Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
> >> per HW insta
On Wed, Jun 5, 2024 at 7:25 PM AngeloGioacchino Del Regno
wrote:
>
> Il 05/06/24 10:25, Chen-Yu Tsai ha scritto:
> > On Thu, May 30, 2024 at 6:03 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> >>>
On Thu, May 30, 2024 at 6:16 PM Chen-Yu Tsai wrote:
>
> On Thu, May 30, 2024 at 5:59 PM AngeloGioacchino Del Regno
> wrote:
> >
> > Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> > > The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP
> &g
On Thu, May 30, 2024 at 6:03 PM AngeloGioacchino Del Regno
wrote:
>
> Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> > The MFG_ASYNC domain, which is likely associated to the whole MFG block,
> > currently specifies clk26m as its domain clock. This is bogus, since the
> &
t;
> Signed-off-by: AngeloGioacchino Del Regno
>
Reviewed-by: Chen-Yu Tsai
> ---
> drivers/gpu/drm/panfrost/panfrost_drv.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
> b/drivers/gpu/drm/panfrost/panfrost_drv.c
> in
On Tue, Jun 4, 2024 at 8:39 PM AngeloGioacchino Del Regno
wrote:
>
> Add a compatible for the MediaTek MT8188 SoC, with an integrated
> ARM Mali G57 MC3 (Valhall-JM) GPU.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
Reviewed-by: Chen-Yu Tsai
> ---
> Documentation
On Fri, May 31, 2024 at 10:25 PM Adam Ford wrote:
>
> On Fri, May 31, 2024 at 8:37 AM Frank Binns wrote:
> >
> > Hi ChenYu,
> >
> > On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, w
On Fri, May 31, 2024 at 9:37 PM Frank Binns wrote:
>
> Hi ChenYu,
>
> On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is one
> > of the Series6XT GPUs, another sub-family of the Rogue family.
>
>
On Fri, May 31, 2024 at 7:18 PM Frank Binns wrote:
>
> On Thu, 2024-05-30 at 16:35 +0800, Chen-Yu Tsai wrote:
> > The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is part
> > of the Series6XT, another variation of the Rogue family of GPUs.
> >
> &g
On Thu, May 30, 2024 at 11:43 PM Conor Dooley wrote:
>
> On Thu, May 30, 2024 at 04:35:00PM +0800, Chen-Yu Tsai wrote:
> > The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP
> > in the datasheet, that contains clock gates, some power sequence signal
>
On Thu, May 30, 2024 at 4:35 PM Chen-Yu Tsai wrote:
>
> Hi everyone,
>
> This series enables the PowerVR GPU found in the MT8173 SoC, found in
> some Chromebooks.
>
> This version is different from the initial powervr driver submission [1]
> in that it splits out the GPU g
On Thu, May 30, 2024 at 5:59 PM AngeloGioacchino Del Regno
wrote:
>
> Il 30/05/24 10:35, Chen-Yu Tsai ha scritto:
> > The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP
> > in the datasheet, that contains clock gates, some power sequence signal
> > d
t;)
Signed-off-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3458be7f7f61..136b28f80cc2 100644
--- a/arch/arm64/boot/dt
/
Signed-off-by: Chen-Yu Tsai
---
.../bindings/gpu/img,powervr-rogue.yaml | 24 +++
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index
The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is part
of the Series6XT, another variation of the Rogue family of GPUs.
On top of the GPU is a glue layer that handles some clock and power
signals.
Add device nodes for both.
Signed-off-by: Chen-Yu Tsai
---
arch/arm64/boot/dts
,
while the power sequencing bits are exposed as one singular power domain.
Signed-off-by: Chen-Yu Tsai
---
.../clock/mediatek,mt8173-mfgtop.yaml | 71 +++
include/dt-bindings/clock/mt8173-clk.h| 7 ++
2 files changed, 78 insertions(+)
create mode 100644
The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is part
of the Series6XT, another variation of the Rogue family of GPUs.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/imagination/pvr_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/imagination/pvr_drv.c
,
while the power sequencing bits are exposed as one singular power domain.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/mediatek/Kconfig | 9 +
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8173-mfgtop.c | 240 +++
3 files changed, 250
@imgtec.com/
[2] https://gitlab.freedesktop.org/imagination/linux-firmware/-/tree/powervr
[3] https://github.com/SaschaWillems/Vulkan
[4]
https://lore.kernel.org/dri-devel/f2b2671e-5acc-4dec-9c2e-3c9cd2e1f...@imgtec.com/
Chen-Yu Tsai (6):
dt-bindings: clock: mediatek: Add mt8173 mfgtop
clk: media
On Mon, May 27, 2024 at 1:58 PM Chen-Yu Tsai wrote:
>
> On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
> >
> > Need secure buffer size to convert secure handle to secure
> > pa in optee-os, re-construct the vsi struct to store each
> > secure buffer size.
> &
On Mon, May 27, 2024 at 5:25 PM AngeloGioacchino Del Regno
wrote:
>
> Add a compatible for the MediaTek MT8188 SoC, with an integrated
> ARM Mali G57 MC3 (Valhall-JM) GPU.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
>
Hi,
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> Open tee context to initialize the environment in order to communication
> with optee-os, then open tee session as the communication pipeline for
> lat and core to send data for hardware decode.
>
> Signed-off-by: Yunfei Dong
> ---
> ..
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> From: Yilong Zhou
>
> Change vp9 driver to support secure video playback(svp) for
> mt8188. Need to map shared memory with optee interface and
> wait interrupt in optee-os.
>
> Signed-off-by: Yilong Zhou
> Signed-off-by: Yunfei Dong
> ---
>
Hi,
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> Define one uncompressed capture format V4L2_PIX_FMT_MS21 in order to
> support one plane memory. The buffer size is luma + chroma, luma is
> stored at the start and chrome is stored at the end.
>
> Signed-off-by: Yunfei Dong
> ---
> Doc
On Thu, May 16, 2024 at 8:21 PM Yunfei Dong wrote:
>
> Need secure buffer size to convert secure handle to secure
> pa in optee-os, re-construct the vsi struct to store each
> secure buffer size.
>
> Separate svp and normal wait interrupt condition for svp mode
> waiting hardware interrupt in opte
On Mon, May 27, 2024 at 12:54 PM Fei Shao wrote:
>
> On Mon, May 27, 2024 at 12:38 PM Chen-Yu Tsai wrote:
> >
> > On Mon, May 27, 2024 at 12:34 PM Fei Shao wrote:
> > >
> > > Hi Shawn,
> > >
> > > On Thu, May 2, 2024 at 6:39 PM Sha
On Mon, May 27, 2024 at 12:34 PM Fei Shao wrote:
>
> Hi Shawn,
>
> On Thu, May 2, 2024 at 6:39 PM Shawn Sung wrote:
> >
> > From: Hsiao Chien Sung
> >
> > Set DRM mode configs limitation according to the hardware capabilities
> > and pass the IGT checks as below:
> >
> > - The test "graphics.Igt
On Wed, May 22, 2024 at 8:32 PM Sui Jingfeng wrote:
>
> Hi,
>
>
> On 5/21/24 15:57, AngeloGioacchino Del Regno wrote:
> > +static int mtk_drm_of_ddp_path_build(struct device *dev, struct
> > device_node *node,
> > + struct mtk_mmsys_driver_data *data)
> > +{
> > +
On Thu, May 23, 2024 at 6:14 PM Andrzej Pietrasiewicz
wrote:
>
> Hi,
>
> I'm having second thoughts, please see inline,
>
> W dniu 22.05.2024 o 14:26, Andrzej Pietrasiewicz pisze:
> > Hi Yunfei,
> >
> > W dniu 16.05.2024 o 14:20, Yunfei Dong pisze:
> >> Define one uncompressed capture format V4L2_
On Tue, May 14, 2024 at 5:19 PM Chen-Yu Tsai wrote:
>
> On Tue, May 14, 2024 at 4:54 PM Matt Coster wrote:
> >
> > On 10/05/2024 09:43, Chen-Yu Tsai wrote:
> > > Hi,
> > >
> > > I got the following lockdep warnings while trying to make the powervr
&
On Tue, May 14, 2024 at 4:54 PM Matt Coster wrote:
>
> On 10/05/2024 09:43, Chen-Yu Tsai wrote:
> > Hi,
> >
> > I got the following lockdep warnings while trying to make the powervr
> > driver work on MT8173. This was observed while trying to run vkmark.
> >
Hi,
I got the following lockdep warnings while trying to make the powervr
driver work on MT8173. This was observed while trying to run vkmark.
This was on the next-20240506 kernel running Debian Sid with the
Mesa 24.0.6 package rebuilt to include the powervr driver.
[73602.438144] [
On Thu, May 2, 2024 at 5:03 PM Hsin-Te Yuan wrote:
>
> The anx7625 supports two different TDM settings, which determine whether
> or not the first audio data bit should be shifted. This series adds the
> support for configuring TDM setting through a property in the device
> tree.
As mentioned off
On Mon, Apr 8, 2024 at 6:16 PM AngeloGioacchino Del Regno
wrote:
>
> Il 08/04/24 05:20, Chen-Yu Tsai ha scritto:
> > On Thu, Apr 4, 2024 at 4:16 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Document OF graph on MMSYS/VDOSYS: this supports up to thre
On Thu, Apr 4, 2024 at 4:16 PM AngeloGioacchino Del Regno
wrote:
>
> Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
> per HW instance (so potentially up to six displays for multi-vdo SoCs).
>
> The MMSYS or VDOSYS is always the first component in the DDP pipeline,
> so it o
The ITE IT6505 display bridge can take one I2S input and transmit it
over the DisplayPort link.
Add #sound-dai-cells (= 0) to the binding for it.
Signed-off-by: Chen-Yu Tsai
---
Changes since v1 [1]:
- Reference /schemas/sound/dai-common.yaml
- Change "additionalProperties: fals
On Thu, Mar 21, 2024 at 1:59 AM Nícolas F. R. A. Prado
wrote:
>
> On Wed, Mar 20, 2024 at 04:19:51PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > On Wed, Mar 20, 2024 at 11:07:34AM -0400, Nícolas F. R. A. Prado wrote:
> > > I noticed that there are some commits from drm-misc-next [1] that haven't
On Wed, Mar 20, 2024 at 11:07 PM Nícolas F. R. A. Prado
wrote:
>
> Hi,
>
> I noticed that there are some commits from drm-misc-next [1] that haven't been
> added to the for-linux-next [2] branch, and consequently haven't made their
> way
> into linux-next.
>
> Namely, commit bf0390e2c95b ("drm/pa
rm/bridge: anx7625: add HDMI audio function")
> Signed-off-by: Hsin-Te Yuan
Reviewed-by: Chen-Yu Tsai
> ---
> Changes in v3:
> - Add Fixes tag.
> - Link to v2:
> https://lore.kernel.org/r/20240306-anx7625-v2-1-7138e00b2...@chromium.org
>
> Changes in v2:
> - Add
Hi,
Please add a space after the colons in the subject line.
On Tue, Mar 5, 2024 at 8:32 PM Hsin-Te Yuan wrote:
>
> Previously, the audio status was not updated during detection, leading
> to a persistent audio despite hot plugging events. To resolve this
^ it feels like
On Fri, Jan 26, 2024 at 6:17 PM Krzysztof Kozlowski
wrote:
>
> On 26/01/2024 08:35, Chen-Yu Tsai wrote:
> > The ITE IT6505 display bridge can take one I2S input and transmit it
> > over the DisplayPort link.
> >
> > Add #sound-dai-cells (= 0) to the binding for it.
The ITE IT6505 display bridge can take one I2S input and transmit it
over the DisplayPort link.
Add #sound-dai-cells (= 0) to the binding for it.
Signed-off-by: Chen-Yu Tsai
---
The driver side changes [1] are still being worked on, but given the
hardware is very simple, it would be nice if we
On Tue, Nov 21, 2023 at 8:54 PM AngeloGioacchino Del Regno
wrote:
>
> Il 30/07/23 20:08, Jiaxin Yu ha scritto:
> > Add audio support for it6505
> >
> > 1. Bridge to hdmi-codec to support audio feature. At the same time,
> > the function of automatically detecting audio is removed.
> > 2. It is
On Wed, Nov 8, 2023 at 3:27 PM CK Hu (胡俊光) wrote:
>
> Hi, Jason:
>
> On Wed, 2023-09-20 at 17:06 +0800, Jason-JH.Lin wrote:
> > Add spinlock protection to avoid race condition on vblank event
> > between mtk_drm_crtc_atomic_begin() and mtk_drm_finish_page_flip().
>
> Reviewed-by: CK Hu
Please al
On Thu, Nov 23, 2023 at 9:38 PM Michael Walle wrote:
>
> Add the two DSI controller node and the associated DPHY nodes.
> Individual boards have to enable them in the board device tree.
>
> Signed-off-by: Michael Walle
Reviewed-by: Chen-Yu Tsai
I checked all the address range
On Fri, Nov 3, 2023 at 4:54 PM AngeloGioacchino Del Regno
wrote:
>
> Il 03/11/23 06:12, Chen-Yu Tsai ha scritto:
> > On Thu, Nov 2, 2023 at 10:26 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Currently, the GPU is being internally powered off for runtime
On Thu, Nov 2, 2023 at 10:26 PM AngeloGioacchino Del Regno
wrote:
>
> Currently, the GPU is being internally powered off for runtime suspend
> and turned back on for runtime resume through commands sent to it, but
> note that the GPU doesn't need to be clocked during the poweroff state,
> hence it
On Mon, Oct 30, 2023 at 9:23 PM AngeloGioacchino Del Regno
wrote:
>
> Currently, the GPU is being internally powered off for runtime suspend
> and turned back on for runtime resume through commands sent to it, but
> note that the GPU doesn't need to be clocked during the poweroff state,
> hence it
On Mon, Oct 23, 2023 at 10:40 PM Alexandre Mergnat
wrote:
>
> Display Color for MT8365 is compatible with another SoC.
> Then, add MT8365 binding along with MT8183 SoC.
This unfortunately doesn't match what the patch is doing.
ChenYu
> Signed-off-by: Alexandre Mergnat
> ---
> Documentation/de
On Wed, Oct 4, 2023 at 4:32 PM Chen-Yu Tsai wrote:
>
> The MediaTek DRM driver implements GEM PRIME vmap by fetching the
> sg_table for the object, iterating through the pages, and then
> vmapping them. In essence, unlike the GEM DMA helpers which vmap
> when the object is f
the object already has a kernel address,
in which case the pointer is NULL and kfree() does nothing. Hence this
change causes no functional change.
Fixes: 3df64d7b0a4f ("drm/mediatek: Implement gem prime vmap/vunmap function")
Cc:
Signed-off-by: Chen-Yu Tsai
---
Please merge for v6.6 fixes.
A
On Tue, Oct 3, 2023 at 11:14 PM Fei Shao wrote:
>
> Hi,
>
> On Mon, Oct 2, 2023 at 5:21 PM Chen-Yu Tsai wrote:
> >
> > The MediaTek DRM driver implements GEM PRIME vmap by fetching the
> > sg_table for the object, iterating through the pages, and then
> > v
the contents of the sg_table. This
was missing despite explicitly required by mtk_gem_prime_get_sg_table().
Fixes: 3df64d7b0a4f ("drm/mediatek: Implement gem prime vmap/vunmap function")
Cc:
Signed-off-by: Chen-Yu Tsai
---
Please merge for v6.6 fixes.
Also, I was wondering why the Me
On Tue, Sep 19, 2023 at 7:02 PM Jani Nikula wrote:
>
> On Fri, 15 Sep 2023, Chen-Yu Tsai wrote:
> > On Thu, Sep 14, 2023 at 11:53 PM Jani Nikula wrote:
> >>
> >> The sads returned by drm_edid_to_sad() needs to be freed.
> >>
> >> Fixes: e71a8ebbe
off-by: Jani Nikula
Looks correct to me.
Reviewed-by: Chen-Yu Tsai
On Tue, Sep 12, 2023 at 5:43 PM AngeloGioacchino Del Regno
wrote:
>
> Il 12/09/23 11:37, Chen-Yu Tsai ha scritto:
> > On Tue, Sep 12, 2023 at 5:00 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Il 12/09/23 09:57, Moudy Ho ha scritto:
> >>&
On Tue, Sep 12, 2023 at 5:00 PM AngeloGioacchino Del Regno
wrote:
>
> Il 12/09/23 09:57, Moudy Ho ha scritto:
> > Changes since v4:
> > - Rebase on v6.6-rc1
> > - Remove any unnecessary DTS settings.
> > - Adjust the usage of MOD and clock in blending components.
> >
> > Changes since v3:
> > - De
On Fri, Sep 1, 2023 at 6:00 PM Michael Walle wrote:
>
> Hi,
>
> >> I was just curious if you know of any development for that (or
> >> similar)
> >> in the kernel.
> >
> > This is probably because support for this SoC began with Chromebooks,
> > which have fixed and defined uses for the pipelines.
On Wed, Aug 30, 2023 at 7:11 PM Michael Walle wrote:
>
> >> While digging through the code I realized that all the outputs and
> >> pipelines
> >> are harcoded. Doh. For all the mediatek SoCs. Looks like major
> >> restriction
> >> to
> >> me. E.g. there is also DSI and HDMI output on the mt8195.
On Wed, Aug 23, 2023 at 4:25 PM Shuijing Li wrote:
>
> Support IGT (Intel GPU Tools) in Mediatek DisplayPort driver
The commit message makes little sense.
First of all, you are changing the DSI driver, not the DisplayPort driver.
Second, the subject should say what was changed. In this case it
On Fri, Aug 4, 2023 at 3:29 PM AngeloGioacchino Del Regno
wrote:
>
> Add support for 12-bit gamma lookup tables and introduce the first
> user for it: MT8195.
> While at it, also reorder the variables in mtk_gamma_set_common()
> and rename `lut_base` to `lut0_base` to improve readability.
>
> Sign
On Mon, Aug 7, 2023 at 5:36 PM Frank Oltmanns wrote:
>
> Hi Icenowy,
>
> it is my understanding that you are the original author of the following
> patches are in Ondřej's 6.4 branch [1] [2] [3] but not in his 6.5
> branch. I assume it is because of merge conflicts as the part about
> setting the
has a test called
> > "addfb25-bad-modifier" that attempts to create a framebuffer with the
> > modifier DRM_FORMAT_MOD_INVALID and verifies the ADDFB2 ioctl returns
> > EINVAL.
>
> Reviewed-by: CK Hu
>
> >
> > Signed-off-by: Justin Green
> > Tes
;polling fails (timeout)
> - Support panel as module (tested with panel-edp on MT8195 Tomato)
> - Rebased over next-20230717
Whole series is
Tested-by: Chen-Yu Tsai
With panel-edp builtin & as a module, and tested external display,
all on MT8195 Tomato.
Thanks!
> Changes in v5
-off-by: Chen-Yu Tsai
---
Changes since v12:
- Rebase onto next-20230718 as requested
Changes since v11:
- Rebase onto v6.5-rc1
- Converted one more instance in anx7625_attach_dsi() introduced by
1464e48d69ab drm/bridge: anx7625: Prevent endless probe loop
Splitting this patch out of its original
#x27;t block further commands)
> > - Second, training the link between a sleeping/standby/unpowered
> >display makes little sense.
>
> Reviewed-by: CK Hu
There is a v6 already.
> >
> > Signed-off-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delre...@c
On Tue, Jul 18, 2023 at 5:40 AM Doug Anderson wrote:
>
> Hi,
>
> On Tue, Jul 11, 2023 at 2:12 AM Chen-Yu Tsai wrote:
> >
> > This panel is found at least on the MT8183-based Juniper Chromebook,
> > also known as the Acer Chromebook Spin 311. It matches the commo
On Thu, Jul 13, 2023 at 5:57 PM AngeloGioacchino Del Regno
wrote:
>
> Il 13/07/23 11:54, Chen-Yu Tsai ha scritto:
> > On Thu, Jul 13, 2023 at 5:01 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Changes in v5:
> >> - Added .wait_hpd_asserted()
On Thu, Jul 13, 2023 at 5:01 PM AngeloGioacchino Del Regno
wrote:
>
> Changes in v5:
> - Added .wait_hpd_asserted() callback for aux-bus
> - Avoid enabling and registering HPD interrupt + handlers for
>eDP case only (keeps HPD interrupts enabled for full DP case)
> - Support not always-on e
-off-by: Chen-Yu Tsai
---
Changes since v11:
- Rebase onto v6.5-rc1
- Converted one more instance in anx7625_attach_dsi() introduced by
1464e48d69ab drm/bridge: anx7625: Prevent endless probe loop
Splitting this patch out of its original type-C mux patch series [1] to
get it merged. This is a
From: Pin-yen Lin
Replace the spaces with tab characters in the Kconfig file.
Signed-off-by: Pin-yen Lin
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Chen-Yu Tsai
---
Splitting this patch out of its original type-C mux patch series [1] to
get it merged. This is a cleanup that is
This panel is found at least on the MT8183-based Juniper Chromebook,
also known as the Acer Chromebook Spin 311. It matches the common
delay_200_500_e50 set of delay timings.
Add an entry for it.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/panel/panel-edp.c | 1 +
1 file changed, 1
On Tue, Jul 11, 2023 at 3:23 PM Jani Nikula wrote:
>
> On Tue, 11 Jul 2023, Chen-Yu Tsai wrote:
> > On Mon, Jul 10, 2023 at 6:32 PM Jani Nikula
> > wrote:
> >>
> >> On Mon, 10 Jul 2023, Chen-Yu Tsai wrote:
> >> > The DRM DP code has macros for t
On Tue, Jul 11, 2023 at 2:13 PM Dan Carpenter wrote:
>
> Negative -EINVAL was intended instead of positive EINVAL.
>
> Fixes: 6a23afad443a ("phy: phy-mtk-dp: Add driver for DP phy")
> Signed-off-by: Dan Carpenter
Reviewed-by: Chen-Yu Tsai
On Mon, Jul 10, 2023 at 6:32 PM Jani Nikula wrote:
>
> On Mon, 10 Jul 2023, Chen-Yu Tsai wrote:
> > The DRM DP code has macros for the DP power sequencing commands. Use
> > them in the anx7625 driver instead of raw numbers.
> >
> > Fixes: 548b512e144f ("drm/br
The DRM DP code has macros for the DP HDCP capabilities. Use them in the
anx7625 driver instead of raw numbers.
Fixes: cd1637c7e480 ("drm/bridge: anx7625: add HDCP support")
Suggested-by: Nícolas F. R. A. Prado
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/bridge/analogix/anx
quot;)
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Nícolas F. R. A. Prado
---
Collected tags and rebased on v6.5-rc1.
drivers/gpu/drm/bridge/analogix/anx7625.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
b/drivers/gpu/drm/bri
evice tree. Both the internal and
external display of said device each use one anx7625 bridge.
[1]
https://lore.kernel.org/dri-devel/20230112042104.4107253-1-treapk...@chromium.org/
Fixes: 60487584a79a ("drm/bridge: anx7625: refactor power control to use
runtime PM framework")
Signed-
On Thu, Jul 6, 2023 at 8:30 PM AngeloGioacchino Del Regno
wrote:
>
> Changes in v4:
> - Set data lanes to idle to prevent stalls if bootloader didn't
>properly close the eDP port
> - Now using the .done_probing() callback for AUX bus to prevent
>probe deferral loops in case the panel-edp
On Sun, Jun 18, 2023 at 12:13 AM Uwe Kleine-König
wrote:
>
> [expanding recipents by the other affected persons]
>
> On Thu, Jun 08, 2023 at 09:08:15AM -0700, Doug Anderson wrote:
> > On Thu, Jun 1, 2023 at 8:40 AM Uwe Kleine-König
> > wrote:
> > >
> > > Hello,
> > >
> > > On Sun, May 07, 2023 at
Hi Matthias,
On Mon, Mar 6, 2023 at 4:07 PM Jason-JH.Lin wrote:
>
> After mmsys and drm change DITHER enum to DDP_COMPONENT_DITHER0,
> mmsys header can remove the useless DDP_COMPONENT_DITHER enum.
>
> Signed-off-by: Jason-JH.Lin
> Reviewed-by: AngeloGioacchino Del Regno
>
> Reviewed-by: Rex-B
ached
> device like a bridge chip. This should have no impact
> for people using burst-mode and setting the burst clock
> rate is still required for those users. If the burst
> clock is not present, change the error message to
> dev_info indicating the clock use the pixel clock.
&g
; Signed-off-by: Adam Ford
> Tested-by: Frieder Schrempf
> Reviewed-by: Frieder Schrempf
Tested-by: Chen-Yu Tsai
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