u/drm/ivip/intel_vip_drv.h
diff --git a/MAINTAINERS b/MAINTAINERS
index e7e81fadff65..0fdec52a356a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5229,6 +5229,15 @@ L: dri-devel@lists.freedesktop.org
F: include/drm/ttm/
F: drivers/gpu/drm/ttm/
+DRM INTEL IVIP
+M: Hean Loon
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconf
From: Hean-Loong Ong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to be
drawn by the Sodt IP
From: "Ong, Hean Loong"
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
Revi
From: Hean-Loong Ong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to be
drawn by the Sodt IP
From: "Ong, Hean Loong"
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
Revi
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconf
u/drm/ivip/intel_vip_drv.h
diff --git a/MAINTAINERS b/MAINTAINERS
index e7e81fadff65..0fdec52a356a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5229,6 +5229,15 @@ L: dri-devel@lists.freedesktop.org
F: include/drm/ttm/
F: drivers/gpu/drm/ttm/
+DRM INTEL IVIP
+M: Hean Loon
From: "Ong, Hean Loong"
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
V12:
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to be
drawn by the Sodt IP FrameBuffer 2.
The piece o
/MAINTAINERS
+++ b/MAINTAINERS
@@ -5229,6 +5229,15 @@ L: dri-devel@lists.freedesktop.org
F: include/drm/ttm/
F: drivers/gpu/drm/ttm/
+DRM INTEL IVIP
+M: Hean Loong, Ong
+L: dri-devel@lists.freedesktop.org
+T: git git://anongit.freedesktop.org/drm/drm-misc
+S: Maintained
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/con
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to be
drawn by the Sodt IP Fra
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
V12:
W
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to be
drawn by the Sodt IP Fra
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
V12:
W
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/con
/MAINTAINERS
+++ b/MAINTAINERS
@@ -5229,6 +5229,15 @@ L: dri-devel@lists.freedesktop.org
F: include/drm/ttm/
F: drivers/gpu/drm/ttm/
+DRM INTEL IVIP
+M: Hean Loong, Ong
+L: dri-devel@lists.freedesktop.org
+T: git git://anongit.freedesktop.org/drm/drm-misc
+S: Maintained
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to be
drawn by the Sodt IP Fra
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
V12:
W
From: Ong, Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/d
From: Ong, Hean Loong
Signed-off-by: Ong, Hean Loong
---
drivers/gpu/drm/Kconfig |2 +
drivers/gpu/drm/Makefile |1 +
drivers/gpu/drm/ivip/Kconfig | 14 +++
drivers/gpu/drm/ivip/Makefile |7 ++
drivers/gpu/drm/ivip/intel_vip_conn.c | 9
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is
allocating memory for information to be streamed from the ARM/Linux to the
display port.
Basically the driver just wraps the information such as the pixels to be drawn
by
the Sodt
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite.
The bindings would set the max width, max height,
bits per pixel and memory port width.
The device tree binding only supports the Intel
Arria10 devkit and its variants. Vendor name retained as altr.
V12
From: Ong, Hean Loong
Signed-off-by: Ong, Hean Loong
---
drivers/gpu/drm/ivip/Kconfig | 14 +++
drivers/gpu/drm/ivip/Makefile |7 ++
drivers/gpu/drm/ivip/intel_vip_conn.c | 91
drivers/gpu/drm/ivip/intel_vip_core.c | 189 +++
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite. The
binding involved would be generated from the Altera (Intel) Qsys system. The
bindings would set the max width, max height, buts per pixel and memory port
width. The device tree binding only supports
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver
patch here is allocating memory for information to be streamed from the
ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels
to be drawn by the FPGA Fr
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux
to the display port. Basically the driver just wraps the information such as
the pixels to be drawn by the FPGA Fram
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite. The
binding involved would be generated from the Altera (Intel) Qsys system. The
bindings would set the max width, max height, buts per pixel and memory port
width. The device tree binding only supports
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux to
the display port.
Basically the driver just wraps the information such as the pixels to be drawn
by the FPGA Fram
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite. The
binding involved would be generated from the Altera (Intel) Qsys system. The
bindings would set the max width, max height, buts per pixel and memory port
width. The device tree binding only supports
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite. The
binding involved would be generated from the Altera (Intel) Qsys system. The
bindings would set the max width, max height, buts per pixel and memory port
width. The device tree binding only supports
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux to
the display port.
Basically the driver just wraps the information such as the pixels to be drawn
by the FPGA Fram
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux to
the display port.
Basically the driver just wraps the information such as the pixels to be drawn
by the FPGA Fram
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite. The
binding involved would be generated from the Altera (Intel) Qsys system. The
bindings would set the max width, max height, buts per pixel and memory port
width. The device tree binding only supports
From: Ong, Hean Loong
Device tree binding for Intel FPGA Video and Image Processing Suite. The
binding involved would be generated from the Altera (Intel) Qsys system. The
bindings would set the max width, max height, buts per pixel and memory port
width. The device tree binding only supports
From: Ong, Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux to
the display port.
Basically the driver just wraps the information such as the pixels to be drawn
by the FPGA Fram
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/config
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig
From: Ong Hean Loong
Device tree binding for Intel FPGA Video and Image
Processing Suite. The binding involved would be generated
from the Altera (Intel) Qsys system. The bindings would
set the max width, max height and memory port width.
The device tree binding only supports the Intel Arria10
de
From: Ong Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and
the DRM driver patch here is allocating memory for
information to be streamed from the ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to
be drawn by the FPGA FrameBuf
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and
the DRM driver patch here is allocating memory for
information to be streamed from the ARM/Linux to the display port.
Basically the driver just wraps the information such as the pixels to
be drawn by the FPGA Frame
From: Ong Hean Loong
Device tree binding for Intel FPGA Video and Image
Processing Suite. The binding involved would be generated
from the Altera (Intel) Qsys system. The bindings would
set the max width, max height, buts per pixel and memory
port width. The device tree binding only supports the
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig
From: Ong Hean Loong
Device tree binding for Intel FPGA Video and Image
Processing Suite. The binding involved would be generated
from the Altera (Intel) Qsys system. The bindings would
set the max width, max height, buts per pixel and memory
port width. The device tree binding only supports the
From: Ong Hean Loong
Signed-off-by: Ong Hean Loong
---
V5:
*Fix Comments
V4:
*Fix Comments
V3:
*Changes to fixing drm_simple_pipe
*Used drm_fb_cma_get_gem_addr
V2:
*Adding drm_simple_display_pipe_init
---
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile |
From: Ong Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux to
the display port.
Basically the driver just wraps the information such as the pixels to be drawn
by the FPGA Fra
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing
Suite Frame Buffer II. The driver only supports the Intel
Arria10 devkit and its variants. This driver can be either
loaded staticlly or in modules. The OF device tree binding
is located at:
Documentation/devicetree/bindings/di
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig
From: Ong Hean Loong
Device tree binding for Intel FPGA Video and Image
Processing Suite. The binding involved would be generated
from the Altera (Intel) Qsys system. The bindings would
set the max width, max height, buts per pixel and memory
port width. The device tree binding only supports the
From: Ong Hean Loong
The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch
here is allocating memory for information to be streamed from the ARM/Linux to
the display port.
Basically the driver just wraps the information such as the pixels to be drawn
by the FPGA Fra
From: "Ong, Hean Loong"
Device tree binding for Intel FPGA Video and Image
Processing Suite. The binding involved would be generated
from the Altera (Intel) Qsys system. The bindings would
set the max width, max height, buts per pixel and memory
port width. The device tree binding only supports t
From: "Ong, Hean Loong"
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
v2:
* Added drm frame bufferr II module support for Arria10
---
arch/arm/configs/socfpga_defconfig | 4
1 file changed,
From: Ong Hean Loong
Hi,
The new Intel Arria10 SOC FPGA devkit has a Display Port IP component
which requires a new driver. This is a virtual driver in which the
FGPA hardware would enable the Display Port based on the information
and data provided from the DRM frame buffer from the OS. Basical
From: "Ong, Hean Loong"
Driver for Intel FPGA Video and Image Processing
Suite Frame Buffer II. The driver only supports the Intel
Arria10 devkit and its variants. This driver can be either
loaded staticlly or in modules. The OF device tree binding
is located at:
Documentation/devicetree/bindings
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