[linux-sunxi] Re: [PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
On Thu, 01 Dec 2016 12:41:20 +0200 Laurent Pinchart wrote: > > > If a DVI connector instead of a HDMI connector is soldered, how > > > should such a device tree be written? > > > > Use a dvi-connector instead :) > > The HDMI encoder DT node doesn't (and certainly shouldn't) report what type > of > connector is mounted on the board. Having a connector node in DT makes the > connector type available to the system, allowing the DRM driver to expose the > right connector type to userspace (it would be confusing for the user to > report DRM_MODE_CONNECTOR_HDMIA for a DVI connector). The connector type, HDMI or DVI, is known by the EDID. The user is not interested by the software indication of the connector type: (s)he knows it because (s)he connected him/herself the display device. And the DRM driver does not do anything from the knowledge of the connector type in the DT. Only the EDID may tell if the display device may do audio streaming (direct HDMI with audio capability) or not (direct HDMI without audio, HDMI to DVI cable, DVI physical connector). -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
On Wed, 30 Nov 2016 11:52:25 +0200
Laurent Pinchart wrote:
> Hi Jean-François,
>
> On Wednesday 30 Nov 2016 10:27:57 Jean-Francois Moine wrote:
> > On Wed, 30 Nov 2016 10:20:21 +0200 Laurent Pinchart wrote:
> > >> Well, I don't see what this connector can be.
> > >> May you give me a DT example?
> > >
> > > Sure.
> > >
> > > arch/arm/boot/dts/r8a7791-koelsch.dts
> > >
> > > /* HDMI encoder */
[snip]
> > > /* HDMI connector */
> > >
> > > hdmi-out {
> > > compatible = "hdmi-connector";
> > > type = "a";
> > >
> > > port {
> > > hdmi_con: endpoint {
> > > remote-endpoint = <_out>;
> > > };
> > > };
> > > };
[snip]
> > - what does the software do with the connector type?
>
> That's up to the software to decide, the DT bindings should describe the
> hardware in the most accurate and usable way for the OS as possible. One of
> my
> longer term goals is to add connector drivers to handle DDC and HPD when
> they're not handled by the encoder (they are in the above example).
>
> If the DDC was connected to a general-purpose I2C bus of the SoC, and the HPD
> to a GPIO, we would have
>
> hdmi-out {
> compatible = "hdmi-connector";
> type = "a";
> /* I2C bus and GPIO references are made up for the example */
> ddc-i2c-bus = <>;
> hpd-gpios = < 7 GPIO_ACTIVE_HIGH>
>
> port {
> hdmi_con: endpoint {
> remote-endpoint = <_out>;
> };
> };
> };
>
> and both HPD and EDID reading should be handled by the connector driver.
[snip]
Hi Laurent,
OK. I understand. This connector complexity should be added in all DTs,
and the same code would be used.
Actually, for component binding, I use drm_of_component_probe():
- from the DRM master, loop on the "ports" phandle array and bind the
CRTCs,
- for each CRTC, loop on the first remote port level and bind the
encoders/connectors
Now, this should be:
- from the DRM master, loop on the first remote ports level and bind
the CRTCs,
- for each CRTC, loop on the second remote port level and bind the
encoders (and bridges?),
- for each encoder, loop on the third remote port level and bind the
connectors.
Then, it would be nice to have a generic function for doing this job.
Otherwise, from your description:
> hdmi-out {
> compatible = "hdmi-connector";
> type = "a";
> /* I2C bus and GPIO references are made up for the example */
> ddc-i2c-bus = <>;
> hpd-gpios = < 7 GPIO_ACTIVE_HIGH>
the "hdmi-connector" is a big piece of software. It must handle a lot
of more and more exotic connectors.
So, I hope that you have written a "simple-hdmi-connector" which does
nothing but setting the connector type.
Where is it?
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
On Wed, 30 Nov 2016 10:20:21 +0200
Laurent Pinchart wrote:
> > Well, I don't see what this connector can be.
> > May you give me a DT example?
>
> Sure.
>
> arch/arm/boot/dts/r8a7791-koelsch.dts
>
> /* HDMI encoder */
>
> hdmi at 39 {
> compatible = "adi,adv7511w";
> reg = <0x39>;
> interrupt-parent = <>;
> interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
>
> adi,input-depth = <8>;
> adi,input-colorspace = "rgb";
> adi,input-clock = "1x";
> adi,input-style = <1>;
> adi,input-justification = "evenly";
>
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port at 0 {
> reg = <0>;
> adv7511_in: endpoint {
> remote-endpoint = <_out_rgb>;
> };
> };
>
> port at 1 {
> reg = <1>;
> adv7511_out: endpoint {
> remote-endpoint = <_con>;
> };
> };
> };
> };
>
> /* HDMI connector */
>
> hdmi-out {
> compatible = "hdmi-connector";
> type = "a";
>
> port {
> hdmi_con: endpoint {
> remote-endpoint = <_out>;
> };
> };
> };
Hi Laurent,
Sorry for I don't see the interest:
- it is obvious that the HDMI connector is a 'hdmi-connector'!
- the physical connector type may be changed on any board by a soldering
iron or a connector to connector cable.
- what does the software do with the connector type?
- why not to put the connector information in the HDMI device?
And, if I follow you, the graph of ports could also be used to describe
the way the various parts of the SoCs are powered, to describe the pin
connections, to describe the USB connectors, to describe the board
internal hubs and bridges...
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v7 0/8] drm: sun8i: Add DE2 HDMI video support
On Tue, 29 Nov 2016 22:36:50 +0100 Maxime Ripard wrote: > On Tue, Nov 29, 2016 at 11:18:35AM +0100, Jean-Francois Moine wrote: > > This patchset series adds HDMI video support to the Allwinner > > sun8i SoCs which include the display engine 2 (DE2). > > The driver contains the code for the A83T and H3 SoCs, and > > some H3 boards, but it could be used/extended for other SoCs > > (A64, H2, H5) and boards (Banana PIs, Orange PIs). > > Honestly, I'm getting a bit worried by the fact that you ignore > reviews. > > On the important reviews that you got that are to be seen as major > issues that block the inclusion, we have: > - The fact that the HDMI driver is actually just a designware IP, > and while you should use the driver that already exists, you just > duplicated all that code. The DW registers in the A83T and H3 are obfuscated, so, the code in bridge/DW cannot be used as it is. There should be either a translation table or a function to compute the register addresses. More, it is not sure that the bridge/DW code would work with Allwinner's SoCs. It seems that they got some schematics from DesignWare, but, is it really the same hardware? Also, if some changes had to be done in the bridge code, I could not check if this would break or not the other SoCs. Eventually, I went the same way as omap/hdmi5: different driver. > - The fact that you ignored Rob (v6) and I (v5) comment on using OF > graph to model the connection between the display engine and the > TCON. Something that Laurent also pointed out in this version. I simply use the drm function drm_of_component_probe(). If this one is in the DRM core, why should I not use it? If it must not be used, it would be nice to mark it as deprecated and to update the code of the drivers which are using it. > - The fact that you ignored that you needed an HDMI connector node > as a child of the HDMI controller. This has been reported by Rob > (v6) and yet again in this version by Laurent. As I don't know what is a DT 'connector', I cannot go further. I hope Laurent will give me clearer explanations and a real example. > - And finally the fact that we can't have several display engine in > parallel, if needs be. This has happened in the past already on > Allwinner SoCs, so it's definitely something we should consider in > the DT bindings, since we can't break them. IIRC, I proposed my driver before yours, and the DE2 is completely different from the other display engines. What you are telling is "add more code to already complex code and have a big driver for all SoCs in each kernels". I think it should be better to have small modules, each one treating specific hardware, and to let only the needed code in the kernel memory at startup time. > Until those are fixed, I cannot see how this driver can be merged, > unfortunately. No problem. I just wanted to help people by giving the job I did on the boards I have. My boards are working for almost one year, fine enough for I use them as daily desktop computers. I don't want to spend one more year for having my code in the Linux kernel: there are so much other exciting things to do... -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
On Tue, 29 Nov 2016 22:10:01 +0200 Laurent Pinchart wrote: > Hi Jean-François, > > On Tuesday 29 Nov 2016 21:04:55 Jean-Francois Moine wrote: > > On Tue, 29 Nov 2016 21:33 +0200 Laurent Pinchart wrote: > > >>> You need a third port for the HDMI encoder output, connected to an > > >>> HDMI connector DT node. > > >> > > >> I don't see what you mean. The HDMI device is both the encoder > > >> and connector (as the TDA998x): > > > > > > The driver might create both an encoder and a connector, but I very much > > > doubt that the "allwinner,sun8i-a83t-hdmi" hardware contains a connector, > > > unless the SoC package has an HDMI connector coming out of it :-) > > > > > >> plane -> DE2 mixer ---> TCON -> HDMI -> display device > > >> - plane --- CRTC - - encoder \ > > >>connector -- (HDMI cable) > > >> audio-controller - - audio-codec / > > > > The schema is the same as the Dove Cubox: the TDA998x is just a chip > > with some wires going out and the physical connector is supposed to be > > at the end of the wires. > > I've missed the Dove Cubox DT bindings when they were submitted. Fortunately > (or unfortunately for you, depending on how you look at it ;-)) I've paid > more > attention this time. > > > Here, the HDMI pins of the SoC go to a pure hardware chip and then to > > the physical connector. Which software entity do you want to add? > > I don't want to add a software entity, I just want to model the connector in > DT as it's present in the system. Even though that's more common for other > bus > types than HDMI (LVDS for instance) it wouldn't be inconceivable to connect > the HDMI signals to an on-board chim instead of an HDMI connector, so the > HDMI > encoder output should be modelled by a port and connected to a connector DT > node in this case. Well, I don't see what this connector can be. May you give me a DT example? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
On Tue, 29 Nov 2016 21:33 +0200 Laurent Pinchart wrote: > > > You need a third port for the HDMI encoder output, connected to an HDMI > > > connector DT node. > > > > I don't see what you mean. The HDMI device is both the encoder > > and connector (as the TDA998x): > > The driver might create both an encoder and a connector, but I very much > doubt > that the "allwinner,sun8i-a83t-hdmi" hardware contains a connector, unless > the > SoC package has an HDMI connector coming out of it :-) > > > plane -> DE2 mixer ---> TCON -> HDMI -> display device > > - plane --- CRTC - - encoder \ > >connector -- (HDMI cable) > > audio-controller - - audio-codec / The schema is the same as the Dove Cubox: the TDA998x is just a chip with some wires going out and the physical connector is supposed to be at the end of the wires. Here, the HDMI pins of the SoC go to a pure hardware chip and then to the physical connector. Which software entity do you want to add? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
On Tue, 29 Nov 2016 20:46:22 +0200
Laurent Pinchart wrote:
[snip]
> > +Example:
> > +
> > + hdmi: hdmi at 01ee {
> > + compatible = "allwinner,sun8i-a83t-hdmi";
> > + reg = <0x01ee 0x2>;
> > + clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
> > +< CLK_HDMI_DDC>;
> > + clock-names = "bus", "clock", "ddc-clock";
> > + resets = < RST_HDMI0>, < RST_HDMI1>;
> > + reset-names = "hdmi0", "hdmi1";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_pins_a>;
> > + status = "disabled";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + port at 0 { /* video */
> > + reg = <0>;
> > + hdmi_tcon1: endpoint {
> > + remote-endpoint = <_hdmi>;
> > + };
> > + };
> > + port at 1 { /* audio */
> > + reg = <1>;
> > + hdmi_i2s2: endpoint {
> > + remote-endpoint = <_hdmi>;
> > + };
> > + };
>
> You need a third port for the HDMI encoder output, connected to an HDMI
> connector DT node.
I don't see what you mean. The HDMI device is both the encoder
and connector (as the TDA998x):
plane -> DE2 mixer ---> TCON -> HDMI -> display device
- plane --- CRTC - - encoder \
connector -- (HDMI cable)
audio-controller - - audio-codec /
> > + };
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v7 0/8] drm: sun8i: Add DE2 HDMI video support
This patchset series adds HDMI video support to the Allwinner sun8i SoCs which include the display engine 2 (DE2). The driver contains the code for the A83T and H3 SoCs, and some H3 boards, but it could be used/extended for other SoCs (A64, H2, H5) and boards (Banana PIs, Orange PIs). v7: - more explanations about the DE2 in the DT documentation - separate patches for DT documentation (Rob Herring) - show all properties in DT examples (Rob Herring) - use drm_of_component_probe() - use the index of the DE 'ports' in the DT as the DE mixer number (no alias needed anymore) - change some 'lcd' to 'tcon' in the DT - add HDMI module parameter for DVI mode when screen overscan problems - fall back to some CEA modes in case of EDID read failure - fix some settings (interlace) and simplify code - fix bug in start of A83T HDMI - fix lack of CLK_PLL_DE definition in the DT include (Icenowy Zheng) v6: - remove audio support (other patchset to come) - use DRM modeset data for HDMI configuration (thanks to Jernej Škrabec) - more meaningfull register names - use a mutex for DE I/O protection - merge DE and plane into one file - don't activate the video hardware when video not started (Maxime Ripard) - remove 'type = "video" in DT graph ports (Rob Herring) - change the I/O accesses by #define instead of struct (Maxime Ripard, André Przywara) - remove pm functions (Maxime Ripard) - set the pll-de/de clocks in the DT (Maxime Ripard) - use platform_get_irq instead of irq_of_parse_and_map (Maxime Ripard) - rename sunxi to sun8i (Maxime Ripard) - fix coding style errors (Maxime Ripard) - subclass the drm structure in private data (Daniel Vetter) - move drm_dev_register at end of init (Daniel Vetter) v5: - add overlay plane - add audio support - add support for the A83T - add back the HDMI driver - many bug fixes v4: - drivers/clk/sunxi/Makefile was missing (Emil Velikov) v3: - add the hardware cursor - simplify and fix the DE2 init sequences - generation for all SUNXI SoCs (Andre Przywara) v2: - remove the HDMI driver - remarks from Chen-Yu Tsai and Russell King - DT documentation added Jean-Francois Moine (8): drm: sun8i: Add a basic DRM driver for Allwinner DE2 drm/sun8i: Add DT bindings documentation of Allwinner DE2 drm: sun8i: add HDMI video support to A83T and H3 drm/sunxi: Add DT bindings documentation of Allwinner HDMI clk: sunxi-ng: define the PLL DE clock ARM: dts: sun8i-h3: add HDMI video nodes ARM: dts: sun8i-h3: Add HDMI video to the Banana Pi M2+ ARM: dts: sun8i-h3: Add HDMI video to the Orange PI 2 .../devicetree/bindings/display/sunxi/hdmi.txt | 56 ++ .../bindings/display/sunxi/sun8i-de2.txt | 121 +++ arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts| 12 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 12 + arch/arm/boot/dts/sun8i-h3.dtsi| 65 ++ drivers/gpu/drm/Kconfig| 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sun8i/Kconfig | 26 + drivers/gpu/drm/sun8i/Makefile | 9 + drivers/gpu/drm/sun8i/de2_crtc.c | 449 +++ drivers/gpu/drm/sun8i/de2_crtc.h | 52 ++ drivers/gpu/drm/sun8i/de2_drv.c| 317 drivers/gpu/drm/sun8i/de2_drv.h| 48 ++ drivers/gpu/drm/sun8i/de2_hdmi.c | 440 +++ drivers/gpu/drm/sun8i/de2_hdmi.h | 51 ++ drivers/gpu/drm/sun8i/de2_hdmi_io.c| 842 + drivers/gpu/drm/sun8i/de2_plane.c | 734 ++ include/dt-bindings/clock/sun8i-h3-ccu.h | 1 + 18 files changed, 3238 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt create mode 100644 drivers/gpu/drm/sun8i/Kconfig create mode 100644 drivers/gpu/drm/sun8i/Makefile create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c create mode 100644 drivers/gpu/drm/sun8i/de2_drv.h create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c -- 2.10.2
[PATCH v7 8/8] ARM: dts: sun8i-h3: Add HDMI video to the Orange PI 2
Signed-off-by: Jean-Francois Moine
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 047e9e1..7712972 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -105,16 +105,28 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
--
2.10.2
[PATCH v7 7/8] ARM: dts: sun8i-h3: Add HDMI video to the Banana Pi M2+
Signed-off-by: Jean-Francois Moine
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c0c49dd..9f3e2f8 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -93,6 +93,10 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
@@ -101,12 +105,20 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
--
2.10.2
[PATCH v7 6/8] ARM: dts: sun8i-h3: add HDMI video nodes
Signed-off-by: Jean-Francois Moine
---
Note 1:
The DE clock is not set in the driver. Instead, it is set at system
startup time by 'assigned-clocks', but there is a problem in sunxi-ng
which uses readl_relaxed_poll_timeout(), and, as noticed by
OndÅej Jirman, this function is not available at startup time.
The fix of this problem is not part of this patchset series.
Note 2:
The DE clock is set to a high enough rate (432MHz). It seems that
this is needed to handle 4K video.
But, as the proposed DE driver does not treat yet 4K video, the clock
could be set to a lower rate. For example, the default rate for the A83T
is 250MHz (no 4K video).
---
arch/arm/boot/dts/sun8i-h3.dtsi | 65 +
1 file changed, 65 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fca66bf..1aa087d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -140,6 +140,16 @@
#size-cells = <1>;
ranges;
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ reg = <0x0100 0x40>;
+ clocks = < CLK_BUS_DE>, < CLK_DE>;
+ clock-names = "bus", "clock";
+ resets = < RST_BUS_DE>;
+ ports = <_p>, <_p>;
+ status = "disabled";
+ };
+
dma: dma-controller at 01c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
@@ -149,6 +159,37 @@
#dma-cells = <1>;
};
+ tcon0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ reg = <0x01c0c000 0x400>;
+ clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+ clock-names = "bus", "clock";
+ resets = < RST_BUS_TCON0>;
+ interrupts = ;
+ status = "disabled";
+ tcon0_p: port {
+ tcon0_hdmi: endpoint {
+ remote-endpoint = <_tcon0>;
+ };
+ };
+ };
+
+ /* not used */
+ tcon1: lcd-controller at 01c0d000 {
+ compatible = "allwinner,sun8i-h3-tcon";
+ reg = <0x01c0d000 0x400>;
+ clocks = < CLK_BUS_TCON1>,
+< CLK_TCON0>; /* no clock */
+ clock-names = "bus", "clock";
+ interrupts = ;
+ status = "disabled";
+ tcon1_p: port {
+ endpoint {
+ /* empty */
+ };
+ };
+ };
+
mmc0: mmc at 01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@@ -314,6 +355,11 @@
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
+
+ assigned-clocks = < CLK_PLL_DE>,
+ < CLK_DE>;
+ assigned-clock-rates = <86400>,
+ <43200>;
};
pio: pinctrl at 01c20800 {
@@ -567,6 +613,25 @@
interrupts = ;
};
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-h3-hdmi";
+ reg = <0x01ee 0x2>;
+ clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
+< CLK_HDMI_DDC>;
+ clock-names = "bus", "clock", "ddc-clock";
+ resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 { /* video */
+ reg = <0>;
+ hdmi_tcon0: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ };
+
rtc: rtc at 01f0 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f0 0x54>;
--
2.10.2
[PATCH v7 5/8] clk: sunxi-ng: define the PLL DE clock
Signed-off-by: Jean-Francois Moine --- include/dt-bindings/clock/sun8i-h3-ccu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h index efb7ba2..7af57b7 100644 --- a/include/dt-bindings/clock/sun8i-h3-ccu.h +++ b/include/dt-bindings/clock/sun8i-h3-ccu.h @@ -44,6 +44,7 @@ #define _DT_BINDINGS_CLK_SUN8I_H3_H_ #define CLK_CPUX 14 +#define CLK_PLL_DE 13 #define CLK_BUS_CE 20 #define CLK_BUS_DMA21 -- 2.10.2
[PATCH v7 4/8] drm/sunxi: Add DT bindings documentation of Allwinner HDMI
Signed-off-by: Jean-Francois Moine
---
.../devicetree/bindings/display/sunxi/hdmi.txt | 56 ++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
diff --git a/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
new file mode 100644
index 000..1e107cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
@@ -0,0 +1,56 @@
+Allwinner HDMI Transmitter
+==
+
+The Allwinner HDMI transmitters are included in the SoCs.
+They support audio and video.
+
+Required properties:
+ - compatible : should be one of
+ "allwinner,sun8i-a83t-hdmi"
+ "allwinner,sun8i-h3-hdmi"
+ - reg: base address and size of the I/O memory
+ - clocks : phandles to the HDMI clocks as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
+ - clock-names : must be
+ "bus" : bus gate
+ "clock" : streaming clock
+ "ddc-clock" : DDC clock
+ - resets : One or two phandles to the HDMI resets
+ - reset-names : when 2 phandles, must be
+ "hdmi0" and "hdmi1"
+ - #address-cells : should be <1>
+ - #size-cells : should be <0>
+
+Required nodes:
+ - port: Audio and video input port nodes with endpoint definitions
+ as defined in Documentation/devicetree/bindings/graph.txt.
+ port at 0 is video and port at 1 is audio.
+
+Example:
+
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-a83t-hdmi";
+ reg = <0x01ee 0x2>;
+ clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
+< CLK_HDMI_DDC>;
+ clock-names = "bus", "clock", "ddc-clock";
+ resets = < RST_HDMI0>, < RST_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_a>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 { /* video */
+ reg = <0>;
+ hdmi_tcon1: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ port at 1 { /* audio */
+ reg = <1>;
+ hdmi_i2s2: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ };
--
2.10.2
[PATCH v7 3/8] drm: sun8i: add HDMI video support to A83T and H3
Signed-off-by: Jean-Francois Moine
---
drivers/gpu/drm/sun8i/Kconfig | 7 +
drivers/gpu/drm/sun8i/Makefile | 2 +
drivers/gpu/drm/sun8i/de2_hdmi.c| 440 +++
drivers/gpu/drm/sun8i/de2_hdmi.h| 51 +++
drivers/gpu/drm/sun8i/de2_hdmi_io.c | 843
5 files changed, 1343 insertions(+)
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c
diff --git a/drivers/gpu/drm/sun8i/Kconfig b/drivers/gpu/drm/sun8i/Kconfig
index 6940895..5c4607b 100644
--- a/drivers/gpu/drm/sun8i/Kconfig
+++ b/drivers/gpu/drm/sun8i/Kconfig
@@ -17,3 +17,10 @@ config DRM_SUN8I_DE2
Choose this option if your Allwinner chipset has the DE2 interface
as the A64, A83T and H3. If M is selected the module will be called
sun8i-de2-drm.
+
+config DRM_SUN8I_DE2_HDMI
+ tristate "Support for DE2 HDMI"
+ depends on DRM_SUN8I_DE2
+ help
+ Choose this option if you use want HDMI on DE2.
+ If M is selected the module will be called sun8i-de2-hdmi.
diff --git a/drivers/gpu/drm/sun8i/Makefile b/drivers/gpu/drm/sun8i/Makefile
index f107919..6ba97c2 100644
--- a/drivers/gpu/drm/sun8i/Makefile
+++ b/drivers/gpu/drm/sun8i/Makefile
@@ -3,5 +3,7 @@
#
sun8i-de2-drm-objs := de2_drv.o de2_crtc.o de2_plane.o
+sun8i-de2-hdmi-objs := de2_hdmi.o de2_hdmi_io.o
obj-$(CONFIG_DRM_SUN8I_DE2) += sun8i-de2-drm.o
+obj-$(CONFIG_DRM_SUN8I_DE2_HDMI) += sun8i-de2-hdmi.o
diff --git a/drivers/gpu/drm/sun8i/de2_hdmi.c b/drivers/gpu/drm/sun8i/de2_hdmi.c
new file mode 100644
index 000..9ff6132
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_hdmi.c
@@ -0,0 +1,440 @@
+/*
+ * Allwinner DRM driver - HDMI
+ *
+ * Copyright (C) 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "de2_hdmi.h"
+
+static const struct of_device_id de2_hdmi_dt_ids[] = {
+ { .compatible = "allwinner,sun8i-a83t-hdmi",
+ .data = (void *) SOC_A83T },
+ { .compatible = "allwinner,sun8i-h3-hdmi",
+ .data = (void *) SOC_H3 },
+ { }
+};
+MODULE_DEVICE_TABLE(of, de2_hdmi_dt_ids);
+
+#define conn_to_priv(x) \
+ container_of(x, struct de2_hdmi_priv, connector)
+
+#define enc_to_priv(x) \
+ container_of(x, struct de2_hdmi_priv, encoder)
+
+/* --- encoder functions --- */
+
+static int de2_hdmi_set_clock(struct de2_hdmi_priv *priv,
+ int rate)
+{
+ struct clk *parent_clk;
+ u32 parent_rate;
+ int ret;
+
+ /* determine and set the best rate for the parent clock (pll-video) */
+ if ((27 * 2) % rate == 0)
+ parent_rate = 27000;
+ else if (297000 % rate == 0)
+ parent_rate = 29700;
+ else
+ return -EINVAL; /* unsupported clock */
+
+ parent_clk = clk_get_parent(priv->clk);
+
+ ret = clk_set_rate(parent_clk, parent_rate);
+ if (ret) {
+ dev_err(priv->dev, "set parent rate failed %d\n", ret);
+ return ret;
+ }
+ ret = clk_set_rate(priv->clk, rate * 1000);
+ if (ret)
+ dev_err(priv->dev, "set rate failed %d\n", ret);
+
+ return ret;
+}
+
+static void de2_hdmi_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ struct de2_hdmi_priv *priv = enc_to_priv(encoder);
+
+ priv->cea_mode = drm_match_cea_mode(mode);
+
+ DRM_DEBUG_DRIVER("cea_mode %d\n", priv->cea_mode);
+
+ if (de2_hdmi_set_clock(priv, mode->clock) < 0)
+ return;
+
+ mutex_lock(>mutex);
+ hdmi_io_mode_set(priv, mode);
+ mutex_unlock(>mutex);
+}
+
+static void de2_hdmi_encoder_enable(struct drm_encoder *encoder)
+{
+ struct de2_hdmi_priv *priv = enc_to_priv(encoder);
+
+ mutex_lock(>mutex);
+ hdmi_io_video_on(priv);
+ mutex_unlock(>mutex);
+}
+
+static void de2_hdmi_encoder_disable(struct drm_encoder *encoder)
+{
+ struct de2_hdmi_priv *priv = enc_to_priv(encoder);
+
+ mutex_lock(>mutex);
+ hdmi_io_video_off(priv);
+ mutex_unlock(>mutex);
+}
+
+static const struct drm_encoder_helper_funcs de2_hdmi_encoder_helper_funcs = {
+ .mode_set = de2_hdmi_encoder_mode_set,
+ .enable = de
[PATCH v7 2/8] drm/sun8i: Add DT bindings documentation of Allwinner DE2
Signed-off-by: Jean-Francois Moine
---
.../bindings/display/sunxi/sun8i-de2.txt | 121 +
1 file changed, 121 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
b/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
new file mode 100644
index 000..edf38b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
@@ -0,0 +1,121 @@
+Allwinner sun8i Display Engine 2 subsystem
+==
+
+The Allwinner DE2 subsystem contains a display controller (DE2),
+one or two LCD controllers (Timing CONtrollers) and their external
+interfaces (encoders/connectors).
+
+ +---+
+ | DE2 |
+ | |
+ | +---+ |
+ plane --->| | | +--+
+ | | mixer |>| TCON |---> encoder ---> display
+ plane --->| | | +--+ connector device
+ | +---+ |
+ | |
+ | +---+ |
+ plane --->| | | +--+
+ | | mixer |>| TCON |---> encoder ---> display
+ plane --->| | | +--+ connector device
+ | +---+ |
+ +---+
+
+The DE2 contains a processor which mixes the input planes and creates
+the images which are sent to the TCONs.
+From the software point of vue, there are 2 independent real-time
+mixers, each one being statically associated to one TCON.
+
+The TCONs adjust the image format to the one of the display device.
+
+Display controller (DE2)
+
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-a83t-display-engine"
+ "allwinner,sun8i-h3-display-engine"
+
+- reg: base address and size of the I/O memory
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "bus": bus gate
+ "clock": clock
+
+- resets: phandle to the reset of the device
+
+- ports: must contain a list of 2 phandles, indexed by mixer number,
+ and pointing to display interface ports of TCONs
+
+LCD controller (TCON)
+=
+
+Required properties:
+
+- compatible: should be
+ "allwinner,sun8i-a83t-tcon"
+
+- reg: base address and size of the I/O memory
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "bus": bus gate
+ "clock": pixel clock
+
+- resets: phandle to the reset of the device
+
+- interrupts: interrupt number for the TCON
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ reg = <0x0100 0x40>;
+ clocks = < CLK_BUS_DE>, < CLK_DE>;
+ clock-names = "bus", "clock";
+ resets = < RST_BUS_DE>;
+ ports = <_p>, <_p>;
+ };
+
+ tcon0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ reg = <0x01c0c000 0x400>;
+ clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+ clock-names = "bus", "clock";
+ resets = < RST_BUS_TCON0>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ tcon0_p: port {
+ tcon0_hdmi: endpoint {
+ remote-endpoint = <_tcon0>;
+ };
+ };
+ };
+
+ /* not used */
+ tcon1: lcd-controller at 01c0d000 {
+ compatible = "allwinner,sun8i-h3-tcon";
+ reg = <0x01c0d000 0x400>;
+ clocks = < CLK_BUS_TCON1>,
+< CLK_TCON0>; /* no clock */
+ clock-names = "bus", "clock";
+ interrupts = ;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ tcon1_p: port {
+ endpoint {
+ /* empty */
+ };
+ };
+ };
--
2.10.2
[PATCH v7 1/8] drm: sun8i: Add a basic DRM driver for Allwinner DE2
Allwinner's recent SoCs, as A64, A83T and H3, contain a new display engine, DE2. This patch adds a DRM video driver for this device. Signed-off-by: Jean-Francois Moine --- drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sun8i/Kconfig | 19 + drivers/gpu/drm/sun8i/Makefile| 7 + drivers/gpu/drm/sun8i/de2_crtc.c | 449 +++ drivers/gpu/drm/sun8i/de2_crtc.h | 50 +++ drivers/gpu/drm/sun8i/de2_drv.c | 317 drivers/gpu/drm/sun8i/de2_drv.h | 48 +++ drivers/gpu/drm/sun8i/de2_plane.c | 734 ++ 9 files changed, 1627 insertions(+) create mode 100644 drivers/gpu/drm/sun8i/Kconfig create mode 100644 drivers/gpu/drm/sun8i/Makefile create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c create mode 100644 drivers/gpu/drm/sun8i/de2_drv.h create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 95fc041..bb1bfbc 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -202,6 +202,8 @@ source "drivers/gpu/drm/shmobile/Kconfig" source "drivers/gpu/drm/sun4i/Kconfig" +source "drivers/gpu/drm/sun8i/Kconfig" + source "drivers/gpu/drm/omapdrm/Kconfig" source "drivers/gpu/drm/tilcdc/Kconfig" diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 883f3e7..3e1eaa0 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -72,6 +72,7 @@ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/ obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/ obj-y += omapdrm/ obj-$(CONFIG_DRM_SUN4I) += sun4i/ +obj-$(CONFIG_DRM_SUN8I) += sun8i/ obj-y += tilcdc/ obj-$(CONFIG_DRM_QXL) += qxl/ obj-$(CONFIG_DRM_BOCHS) += bochs/ diff --git a/drivers/gpu/drm/sun8i/Kconfig b/drivers/gpu/drm/sun8i/Kconfig new file mode 100644 index 000..6940895 --- /dev/null +++ b/drivers/gpu/drm/sun8i/Kconfig @@ -0,0 +1,19 @@ +# +# Allwinner DE2 Video configuration +# + +config DRM_SUN8I + bool + +config DRM_SUN8I_DE2 + tristate "Support for Allwinner Video with DE2 interface" + depends on DRM && OF + depends on ARCH_SUNXI || COMPILE_TEST + select DRM_GEM_CMA_HELPER + select DRM_KMS_CMA_HELPER + select DRM_KMS_HELPER + select DRM_SUN8I + help + Choose this option if your Allwinner chipset has the DE2 interface + as the A64, A83T and H3. If M is selected the module will be called + sun8i-de2-drm. diff --git a/drivers/gpu/drm/sun8i/Makefile b/drivers/gpu/drm/sun8i/Makefile new file mode 100644 index 000..f107919 --- /dev/null +++ b/drivers/gpu/drm/sun8i/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for Allwinner's sun8i DRM device driver +# + +sun8i-de2-drm-objs := de2_drv.o de2_crtc.o de2_plane.o + +obj-$(CONFIG_DRM_SUN8I_DE2) += sun8i-de2-drm.o diff --git a/drivers/gpu/drm/sun8i/de2_crtc.c b/drivers/gpu/drm/sun8i/de2_crtc.c new file mode 100644 index 000..4e94ccc --- /dev/null +++ b/drivers/gpu/drm/sun8i/de2_crtc.c @@ -0,0 +1,449 @@ +/* + * Allwinner DRM driver - DE2 CRTC + * + * Copyright (C) 2016 Jean-Francois Moine + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include "de2_drv.h" +#include "de2_crtc.h" + +/* I/O map */ + +#define TCON_GCTL_REG 0x00 +#defineTCON_GCTL_TCON_ENABLE BIT(31) +#define TCON_GINT0_REG 0x04 +#defineTCON_GINT0_TCON1_Vb_Int_En BIT(30) +#defineTCON_GINT0_TCON1_Vb_Int_Flag BIT(14) +#defineTCON_GINT0_TCON1_Vb_Line_Int_Flag BIT(12) +#define TCON0_CTL_REG 0x40 +#defineTCON0_CTL_TCON_ENABLE BIT(31) +#define TCON1_CTL_REG 0x90 +#defineTCON1_CTL_TCON_ENABLE BIT(31) +#defineTCON1_CTL_INTERLACE_ENABLE BIT(20) +#defineTCON1_CTL_Start_Delay_SHIFT 4 +#defineTCON1_CTL_Start_Delay_MASK GENMASK(8, 4) +#define TCON1_BASIC0_REG 0x94/* XI/YI */ +#define TCON1_BASIC1_REG 0x98/* LS_XO/LS_YO */ +#define TCON1_BASIC2_REG 0x9c/* XO/YO */ +#define TCON1_BASIC3_REG 0xa0/* HT/HBP */ +#define TCON1_BASIC4_REG 0xa4/* VT/VBP */ +#define TCON1_BASIC5_REG 0xa8/* HSPW/VSPW */ +#define TCON1_PS_SYNC_REG 0xb0 +#define TCON1_IO_POL_REG 0xf0 +#defineTCON1_IO_POL_IO0_inv BIT(24) +#defineTCON1_IO_POL_IO1_inv BIT(25) +#defineTCON1_IO_POL_IO2_inv BIT
[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes
On Fri, 25 Nov 2016 17:41:51 +0800 Icenowy Zheng wrote: > After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation. The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not use the legacy u-boot, I don't know which can be the rate of the DE. > However, it cannot recognize any HDMI screen... > > (My board is Orange Pi One, and I manually added status="okay"; to , > , ) > > [ 16.507802] sun8i-de2 100.de-controller: bound 1c0c000.lcd-controller > (ops de2_lcd_ops [sun8i_de2_drm]) > [ 16.675948] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops > de2_hdmi_fini [sun8i_de2_hdmi]) > [ 16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). > [ 16.695876] [drm] No driver support for vblank timestamp query. > [ 16.701862] sun8i-de2 100.de-controller: No connectors reported > connected with modes > [ 16.713061] [drm] Cannot find any crtc or sizes - going 1024x768 > [ 16.734214] Console: switching to colour frame buffer device 128x48 > [ 16.751022] sun8i-de2 100.de-controller: fb0: frame buffer device I put a 'pr_warn' message is case the EDID cannot be read. Have you this message? Anyway, there is a problem with the EDID: - my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after rebooting once or twice. - my Banana Pi M2+ (H3) reads it correctly each time. - my Banana Pi M3 (A83T) can never read it. BTW, on first tries, I was forcing a CEA mode thru the kernel command line. This was working with the OPi2 and BPiM3, but there was no sound. In the last version, I use a EDID in edid_firmware for having sound with the BPiM3. This works fine. But, forcing a CEA mode is no more possible, so, when the OPi2 cannot read the EDID, the system switches to a VGA mode (default 1024x768) which is not supported. It seems that this is your case. So, in brief, if your board cannot read the EDID, put a EDID somewhere and its path in /sys/module/drm_kms_helper/parameters/edid_firmware. There will be no console, but X11 will work correctly. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[linux-sunxi] [PATCH v6 0/5] drm: sun8i: Add DE2 HDMI video support
On Mon, 21 Nov 2016 01:54:53 +0100 OndÅej Jirman wrote: > Dne 20.11.2016 v 12:32 Jean-Francois Moine napsal(a): > > This patchset series adds HDMI video support to the Allwinner > > sun8i SoCs which include the display engine 2 (DE2). > > The driver contains the code for the A83T and H3, but it could be > > used/extended for other SoCs as the A64, H2 and H5. > > Hi, > > I'm trying to test your patches on Orange Pi PC, and I've run into a few > issues: (I'm using sunxi-ng with the same patches as last time, to make > it work with your driver) > > 1] I just get pink output on the monitor - there's some signal, but it's > pink (or more like magenta). > > dmesg ouput indicates no error: > > [1.887823] [drm] Initialized > [1.888503] sun8i-de2 100.de-controller: bound > 1c0c000.lcd-controller (ops 0xc0a63894) > [2.057298] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops > 0xc0a63b54) > [2.057304] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). > [2.057307] [drm] No driver support for vblank timestamp query. > [2.690862] Console: switching to colour frame buffer device 240x67 > [2.723059] sun8i-de2 100.de-controller: fb0: frame buffer device [snip] My H3 boards work correctly, except the Orange PI 2 when it cannot read the EDID (but it is OK after reboot). Did you check if the EDID was correctly read? Which resolution do you expect? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v6 0/5] drm: sun8i: Add DE2 HDMI video support
This patchset series adds HDMI video support to the Allwinner sun8i SoCs which include the display engine 2 (DE2). The driver contains the code for the A83T and H3, but it could be used/extended for other SoCs as the A64, H2 and H5. v6: - remove audio support (other patchset to come) - use DRM modeset data for HDMI configuration (thanks to Jernej Škrabec) - more meaningfull register names - use a mutex for DE I/O protection - merge DE and plane into one file - don't activate the video hardware when video not started (Maxime Ripard) - remove 'type = "video" in DT graph ports (Rob Herring) - change the I/O accesses by #define instead of struct (Maxime Ripard, André Przywara) - remove pm functions (Maxime Ripard) - set the pll-de/de clocks in the DT (Maxime Ripard) - use platform_get_irq instead of irq_of_parse_and_map (Maxime Ripard) - rename sunxi to sun8i (Maxime Ripard) - fix coding style errors (Maxime Ripard) - subclass the drm structure in private data (Daniel Vetter) - move drm_dev_register at end of init (Daniel Vetter) v5: - add overlay plane - add audio support - add support for the A83T - add back the HDMI driver - many bug fixes v4: - drivers/clk/sunxi/Makefile was missing (Emil Velikov) v3: - add the hardware cursor - simplify and fix the DE2 init sequences - generation for all SUNXI SoCs (Andre Przywara) v2: - remove the HDMI driver - remarks from Chen-Yu Tsai and Russell King - DT documentation added Jean-Francois Moine (5): drm: sun8i: Add a basic DRM driver for Allwinner DE2 drm: sunxi: add HDMI video support to A83T and H3 ARM: dts: sun8i-h3: add HDMI video nodes ARM: dts: sun8i-h3: Add HDMI video to the Banana Pi M2+ ARM: dts: sun8i-h3: Add HDMI video to the Orange PI 2 .../devicetree/bindings/display/sunxi/hdmi.txt | 53 ++ .../bindings/display/sunxi/sun8i-de2.txt | 83 ++ arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts| 13 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 13 + arch/arm/boot/dts/sun8i-h3.dtsi| 51 ++ drivers/gpu/drm/Kconfig| 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sun8i/Kconfig | 26 + drivers/gpu/drm/sun8i/Makefile | 9 + drivers/gpu/drm/sun8i/de2_crtc.c | 440 +++ drivers/gpu/drm/sun8i/de2_crtc.h | 50 ++ drivers/gpu/drm/sun8i/de2_drm.h| 48 ++ drivers/gpu/drm/sun8i/de2_drv.c| 379 ++ drivers/gpu/drm/sun8i/de2_hdmi.c | 394 ++ drivers/gpu/drm/sun8i/de2_hdmi.h | 51 ++ drivers/gpu/drm/sun8i/de2_hdmi_io.c| 839 + drivers/gpu/drm/sun8i/de2_plane.c | 712 + 17 files changed, 3164 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt create mode 100644 drivers/gpu/drm/sun8i/Kconfig create mode 100644 drivers/gpu/drm/sun8i/Makefile create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h create mode 100644 drivers/gpu/drm/sun8i/de2_drm.h create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c -- 2.10.2
[PATCH v6 5/5] ARM: dts: sun8i-h3: Add HDMI video to the Orange PI 2
Signed-off-by: Jean-Francois Moine
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 047e9e1..9ecc6f1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -56,6 +56,7 @@
serial0 =
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
ethernet1 =
+ lcd0 =
};
chosen {
@@ -105,16 +106,28 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
--
2.10.2
[PATCH v6 4/5] ARM: dts: sun8i-h3: Add HDMI video to the Banana Pi M2+
Signed-off-by: Jean-Francois Moine
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c0c49dd..4b5baae 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -55,6 +55,7 @@
aliases {
serial0 =
serial1 =
+ lcd0 =
};
chosen {
@@ -93,6 +94,10 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
@@ -101,12 +106,20 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
--
2.10.2
[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes
Signed-off-by: Jean-Francois Moine
---
arch/arm/boot/dts/sun8i-h3.dtsi | 51 +
1 file changed, 51 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 416b825..7c6b1d5 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -140,6 +140,16 @@
#size-cells = <1>;
ranges;
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ reg = <0x0100 0x40>;
+ clocks = < CLK_BUS_DE>, < CLK_DE>;
+ clock-names = "bus", "clock";
+ resets = < RST_BUS_DE>;
+ ports = <_p>;
+ status = "disabled";
+ };
+
dma: dma-controller at 01c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
@@ -149,6 +159,23 @@
#dma-cells = <1>;
};
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ reg = <0x01c0c000 0x400>;
+ clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+ clock-names = "bus", "clock";
+ resets = < RST_BUS_TCON0>;
+ interrupts = ;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_hdmi: endpoint {
+ remote-endpoint = <_lcd0>;
+ };
+ };
+ };
+
mmc0: mmc at 01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@@ -314,6 +341,11 @@
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
+
+ assigned-clocks = < CLK_PLL_DE>,
+ < CLK_DE>;
+ assigned-clock-rates = <86400>,
+ <43200>;
};
pio: pinctrl at 01c20800 {
@@ -564,6 +596,25 @@
interrupts = ;
};
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-h3-hdmi";
+ reg = <0x01ee 0x2>;
+ clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
+< CLK_HDMI_DDC>;
+ clock-names = "bus", "clock", "ddc-clock";
+ resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 { /* video */
+ reg = <0>;
+ hdmi_lcd0: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ };
+
rtc: rtc at 01f0 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f0 0x54>;
--
2.10.2
[PATCH v6 2/5] drm: sun8i: add HDMI video support to A83T and H3
This patch adds a HDMI video driver to the Allwinner's SoCs A83T and H3.
Signed-off-by: Jean-Francois Moine
---
.../devicetree/bindings/display/sunxi/hdmi.txt | 53 ++
drivers/gpu/drm/sun8i/Kconfig | 7 +
drivers/gpu/drm/sun8i/Makefile | 2 +
drivers/gpu/drm/sun8i/de2_hdmi.c | 394 ++
drivers/gpu/drm/sun8i/de2_hdmi.h | 51 ++
drivers/gpu/drm/sun8i/de2_hdmi_io.c| 839 +
6 files changed, 1346 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c
diff --git a/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
new file mode 100644
index 000..85709ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
@@ -0,0 +1,53 @@
+Allwinner HDMI Transmitter
+==
+
+The Allwinner HDMI transmitters are included in the SoCs.
+They support audio and video.
+
+Required properties:
+ - #address-cells : should be <1>
+ - #size-cells : should be <0>
+ - compatible : should be one of
+ "allwinner,sun8i-a83t-hdmi"
+ "allwinner,sun8i-h3-hdmi"
+ - clocks : phandles to the HDMI clocks as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
+ - clock-names : must be
+ "gate" : bus gate
+ "clock" : streaming clock
+ "ddc-clock" : DDC clock
+ - resets : One or two phandles to the HDMI resets
+ - reset-names : when 2 phandles, must be
+ "hdmi0" and "hdmi1"
+
+Required nodes:
+ - port: Audio and video input port nodes with endpoint definitions
+ as defined in Documentation/devicetree/bindings/graph.txt.
+ port at 0 is video and port at 1 is audio.
+
+Example:
+
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-a83t-hdmi";
+ reg = <0x01ee 0x2>;
+ clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
+< CLK_HDMI_DDC>;
+ clock-names = "gate", "clock", "ddc-clock";
+ resets = < RST_HDMI0>, < RST_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 { /* video */
+ reg = <0>;
+ hdmi_lcd1: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ port at 1 { /* audio */
+ reg = <1>;
+ hdmi_i2s2: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/sun8i/Kconfig b/drivers/gpu/drm/sun8i/Kconfig
index 6940895..5c4607b 100644
--- a/drivers/gpu/drm/sun8i/Kconfig
+++ b/drivers/gpu/drm/sun8i/Kconfig
@@ -17,3 +17,10 @@ config DRM_SUN8I_DE2
Choose this option if your Allwinner chipset has the DE2 interface
as the A64, A83T and H3. If M is selected the module will be called
sun8i-de2-drm.
+
+config DRM_SUN8I_DE2_HDMI
+ tristate "Support for DE2 HDMI"
+ depends on DRM_SUN8I_DE2
+ help
+ Choose this option if you use want HDMI on DE2.
+ If M is selected the module will be called sun8i-de2-hdmi.
diff --git a/drivers/gpu/drm/sun8i/Makefile b/drivers/gpu/drm/sun8i/Makefile
index f107919..6ba97c2 100644
--- a/drivers/gpu/drm/sun8i/Makefile
+++ b/drivers/gpu/drm/sun8i/Makefile
@@ -3,5 +3,7 @@
#
sun8i-de2-drm-objs := de2_drv.o de2_crtc.o de2_plane.o
+sun8i-de2-hdmi-objs := de2_hdmi.o de2_hdmi_io.o
obj-$(CONFIG_DRM_SUN8I_DE2) += sun8i-de2-drm.o
+obj-$(CONFIG_DRM_SUN8I_DE2_HDMI) += sun8i-de2-hdmi.o
diff --git a/drivers/gpu/drm/sun8i/de2_hdmi.c b/drivers/gpu/drm/sun8i/de2_hdmi.c
new file mode 100644
index 000..9898a12
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_hdmi.c
@@ -0,0 +1,394 @@
+/*
+ * Allwinner DRM driver - HDMI
+ *
+ * Copyright (C) 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "de2_hdmi.h&
[PATCH v6 1/5] drm: sun8i: Add a basic DRM driver for Allwinner DE2
Allwinner's recent SoCs, as A64, A83T and H3, contain a new display
engine, DE2.
This patch adds a DRM video driver for this device.
Signed-off-by: Jean-Francois Moine
---
.../bindings/display/sunxi/sun8i-de2.txt | 83 +++
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sun8i/Kconfig | 19 +
drivers/gpu/drm/sun8i/Makefile | 7 +
drivers/gpu/drm/sun8i/de2_crtc.c | 440 +
drivers/gpu/drm/sun8i/de2_crtc.h | 50 ++
drivers/gpu/drm/sun8i/de2_drm.h| 48 ++
drivers/gpu/drm/sun8i/de2_drv.c| 379 +++
drivers/gpu/drm/sun8i/de2_plane.c | 712 +
10 files changed, 1741 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
create mode 100644 drivers/gpu/drm/sun8i/Kconfig
create mode 100644 drivers/gpu/drm/sun8i/Makefile
create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c
create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h
create mode 100644 drivers/gpu/drm/sun8i/de2_drm.h
create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c
create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
b/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
new file mode 100644
index 000..b9edd4b
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
@@ -0,0 +1,83 @@
+Allwinner sun8i Display Engine 2 subsystem
+==
+
+The Allwinner DE2 subsystem contains a display controller (DE2),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-a83t-display-engine"
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "gate": DE bus gate
+ "clock": DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==
+
+Required properties:
+
+- compatible: should be
+ "allwinner,sun8i-a83t-tcon"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "gate": TCON bus gate
+ "clock": TCON pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <& CLK_BUS_DE>, < CLK_DE>;
+ clock-names = "gate", "clock";
+ resets = < RST_BUS_DE>;
+ ports = <_p>;
+ };
+
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ ...
+ clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+ clock-names = "gate", "clock";
+ resets = < RST_BUS_TCON0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi at 01ee {
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ hdmi_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 95fc041..bb1bfbc 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -202,6 +202,8 @@ source "drivers/gpu/drm/shmobile/Kconfig"
source "drivers/gpu/drm/sun4i/Kconfig"
+source "drivers/gpu/drm/sun8i/Kconfig"
+
source "drivers/gpu/drm/omapdrm/Kconfig"
source "drivers/gpu/drm/tilcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 883f3e7..3e1eaa0 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/
obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
obj-y += omapdrm/
obj-$(CONFIG_DRM_SUN4I) +=
[PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Wed, 16 Nov 2016 22:33:06 +0100
Maxime Ripard wrote:
> > > > The Device Engine just handles the planes of the LCDs, but, indeed,
> > > > the LCDs must know about the DE and the DE must know about the LCDs.
> > > > There are 2 ways to realize this knowledge in the DT:
> > > > 1) either the DE has one or two phandle's to the LCDs,
> > > > 2) or the LCDs have a phandle to the DE.
> > > >
> > > > I chose the 1st way, the DE ports pointing to the endpoint of the LCDs
> > > > which is part of the video link (OF-graph LCD <-> connector).
> > > > It would be possible to have phandles to the LCDs themselves, but this
> > > > asks for more code.
> > > >
> > > > The second way is also possible, but it also complexifies a bit the
> > > > exchanges DE <-> LCD.
> > >
> > > I'm still not sure how it would complexify anything, and why you can't
> > > use the display graph to model the relation between the display engine
> > > and the TCON (and why you want to use a generic property that refers
> > > to the of-graph while it really isn't).
> >
> > Complexification:
> > 1- my solution:
> > At startup time, the DE device is the DRM device.
>
> How do you deal with SoCs with multiple display engines then?
In the H3, A83T and A64, there is only one DE.
If many DEs in a SoC, there may be either one DRM device per DE or one
DRM device for the whole system. In this last case, the (global) DE
would have many resources (many I/O memory maps / IRQs..) and the
physical DE of each endpoint would be indicated by the position of its
phandle in the 'ports' array (DT documentation).
> > It has to know the devices entering in the video chains.
> > The CRTCs (LCD/TCON) are found by
> > ports[i] -> parent
> > The connectors are found by
> > ports[i] -> endpoint -> remote_endpoint -> parent
> > 2- with ports pointing to the LCDs:
> > The CRTCs (LCD/TCON) are simply
> > ports[i]
> > The connectors are found by
> > loop on all ports of ports[i]
> > ports[i][j] -> endpoint -> remote_endpoint -> parent
> > 3- with a phandle to the DE in the LCDs:
>
> What do you mean with LCD? Panels? Why would panels have a phandle to
> the display engine?
LCD is the same as CRTC. I don't think people will connect old CRT's to
their new ARM boards. LCD's may be panels, modern TV sets, or any
digital display. The word LCD seems clearer to me in this context, even
if there may a DAC as an ancoder.
> > The DE cannot be the DRM device because there is no information about
> > the video devices in the DT. Then, the DRM devices are the LCDs.
> > These LCDs must give their indices to the DE. So, the DE must implement
> > some callback function to accept a LCD definition, and there must be
> > a list of DEs in the driver to make the association DE <-> LCD[i]
> > Some more problem may be raised if a user wants to have the same frame
> > buffer on the 2 LCDs of a DE.
>
> I have no idea what you're talking about, sorry.
Here is the DT (I am using back 'CRTC'):
de: display-controller at xxx {
...
};
crtc0: crt-controller at xxx{
...
display-controller = <>;
ports {
... /* to the crtc0 connectors */
}
};
crtc1: crt-controller at xxx{
...
display-controller = <>;
ports {
... /* to the crtc1 connectors */
};
};
There are 2 DRM devices: one on crtc0, the other one on crtc1.
The DE device is isolated. But, to treat the planes, it must receive
information about the CRTCs. How?
> > Anyway, my solution is already used in the IMX Soc.
> > See 'display-subsystem' in arch/arm/boot/dts/imx6q.dtsi for an example.
>
> Pointing out random example in the tree doesn't make a compelling
> argument.
This is not a random example. There was a thread about the 'ports'
phandle in the DT definition of the IMX video subsystem, and what kind
of OF function should be used (see one of my previous mails). In the DRI
list, nobody objected about the phandle by itself.
> > > > > > > Panel functions? In the CRTC driver?
> > > > > >
> > > > > > Yes, dumb panel.
> > > > >
> > > > > What do you mean by that? Using a Parallel/RGB interface?
> > > >
> > > > Sorry, I though this was a well-known name. The 'dump panel' was used
> > > > in the documentation of my previous ARM machine as the video frame sent
> > > > to the HDMI controller. 'video_frame' is OK for you?
> > >
> > > If it's the frame sent to the encoder, then it would be the CRTC by
> > > DRM's nomenclature.
> >
> > The CRTC is a software entity. The frame buffer is a hardware entity.
>
> Why are you about framebuffer now, this is nowhere in that
> discussion. Any way, the framebuffer is also what is put in a plane,
> so there's a name collision here, and you'll probably want to change
> it.
>
> Judging by the
[PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Mon, 7 Nov 2016 23:37:41 +0100
Maxime Ripard wrote:
> Hi,
>
> On Fri, Oct 28, 2016 at 07:34:20PM +0200, Jean-Francois Moine wrote:
> > On Fri, 28 Oct 2016 00:03:16 +0200
> > Maxime Ripard wrote:
[snip]
> > > > > We've been calling them bus and mod.
> > > >
> > > > I can understand "bus" (which is better than "apb"), but why "mod"?
> > >
> > > Allwinner has been calling the clocks that are supposed to generate
> > > the external signals (depending on where you were looking) module or
> > > mod clocks (which is also why we have mod in the clock
> > > compatibles). The module 1 clocks being used for the audio and the
> > > module 0 for the rest (SPI, MMC, NAND, display, etc.)
> >
> > I did not find any 'module' in the H3 documentation.
> > So, is it really a good name?
>
> It's true that they use it less nowadays, but they still do,
> ie.
> https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/drivers/clk/sunxi/clk-sun8iw7.c#L513
There is a 'mod' suffix, but it is used for the bus gates only, not for
the main clocks.
> And we have to remain consistent anyway.
I don't see any consistency in the H3 DT:
- the bus gates are named "ahb" and apb"
- the (main) clocks are named "mmc", "usb0_phy" and "ir"
There is no "bus" nor "mod".
> > > > > > +
> > > > > > +- resets: phandle to the reset of the device
> > > > > > +
> > > > > > +- ports: phandle's to the LCD ports
> > > > >
> > > > > Please use the OF graph.
> > > >
> > > > These ports are references to the graph of nodes. See
> > > > http://www.kernelhub.org/?msg=911825=2
> > >
> > > In an OF-graph, your phandle to the LCD controller would be replaced
> > > by an output endpoint.
> >
> > This is the DE controller. There is no endpoint link at this level.
>
> The display engine definitely has an endpoint: the TCON.
Not at all. The video chain is simply
CRTC (TCON) -> connector (HDMI/LCD/DAC/..)
The DE is an ancillary device which handles the planes.
> > The Device Engine just handles the planes of the LCDs, but, indeed,
> > the LCDs must know about the DE and the DE must know about the LCDs.
> > There are 2 ways to realize this knowledge in the DT:
> > 1) either the DE has one or two phandle's to the LCDs,
> > 2) or the LCDs have a phandle to the DE.
> >
> > I chose the 1st way, the DE ports pointing to the endpoint of the LCDs
> > which is part of the video link (OF-graph LCD <-> connector).
> > It would be possible to have phandles to the LCDs themselves, but this
> > asks for more code.
> >
> > The second way is also possible, but it also complexifies a bit the
> > exchanges DE <-> LCD.
>
> I'm still not sure how it would complexify anything, and why you can't
> use the display graph to model the relation between the display engine
> and the TCON (and why you want to use a generic property that refers
> to the of-graph while it really isn't).
Complexification:
1- my solution:
At startup time, the DE device is the DRM device. It has to know the
devices entering in the video chains.
The CRTCs (LCD/TCON) are found by
ports[i] -> parent
The connectors are found by
ports[i] -> endpoint -> remote_endpoint -> parent
2- with ports pointing to the LCDs:
The CRTCs (LCD/TCON) are simply
ports[i]
The connectors are found by
loop on all ports of ports[i]
ports[i][j] -> endpoint -> remote_endpoint -> parent
3- with a phandle to the DE in the LCDs:
The DE cannot be the DRM device because there is no information about
the video devices in the DT. Then, the DRM devices are the LCDs.
These LCDs must give their indices to the DE. So, the DE must implement
some callback function to accept a LCD definition, and there must be
a list of DEs in the driver to make the association DE <-> LCD[i]
Some more problem may be raised if a user wants to have the same frame
buffer on the 2 LCDs of a DE.
Anyway, my solution is already used in the IMX Soc.
See 'display-subsystem' in arch/arm/boot/dts/imx6q.dtsi for an example.
> > > > > > +void de2_disable_vblank(struct drm_device *drm, unsigned crtc)
> > > > > > +{
> > > > > > + struct priv *priv = drm->dev_private;
> > > > > > + struct lcd *lcd = priv->lcds[crtc];
> > > > > > +
> > > > > > + tcon_write(lcd->mmio, gint0,
> > > > &
[linux-sunxi] [PATCH v5 4/7] ASoC: sunxi: Add sun8i I2S driver
On Mon, 7 Nov 2016 21:05:05 +0100 Maxime Ripard wrote: > Hi, > > On Sun, Nov 06, 2016 at 07:02:48PM +0100, Jean-Francois Moine wrote: > > On Sun, 23 Oct 2016 09:33:16 +0800 > > Chen-Yu Tsai wrote: > > > > > On Fri, Oct 21, 2016 at 4:36 PM, Jean-Francois Moine > > > wrote: > > > > This patch adds I2S support to sun8i SoCs as the A83T and H3. > > > > > > > > Signed-off-by: Jean-Francois Moine > > > > --- > > > > Note: This driver is closed to the sun4i-i2s except that: > > > > - it handles the H3 > > > > > > If it's close to sun4i-i2s, you should probably rework that one to support > > > the newer SoCs. > > > > I started to add the H3 into the sun4i-i2s, but I am blocked with > > regmap. > > Many H3 registers are common with the A10, but some of them have more > > or less fields, the fields may be at different offsets. And, finally, > > some registers are completely different. > > This would not raise any problem, except with regmap which is really > > painful. > > That's weird, because regmap's regmap_field should make that much > easier. #define field_relaxed(addr, mask, val) \ writel_relaxed((readl_relaxed(addr) & mask) | val, addr) > > As I may understood, regmap is used to simplify suspend/resume, but, is > > it useful to save the I2S register on suspend? > > Practically, I am streaming some tune on my device. I suspend it for > > any reason. The next morning, I resume it. Are you sure I want to > > continue to hear the end of the tune? > > > > I better think that streaming should be simply stopped on suspend. > > You're mistaken. The code in there is for *runtime* suspend, ie when > the device is no longer used, so that case shouldn't even happen at > all. > > (And real suspend isn't supported anyway) Is it time to remove this useless code? > > Then, there is no need to save the playing registers, and, here I am, > > there is no need to use regmap. > > > > May I go this way? > > No, please don't. regmap is also providing very useful features, such > as access to all the registers through debugfs, or tracing. What > exactly feels painful to you? When the I/O registers are in memory (that's the case), you may access them (read and write) thru /dev/mem. Also, is a register access trace really needed in this driver? The pain is to define the regmap_config (which registers can be read/write/volatile and which can be the values the u-boot let us in the registers at startup time), and the lot of code which is run instead of simple load/store machine instructions. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[linux-sunxi] [PATCH v5 4/7] ASoC: sunxi: Add sun8i I2S driver
On Sun, 23 Oct 2016 09:33:16 +0800 Chen-Yu Tsai wrote: > On Fri, Oct 21, 2016 at 4:36 PM, Jean-Francois Moine > wrote: > > This patch adds I2S support to sun8i SoCs as the A83T and H3. > > > > Signed-off-by: Jean-Francois Moine > > --- > > Note: This driver is closed to the sun4i-i2s except that: > > - it handles the H3 > > If it's close to sun4i-i2s, you should probably rework that one to support > the newer SoCs. I started to add the H3 into the sun4i-i2s, but I am blocked with regmap. Many H3 registers are common with the A10, but some of them have more or less fields, the fields may be at different offsets. And, finally, some registers are completely different. This would not raise any problem, except with regmap which is really painful. As I may understood, regmap is used to simplify suspend/resume, but, is it useful to save the I2S register on suspend? Practically, I am streaming some tune on my device. I suspend it for any reason. The next morning, I resume it. Are you sure I want to continue to hear the end of the tune? I better think that streaming should be simply stopped on suspend. Then, there is no need to save the playing registers, and, here I am, there is no need to use regmap. May I go this way? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Fri, 28 Oct 2016 00:03:16 +0200
Maxime Ripard wrote:
> On Tue, Oct 25, 2016 at 04:14:41PM +0200, Jean-Francois Moine wrote:
> > > > +Display controller
> > > > +==
> > > > +
> > > > +Required properties:
> > > > +
> > > > +- compatible: value should be one of the following
> > > > + "allwinner,sun8i-a83t-display-engine"
> > > > + "allwinner,sun8i-h3-display-engine"
> > > > +
> > > > +- clocks: must include clock specifiers corresponding to entries in the
> > > > + clock-names property.
> > > > +
> > > > +- clock-names: must contain
> > > > + "gate": for DE activation
> > > > + "clock": DE clock
> > >
> > > We've been calling them bus and mod.
> >
> > I can understand "bus" (which is better than "apb"), but why "mod"?
>
> Allwinner has been calling the clocks that are supposed to generate
> the external signals (depending on where you were looking) module or
> mod clocks (which is also why we have mod in the clock
> compatibles). The module 1 clocks being used for the audio and the
> module 0 for the rest (SPI, MMC, NAND, display, etc.)
I did not find any 'module' in the H3 documentation.
So, is it really a good name?
> > > > +
> > > > +- resets: phandle to the reset of the device
> > > > +
> > > > +- ports: phandle's to the LCD ports
> > >
> > > Please use the OF graph.
> >
> > These ports are references to the graph of nodes. See
> > http://www.kernelhub.org/?msg=911825=2
>
> In an OF-graph, your phandle to the LCD controller would be replaced
> by an output endpoint.
This is the DE controller. There is no endpoint link at this level.
The Device Engine just handles the planes of the LCDs, but, indeed,
the LCDs must know about the DE and the DE must know about the LCDs.
There are 2 ways to realize this knowledge in the DT:
1) either the DE has one or two phandle's to the LCDs,
2) or the LCDs have a phandle to the DE.
I chose the 1st way, the DE ports pointing to the endpoint of the LCDs
which is part of the video link (OF-graph LCD <-> connector).
It would be possible to have phandles to the LCDs themselves, but this
asks for more code.
The second way is also possible, but it also complexifies a bit the
exchanges DE <-> LCD.
> > [snip]
> > > > +struct tcon {
> > > > + u32 gctl;
> > > > +#defineTCON_GCTL_TCON_En BIT(31)
[snip]
> > > > + u32 fill_ctl; /* 0x300 */
> > > > + u32 fill_start0;
> > > > + u32 fill_end0;
> > > > + u32 fill_data0;
> > > > +};
> > >
> > > Please use defines instead of the structures.
> >
> > I think that structures are more readable.
>
> That's not really the point. No one in the kernel uses it (and even
> you use defines for registers offset in some places of that
> patch). And then you have André arguments.
I am not convinced, but I'll do as you said.
> > > > +void de2_disable_vblank(struct drm_device *drm, unsigned crtc)
> > > > +{
> > > > + struct priv *priv = drm->dev_private;
> > > > + struct lcd *lcd = priv->lcds[crtc];
> > > > +
> > > > + tcon_write(lcd->mmio, gint0,
> > > > +tcon_read(lcd->mmio, gint0) &
> > > > + ~TCON_GINT0_TCON1_Vb_Int_En);
> > > > +}
> > > > +
> > > > +/* panel functions */
> > >
> > > Panel functions? In the CRTC driver?
> >
> > Yes, dumb panel.
>
> What do you mean by that? Using a Parallel/RGB interface?
Sorry, I though this was a well-known name. The 'dump panel' was used
in the documentation of my previous ARM machine as the video frame sent
to the HDMI controller. 'video_frame' is OK for you?
[snip]
> > > > + ret = clk_prepare_enable(lcd->clk);
> > > > + if (ret)
> > > > + goto err2;
> > >
> > > Is there any reason not to do that in the enable / disable? Leaving
> > > clocks running while the device has no guarantee that it's going to be
> > > used seems like a waste of resources.
> >
> > If the machine does not need video (network server, router..), it is simpler
> > to prevent the video driver to be loade
[linux-sunxi] [PATCH v5 2/7] ASoC: sunxi: Add a simple HDMI CODEC
On Fri, 28 Oct 2016 00:54:34 +0800 Chen-Yu Tsai wrote: > There's already a driver for basically the same thing: > > sound/soc/codec/hdmi-codec.c > > You use it by registering a sub-device from your hdmi driver, with the > proper platform_data and callbacks. Grep for HDMI_CODEC_DRV_NAME for > platforms already using it. I know that for a long time, and I will not use it on any account: it is a gasworks! -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[alsa-devel] [linux-sunxi] [PATCH v5 4/7] ASoC: sunxi: Add sun8i I2S driver
On Mon, 24 Oct 2016 14:34:49 +0200 Maxime Ripard wrote: > Hi, > > On Sun, Oct 23, 2016 at 09:45:03AM +0200, Jean-Francois Moine wrote: > > On Sun, 23 Oct 2016 09:33:16 +0800 > > Chen-Yu Tsai wrote: > > > > > > Note: This driver is closed to the sun4i-i2s except that: > > > > - it handles the H3 > > > > > > If it's close to sun4i-i2s, you should probably rework that one to support > > > the newer SoCs. > > > > > > > - it creates the sound card (with sun4i-i2s, the sound card is created > > > > by the CODECs) > > > > > > I think this is wrong. I2S is only the DAI. You typically have a separate > > > platform driver for the whole card, or just use simple-card. > > > > An other device is not needed. The layout is simple: > > I2S_controller (CPU DAI) <-> HDMI_CODEC (CODEC DAI) > > The HDMI CODEC is supported by the HDMI video driver (only one device), > > so, it cannot be the card device. > > ASoC does not use the CPU DAI device (I2S_controller), so, it is > > natural to use it to handle the card. > > Still, duplicating the driver is not the solution. I agree with > Chen-Yu that we want to leverage the driver that is already there. Hi Maxime and Chen-Yu, After looking at the sun4i-i2s, I found 2 solutions for re-using its code in the DE2 HDMI context: 1) either to split the sun4i-i2s driver into common I/O functions and slave CPU DAI, 2) or to move the sun4i-i2s into a master CPU DAI. ( some explanation about 'master' and 'slave': the master is the component the device of which is also the sound card. As the sound card uses the 'drvdata' of the device, this drvdata pointer cannot be used by the master. In the actual implementations: - sun4i-i2s master: card dev = codec dev, drvdata -> card slave: i2s dev (CPU DAI), drvdata -> i2s data - sun8i-i2s master: card dev = i2s dev (CPU DAI), drvdata -> card slave: codec dev (hdmi), drvdata -> codec data (audio/video) ) In the case 1, there is no functional change, just a source split. The sun8i-i2s will then use the common I/O functions. In the case 2, the CODECs using the sun4i-i2s would have to move to slave CODEC DAI, i.e. the card is created by the sun4i-i2s code. In the 4.9, there is only one codec (sun4i-codec), so, the change is just to move the card creation and the use of drvdata in both codes. In either cases, I could not check if this changes raise some regression on the sun4i SoCs side. Then, I'd be glad to know: - which solution suits you? - are you ready to do and test the needed changes at the sun4i side? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Tue, 25 Oct 2016 08:44:22 +0200 Daniel Vetter wrote: > > + /* start the subdevices */ > > + ret = component_bind_all(dev, drm); > > + if (ret < 0) > > + goto out2; > > + > > + ret = drm_dev_register(drm, 0); > > This needs to be the very last step in your driver load sequence. > Kerneldoc explains why. Similar, but inverted for unloading: > drm_dev_unregister is the very first thing you must call. Thanks, and also for embedding the drm device. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Mon, 24 Oct 2016 16:04:19 +0200
Maxime Ripard wrote:
> Hi,
Hi Maxime,
> On Fri, Oct 21, 2016 at 09:26:18AM +0200, Jean-Francois Moine wrote:
> > Allwinner's recent SoCs, as A64, A83T and H3, contain a new display
> > engine, DE2.
> > This patch adds a DRM video driver for this device.
> >
> > Signed-off-by: Jean-Francois Moine
>
> Output from checkpatch:
> total: 0 errors, 20 warnings, 83 checks, 1799 lines checked
>
> > ---
> > .../bindings/display/sunxi/sunxi-de2.txt | 83 +++
> > drivers/gpu/drm/Kconfig| 2 +
> > drivers/gpu/drm/Makefile | 1 +
> > drivers/gpu/drm/sunxi/Kconfig | 21 +
> > drivers/gpu/drm/sunxi/Makefile | 7 +
> > drivers/gpu/drm/sunxi/de2_crtc.c | 475 +
> > drivers/gpu/drm/sunxi/de2_crtc.h | 63 +++
> > drivers/gpu/drm/sunxi/de2_de.c | 591
> > +
> > drivers/gpu/drm/sunxi/de2_drm.h| 47 ++
> > drivers/gpu/drm/sunxi/de2_drv.c| 378 +
> > drivers/gpu/drm/sunxi/de2_plane.c | 119 +
> > 11 files changed, 1787 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
> > create mode 100644 drivers/gpu/drm/sunxi/Kconfig
> > create mode 100644 drivers/gpu/drm/sunxi/Makefile
> > create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
> > create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
> > create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
> > create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
> > create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
> > create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
> >
> > diff --git a/Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
> > b/Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
> > new file mode 100644
> > index 000..f9cd67a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
> > @@ -0,0 +1,83 @@
> > +Allwinner sunxi Display Engine 2 subsystem
> > +==
> > +
> > +The sunxi DE2 subsystem contains a display controller (DE2),
>
> sunxi is a made up name, and doesn't really mean anything. You can
> call it either sun8i (because it was introduced in that family).
OK.
> > +one or two LCD controllers (TCON) and their external interfaces.
> > +
> > +Display controller
> > +==
> > +
> > +Required properties:
> > +
> > +- compatible: value should be one of the following
> > + "allwinner,sun8i-a83t-display-engine"
> > + "allwinner,sun8i-h3-display-engine"
> > +
> > +- clocks: must include clock specifiers corresponding to entries in the
> > + clock-names property.
> > +
> > +- clock-names: must contain
> > + "gate": for DE activation
> > + "clock": DE clock
>
> We've been calling them bus and mod.
I can understand "bus" (which is better than "apb"), but why "mod"?
> > +
> > +- resets: phandle to the reset of the device
> > +
> > +- ports: phandle's to the LCD ports
>
> Please use the OF graph.
These ports are references to the graph of nodes. See
http://www.kernelhub.org/?msg=911825=2
[snip]
> > diff --git a/drivers/gpu/drm/sunxi/de2_crtc.c
> > b/drivers/gpu/drm/sunxi/de2_crtc.c
> > new file mode 100644
> > index 000..dae0fab
> > --- /dev/null
> > +++ b/drivers/gpu/drm/sunxi/de2_crtc.c
> > @@ -0,0 +1,475 @@
> > +/*
> > + * Allwinner DRM driver - DE2 CRTC
> > + *
> > + * Copyright (C) 2016 Jean-Francois Moine
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include "de2_drm.h"
> > +#include "de2_crtc.h"
> > +
> > +/* I/O map */
> > +
> > +struct tcon {
> > + u32 gctl;
> > +#defineTCON_GCTL_TCON_En BIT(31)
> > + u32 gint0;
> > +#defineTCON_GINT0_TCON1_Vb_Int_En
[linux-sunxi] [PATCH v5 4/7] ASoC: sunxi: Add sun8i I2S driver
On Sun, 23 Oct 2016 09:33:16 +0800 Chen-Yu Tsai wrote: > > Note: This driver is closed to the sun4i-i2s except that: > > - it handles the H3 > > If it's close to sun4i-i2s, you should probably rework that one to support > the newer SoCs. > > > - it creates the sound card (with sun4i-i2s, the sound card is created > > by the CODECs) > > I think this is wrong. I2S is only the DAI. You typically have a separate > platform driver for the whole card, or just use simple-card. An other device is not needed. The layout is simple: I2S_controller (CPU DAI) <-> HDMI_CODEC (CODEC DAI) The HDMI CODEC is supported by the HDMI video driver (only one device), so, it cannot be the card device. ASoC does not use the CPU DAI device (I2S_controller), so, it is natural to use it to handle the card. Otherwise, the simple-card asks for a node definition in the DT and this node is a pure Linux software entity. On the other side, the simple-graph-card from Kuninori is not useful for this simple case. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[linux-sunxi] [PATCH v5 0/7] ARM: ASoC: drm: sun8i: Add DE2 HDMI audio and video
On Sun, 23 Oct 2016 09:38:04 +0800 Chen-Yu Tsai wrote: > > Recently, an announce about Tina OS for the R series > > https://www.youtube.com/watch?v=h7KD-6HblAU > > was followed by the upload of a new linux-3.4 source tree > > https://github.com/tinalinux/linux-3.4 > > with files containing GPL headers. > > > > Well, I don't know if these sources are really from Allwinner, but > > anyway, this is the opportunity to propose a new version of my DRM > > HDMI driver. > > Could you clarify about this bit? Did you just clean up Allwinner's > existing drivers? Or just use them as reference? Either way I think > this deserves some mention in all your copyright headers. > > Otherwise what difference does the new release make? - Allwinner's video driver is not DRM. - their driver has no hardware cursor nor video overlay. - I wrote the video DRM driver from the document Allwinner_H3_Datasheet_V1.2.pdf and the structures defined in linux-3.4/drivers/video/sunxi/disp2/disp/de/lowlevel_sun8iw7/de_rtmx.h Reading Allwinner's code helped me to understand how the DE2 is working. - my lowlevel HDMI is just a cleanup of theirs with explanations about the registers. Magic constants remain due to the lack of knowledge about the PHYs. - the mention of Allwinner in the copyright headers is needed to indicate the source of the structures (DE2) and code (HDMI). The main difference is the DRM interface and the use of the EDID, permitting dynamic video resolution change with xrandr. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v5 0/7] ARM: ASoC: drm: sun8i: Add DE2 HDMI audio and video
This patchset series adds HDMI audio and video support to the Allwinner sun8i SoCs which include the display engine 2 (DE2). A first submission in January for video on the H3 could not enter into the mainline kernel due to the lack of license headers in Allwinner's sources. Recently, an announce about Tina OS for the R series https://www.youtube.com/watch?v=h7KD-6HblAU was followed by the upload of a new linux-3.4 source tree https://github.com/tinalinux/linux-3.4 with files containing GPL headers. Well, I don't know if these sources are really from Allwinner, but anyway, this is the opportunity to propose a new version of my DRM HDMI driver. v5: - add overlay plane - add audio support - add support for the A83T - add back the HDMI driver - many bug fixes v4: - drivers/clk/sunxi/Makefile was missing (Emil Velikov) v3: - add the hardware cursor - simplify and fix the DE2 init sequences - generation for all SUNXI SoCs (Andre Przywara) v2: - remove the HDMI driver - remarks from Chen-Yu Tsai and Russell King - DT documentation added Jean-Francois Moine (7): drm: sunxi: Add a basic DRM driver for Allwinner DE2 ASoC: sunxi: Add a simple HDMI CODEC drm: sunxi: add DE2 HDMI support ASoC: sunxi: Add sun8i I2S driver ARM: dts: sun8i-h3: add HDMI audio and video nodes ARM: dts: sun8i-h3: Add HDMI audio and video to the Banana Pi M2+ ARM: dts: sun8i-h3: Add HDMI audio and video to the Orange PI 2 .../devicetree/bindings/display/sunxi/hdmi.txt | 52 ++ .../bindings/display/sunxi/sunxi-de2.txt | 83 ++ .../devicetree/bindings/sound/sun4i-i2s.txt| 38 +- arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts| 17 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 17 + arch/arm/boot/dts/sun8i-h3.dtsi| 67 ++ drivers/gpu/drm/Kconfig| 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sunxi/Kconfig | 29 + drivers/gpu/drm/sunxi/Makefile | 9 + drivers/gpu/drm/sunxi/de2_crtc.c | 475 +++ drivers/gpu/drm/sunxi/de2_crtc.h | 63 ++ drivers/gpu/drm/sunxi/de2_de.c | 591 + drivers/gpu/drm/sunxi/de2_drm.h| 47 ++ drivers/gpu/drm/sunxi/de2_drv.c| 378 + drivers/gpu/drm/sunxi/de2_hdmi.c | 396 + drivers/gpu/drm/sunxi/de2_hdmi.h | 40 + drivers/gpu/drm/sunxi/de2_hdmi_io.c| 927 + drivers/gpu/drm/sunxi/de2_hdmi_io.h| 25 + drivers/gpu/drm/sunxi/de2_plane.c | 119 +++ include/sound/sunxi_hdmi.h | 23 + sound/soc/codecs/Kconfig | 9 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/sunxi-hdmi.c | 106 +++ sound/soc/sunxi/Kconfig| 8 + sound/soc/sunxi/Makefile | 3 + sound/soc/sunxi/sun8i-i2s.c| 700 27 files changed, 4222 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt create mode 100644 Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt create mode 100644 drivers/gpu/drm/sunxi/Kconfig create mode 100644 drivers/gpu/drm/sunxi/Makefile create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h create mode 100644 drivers/gpu/drm/sunxi/de2_de.c create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.c create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.h create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_io.c create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_io.h create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c create mode 100644 include/sound/sunxi_hdmi.h create mode 100644 sound/soc/codecs/sunxi-hdmi.c create mode 100644 sound/soc/sunxi/sun8i-i2s.c -- 2.10.1
[PATCH v5 7/7] ARM: dts: sun8i-h3: Add HDMI audio and video to the Orange PI 2
Signed-off-by: Jean-Francois Moine
---
The same patch may be applied to other H3 based boards (Orange PI xx).
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index e5bcaba..799ceb9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -56,6 +56,7 @@
serial0 =
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
ethernet1 =
+ lcd0 =
};
chosen {
@@ -105,16 +106,32 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
--
2.10.1
[PATCH v5 6/7] ARM: dts: sun8i-h3: Add HDMI audio and video to the Banana Pi M2+
Signed-off-by: Jean-Francois Moine
---
The patch for the Banana Pi M3 (A83T) is the same as this one.
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 06fddaa..2e81de8 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -55,6 +55,7 @@
aliases {
serial0 =
serial1 =
+ lcd0 =
};
chosen {
@@ -93,6 +94,10 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
@@ -101,12 +106,24 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
--
2.10.1
[PATCH 2/4] drm/i2c: tda998x: Remove obsolete drm_connector_register() call
On Wed, Oct 19, 2016 at 12:19:30PM +0300, Laurent Pinchart wrote: (sorry, I lost your original mail) > >>> DRM bridges indeed don't create encoders. That task is left to the display > >>> driver. The reason is the same as above: bridges can be chained (including > >>> with an internal encoder that is not modelled as a bridge, and that's a > >>> case > >>> we have today), while the KMS model exposes a single encoder to userspace. > >>> Exposing DRM encoder objects as part of the KMS UABI was probably a > >>> mistake. > >>> Better solutions would have been to expose no encoder at all or all > >>> encoders > >>> in the chain. We are however stuck with this model as we can't break the > >>> UABI. > >>> For that reason a DRM encoder object doesn't represent an encoder but a > >>> chain > >>> of encoders. As a DRM bridge models a single encoder, the DRM encoder > >>> object > >>> must be created at a higher level, in the display driver. I wonder why you created 'bridge's instead of simply adding links to the encoders? (that's what ASoC did: the audio CODECs are linked) This way, in simple cases (most cases), there would have been crtc -> (encoder -> connector) instead of crtc -> (bridge + encoder) -> (bridge + connector) without any changes in the actual (encoder + connector)s. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH 2/4] drm/i2c: tda998x: Remove obsolete drm_connector_register() call
On Thu, 20 Oct 2016 16:56:44 +0530 Archit Taneja wrote: > > Please show _technically_ how this would work. I want to see code or > > pseudo-code illustrating how a "foreign" DRM encoder could be used with > > either dw-hdmi or tda998x, because right now I can't see any way that > > could work. > > This is something we already do with the adv7511 bridge driver on msm, > rcar and arc (for 4.9) drivers. > > I've shared pseudo code on the kms driver and encoder chip's driver > side. I've also shared a diff that converts the tda998x driver to use > drm_bridge(uncompiled/untested). > > 1) Kms driver side: > > /* > * Create an encoder instance. Depending on the hardware represented > * by the KMS driver, the encoder can ops can either have some > * functionality, or be nops. In the case of tilcdc, the encoder > * funcs would be mostly nops. > */ > drm_encoder_helper_add(_priv->encoder, _encoder_helper_funcs); > drm_encoder_init(kms_pirv->drm, _priv->encoder, _encoder_funcs, >type, NULL); Then, how does this 'kms_priv' know the type of the encoder, this one being tied to the connector type at the end of the bridge chain? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v5 5/7] ARM: dts: sun8i-h3: add HDMI audio and video nodes
Signed-off-by: Jean-Francois Moine
---
The patch for the A83T DT is not included in this patchset because
the clock driver sunxi-ng does not support the A83T clocks.
---
arch/arm/boot/dts/sun8i-h3.dtsi | 67 +
1 file changed, 67 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 75a8654..869f3be 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -140,6 +140,16 @@
#size-cells = <1>;
ranges;
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ reg = <0x0100 0x40>;
+ clocks = < CLK_BUS_DE>, < CLK_DE>;
+ clock-names = "gate", "clock";
+ resets = < RST_BUS_DE>;
+ ports = <_p>;
+ status = "disabled";
+ };
+
dma: dma-controller at 01c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
@@ -149,6 +159,23 @@
#dma-cells = <1>;
};
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-a83t-lcd";
+ reg = <0x01c0c000 0x400>;
+ clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+ clock-names = "gate", "clock";
+ resets = < RST_BUS_TCON0>;
+ interrupts = ;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_hdmi: endpoint {
+ remote-endpoint = <_lcd0>;
+ };
+ };
+ };
+
mmc0: mmc at 01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@@ -439,6 +466,22 @@
status = "disabled";
};
+ i2s2: i2s at 1c22800 {
+ compatible = "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22800 0x60>;
+ clocks = < CLK_I2S2>;
+ clock-names = "mod";
+ resets = < RST_BUS_I2S2>;
+ dmas = < 27>;
+ dma-names = "tx";
+ status = "disabled";
+ port {
+ i2s2_hdmi: endpoint {
+ remote-endpoint = <_i2s2>;
+ };
+ };
+ };
+
uart0: serial at 01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
@@ -541,6 +584,30 @@
interrupts = ;
};
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-h3-hdmi";
+ reg = <0x01ee 0x2>;
+ clocks = < CLK_HDMI>, < CLK_HDMI_DDC>;
+ clock-names = "clock", "ddc-clock";
+ resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ hdmi_lcd0: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ hdmi_i2s2: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ };
+
rtc: rtc at 01f0 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f0 0x54>;
--
2.10.1
[PATCH v5 4/7] ASoC: sunxi: Add sun8i I2S driver
This patch adds I2S support to sun8i SoCs as the A83T and H3.
Signed-off-by: Jean-Francois Moine
---
Note: This driver is closed to the sun4i-i2s except that:
- it handles the H3
- it creates the sound card (with sun4i-i2s, the sound card is created
by the CODECs)
---
.../devicetree/bindings/sound/sun4i-i2s.txt| 38 +-
sound/soc/sunxi/Kconfig| 8 +
sound/soc/sunxi/Makefile | 3 +
sound/soc/sunxi/sun8i-i2s.c| 700 +
4 files changed, 744 insertions(+), 5 deletions(-)
create mode 100644 sound/soc/sunxi/sun8i-i2s.c
diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
index 7b526ec..2fb0a7a 100644
--- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
@@ -1,4 +1,4 @@
-* Allwinner A10 I2S controller
+* Allwinner A10/A38T/H3 I2S controller
The I2S bus (Inter-IC sound bus) is a serial link for digital
audio data transfer between devices in the system.
@@ -6,20 +6,30 @@ audio data transfer between devices in the system.
Required properties:
- compatible: should be one of the followings
- - "allwinner,sun4i-a10-i2s"
+ - "allwinner,sun4i-a10-i2s"
+ "allwinner,sun8i-a83t-i2s"
+ "allwinner,sun8i-h3-i2s"
- reg: physical base address of the controller and length of memory mapped
region.
-- interrupts: should contain the I2S interrupt.
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
-- dma-names: should include "tx" and "rx".
+- dma-names: must include "tx" and/or "rx".
- clocks: a list of phandle + clock-specifer pairs, one for each entry in
clock-names.
- clock-names: should contain followings:
- "apb" : clock for the I2S bus interface
- "mod" : module clock for the I2S controller
- #sound-dai-cells : Must be equal to 0
-Example:
+Optional properties:
+
+- interrupts: I2S interrupt
+- resets: phandle to the reset of the device
+
+Required nodes:
+
+ - port: link to the associated CODEC (DAC, HDMI...)
+
+Example 1:
i2s0: i2s at 01c22400 {
#sound-dai-cells = <0>;
@@ -32,3 +42,21 @@ i2s0: i2s at 01c22400 {
< SUN4I_DMA_NORMAL 3>;
dma-names = "rx", "tx";
};
+
+Example 2:
+
+i2s2: i2s at 1c22800 {
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22800 0x60>;
+ clocks = < CLK_BUS_I2S2>, < CLK_I2S2>;
+ clock-names = "apb", "mod";
+ resets = < RST_I2S2>;
+ dmas = < 27>;
+ dma-names = "tx";
+ status = "disabled";
+ port {
+ i2s2_hdmi: endpoint {
+ remote-endpoint = <_i2s2>;
+ };
+ };
+};
diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
index dd23682..d89b2da 100644
--- a/sound/soc/sunxi/Kconfig
+++ b/sound/soc/sunxi/Kconfig
@@ -26,4 +26,12 @@ config SND_SUN4I_SPDIF
help
Say Y or M to add support for the S/PDIF audio block in the Allwinner
A10 and affiliated SoCs.
+
+config SND_SUN8I_I2S
+ tristate "Allwinner sun8i I2S Support"
+ depends on OF
+ select SND_SOC_GENERIC_DMAENGINE_PCM
+ help
+ Say Y or M if you want to add support for SoC audio on
+ Allwinner sun8i boards.
endmenu
diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
index 604c7b84..bcb871b 100644
--- a/sound/soc/sunxi/Makefile
+++ b/sound/soc/sunxi/Makefile
@@ -1,3 +1,6 @@
obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
+
+snd-soc-sun8i-i2s-objs := sun8i-i2s.o
+obj-$(CONFIG_SND_SUN8I_I2S) += snd-soc-sun8i-i2s.o
diff --git a/sound/soc/sunxi/sun8i-i2s.c b/sound/soc/sunxi/sun8i-i2s.c
new file mode 100644
index 000..ba15d62
--- /dev/null
+++ b/sound/soc/sunxi/sun8i-i2s.c
@@ -0,0 +1,700 @@
+/*
+ * Allwinner sun8i I2S sound card
+ *
+ * Copyright (C) 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* --- hardware --- */
+
+#define I2S_CTL0x00
+ /* common */
+ #define I2S_CTL_SDO3EN BIT(11)
+ #define I2S_CTL_SDO2EN BIT(10)
+ #define I2S_CTL_SDO1EN BIT(9)
+ #define I2S_CTL_SDO0EN BIT(8)
+ #define I2S_CTL_
[PATCH v5 3/7] drm: sunxi: add DE2 HDMI support
This patch adds a HDMI driver to the DE2 based Allwinner's SoCs
as A83T and H3.
Audio and video are supported.
Signed-off-by: Jean-Francois Moine
---
.../devicetree/bindings/display/sunxi/hdmi.txt | 52 ++
drivers/gpu/drm/sunxi/Kconfig | 8 +
drivers/gpu/drm/sunxi/Makefile | 2 +
drivers/gpu/drm/sunxi/de2_hdmi.c | 396 +
drivers/gpu/drm/sunxi/de2_hdmi.h | 40 +
drivers/gpu/drm/sunxi/de2_hdmi_io.c| 927 +
drivers/gpu/drm/sunxi/de2_hdmi_io.h| 25 +
7 files changed, 1450 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.h
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_io.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_io.h
diff --git a/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
new file mode 100644
index 000..0558c07
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
@@ -0,0 +1,52 @@
+Allwinner HDMI Transmitter
+==
+
+The Allwinner HDMI transmitters are included in the SoCs.
+They support audio and video.
+
+Required properties:
+ - #address-cells : should be <1>
+ - #size-cells : should be <0>
+ - compatible : should be
+ "allwinner,sun8i-a83t-hdmi" or
+ "allwinner,sun8i-h3-hdmi"
+ - clocks : phandles to the HDMI clocks as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
+ - clock-names : must be
+ "gate" : bus gate
+ "clock" : streaming clock
+ "ddc-clock" : DDC clock
+ - resets : One or two phandles to the HDMI resets
+ - reset-names : must be
+ "hdmi0" and "hdmi1"
+
+Required nodes:
+ - port: Audio and video input port nodes with endpoint definitions
+ as defined in Documentation/devicetree/bindings/graph.txt.
+
+Example:
+
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-a83t-hdmi";
+ reg = <0x01ee 0x2>;
+ clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
+< CLK_HDMI_DDC>;
+ clock-names = "gate", "clock", "ddc-clock";
+ resets = < RST_HDMI0>, < RST_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 { /* video */
+ reg = <0>;
+ hdmi_lcd1: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ port at 1 { /* audio */
+ reg = <1>;
+ hdmi_i2s2: endpoint {
+ remote-endpoint = <_hdmi>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/sunxi/Kconfig b/drivers/gpu/drm/sunxi/Kconfig
index 56bde2e..4c82153 100644
--- a/drivers/gpu/drm/sunxi/Kconfig
+++ b/drivers/gpu/drm/sunxi/Kconfig
@@ -19,3 +19,11 @@ config DRM_SUNXI_DE2
Choose this option if your Allwinner chipset has the DE2 interface
as the A64, A83T and H3. If M is selected the module will be called
sunxi-de2-drm.
+
+config DRM_SUNXI_DE2_HDMI
+ tristate "Support for DE2 HDMI"
+ depends on DRM_SUNXI_DE2
+ select SND_SOC_SUNXI_HDMI if SND_SOC
+ help
+ Choose this option if you use want HDMI on DE2.
+ If M is selected the module will be called sunxi-de2-hdmi.
diff --git a/drivers/gpu/drm/sunxi/Makefile b/drivers/gpu/drm/sunxi/Makefile
index 62220cb..a268069 100644
--- a/drivers/gpu/drm/sunxi/Makefile
+++ b/drivers/gpu/drm/sunxi/Makefile
@@ -3,5 +3,7 @@
#
sunxi-de2-drm-objs := de2_drv.o de2_de.o de2_crtc.o de2_plane.o
+sunxi-de2-hdmi-objs := de2_hdmi.o de2_hdmi_io.o
obj-$(CONFIG_DRM_SUNXI_DE2) += sunxi-de2-drm.o
+obj-$(CONFIG_DRM_SUNXI_DE2_HDMI) += sunxi-de2-hdmi.o
diff --git a/drivers/gpu/drm/sunxi/de2_hdmi.c b/drivers/gpu/drm/sunxi/de2_hdmi.c
new file mode 100644
index 000..a2324cc
--- /dev/null
+++ b/drivers/gpu/drm/sunxi/de2_hdmi.c
@@ -0,0 +1,396 @@
+/*
+ * Allwinner DRM driver - HDMI
+ *
+ * Copyright (C) 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#inclu
[PATCH v5 2/7] ASoC: sunxi: Add a simple HDMI CODEC
Allwinner's SoCs include support for both audio and video on HDMI.
This patch defines a simple audio CODEC which may be used in sunxi
HDMI video drivers.
Signed-off-by: Jean-Francois Moine
---
include/sound/sunxi_hdmi.h| 23 +
sound/soc/codecs/Kconfig | 9
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/sunxi-hdmi.c | 106 ++
4 files changed, 140 insertions(+)
create mode 100644 include/sound/sunxi_hdmi.h
create mode 100644 sound/soc/codecs/sunxi-hdmi.c
diff --git a/include/sound/sunxi_hdmi.h b/include/sound/sunxi_hdmi.h
new file mode 100644
index 000..0986bb9
--- /dev/null
+++ b/include/sound/sunxi_hdmi.h
@@ -0,0 +1,23 @@
+#ifndef __SUNXI_HDMI_H__
+#define __SUNXI_HDMI_H__
+/*
+ * Copyright (C) 2016 Jean-François Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+struct sunxi_hdmi_codec {
+ u8 *eld;
+ int (*set_audio_input)(struct device *dev,
+ int enable,
+ unsigned sample_rate,
+ unsigned sample_bit);
+};
+
+int sunxi_hdmi_codec_register(struct device *dev);
+void sunxi_hdmi_codec_unregister(struct device *dev);
+
+#endif /* __SUNXI_HDMI_H__ */
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index c67667b..53385b1 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -131,6 +131,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_STA529 if I2C
select SND_SOC_STAC9766 if SND_SOC_AC97_BUS
select SND_SOC_STI_SAS
+ select SND_SOC_SUNXI_HDMI
select SND_SOC_TAS2552 if I2C
select SND_SOC_TAS5086 if I2C
select SND_SOC_TAS571X if I2C
@@ -793,6 +794,14 @@ config SND_SOC_STAC9766
config SND_SOC_STI_SAS
tristate "codec Audio support for STI SAS codec"
+config SND_SOC_SUNXI_HDMI
+ tristate "Allwinner sunxi HDMI Support"
+ default m if DRM_SUNXI_DE2_HDMI=m
+ default y if DRM_SUNXI_DE2_HDMI=y
+ select SND_PCM_ELD
+ help
+ Enable HDMI audio output
+
config SND_SOC_TAS2552
tristate "Texas Instruments TAS2552 Mono Audio amplifier"
depends on I2C
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 958cd49..35804eb 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -139,6 +139,7 @@ snd-soc-sta350-objs := sta350.o
snd-soc-sta529-objs := sta529.o
snd-soc-stac9766-objs := stac9766.o
snd-soc-sti-sas-objs := sti-sas.o
+snd-soc-sunxi-hdmi-objs := sunxi-hdmi.o
snd-soc-tas5086-objs := tas5086.o
snd-soc-tas571x-objs := tas571x.o
snd-soc-tas5720-objs := tas5720.o
@@ -359,6 +360,7 @@ obj-$(CONFIG_SND_SOC_STA350) += snd-soc-sta350.o
obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
obj-$(CONFIG_SND_SOC_STI_SAS) += snd-soc-sti-sas.o
+obj-$(CONFIG_SND_SOC_SUNXI_HDMI) += snd-soc-sunxi-hdmi.o
obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
diff --git a/sound/soc/codecs/sunxi-hdmi.c b/sound/soc/codecs/sunxi-hdmi.c
new file mode 100644
index 000..0d08676
--- /dev/null
+++ b/sound/soc/codecs/sunxi-hdmi.c
@@ -0,0 +1,106 @@
+/*
+ * Allwinner HDMI codec
+ *
+ * Copyright (C) 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "sound/sunxi_hdmi.h"
+
+#define SUNXI_HDMI_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
+ SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_3LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+static int sunxi_hdmi_codec_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct sunxi_hdmi_codec *priv = dev_get_drvdata(dai->dev);
+ u8 *eld;
+
+ eld = priv->eld;
+ if (!eld)
+ return -ENODEV;
+
+ return snd_pcm_hw_constraint_eld(runtime, eld);
+}
+
+static int sunxi_hdmi_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct sunxi_hdmi_codec *priv = dev_get_drvdata(dai->dev);
+ uns
[PATCH v5 1/7] drm: sunxi: Add a basic DRM driver for Allwinner DE2
Allwinner's recent SoCs, as A64, A83T and H3, contain a new display
engine, DE2.
This patch adds a DRM video driver for this device.
Signed-off-by: Jean-Francois Moine
---
.../bindings/display/sunxi/sunxi-de2.txt | 83 +++
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sunxi/Kconfig | 21 +
drivers/gpu/drm/sunxi/Makefile | 7 +
drivers/gpu/drm/sunxi/de2_crtc.c | 475 +
drivers/gpu/drm/sunxi/de2_crtc.h | 63 +++
drivers/gpu/drm/sunxi/de2_de.c | 591 +
drivers/gpu/drm/sunxi/de2_drm.h| 47 ++
drivers/gpu/drm/sunxi/de2_drv.c| 378 +
drivers/gpu/drm/sunxi/de2_plane.c | 119 +
11 files changed, 1787 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
create mode 100644 drivers/gpu/drm/sunxi/Kconfig
create mode 100644 drivers/gpu/drm/sunxi/Makefile
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
diff --git a/Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
b/Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
new file mode 100644
index 000..f9cd67a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/sunxi-de2.txt
@@ -0,0 +1,83 @@
+Allwinner sunxi Display Engine 2 subsystem
+==
+
+The sunxi DE2 subsystem contains a display controller (DE2),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-a83t-display-engine"
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "gate": for DE activation
+ "clock": DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-a83t-lcd"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "gate": for LCD activation
+ "clock": pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <& CLK_BUS_DE>, < CLK_DE>;
+ clock-names = "gate", "clock";
+ resets = < RST_BUS_DE>;
+ ports = <_p>;
+ };
+
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-a83t-lcd";
+ ...
+ clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+ clock-names = "gate", "clock";
+ resets = < RST_BUS_TCON0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi at 01ee {
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ type = "video";
+ hdmi_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 483059a..afd576f 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -187,6 +187,8 @@ source "drivers/gpu/drm/shmobile/Kconfig"
source "drivers/gpu/drm/sun4i/Kconfig"
+source "drivers/gpu/drm/sunxi/Kconfig"
+
source "drivers/gpu/drm/omapdrm/Kconfig"
source "drivers/gpu/drm/tilcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 25c7204..120d0bf 100644
--- a/drivers/gpu/drm/Mak
[PATCH 0/5] drm/sun4i: Handle TV overscan
On Tue, 18 Oct 2016 12:03:49 +0200 Maxime Ripard wrote: > The fourth one being the major one. Every time I raised the issue on > IRC, the answer basically was "we don't care about analog", so I'm a > bit pessimistic about whether dealing with this in the core would be > accepted, hence why I chose to deal with this at the driver level. The same problem exists with HDMI and old TVs (mine is an ASUS 22T1E): these TVs overscan as soon as AVI frames are in the stream. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v8 6/6] ARM: dts: am335x-boneblack: Add HDMI audio support
On Thu, 17 Mar 2016 14:22:34 +0200
Jyri Sarha wrote:
> @@ -76,16 +87,22 @@
> };
>
> {
> - tda19988 {
> + tda19988: tda19988 {
> compatible = "nxp,tda998x";
> reg = <0x70>;
> +
> pinctrl-names = "default", "off";
> pinctrl-0 = <_hdmi_bonelt_pins>;
> pinctrl-1 = <_hdmi_bonelt_off_pins>;
>
> - port {
> - hdmi_0: endpoint at 0 {
> - remote-endpoint = <_0>;
> + #sound-dai-cells = <0>;
> + audio-ports = < AFMT_I2S0x03>;
> +
> + ports {
> + port at 0 {
> + hdmi_0: endpoint at 0 {
> + remote-endpoint = <_0>;
> + };
> };
> };
> };
Why did you add a 'ports' container? As there is only one port,
it is useless.
Also, you don't need '@0' in the 'port' and 'endpoint'.
If you want to keep it, you must add 'reg = 0;'s.
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
Alternative binding proposal for tda998x audio (Was: Re: [PATCH RFC v5 4/8] drm/i2c: tda998x: Add support of a DT graph of ports)
On Tue, 1 Mar 2016 20:29:17 +0200
Jyri Sarha wrote:
> I understand the short comings of simple-card and it's binding. However,
> the binding is documented and it is feasible to extract the audio
> connections from a simple-card binding too. In fact it models the I2S
> connections better than straight out of the box graph binding. Actually
> a graph is not the best way describe an i2s-bus with multiple DAIs
> (codec or CPU) connected to it.
I still don't understand your problem. You want something like:
audio-ports = < TDA998x_SPDIF 0x04
TDA998x_I2S 0x03>;
and the graph definition would be:
port at 03 {
reg = <0x03>;
port-type = "audio-i2s";
...
};
port at 04 {
reg = <0x04>;
port-type = "audio-spdif";
...
};
Apart the syntax, I don't really see the difference.
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
Alternative binding proposal for tda998x audio (Was: Re: [PATCH RFC v5 4/8] drm/i2c: tda998x: Add support of a DT graph of ports)
On Tue, 1 Mar 2016 17:51:09 +0200 Jyri Sarha wrote: > I know that it works, I have used it myself until now, but it is not > needed and there is no driver that parses audio port endpoints. I see no > point specifying something in the binding that is not used and there no > specific plan to ever use it. > > AFAIU my proposed binding should work equally well with simple-card, > with or without multi-codec support. As told many times, the simple card is a pure Linux specific entity. It does not describe any hardware. It should not appear in a DT, or, if it does, its compatible should be "linux, simple-audio-card". Then, how can the other OSs know the links between the audio devices and the audio encoders/connectors? On the other way, the audio graph does not impose any particular software design. It just describes the links between the different hardware components and each OS is free to implement its own layout. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
Alternative binding proposal for tda998x audio (Was: Re: [PATCH RFC v5 4/8] drm/i2c: tda998x: Add support of a DT graph of ports)
On Tue, 1 Mar 2016 16:26:50 +0200 Jyri Sarha wrote: > Ok, here is just one more simple alternative for tda998x audio binding. > I feel that the graph ports binding for audio does not make sense > without a graph based ASoC machine driver implementation. The ASoC > simple-card is already here and it so widely used that there is no > getting rid of that any time soon. This proposal provides the same > functionality as the patch in the root of this thread, but in a simpler > way and is equally compatible with simple-card. Hi Jyri, The graph port binding for the tda998x works fine with the simple card driver when multi-codec support is added. See http://mailman.alsa-project.org/pipermail/alsa-devel/2015-January/085855.html -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH RFC v5 4/8] drm/i2c: tda998x: Add support of a DT graph of ports
On Thu, 18 Feb 2016 08:35:30 -0600 Rob Herring wrote: > On Wed, Feb 17, 2016 at 04:49:05PM +0200, Jyri Sarha wrote: > > From: Jean-Francois Moine > > > > Two kinds of ports may be declared in a DT graph of ports: video and audio. > > This patch accepts the port value from a video port as an alternative > > to the video-ports property. > > It also accepts audio ports in the case the transmitter is not used as > > a slave encoder. > > The new file include/sound/tda998x.h prepares to the definition of > > a tda998x CODEC. > > > > Signed-off-by: Jean-Francois Moine > > Signed-off-by: Jyri Sarha > > --- > > .../devicetree/bindings/display/bridge/tda998x.txt | 51 > > drivers/gpu/drm/i2c/tda998x_drv.c | 90 > > +++--- > > include/sound/tda998x.h| 8 ++ > > 3 files changed, 140 insertions(+), 9 deletions(-) > > create mode 100644 include/sound/tda998x.h > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/tda998x.txt > > b/Documentation/devicetree/bindings/display/bridge/tda998x.txt > > index e9e4bce..35f6a80 100644 > > --- a/Documentation/devicetree/bindings/display/bridge/tda998x.txt > > +++ b/Documentation/devicetree/bindings/display/bridge/tda998x.txt > > @@ -16,6 +16,35 @@ Optional properties: > > > >- video-ports: 24 bits value which defines how the video controller > > output is wired to the TDA998x input - default: <0x230145> > > + This property is not used when ports are defined. > > + > > +Optional nodes: > > + > > + - port: up to three ports. > > + The ports are defined according to [1]. > > + > > +Video port. > > + There may be only one video port. > > + This one must contain the following property: > > + > > + - port-type: must be "rgb" > > This should be implied from the port unit address. In other words, > port at 0 is defined to be the rgb port. Now, if this is one of several > modes for the video port, then that is a different story. > > > + and may contain the optional property: > > + > > + - reg: 24 bits value which defines how the video controller > > + output is wired to the TDA998x input (video pins) > > + When absent, the default value is <0x230145>. > > This is not really how reg is intended to be used. Can you explain how > this value is determined? > > > +Audio ports. > > + There may be one or two audio ports. > > + These ones must contain the following properties: > > + > > + - port-type: must be "i2s" or "spdif" > > + > > + - reg: 8 bits value which defines how the audio controller > > + output is wired to the TDA998x input (audio pins) > > Same here. Hi Rob, These audio/video port definitions were discussed in the thread http://mailman.alsa-project.org/pipermail/alsa-devel/2015-August/095836.html but, you are right, and as you already said in the thread https://lists.freedesktop.org/archives/dri-devel/2015-September/090544.html 'reg' should not be used here. I would have changed to 'port-value', but as I will not update the kernel of my Dove Cubox anymore, I will not propose a new version of this patch (and, sorry Jyri, I will not test your patch series). -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v4 1/2] clk: sunxi: Add sun6i/8i video support
On Fri, 5 Feb 2016 10:39:15 +0100 Maxime Ripard wrote: > > +CLK_OF_DECLARE(sun6i_display, "allwinner,sun6i-display-clk", > > sun6i_display_setup); > > Please use the display driver from my DRM serie, it covers everything > you need here. If you give me a pointer, I will have a look. > > +CLK_OF_DECLARE(sun6i_pll3, "allwinner,sun6i-pll3-clk", sun6i_pll3_setup); > > And please use the clk-factors code here. I don't see how I can get direct 297MHz and 270MHz in fractional mode with that code. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v4 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Tue, 2 Feb 2016 15:50:36 -0600
Rob Herring wrote:
> > diff --git a/Documentation/devicetree/bindings/display/sunxi.txt
> > b/Documentation/devicetree/bindings/display/sunxi.txt
> > new file mode 100644
> > index 000..35f9763
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/sunxi.txt
> > @@ -0,0 +1,81 @@
> > +Allwinner sunxi display subsystem
> > +=
> > +
> > +The sunxi display subsystems contain a display controller (DE),
> > +one or two LCD controllers (TCON) and their external interfaces.
> > +
> > +Display controller
> > +==
> > +
> > +Required properties:
> > +
> > +- compatible: value should be one of the following
> > + "allwinner,sun8i-h3-display-engine"
> > +
> > +- clocks: must include clock specifiers corresponding to entries in the
> > + clock-names property.
> > +
> > +- clock-names: must contain
> > + gate: for DE activation
> > + clock: DE clock
> > +
> > +- resets: phandle to the reset of the device
> > +
> > +- ports: phandle's to the LCD ports
> > +
> > +LCD controller
> > +==
> > +
> > +Required properties:
> > +
> > +- compatible: value should be one of the following
> > + "allwinner,sun8i-h3-lcd"
> > +
> > +- clocks: must include clock specifiers corresponding to entries in the
> > + clock-names property.
> > +
> > +- clock-names: must contain
> > + gate: for LCD activation
> > + clock: pixel clock
> > +
> > +- resets: phandle to the reset of the device
> > +
> > +- port: port node with endpoint definitions as defined in
> > + Documentation/devicetree/bindings/media/video-interfaces.txt
>
> Define how many ports and endpoints.
As told in some other mail, such a video binding should be generic.
The number of ports depends on the hardware. Most SoCs have only one
port per LCD, but some other have many ports as the A83T (3 ports from
the LCD0).
> > +
> > +Example:
> > +
> > + de: de-controller at 0100 {
> > + compatible = "allwinner,sun8i-h3-display-engine";
> > + ...
> > + clocks = <_gates 44>, <_clk>;
> > + clock-names = "gate", "clock";
> > + resets = <_rst 44>;
> > + ports = <_p>;
>
> This is pointless if you only have one item in ports. Is this really a
> separate h/w block? Can't you move all this into the node below?
Well, this example is extracted from the H3 where the DE and LCDs have
different clocks, I/O resources and functions (the DE builds the video
frames while the LCDs - TCONs - convert them to video flows).
The example is not complete because there are 2 LCDs in the H3:
ports = <_p>, /* HDMI */
<_p>; /* TV (CVBS) */
But, for SoCs with only one LCD, the description would be the same.
> > + };
> > +
> > + lcd0: lcd-controller at 01c0c000 {
> > + compatible = "allwinner,sun8i-h3-lcd";
> > + ...
> > + clocks = <_gates 35>, <_clk>;
> > + clock-names = "gate", "clock";
> > + resets = <_rst 35>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + lcd0_p: port {
> > + lcd0_ep: endpoint {
> > + remote-endpoint = <_ep>;
> > + };
> > + };
> > + };
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Tue, 2 Feb 2016 17:26:13 + Andre Przywara wrote: > Can you sketch (or point me to) what I need to do? Just a > simple-framebuffer DT node? > I take it that the driver does not depend on any kind of U-Boot > initialisation, but instead takes care of this itself? > > And would this pave the way for fbturbo also? In my site (http://moinejf.free.fr/opi2/), you may find: - the HDMI driver - to be built out of tree - the DT files (sun8i-h3.dtsi and sun8i-h3-orangepi-plus.dts) which should be close enough to the A64 - my .config (config-4.5.txt) The driver has no video overlay and no acceleration. The frame buffer (console) works (with a blinking cursor!). X11 works fine with the standard modesetting driver (default). There is just a problem with the HDMI driver. For unknown reason, sometimes, the EDID cannot be read (timeout - this problem also exists with the kernel 3.4). The remedy is power off / power on (of the board, not of the screen!). I am using the u-boot from Allwinner. This one activates the video engine, but everything is reset at kernel start time. About the GPU/VPU, I have no need of them, so I will let this job to specialists and, instead, have a look at audio... -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v3 1/2] clk: sunxi: Add sun6i/8i video support
On Tue, 2 Feb 2016 17:19:15 + Emil Velikov wrote: > > --- > > Documentation/devicetree/bindings/clock/sunxi.txt | 2 + > > drivers/clk/sunxi/clk-sun6i-display.c | 106 + > > drivers/clk/sunxi/clk-sun6i-pll3.c| 174 > > ++ > > 3 files changed, 282 insertions(+) > > create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c > > create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c > > > Something is missing here - namely the changes to the Makefile. Does > this series work or did you simply forget git add ? Yes, the series works. I just forgot the Makefile which contains other changes for my kernel (thermal clock). Thanks. I sent an new request. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v4 0/2] Add a DRM display driver to the Allwinner H3
The proposed DRM driver works on a Orange PI 2 with a kernel 4.5.0-rc1 and some H3 patches found in Hans de Goede's GIT repository. As there is no documentation about the HDMI of the H3, the associated encoder/connector driver has not been included in this patch series. For test purpose, it may be built as a out-of-tree driver from the tarball: http://moinejf.free.fr/opi2/h3-hdmi.tar.gz and the DT files: http://moinejf.free.fr/opi2/sun8i-h3.dtsi http://moinejf.free.fr/opi2/sun8i-h3-orangepi-plus.dts Jean-Francois Moine (2): clk: sunxi: Add sun6i/8i video support drm: sunxi: Add a basic DRM driver for Allwinner DE2 --- v4: - drivers/clk/sunxi/Makefile was missing (Emil Velikov) v3: - add the hardware cursor - simplify and fix the DE2 init sequences - generation for all SUNXI SoCs (Andre Przywara) v2: - remarks from Chen-Yu Tsai and Russell King - DT documentation added --- Documentation/devicetree/bindings/clock/sunxi.txt | 2 + .../devicetree/bindings/display/sunxi.txt | 81 drivers/clk/sunxi/Makefile | 2 + drivers/clk/sunxi/clk-sun6i-display.c | 106 + drivers/clk/sunxi/clk-sun6i-pll3.c | 174 +++ drivers/gpu/drm/Kconfig| 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sunxi/Kconfig | 20 + drivers/gpu/drm/sunxi/Makefile | 7 + drivers/gpu/drm/sunxi/de2_crtc.c | 421 + drivers/gpu/drm/sunxi/de2_crtc.h | 61 +++ drivers/gpu/drm/sunxi/de2_de.c | 505 + drivers/gpu/drm/sunxi/de2_drm.h| 40 ++ drivers/gpu/drm/sunxi/de2_drv.c| 377 +++ drivers/gpu/drm/sunxi/de2_plane.c | 91 15 files changed, 1890 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sunxi.txt create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c create mode 100644 drivers/gpu/drm/sunxi/Kconfig create mode 100644 drivers/gpu/drm/sunxi/Makefile create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h create mode 100644 drivers/gpu/drm/sunxi/de2_de.c create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c -- 2.7.0
[PATCH v4 1/2] clk: sunxi: Add sun6i/8i video support
Add the clock types which are used by the sun6i/8i families for video.
Signed-off-by: Jean-Francois Moine
---
v4:
- drivers/clk/sunxi/Makefile was missing (Emil Velikov)
v3: (no change)
v2:
- remarks from Chen-Yu Tsai
- DT documentation added
---
Documentation/devicetree/bindings/clock/sunxi.txt | 2 +
drivers/clk/sunxi/Makefile| 2 +
drivers/clk/sunxi/clk-sun6i-display.c | 106 +
drivers/clk/sunxi/clk-sun6i-pll3.c| 174 ++
4 files changed, 284 insertions(+)
create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c
create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
b/Documentation/devicetree/bindings/clock/sunxi.txt
index e59f57b..a22b92f 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -11,6 +11,7 @@ Required properties:
"allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
"allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
"allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
+ "allwinner,sun6i-pll3-clk" - for the video PLLs clock
"allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
"allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock
"allwinner,sun6i-a31-pll6-clk" - for the PLL6 clock on A31
@@ -77,6 +78,7 @@ Required properties:
"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
"allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
+ "allwinner,sun6i-display-clk" - for the display clocks
Required properties for all clocks:
- reg : shall be the control register address for the clock.
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 3fd7901..6fe336f 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -11,6 +11,8 @@ obj-y += clk-a10-ve.o
obj-y += clk-a20-gmac.o
obj-y += clk-mod0.o
obj-y += clk-simple-gates.o
+obj-y += clk-sun6i-display.o
+obj-y += clk-sun6i-pll3.o
obj-y += clk-sun8i-bus-gates.o
obj-y += clk-sun8i-mbus.o
obj-y += clk-sun9i-core.o
diff --git a/drivers/clk/sunxi/clk-sun6i-display.c
b/drivers/clk/sunxi/clk-sun6i-display.c
new file mode 100644
index 000..48356e3
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun6i-display.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static DEFINE_SPINLOCK(sun6i_display_lock);
+
+#define SUN6I_DISPLAY_GATE_BIT 31
+#define SUN6I_DISPLAY_SEL_SHIFT24
+#define SUN6I_DISPLAY_SEL_MASK GENMASK(2, 0)
+#define SUN6I_DISPLAY_MSHIFT 0
+#define SUN6I_DISPLAY_MWIDTH 4
+
+static void __init sun6i_display_setup(struct device_node *node)
+{
+ const char *clk_name = node->name;
+ const char *parents[8];
+ struct clk_mux *mux = NULL;
+ struct clk_divider *div;
+ struct clk_gate *gate;
+ struct resource res;
+ void __iomem *mmio;
+ struct clk *clk;
+ int n;
+
+ of_property_read_string(node, "clock-output-names", _name);
+
+ mmio = of_io_request_and_map(node, 0, of_node_full_name(node));
+ if (IS_ERR(mmio)) {
+ pr_err("%s: Could not map the clock registers\n", clk_name);
+ return;
+ }
+
+ n = of_clk_parent_fill(node, parents, ARRAY_SIZE(parents));
+
+ if (n > 1) {/* many possible sources */
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ goto free_io;
+ mux->reg = mmio;
+ mux->shift = SUN6I_DISPLAY_SEL_SHIFT;
+ mux->mask = SUN6I_DISPLAY_SEL_MASK;
+ mux->lock = _display_lock;
+ }
+
+ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+ if (!gate)
+ goto free_mux;
+
+ gate->reg = mmio;
+ gate->bit_idx = SUN6I_DISPLAY_GATE_BIT;
+ gate->lock = _display_lock;
+
+ div = kzalloc(sizeof(*div), GFP_KERNEL);
+ if (!div)
+ goto free_gate;
+
+ div->reg = mmio;
+ div-&g
[PATCH v2 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Wed, 20 Jan 2016 11:14:38 + Andre Przywara wrote: > I haven't looked at it in detail yet, I just tried to compile it for > ARM64 to prepare for a test on the Allwinner A64. > > So just two things I spotted below: Hi André, I fixed them in the v3 patch request. Have you succeeded to get video on the A64? -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v3 0/2] Add a DRM display driver to the Allwinner H3
The proposed DRM driver works on a Orange PI 2 with a kernel 4.5.0-rc1 and some H3 patches found in Hans de Goede's GIT repository. As there is no documentation about the HDMI of the H3, the associated encoder/connector driver has not been included in this patch series. For test purpose, it may be built as a out-of-tree driver from the tarball: http://moinejf.free.fr/opi2/h3-hdmi.tar.gz and the DT files: http://moinejf.free.fr/opi2/sun8i-h3.dtsi http://moinejf.free.fr/opi2/sun8i-h3-orangepi-plus.dts Jean-Francois Moine (2): clk: sunxi: Add sun6i/8i video support drm: sunxi: Add a basic DRM driver for Allwinner DE2 Documentation/devicetree/bindings/clock/sunxi.txt | 2 + .../devicetree/bindings/display/sunxi.txt | 81 drivers/clk/sunxi/clk-sun6i-display.c | 106 + drivers/clk/sunxi/clk-sun6i-pll3.c | 174 +++ drivers/gpu/drm/Kconfig| 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sunxi/Kconfig | 20 + drivers/gpu/drm/sunxi/Makefile | 7 + drivers/gpu/drm/sunxi/de2_crtc.c | 421 + drivers/gpu/drm/sunxi/de2_crtc.h | 61 +++ drivers/gpu/drm/sunxi/de2_de.c | 505 + drivers/gpu/drm/sunxi/de2_drm.h| 40 ++ drivers/gpu/drm/sunxi/de2_drv.c| 377 +++ drivers/gpu/drm/sunxi/de2_plane.c | 91 14 files changed, 1888 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sunxi.txt create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c create mode 100644 drivers/gpu/drm/sunxi/Kconfig create mode 100644 drivers/gpu/drm/sunxi/Makefile create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h create mode 100644 drivers/gpu/drm/sunxi/de2_de.c create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c -- 2.7.0
[PATCH v3 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
In recent SoCs, as the H3, Allwinner uses a new display interface, DE2.
This patch adds a DRM video driver for this interface.
Signed-off-by: Jean-Francois Moine
---
v3:
- add the hardware cursor
- simplify and fix the DE2 init sequences
- generation for all SUNXI SoCs (Andre Przywara)
v2:
- remarks from Russell King
- DT documentation added
- working resolution change with xrandr
- removal of the HDMI driver
---
.../devicetree/bindings/display/sunxi.txt | 81
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sunxi/Kconfig | 20 +
drivers/gpu/drm/sunxi/Makefile | 7 +
drivers/gpu/drm/sunxi/de2_crtc.c | 421 +
drivers/gpu/drm/sunxi/de2_crtc.h | 61 +++
drivers/gpu/drm/sunxi/de2_de.c | 505 +
drivers/gpu/drm/sunxi/de2_drm.h| 40 ++
drivers/gpu/drm/sunxi/de2_drv.c| 377 +++
drivers/gpu/drm/sunxi/de2_plane.c | 91
11 files changed, 1606 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi.txt
create mode 100644 drivers/gpu/drm/sunxi/Kconfig
create mode 100644 drivers/gpu/drm/sunxi/Makefile
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
diff --git a/Documentation/devicetree/bindings/display/sunxi.txt
b/Documentation/devicetree/bindings/display/sunxi.txt
new file mode 100644
index 000..35f9763
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi.txt
@@ -0,0 +1,81 @@
+Allwinner sunxi display subsystem
+=
+
+The sunxi display subsystems contain a display controller (DE),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for DE activation
+ clock: DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-lcd"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for LCD activation
+ clock: pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <_gates 44>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 44>;
+ ports = <_p>;
+ };
+
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-h3-lcd";
+ ...
+ clocks = <_gates 35>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 35>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi at 01ee {
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ hdmi_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 8ae7ab6..0cec9a1 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -269,3 +269,5 @@ source "drivers/gpu/drm/imx/Kconfig"
source "drivers/gpu/drm/vc4/Kconfig"
source "drivers/gpu/drm/etnaviv/Kconfig"
+
+source "drivers/gpu/drm/sunxi/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 61766de..eef53f2 100644
--- a/drivers/gpu/drm/Makefile
[PATCH v4 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
In recent SoCs, as the H3, Allwinner uses a new display interface, DE2.
This patch adds a DRM video driver for this interface.
Signed-off-by: Jean-Francois Moine
---
v4: (no change)
v3:
- add the hardware cursor
- simplify and fix the DE2 init sequences
- generation for all SUNXI SoCs (Andre Przywara)
v2:
- remarks from Russell King
- DT documentation added
- working resolution change with xrandr
- removal of the HDMI driver
---
.../devicetree/bindings/display/sunxi.txt | 81
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sunxi/Kconfig | 20 +
drivers/gpu/drm/sunxi/Makefile | 7 +
drivers/gpu/drm/sunxi/de2_crtc.c | 421 +
drivers/gpu/drm/sunxi/de2_crtc.h | 61 +++
drivers/gpu/drm/sunxi/de2_de.c | 505 +
drivers/gpu/drm/sunxi/de2_drm.h| 40 ++
drivers/gpu/drm/sunxi/de2_drv.c| 377 +++
drivers/gpu/drm/sunxi/de2_plane.c | 91
11 files changed, 1606 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi.txt
create mode 100644 drivers/gpu/drm/sunxi/Kconfig
create mode 100644 drivers/gpu/drm/sunxi/Makefile
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
diff --git a/Documentation/devicetree/bindings/display/sunxi.txt
b/Documentation/devicetree/bindings/display/sunxi.txt
new file mode 100644
index 000..35f9763
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi.txt
@@ -0,0 +1,81 @@
+Allwinner sunxi display subsystem
+=
+
+The sunxi display subsystems contain a display controller (DE),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for DE activation
+ clock: DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-lcd"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for LCD activation
+ clock: pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <_gates 44>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 44>;
+ ports = <_p>;
+ };
+
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-h3-lcd";
+ ...
+ clocks = <_gates 35>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 35>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi at 01ee {
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ hdmi_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 8ae7ab6..0cec9a1 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -269,3 +269,5 @@ source "drivers/gpu/drm/imx/Kconfig"
source "drivers/gpu/drm/vc4/Kconfig"
source "drivers/gpu/drm/etnaviv/Kconfig"
+
+source "drivers/gpu/drm/sunxi/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 61766de..eef53f2 100644
--- a/drivers
[PATCH v3 1/2] clk: sunxi: Add sun6i/8i video support
Add the clock types which are used by the sun6i/8i families for video.
Signed-off-by: Jean-Francois Moine
---
v3: (no change)
v2:
- remarks from Chen-Yu Tsai
- DT documentation added
---
Documentation/devicetree/bindings/clock/sunxi.txt | 2 +
drivers/clk/sunxi/clk-sun6i-display.c | 106 +
drivers/clk/sunxi/clk-sun6i-pll3.c| 174 ++
3 files changed, 282 insertions(+)
create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c
create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
b/Documentation/devicetree/bindings/clock/sunxi.txt
index e59f57b..a22b92f 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -11,6 +11,7 @@ Required properties:
"allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
"allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
"allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
+ "allwinner,sun6i-pll3-clk" - for the video PLLs clock
"allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
"allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock
"allwinner,sun6i-a31-pll6-clk" - for the PLL6 clock on A31
@@ -77,6 +78,7 @@ Required properties:
"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
"allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
+ "allwinner,sun6i-display-clk" - for the display clocks
Required properties for all clocks:
- reg : shall be the control register address for the clock.
diff --git a/drivers/clk/sunxi/clk-sun6i-display.c
b/drivers/clk/sunxi/clk-sun6i-display.c
new file mode 100644
index 000..48356e3
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun6i-display.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static DEFINE_SPINLOCK(sun6i_display_lock);
+
+#define SUN6I_DISPLAY_GATE_BIT 31
+#define SUN6I_DISPLAY_SEL_SHIFT24
+#define SUN6I_DISPLAY_SEL_MASK GENMASK(2, 0)
+#define SUN6I_DISPLAY_MSHIFT 0
+#define SUN6I_DISPLAY_MWIDTH 4
+
+static void __init sun6i_display_setup(struct device_node *node)
+{
+ const char *clk_name = node->name;
+ const char *parents[8];
+ struct clk_mux *mux = NULL;
+ struct clk_divider *div;
+ struct clk_gate *gate;
+ struct resource res;
+ void __iomem *mmio;
+ struct clk *clk;
+ int n;
+
+ of_property_read_string(node, "clock-output-names", _name);
+
+ mmio = of_io_request_and_map(node, 0, of_node_full_name(node));
+ if (IS_ERR(mmio)) {
+ pr_err("%s: Could not map the clock registers\n", clk_name);
+ return;
+ }
+
+ n = of_clk_parent_fill(node, parents, ARRAY_SIZE(parents));
+
+ if (n > 1) {/* many possible sources */
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ goto free_io;
+ mux->reg = mmio;
+ mux->shift = SUN6I_DISPLAY_SEL_SHIFT;
+ mux->mask = SUN6I_DISPLAY_SEL_MASK;
+ mux->lock = _display_lock;
+ }
+
+ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+ if (!gate)
+ goto free_mux;
+
+ gate->reg = mmio;
+ gate->bit_idx = SUN6I_DISPLAY_GATE_BIT;
+ gate->lock = _display_lock;
+
+ div = kzalloc(sizeof(*div), GFP_KERNEL);
+ if (!div)
+ goto free_gate;
+
+ div->reg = mmio;
+ div->shift = SUN6I_DISPLAY_MSHIFT;
+ div->width = SUN6I_DISPLAY_MWIDTH;
+ div->lock = _display_lock;
+
+ clk = clk_register_composite(NULL, clk_name,
+parents, n,
+mux ? >hw : NULL, _mux_ops,
+>hw, _divider_ops,
+>hw, _gate_ops,
+0);
+ if (IS_ERR(clk)) {
+ pr_err("%s: Couldn't register the clock\n", clk_name);
+
[PATCH v8 1/2] drm/rockchip: hdmi: add Innosilicon HDMI support
On Fri, 29 Jan 2016 14:47:39 +0800
Yakir Yang wrote:
> The Innosilicon HDMI is a low power HDMI 1.4 transmitter
> IP, and it have been integrated on some rockchip CPUs
> (like RK3036, RK312x).
>
> Signed-off-by: Yakir Yang
> ---
> Changes in v8:
> - Don't check whether encoder output format is RGB colorspace, cause driver
> default configure the output colorspace to RGB. (ZhengYang)
> - Correct the check condition in inno_hdmi_config_video_csc() (ZhengYang)
> - if (data->enc_out_format == data->enc_out_format) {
> + if (data->enc_in_format == data->enc_out_format) {
>
> Changes in v7:
> - Correct the module licnese statement (Paul)
> - MODULE_LICENSE("GPL");
> + MODULE_LICENSE("GPLv2");
> - Start indentation with tabs and fix the misspell in Kconfig (Paul)
> - Carry the lost device-binding document (Heiko)
>
> Changes in v6:
> - Rebase the Makefile/Kconfig files which add by Chris's rockchip-mipi driver
> (Caeser)
>
> Changes in v5:
> - Use hdmi_infoframe helper functions to packed the infoframe (Russell)
> - Remove the unused double wait_for_completion_timeout for ddc transfer
> (Russell)
> - Remove the unused local variable in "inno_hdmi_i2c_write()" function
> (Russell)
>
> Changes in v4:
> - Modify the commit title "drm/rockchip: hdmi: ..." (Mark)
> - Correct the "DKMS" to "DPMS" (Mark)
> - Fix over 80 characters problems (Mark)
> - Remove encoder .prepare/.commit helper functions, and move the vop mode
> configure function into encoder .enable helper functions. (Mark)
>
> Changes in v3:
> - Use encoder enable/disable function, and remove the encoder DPMS function
> - Keep HDMI PLL power on in standby mode
>
> Changes in v2:
> - Using DRM atomic helper functions for connector init (Mark)
> - Remove "hdmi->connector.encoder = encoder;" (Mark)
>
> drivers/gpu/drm/rockchip/Kconfig | 8 +
> drivers/gpu/drm/rockchip/Makefile| 1 +
> drivers/gpu/drm/rockchip/inno_hdmi.c | 939
> +++
> drivers/gpu/drm/rockchip/inno_hdmi.h | 362 ++
> 4 files changed, 1310 insertions(+)
> create mode 100644 drivers/gpu/drm/rockchip/inno_hdmi.c
> create mode 100644 drivers/gpu/drm/rockchip/inno_hdmi.h
>
> diff --git a/drivers/gpu/drm/rockchip/Kconfig
> b/drivers/gpu/drm/rockchip/Kconfig
> index 8573985..76b3362 100644
> --- a/drivers/gpu/drm/rockchip/Kconfig
> +++ b/drivers/gpu/drm/rockchip/Kconfig
> @@ -35,3 +35,11 @@ config ROCKCHIP_DW_MIPI_DSI
>for the Synopsys DesignWare HDMI driver. If you want to
>enable MIPI DSI on RK3288 based SoC, you should selet this
>option.
> +
> +config ROCKCHIP_INNO_HDMI
> + tristate "Rockchip specific extensions for Innosilicon HDMI"
> + depends on DRM_ROCKCHIP
> + help
> + This selects support for Rockchip SoC specific extensions
> + for the Innosilicon HDMI driver. If you want to enable
> + HDMI on RK3036 based SoC, you should select this option.
> diff --git a/drivers/gpu/drm/rockchip/Makefile
> b/drivers/gpu/drm/rockchip/Makefile
> index f6a809a..df8fbef 100644
> --- a/drivers/gpu/drm/rockchip/Makefile
> +++ b/drivers/gpu/drm/rockchip/Makefile
> @@ -8,5 +8,6 @@ rockchipdrm-$(CONFIG_DRM_FBDEV_EMULATION) +=
> rockchip_drm_fbdev.o
>
> obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
> obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi.o
> +obj-$(CONFIG_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
>
> obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_vop_reg.o
> diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c
> b/drivers/gpu/drm/rockchip/inno_hdmi.c
> new file mode 100644
> index 000..c99d88d
> --- /dev/null
> +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c
> @@ -0,0 +1,939 @@
> +/*
> + * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
> + *Zheng Yang
> + *Yakir Yang
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
This is not needed.
> +
> +#include "rockchip_drm_drv.h"
> +#include "rockchip_drm_vop.h"
> +
> +#include "inno_hdmi.h"
[snip]
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH RFC 1/2] clk: sunxi: Add sun8i display support
On Wed, 27 Jan 2016 22:50:51 +0100 Maxime Ripard wrote: > Hi, > > On Tue, Jan 19, 2016 at 09:09:01AM +0100, Jean-Francois Moine wrote: > > On Mon, 18 Jan 2016 20:09:04 +0100 > > Maxime Ripard wrote: [snip] > > > We have the clk-factors stuff to handle this easily, could you use > > > that instead ? > > > > No, the sun6i/8i pll3 offers direct 297MHz and 270MHz. > > That's true, but so far it's something that never has been really > needed. This PLL is not the same one using the fractional mode, so I > guess we could extend the clk-factors to be able to deal with > that. The video pll in the A10 (pll3) is also in this case, so does > the A31 PLL3 and PLL4. > > Also note that all these clocks can reach those frequencies through > what allwinner calls the integer mode, so apart from the hardware > readout, we don't really need it anyway. Maybe it is too simple! 297MHz is the PLL3 frequency which can be used for most video modes. And, so, as it is the default value, in my tests, I never saw the PLL3 set_rate function being called. [snip] > > Otherwise, about this old RFC, Chen-Yu Tsai replied: > > > > > > Add the clock types which are used by the sun8i family for video. > > > > > > These clocks first appeared in the A31. > > The video PLL is, the display engine and tcon clocks are a bit > different (mostly because of their weird parent configuration that > need a muxing table). Note that I'm talking about the A23 / A33. I > haven't checked for the H3. The TCONs of the A23/A33 and H3 SoCs are quite the same. The display engines 2 of the H3/A64/A83T are the same and they ask for a fixed clock (432MHz). -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH RFC 0/2] Add a display driver to the Allwinner H3
On Mon, 18 Jan 2016 11:18:27 +0100 Maxime Ripard wrote: > > Then, the DE2 sources contain only: > > > > All Winner Tech, All Right Reserved. 2014-2015 Copyright (c) > > > > Eventually, there is no copyright/author/history in the HDMI sources. > > That one is nasty though :/ > > It seems to be a GPL violation though, so we have two solutions: > > A) have a clean room implementation > B) Ask allwinner to comply with the license > > The former doesn't look likely to happen soon... Can you open an issue > on this on their linux github repo? Do you really think that I could have more luck than people of the linux-sunxi or pine64 teams? -- A galon | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH RFC 1/2] clk: sunxi: Add sun8i display support
On Mon, 18 Jan 2016 20:09:04 +0100
Maxime Ripard wrote:
> > +static const struct clk_ops clk_sun8i_pll3_fact_ops = {
> > + .recalc_rate = sun8i_pll3_recalc_rate,
> > + .round_rate = sun8i_pll3_round_rate,
> > + .set_rate = sun8i_pll3_set_rate,
> > +};
>
> We have the clk-factors stuff to handle this easily, could you use
> that instead ?
No, the sun6i/8i pll3 offers direct 297MHz and 270MHz.
> As part of my DRM patches, I've added a clk-display clock that can
> handle that easily.
>
> And actually, as part of bringing up the display engine on the A33, I
> already did it:
> https://github.com/mripard/linux/commit/92b6843b5ee5b70cb2be3638df31d3eca28a4dba
> https://github.com/mripard/linux/commit/81e8ea74be5e72124eb584432bb79ff75f90d9ed
I don't remember any patch request from yours in the Linux
mailing-lists about these developments.
Otherwise, about this old RFC, Chen-Yu Tsai replied:
> > Add the clock types which are used by the sun8i family for video.
>
> These clocks first appeared in the A31.
>
> > Signed-off-by: Jean-Francois Moine
> > ---
> > drivers/clk/sunxi/Makefile| 1 +
> > drivers/clk/sunxi/clk-sun8i-display.c | 247
> > ++
>
> Please split this into 2 patches, and 2 files: one for PLL3, named
> clk-sun6i-pll3.c, and one for the display mod clocks, named
> clk-sun6i-display.c
My new patch series about the H3 display was sent 4 days ago
(but not sure it reached the list linux-clk at vger.kernel.org
because of some non-ASCII characters).
--
A galon | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2 0/2] Add a DRM display driver to the Allwinner H3
The proposed DRM driver works on a Orange PI 2 with a kernel 4.4.0 and the H3 patches found in Hans de Goede's GIT repository. As there is no documentation about the HDMI of the H3, the associated encoder/connector driver has not been included in this patch series. For tests, it may be built as a out-of-tree driver from the tarball: http://moinejf.free.fr/opi2/h3-hdmi.tar.gz and the DT files: http://moinejf.free.fr/opi2/sun8i-h3.dtsi http://moinejf.free.fr/opi2/sun8i-h3-orangepi-plus.dts Jean-Francois Moine (2): clk: sunxi: Add sun6i/8i video support drm: sunxi: Add a basic DRM driver for Allwinner DE2 Documentation/devicetree/bindings/clock/sunxi.txt | 2 + .../devicetree/bindings/display/sunxi.txt | 81 drivers/clk/sunxi/clk-sun6i-display.c | 106 + drivers/clk/sunxi/clk-sun6i-pll3.c | 174 drivers/gpu/drm/Kconfig| 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sunxi/Kconfig | 20 + drivers/gpu/drm/sunxi/Makefile | 7 + drivers/gpu/drm/sunxi/de2_crtc.c | 425 +++ drivers/gpu/drm/sunxi/de2_crtc.h | 43 ++ drivers/gpu/drm/sunxi/de2_de.c | 461 + drivers/gpu/drm/sunxi/de2_drm.h| 55 +++ drivers/gpu/drm/sunxi/de2_drv.c| 376 + drivers/gpu/drm/sunxi/de2_plane.c | 114 + 14 files changed, 1867 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sunxi.txt create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c create mode 100644 drivers/gpu/drm/sunxi/Kconfig create mode 100644 drivers/gpu/drm/sunxi/Makefile create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h create mode 100644 drivers/gpu/drm/sunxi/de2_de.c create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c -- 2.7.0
[PATCH v2 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
In recent SoCs, as the H3, Allwinner uses a new display interface, DE2.
This patch adds a DRM video driver for this interface.
Signed-off-by: Jean-Francois Moine
---
Changes:
- remarks from Russell King
- DT documentation added
- working resolution change with xrandr
- removal of the HDMI driver
---
.../devicetree/bindings/display/sunxi.txt | 81
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sunxi/Kconfig | 20 +
drivers/gpu/drm/sunxi/Makefile | 7 +
drivers/gpu/drm/sunxi/de2_crtc.c | 425 +++
drivers/gpu/drm/sunxi/de2_crtc.h | 43 ++
drivers/gpu/drm/sunxi/de2_de.c | 461 +
drivers/gpu/drm/sunxi/de2_drm.h| 55 +++
drivers/gpu/drm/sunxi/de2_drv.c| 376 +
drivers/gpu/drm/sunxi/de2_plane.c | 114 +
11 files changed, 1585 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi.txt
create mode 100644 drivers/gpu/drm/sunxi/Kconfig
create mode 100644 drivers/gpu/drm/sunxi/Makefile
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
diff --git a/Documentation/devicetree/bindings/display/sunxi.txt
b/Documentation/devicetree/bindings/display/sunxi.txt
new file mode 100644
index 000..1070bf0
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi.txt
@@ -0,0 +1,81 @@
+Allwinner sunxi display subsystem
+=
+
+The sunxi display subsystems contain a display controller (DE),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for DE activation
+ clock: DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-lcd"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for LCD activation
+ clock: pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <_gates 44>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 44>;
+ ports = <_p>;
+ };
+
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-h3-lcd";
+ ...
+ clocks = <_gates 35>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 35>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi at 01ee {
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ hdmi_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c4bf9a1..edef0c8 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -266,3 +266,5 @@ source "drivers/gpu/drm/amd/amdkfd/Kconfig"
source "drivers/gpu/drm/imx/Kconfig"
source "drivers/gpu/drm/vc4/Kconfig"
+
+source "drivers/gpu/drm/sunxi/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 1e9ff4c..597c246 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -75,3 +75,4 @@ obj-y += i2c/
obj-y += panel/
obj-y
[PATCH v2 1/2] clk: sunxi: Add sun6i/8i video support
Add the clock types which are used by the sun6i/8i families for video.
Signed-off-by: Jean-Francois Moine
---
Changes:
- remarks from Chen-Yu Tsai
- DT documentation added
---
Documentation/devicetree/bindings/clock/sunxi.txt | 2 +
drivers/clk/sunxi/clk-sun6i-display.c | 106 +
drivers/clk/sunxi/clk-sun6i-pll3.c| 174 ++
3 files changed, 282 insertions(+)
create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c
create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
b/Documentation/devicetree/bindings/clock/sunxi.txt
index 8a47b77..c57dd0e 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -11,6 +11,7 @@ Required properties:
"allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
"allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
"allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
+ "allwinner,sun6i-pll3-clk" - for the video PLLs clock
"allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
"allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock
"allwinner,sun6i-a31-pll6-clk" - for the PLL6 clock on A31
@@ -70,6 +71,7 @@ Required properties:
"allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
+ "allwinner,sun6i-display-clk" - for the display clocks
Required properties for all clocks:
- reg : shall be the control register address for the clock.
diff --git a/drivers/clk/sunxi/clk-sun6i-display.c
b/drivers/clk/sunxi/clk-sun6i-display.c
new file mode 100644
index 000..48356e3
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun6i-display.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static DEFINE_SPINLOCK(sun6i_display_lock);
+
+#define SUN6I_DISPLAY_GATE_BIT 31
+#define SUN6I_DISPLAY_SEL_SHIFT24
+#define SUN6I_DISPLAY_SEL_MASK GENMASK(2, 0)
+#define SUN6I_DISPLAY_MSHIFT 0
+#define SUN6I_DISPLAY_MWIDTH 4
+
+static void __init sun6i_display_setup(struct device_node *node)
+{
+ const char *clk_name = node->name;
+ const char *parents[8];
+ struct clk_mux *mux = NULL;
+ struct clk_divider *div;
+ struct clk_gate *gate;
+ struct resource res;
+ void __iomem *mmio;
+ struct clk *clk;
+ int n;
+
+ of_property_read_string(node, "clock-output-names", _name);
+
+ mmio = of_io_request_and_map(node, 0, of_node_full_name(node));
+ if (IS_ERR(mmio)) {
+ pr_err("%s: Could not map the clock registers\n", clk_name);
+ return;
+ }
+
+ n = of_clk_parent_fill(node, parents, ARRAY_SIZE(parents));
+
+ if (n > 1) {/* many possible sources */
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ goto free_io;
+ mux->reg = mmio;
+ mux->shift = SUN6I_DISPLAY_SEL_SHIFT;
+ mux->mask = SUN6I_DISPLAY_SEL_MASK;
+ mux->lock = _display_lock;
+ }
+
+ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+ if (!gate)
+ goto free_mux;
+
+ gate->reg = mmio;
+ gate->bit_idx = SUN6I_DISPLAY_GATE_BIT;
+ gate->lock = _display_lock;
+
+ div = kzalloc(sizeof(*div), GFP_KERNEL);
+ if (!div)
+ goto free_gate;
+
+ div->reg = mmio;
+ div->shift = SUN6I_DISPLAY_MSHIFT;
+ div->width = SUN6I_DISPLAY_MWIDTH;
+ div->lock = _display_lock;
+
+ clk = clk_register_composite(NULL, clk_name,
+parents, n,
+mux ? >hw : NULL, _mux_ops,
+>hw, _divider_ops,
+>hw, _gate_ops,
+0);
+ if (IS_ERR(clk)) {
+ pr_err("%s: Couldn't register the clock\n", clk_name);
+
[PATCH RFC 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Wed, 6 Jan 2016 21:41:30 +0100
Jens Kuske wrote:
> On 05/01/16 19:40, Jean-Francois Moine wrote:
> [snip]
> > diff --git a/drivers/gpu/drm/sunxi/de2_hdmi_h3.c
> > b/drivers/gpu/drm/sunxi/de2_hdmi_h3.c
> > new file mode 100644
> > index 000..c54b090
> > --- /dev/null
> > +++ b/drivers/gpu/drm/sunxi/de2_hdmi_h3.c
> > @@ -0,0 +1,478 @@
> > +/*
> > + * Allwinner H3 HDMI lowlevel functions
> > + *
> > + * Copyright (C) 2016 Jean-Francois Moine
> > + *
> > + * Adapted from the file
> > + * lichee/linux-3.4/drivers/video/sunxi/disp2/hdmi/aw/hdmi_bsp_sun8iw7.c
> > + * with no license nor copyright.
> > + */
[snip]
> > +/*
> > + * [0] = vic (cea Video ID)
> > + * [1] used in hdmi_phy_set / bsp_hdmi_audio
> > + * [2..17] used in bsp_hdmi_video
> > + */
> > +static const struct para_tab ptbl[] = {
> > + {{ 6, 1, 1, 1, 5, 3, 0, 1, 4, 0, 0, 160, 20, 38, 124, 240, 22,
> > 0, 0}},
[snip]
> did you try to figure out what the values in this table actually mean?
>
> I tried it some time ago because I wanted to add some more resolutions
> to 3.4, but never got further than what I'll add below. But it might be
> useful now, to get rid of at least some of the magic constants.
> With some more work (what does [1] mean?) we might be able to drop the
> entire table and use the values from drm_display_mode directly instead.
>
> unsure (hard to verify):
> [2] = pixel repetition (1 = 2x)
> [3] = bit0: interlaced (no idea about the 96/0x60 yet)
> [17] = something csc related
> [18] = unused
>
> pretty sure (verified by comparing with timings):
> [4] = horizontal active (high byte)
> [5] = vsync width
> [6] = vertical active (high byte)
> [7] = horizontal blanking (high byte)
> [8] = vertical front porch
> [9] = horizontal front porch (high byte)
> [10] = hsync width (high byte)
> [11] = horizontal active (low byte)
> [12] = horizontal blanking (low byte)
> [13] = horizontal front porch (low byte)
> [14] = hsync width (low byte)
> [15] = vertical active (low byte)
> [16] = vertical blanking
>
> Generally, nice work. I only skimmed over it by now, but I hope to test
> and review the hardware related parts more intensively sometime.
Hi Jens,
Thanks for this information, but this table is only a very small part
of the HDMI code.
I doubt that anyone could understand the other sequences of the
functions of this BSP without documentation, or could do some reverse
engineering and understand how the DE2 HDMI device works.
So, I think that we have to wait for some information and/or
authorisation from Allwinner before putting a HDMI driver for the H3
(and A83T, A64...) into the mainline.
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH RFC 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
On Tue, 5 Jan 2016 20:38:17 +
Russell King - ARM Linux wrote:
> Some comments from an ARM architecture point of view. I haven't
> reviewed it from a DRM point of view yet.
Anyway, thanks for your explanations and remarks.
> > +static void de2_crtc_enable(struct drm_crtc *crtc)
> > +{
...
> > + clk_set_rate(lcd->clk, mode->clock * 1000);
>
> What if the clock can't support the rate?
The function enabling the CRTC has no return code, so the screen would
be blurred. But this would not occur: the video PLL is in the range
30..600MHz.
> > +static int de2_hdmi_connector_mode_valid(struct drm_connector *connector,
> > + struct drm_display_mode *mode)
> > +{
> > + if (!drm_match_cea_mode(mode))
> > + return MODE_NOMODE;
>
> Maybe detect modes with a zero clock here instead?
We have no documentation about the HDMI hardware and only the CEA modes
are handled in Allwinner's driver.
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH RFC 1/2] clk: sunxi: Add sun8i display support
On Wed, 6 Jan 2016 10:39:51 +0800
Chen-Yu Tsai wrote:
> First of all, please include the clk subsystem maintainers and the
> linux-clk mailing list for all clk related patches.
OK.
> On Wed, Jan 6, 2016 at 2:28 AM, Jean-Francois Moine
> wrote:
> > Add the clock types which are used by the sun8i family for video.
>
> These clocks first appeared in the A31.
Sorry, I have the documentation of only some sun8i SoCs.
> > Signed-off-by: Jean-Francois Moine
> > ---
> > drivers/clk/sunxi/Makefile| 1 +
> > drivers/clk/sunxi/clk-sun8i-display.c | 247
> > ++
>
> Please split this into 2 patches, and 2 files: one for PLL3, named
> clk-sun6i-pll3.c, and one for the display mod clocks, named
> clk-sun6i-display.c
No problem.
[snip]
> > diff --git a/drivers/clk/sunxi/clk-sun8i-display.c
> > b/drivers/clk/sunxi/clk-sun8i-display.c
> > new file mode 100644
> > index 000..eded572
> > --- /dev/null
> > +++ b/drivers/clk/sunxi/clk-sun8i-display.c
> > @@ -0,0 +1,247 @@
> > +/*
> > + * Copyright 2015 Jean-Francois Moine
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +static DEFINE_SPINLOCK(sun8i_display_lock);
> > +
> > +/* PLL3 (video) and PLL10 (de) */
> > +struct clk_fact {
> > + struct clk_hw hw;
> > + void __iomem *reg;
> > +};
> > +#define to_clk_fact(_hw) container_of(_hw, struct clk_fact, hw)
>
> What does fact stand for?
pre-divide plus factor. Have you a better name?
> > +
> > +#define SUN8I_PLL3_MSHIFT 0
> > +#define SUN8I_PLL3_MMASK 0x0f
>
> You can use GENMASK for these. Note that GENMASK is inclusive on both ends.
>
> > +#define SUN8I_PLL3_NSHIFT 8
> > +#define SUN8I_PLL3_NMASK 0x7f
> > +#define SUN8I_PLL3_MODE_SEL0x0100
> > +#define SUN8I_PLL3_FRAC_CLK0x0200
>
> Please use the BIT() macros.
OK.
> > +
> > +static int sun8i_pll3_get_fact(unsigned long rate,
> > + unsigned long parent_rate,
> > + unsigned long *n, unsigned long *m)
> > +{
> > + if (rate == 29700)
> > + return 1;
> > + if (rate == 27000)
> > + return 0;
> > + rational_best_approximation(rate, parent_rate,
> > + SUN8I_PLL3_NMASK + 1, SUN8I_PLL3_MMASK + 1,
> > + n, m);
> > + return -1;
> > +}
> > +
> > +static unsigned long sun8i_pll3_recalc_rate(struct clk_hw *hw,
> > + unsigned long parent_rate)
> > +{
> > + struct clk_fact *fact = to_clk_fact(hw);
> > + u32 reg;
> > + u32 n, m;
> > +
> > + reg = readl(fact->reg);
> > + if (reg & SUN8I_PLL3_MODE_SEL) {
> > + n = (reg >> SUN8I_PLL3_NSHIFT) & SUN8I_PLL3_NMASK;
> > + m = (reg >> SUN8I_PLL3_MSHIFT) & SUN8I_PLL3_MMASK;
> > + return parent_rate / (m + 1) * (n + 1);
> > + }
> > + if (reg & SUN8I_PLL3_FRAC_CLK)
> > + return 29700;
> > + return 27000;
> > +}
> > +
> > +static long sun8i_pll3_round_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long *parent_rate)
> > +{
> > + int frac;
> > + unsigned long n, m;
> > +
> > + frac = sun8i_pll3_get_fact(rate, *parent_rate, , );
> > + if (frac == 1)
> > + return 29700;
> > + if (frac == 0)
> > + return 27000;
> > + return (*parent_rate * n) / m;
>
> The ordering is different from the one in recalc_rate. Considering
> integer rounding, would the results be different?
Maybe. But, you are right, 'm', as a pre-divider, should be before 'n'.
> >
[PATCH RFC 0/2] Add a display driver to the Allwinner H3
On Wed, 6 Jan 2016 22:20:46 +0100
Maxime Ripard wrote:
> > As there is no documentation about the DE2 nor about the HDMI which
> > are found in the H3, this driver has been built from Allwiiner's
> > sources.
>
> That's unfortunate :/
>
> Have you checked in the A64 BSP if there was some useful information?
Same as the H3: no more information about the display system.
> > So, there may be license problems, especially for the file
> > de2_hdmi_h3.c which contains a lot of magic values.
>
> I guess it's the biggest issue with your code right now. What licenses
> issues are we talking about here?
The documentation about the H3, as the other Allwinner documentations,
starts with:
This documentation is the original work and copyrighted
property of Allwinner Technology ("Allwinner"). Reproduction in
whole or in part must obtain the written approval of Allwinner
and give clear acknowledgement to the copyright owner.
Then, the DE2 sources contain only:
All Winner Tech, All Right Reserved. 2014-2015 Copyright (c)
Eventually, there is no copyright/author/history in the HDMI sources.
> Remember that having your Signed-off-by tag on a commit means that you
> certify that you have the right to submit the patch under the license
> you indicate in the files added and / or modified.
>
> If you don't have such right, for example because you don't have the
> right and / or authorization from the initial author to re-license
> that code, you cannot put your SoB.
OK, sorry. So, please, ignore the whole patch series.
> > The associated DT and documentation will be submitted when the H3 DTs
> > will be in the kernel.
>
> Having the DT binding documentation would really help in the review.
Here it is, as a sunxi specific documentation, but it could be generic.
--- /dev/null 1970-01-01 01:00:10.24002 +0100
+++ Documentation/devicetree/bindings/display/sunxi.txt 2016-01-08
17:48:01.775903901 +0100
@@ -0,0 +1,107 @@
+Allwinner sunxi display subsystem
+=
+
+The sunxi display subsystems contain a display controller (DE),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for DE activation
+ clock: DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-lcd"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for LCD activation
+ clock: pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+HDMI support
+
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-h3-hdmi"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ gate: for HDMI activation
+ clock: pixel clock
+ ddc-clock: for the HDMI protocol
+
+- resets: one or two phandle's to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller at 0100 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <_gates 44>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 44>;
+ ports = <_p>;
+ };
+
+ lcd0: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun8i-h3-lcd";
+ ...
+ clocks = <_gates 35>, <_clk>;
+ clock-names = "gate", "clock";
+ resets = <_rst 35>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi at 01ee {
+ compatible = "allwinner,sun8i-h3-hdmi";
+ ...
+ clocks = <_gates 43>, <_clk>,
+<_slow_clk 31>;
+ clock-names = "gate", "clock", "ddc-clock";
+ resets = <_rst 42>, <_rst 43>;
+ #address-cells = <1>;
+
[PATCH RFC 0/2] Add a display driver to the Allwinner H3
The proposed DRM driver works on a Orange PI 2 with a kernel 4.4-rc1 and the H3 patches found in Hans de Goede's GIT repository. As there is no documentation about the DE2 nor about the HDMI which are found in the H3, this driver has been built from Allwiiner's sources. So, there may be license problems, especially for the file de2_hdmi_h3.c which contains a lot of magic values. The associated DT and documentation will be submitted when the H3 DTs will be in the kernel. Jean-Francois Moine (2): clk: sunxi: Add sun8i display support drm: sunxi: Add a basic DRM driver for Allwinner DE2 drivers/clk/sunxi/Makefile| 1 + drivers/clk/sunxi/clk-sun8i-display.c | 257 ++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sunxi/Kconfig | 21 ++ drivers/gpu/drm/sunxi/Makefile| 8 + drivers/gpu/drm/sunxi/de2_crtc.c | 409 + drivers/gpu/drm/sunxi/de2_crtc.h | 42 +++ drivers/gpu/drm/sunxi/de2_de.c| 467 + drivers/gpu/drm/sunxi/de2_drm.h | 51 drivers/gpu/drm/sunxi/de2_drv.c | 376 ++ drivers/gpu/drm/sunxi/de2_hdmi.c | 381 +++ drivers/gpu/drm/sunxi/de2_hdmi.h | 34 +++ drivers/gpu/drm/sunxi/de2_hdmi_h3.c | 478 ++ drivers/gpu/drm/sunxi/de2_hdmi_h3.h | 14 + drivers/gpu/drm/sunxi/de2_plane.c | 102 16 files changed, 2644 insertions(+) create mode 100644 drivers/clk/sunxi/clk-sun8i-display.c create mode 100644 drivers/gpu/drm/sunxi/Kconfig create mode 100644 drivers/gpu/drm/sunxi/Makefile create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h create mode 100644 drivers/gpu/drm/sunxi/de2_de.c create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.c create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.h create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_h3.c create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_h3.h create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c -- 2.6.4
[PATCH RFC 2/2] drm: sunxi: Add a basic DRM driver for Allwinner DE2
In recent SoCs, as the H3, Allwinner uses a new display interface, DE2.
This patch adds a DRM video driver for this interface,
and also a driver for the HDMI connector found in the H3.
Signed-off-by: Jean-Francois Moine
---
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile| 1 +
drivers/gpu/drm/sunxi/Kconfig | 21 ++
drivers/gpu/drm/sunxi/Makefile | 8 +
drivers/gpu/drm/sunxi/de2_crtc.c| 409 ++
drivers/gpu/drm/sunxi/de2_crtc.h| 42
drivers/gpu/drm/sunxi/de2_de.c | 467 +++
drivers/gpu/drm/sunxi/de2_drm.h | 51
drivers/gpu/drm/sunxi/de2_drv.c | 376
drivers/gpu/drm/sunxi/de2_hdmi.c| 381
drivers/gpu/drm/sunxi/de2_hdmi.h| 34 +++
drivers/gpu/drm/sunxi/de2_hdmi_h3.c | 478
drivers/gpu/drm/sunxi/de2_hdmi_h3.h | 14 ++
drivers/gpu/drm/sunxi/de2_plane.c | 102
14 files changed, 2386 insertions(+)
create mode 100644 drivers/gpu/drm/sunxi/Kconfig
create mode 100644 drivers/gpu/drm/sunxi/Makefile
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.c
create mode 100644 drivers/gpu/drm/sunxi/de2_crtc.h
create mode 100644 drivers/gpu/drm/sunxi/de2_de.c
create mode 100644 drivers/gpu/drm/sunxi/de2_drm.h
create mode 100644 drivers/gpu/drm/sunxi/de2_drv.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi.h
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_h3.c
create mode 100644 drivers/gpu/drm/sunxi/de2_hdmi_h3.h
create mode 100644 drivers/gpu/drm/sunxi/de2_plane.c
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c4bf9a1..edef0c8 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -266,3 +266,5 @@ source "drivers/gpu/drm/amd/amdkfd/Kconfig"
source "drivers/gpu/drm/imx/Kconfig"
source "drivers/gpu/drm/vc4/Kconfig"
+
+source "drivers/gpu/drm/sunxi/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 1e9ff4c..597c246 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -75,3 +75,4 @@ obj-y += i2c/
obj-y += panel/
obj-y += bridge/
obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu/
+obj-$(CONFIG_DRM_SUNXI) += sunxi/
diff --git a/drivers/gpu/drm/sunxi/Kconfig b/drivers/gpu/drm/sunxi/Kconfig
new file mode 100644
index 000..9b4d414
--- /dev/null
+++ b/drivers/gpu/drm/sunxi/Kconfig
@@ -0,0 +1,21 @@
+#
+# Allwinner Video configuration
+#
+
+config DRM_SUNXI
+ tristate "DRM Support for Allwinner Video"
+ depends on DRM && ARCH_SUNXI
+ depends on OF
+ select DRM_KMS_HELPER
+ select DRM_KMS_CMA_HELPER
+ select DRM_GEM_CMA_HELPER
+ help
+ Choose this option if you have a Allwinner chipset.
+
+config DRM_SUNXI_DE2
+ tristate "Support for Allwinner Video with DE2 interface"
+ depends on DRM_SUNXI && MACH_SUN8I
+ select REGMAP_MMIO
+ help
+ Choose this option if your Allwinner chipset has the DE2 interface
+ as the H3.
diff --git a/drivers/gpu/drm/sunxi/Makefile b/drivers/gpu/drm/sunxi/Makefile
new file mode 100644
index 000..8bb533f
--- /dev/null
+++ b/drivers/gpu/drm/sunxi/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for Allwinner's DRM device driver
+#
+
+sunxi-de2-drm-objs := de2_drv.o de2_de.o de2_crtc.o de2_plane.o
+sunxi-de2-hdmi-objs := de2_hdmi.o de2_hdmi_h3.o
+
+obj-$(CONFIG_DRM_SUNXI_DE2) += sunxi-de2-drm.o sunxi-de2-hdmi.o
diff --git a/drivers/gpu/drm/sunxi/de2_crtc.c b/drivers/gpu/drm/sunxi/de2_crtc.c
new file mode 100644
index 000..92c20d0
--- /dev/null
+++ b/drivers/gpu/drm/sunxi/de2_crtc.c
@@ -0,0 +1,409 @@
+/*
+ * Allwinner DRM driver - DE2 CRTC
+ *
+ * Copyright (C) 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#include
+
+#include "de2_drm.h"
+#include "de2_crtc.h"
+
+/* I/O map */
+
+struct tcon {
+ u32 gctl;
+#defineTCON_GCTL_TCON_En 0x8000
+ u32 gint0;
+#defineTCON_GINT0_TCON1_Vb_Int_En 0x4000
+#defineTCON_GINT0_TCON1_Vb_Int_Flag 0x1000
+ u32 gint1;
+ u32 dum0[13];
+ u32 tcon0_ctl;
+#defineTCON0_CTL_TCON_En 0x8000
+ u32 dum1[19];
+ u32 tcon1_ctl;
+#defineTCON1_CTL_TCON_En 0x8000
+#defineTCON1_CTL_Interlace_En 0x0010
+#defineTCON1_CTL_Start_Delay_SHIFT 4
+#defineTCON1_CTL_Start_Delay_MASK 0x01f0
+ u32 basic0;
[PATCH RFC 1/2] clk: sunxi: Add sun8i display support
Add the clock types which are used by the sun8i family for video.
Signed-off-by: Jean-Francois Moine
---
drivers/clk/sunxi/Makefile| 1 +
drivers/clk/sunxi/clk-sun8i-display.c | 247 ++
2 files changed, 258 insertions(+)
create mode 100644 drivers/clk/sunxi/clk-sun8i-display.c
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index cb4c299..145c078 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -10,6 +10,7 @@ obj-y += clk-a10-pll2.o
obj-y += clk-a20-gmac.o
obj-y += clk-mod0.o
obj-y += clk-simple-gates.o
+obj-y += clk-sun8i-display.o
obj-y += clk-sun8i-mbus.o
obj-y += clk-sun9i-core.o
obj-y += clk-sun9i-mmc.o
diff --git a/drivers/clk/sunxi/clk-sun8i-display.c
b/drivers/clk/sunxi/clk-sun8i-display.c
new file mode 100644
index 000..eded572
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun8i-display.c
@@ -0,0 +1,247 @@
+/*
+ * Copyright 2015 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static DEFINE_SPINLOCK(sun8i_display_lock);
+
+/* PLL3 (video) and PLL10 (de) */
+struct clk_fact {
+ struct clk_hw hw;
+ void __iomem *reg;
+};
+#define to_clk_fact(_hw) container_of(_hw, struct clk_fact, hw)
+
+#define SUN8I_PLL3_MSHIFT 0
+#define SUN8I_PLL3_MMASK 0x0f
+#define SUN8I_PLL3_NSHIFT 8
+#define SUN8I_PLL3_NMASK 0x7f
+#define SUN8I_PLL3_MODE_SEL0x0100
+#define SUN8I_PLL3_FRAC_CLK0x0200
+
+static int sun8i_pll3_get_fact(unsigned long rate,
+ unsigned long parent_rate,
+ unsigned long *n, unsigned long *m)
+{
+ if (rate == 29700)
+ return 1;
+ if (rate == 27000)
+ return 0;
+ rational_best_approximation(rate, parent_rate,
+ SUN8I_PLL3_NMASK + 1, SUN8I_PLL3_MMASK + 1,
+ n, m);
+ return -1;
+}
+
+static unsigned long sun8i_pll3_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_fact *fact = to_clk_fact(hw);
+ u32 reg;
+ u32 n, m;
+
+ reg = readl(fact->reg);
+ if (reg & SUN8I_PLL3_MODE_SEL) {
+ n = (reg >> SUN8I_PLL3_NSHIFT) & SUN8I_PLL3_NMASK;
+ m = (reg >> SUN8I_PLL3_MSHIFT) & SUN8I_PLL3_MMASK;
+ return parent_rate / (m + 1) * (n + 1);
+ }
+ if (reg & SUN8I_PLL3_FRAC_CLK)
+ return 29700;
+ return 27000;
+}
+
+static long sun8i_pll3_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ int frac;
+ unsigned long n, m;
+
+ frac = sun8i_pll3_get_fact(rate, *parent_rate, , );
+ if (frac == 1)
+ return 29700;
+ if (frac == 0)
+ return 27000;
+ return (*parent_rate * n) / m;
+}
+
+static int sun8i_pll3_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct clk_fact *fact = to_clk_fact(hw);
+ u32 reg;
+ int frac;
+ unsigned long n, m;
+
+ reg = readl(fact->reg) &
+ ~(SUN8I_PLL3_MODE_SEL |
+ SUN8I_PLL3_FRAC_CLK |
+ (SUN8I_PLL3_NMASK << SUN8I_PLL3_NSHIFT) |
+ (SUN8I_PLL3_MMASK << SUN8I_PLL3_MSHIFT));
+
+ frac = sun8i_pll3_get_fact(rate, parent_rate, , );
+ if (frac == 1)
+ reg |= SUN8I_PLL3_FRAC_CLK; /* 297MHz */
+ else if (frac == 0)
+ ; /* 270MHz */
+ else
+ reg |= SUN8I_PLL3_MODE_SEL |
+ ((n - 1) << SUN8I_PLL3_NSHIFT) |
+ ((m - 1) << SUN8I_PLL3_MSHIFT);
+
+ writel(reg, fact->reg);
+
+ /* delay 500us so pll stabilizes */
+ __delay(500);
+
+ return 0;
+}
+
+static const struct clk_ops clk_sun8i_pll3_fact_ops = {
+ .recalc_rate = sun8i_pll3_recalc_rate,
+ .round_rate = sun8i_pll3_round_rate,
+ .set_rate = sun8i_pll3_set_rate,
+};
+
+static void __init sun8i_pll3_setup(struct device_node *node)
+{
+ const char *clk_name = node->name, *parent;
+ struct clk_fact *fact;
+ struct clk_gate *gate;
+ void __iomem *
[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it
On Thu, 24 Dec 2015 12:36:10 +
Russell King - ARM Linux wrote:
> It seems that you're trying to work around a limitation in Linux by
> modifying the hardware representation...
Sorry to come back to this topic, but I think you are wrong.
Looking at the imx6 DTs, the problem comes from the display-subsystem
node which is a pure Linux specific software entity.
If you want to describe only the hardware in the DT, everything is
simple.
A IPU is a image controller with its sub-devices. Seen from the system, it
is like a 'board' with its devices (LCDs, camera...).
When 2 IPUs, there are 2 independant boards.
Here is what could be a pure hardware DT:
/* no display-subsystem */
ipu1: ipu at 0240 { /* image controller / board 1 */
compatible = "fsl,imx6q-ipu";
...
ports = <_di0>, <_di1>;
};
ipu1_di0: di at 0 { /* display interface / crtc 1 */
compatible = "fsl,imx6q-di";
...
ipu1_di0_hdmi: endpoint at 1 {
remote-endpoint = <_mux_0>;
};
ipu1_di0_mipi: endpoint at 2 {
remote-endpoint = <_mux_0>;
}
...
};
ipu1_di1: di at 1 { /* display interface / crtc 2 */
compatible = "fsl,imx6q-di";
...
ipu1_di1_hdmi: endpoint at 1 {
remote-endpoint = <_mux_1>;
};
ipu1_di1_mipi: endpoint at 2 {
remote-endpoint = <_mux_1>;
}
...
};
ipu2: ipu at 0280 { /* image controller / board 2 */
compatible = "fsl,imx6q-ipu";
...
ports = <_di0>, <_di1>;
};
ipu2_di0: di at 0 { /* display interface / crtc 1 */
compatible = "fsl,imx6q-di";
...
ipu2_di0_hdmi: endpoint at 1 {
remote-endpoint = <_mux_2>;
};
ipu2_di0_mipi: endpoint at 2 {
remote-endpoint = <_mux_2>;
}
...
};
ipu2_di1: di at 1 { /* display interface / crtc 2 */
compatible = "fsl,imx6q-di";
...
ipu2_di1_hdmi: endpoint at 1 {
remote-endpoint = <_mux_3>;
};
ipu2_di1_mipi: endpoint at 2 {
remote-endpoint = <_mux_3>;
}
...
};
Then, a standard component binding (port->parent) works fine...
(you may note that the same problem exists with audio: the
'simple-card' is also a pure Linux specific software entity)
--
Merry Christmas | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it
On Thu, 24 Dec 2015 10:52:07 +
Russell King - ARM Linux wrote:
> On Thu, Dec 24, 2015 at 09:15:28AM +0100, Jean-Francois Moine wrote:
> > Well, two topics:
> >
> > - adding a second 'of_compare' function complexifies the code
> > and people may wonder why such a function is needed and what
> > they have to put inside.
> >
> > - usually, the component drivers just do a component_add() of the device
> > at probe time.
>
> ... which is exactly what does happen throughout imx-drm.
>
> > Now, as the bind() function of the components of the first level
> > returns the port in 'data', some work has to be done for retrieving
> > the device.
> > This can (should?) be done in the bind() function.
>
> Sorry, this still makes zero sense to me. "retrieving the device"
> is all done by the core component code and has nothing to do with
> the drivers themselves.
Right, sorry, I wrote 'data' while thinking 'dev'.
> > In drm/imx/ipuv3-crtc.c, this is done by a hack, changing the device
> > node reference before calling component_add()!
>
> What hack?
[snip]
> There's no hack there. I see nothing changing dev->of_node there.
Right again, I was looking in 4.4-rc1.
> > I looked at the imx-drm and the associated DTs, and I think that,
> > without the v2 patch and keeping the port parent as the component
> > (previous mail), the code could be simplified adding an intermediate
> > device node in the DT.
>
> Not going to happen, because that's going to break compatibility with
> existing DTs.
OK, I cannot discuss against that!
> Let me explain instead what's going on, and why imx-drm is different.
Already understood.
[snip]
> However, when we come to the Linux implementation, things get sticky
> because we need to select the correct platform device corresponding
> with the IPU's port. This can only be done using the 'port' node
> and not port->parent.
>
> port->parent would be the IPU device node itself. If we were to
> introduce the additional ports {} node, that doesn't help, because
> now port->parent points at the ports {} node instead, not the actual
> port - and we need the port itself to identify which of the IPU's
> own created platform devices to select.
>
> So, modifying DT doesn't help in any way, even if you ignore the fact
> that we need to maintain backwards compatibility.
The ports {} node is just a container, and so is the (unique) port {}
node which is inside:
ipu1: ipu at 0240 {
...
ports at 2 {/* di0 device */
ipu1_di0: port {
...
ipu1_di0_hdmi: endpoint at 1 {
remote-endpoint = <_mux_0>;
};
ipu1_di0_mipi: endpoint at 2 {
remote-endpoint = <_mux_0>;
};
...
};
};
ports at 3 {/* di1 device */
ipu1_di1: port {
...
ipu1_di1_hdmi: endpoint at 1 {
remote-endpoint = <_mux_1>;
};
ipu1_di1_mipi: endpoint at 2 {
remote-endpoint = <_mux_1>;
};
...
};
};
};
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it
On Wed, 23 Dec 2015 18:59:48 +
Russell King - ARM Linux wrote:
> > > Have a look at my v2 where I've introduced two compare functions and also
> > > modified the Rockchip compare_port() to use port->parent in the
> > > comparison. I
> > > guess that should solve your problem.
> >
> > Keeping the port instead of the parent asks for more code, but,
> > especially, it also asks for changes in the component drivers because,
> > at bind time, in 'data', they get a port instead of the device.
>
> Sorry, this doesn't make sense. You have far too many sub-clauses
> which mean nothing at all. Please rephrase.
Well, two topics:
- adding a second 'of_compare' function complexifies the code
and people may wonder why such a function is needed and what
they have to put inside.
- usually, the component drivers just do a component_add() of the device
at probe time.
Now, as the bind() function of the components of the first level
returns the port in 'data', some work has to be done for retrieving
the device.
This can (should?) be done in the bind() function.
In drm/imx/ipuv3-crtc.c, this is done by a hack, changing the device
node reference before calling component_add()!
I looked at the imx-drm and the associated DTs, and I think that,
without the v2 patch and keeping the port parent as the component
(previous mail), the code could be simplified adding an intermediate
device node in the DT.
For example, in imx6qdl.dtsi:
ipu1: ipu at 0240 {
...
ports at 2 {/* di device */
ipu1_di0: port {
...
ipu1_di0_hdmi: endpoint at 1 {
remote-endpoint = <_mux_0>;
};
...
};
};
}
In the code, the ipu driver searches the 'ports' and adds them as components.
After binding, the devices are the 'ports'.
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it
On Wed, 23 Dec 2015 10:05:34 + Liviu Dudau wrote: > > What was the reason to keep the "ports" node instead of the device? > > The function is an extract of common code sprinkled through a few DRM drivers, > they all used port rather than port->parent. Sorry for I could find such drivers. May you give me any pointer? > Have a look at my v2 where I've introduced two compare functions and also > modified the Rockchip compare_port() to use port->parent in the comparison. I > guess that should solve your problem. Keeping the port instead of the parent asks for more code, but, especially, it also asks for changes in the component drivers because, at bind time, in 'data', they get a port instead of the device. You might say that this could be interesting for components with many different masters (video and audio), but this could be solved adding intermediate device nodes in the DT (ports). -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it
On Tue, 22 Dec 2015 17:38:00 +
Liviu Dudau wrote:
> On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
> > Hello,
> >
> > This is v2 of the patchset trying to make drm_of_component_probe() cope
> > with finding
> > both local crtc ports and remote encoder ones. Heiko Stübner was nice
> > enough to test
> > an earlier version that was patched following Russell's suggestions on
> > rk3288, but
> > I haven't seen any reports from iMX or Armada users.
> >
> > Changelog:
> > v2: Updated the drm_of_component_probe() comment to explain why the
> > reference count
> > is not dropped. Fixed the compare_port() function for rockchip as
> > described by
> > Russell.
> > v1: Original submission.
> > http://lists.freedesktop.org/archives/dri-devel/2015-November/094546.html
>
> Gentle ping, this has now been tested by Rockchip people and fixes the
> earlier version
> that had to be reverted in mainline. Can it be included in the -next
> somewhere?
Hi Liviu,
Sorry for being a bit late.
I wanted to use drm_of_component_probe() for a new DRM driver, but I
could not find any way to do it: you add the "ports" nodes as
components while, usually, the components are the device nodes
themselves.
With this simple patch:
diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
index 493c05c..dbd2921 100644
--- a/drivers/gpu/drm/drm_of.c
+++ b/drivers/gpu/drm/drm_of.c
@@ -101,7 +101,7 @@ int drm_of_component_probe(struct device *dev,
continue;
}
- component_match_add(dev, , compare_of, port);
+ component_match_add(dev, , compare_of, port->parent);
of_node_put(port);
}
everything is easy, my DT being like:
de_controller {
...
ports = <_p>;
};
lcd_controller {
...
lcd0_p: port {
lcd0_ep: endpoint {
remote-endpoint = <_ep>;
};
};
};
What was the reason to keep the "ports" node instead of the device?
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[GIT PULL] On-demand device probing
Sorry to enter this thread a bit late. About the number of probe deferred messages, I proposed a simple patch to reduce them: https://lkml.org/lkml/2013/8/20/218 I was wondering how many messages this patch could save... -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH 00/11] tda998x updates
On Fri, 9 Oct 2015 14:25:26 +0100 Russell King - ARM Linux wrote: > > Here's my currently queued TDA998x development work for 4.4. > > As there have been no comments against this series, I'll send David a > pull request later today. It works fine for me. Thanks. Tested-by: Jean-Francois Moine -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[alsa-devel] [PATCH RFC V2 0/5] another generic audio hdmi codec proposal
On Tue, 6 Oct 2015 11:23:03 +0200 Arnaud Pouliquen wrote: [snip] > As API is defined in DRM, it seems more logical to match it with the one > defined for video. From my windows, i didn't see any blocking point to > connect codec callback with this API. > But anyway, this API is not freezed, it could be improved with your help. Arnaud, your implementation seems more heavy than Jyri's, and I don't feel the DRM bridge. For HDMI, the exchanges between DRM and ALSA are only: - DRM -> ALSA - device connection with the audio constraints - device disconnection - ALSA -> DRM - start audio with the chosen audio parameters - stop audio and, in the system, the HDMI devices are seen as DRM connectors (video view) and as ASoC CODECs (audio view). We just need a link between these entities. I don't think that the bridge offers this. (going further, it seems natural to me that both entities would be supported by the same kernel device and that the exchange functions and values could be defined both ways from a common structure - audio constraints, playback parameters, connector2codec functions, codec2connector functions - but this is an other story...) -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH RFC v4 4/8] drm/i2c: tda998x: Add support of a DT graph of ports
On Mon, 21 Sep 2015 10:19:18 -0500
Rob Herring wrote:
> On 09/18/2015 06:06 AM, Jyri Sarha wrote:
> > From: Jean-Francois Moine
> >
> > Two kinds of ports may be declared in a DT graph of ports: video and audio.
> > This patch accepts the port value from a video port as an alternative
> > to the video-ports property.
> > It also accepts audio ports in the case the transmitter is not used as
> > a slave encoder.
> > The new file include/sound/tda998x.h prepares to the definition of
> > a tda998x CODEC.
> >
> > Signed-off-by: Jean-Francois Moine
> > Signed-off-by: Jyri Sarha
> > ---
[snip]
> > diff --git a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
> > b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
> > index e9e4bce..35f6a80 100644
> > --- a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
> > +++ b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
> > @@ -16,6 +16,35 @@ Optional properties:
> >
> >- video-ports: 24 bits value which defines how the video controller
> > output is wired to the TDA998x input - default: <0x230145>
> > + This property is not used when ports are defined.
> > +
> > +Optional nodes:
> > +
> > + - port: up to three ports.
> > + The ports are defined according to [1].
> > +
> > +Video port.
> > + There may be only one video port.
> > + This one must contain the following property:
> > +
> > + - port-type: must be "rgb"
>
> Why do you need this if there is no other choice? The port number should
> define which one is video.
There is no specific port number.
One of the ports is video and two other ones are audio.
> > +
> > + and may contain the optional property:
> > +
> > + - reg: 24 bits value which defines how the video controller
> > + output is wired to the TDA998x input (video pins)
> > + When absent, the default value is <0x230145>.
>
> I'm failing to decode how this value works. In any case, I would keep
> this as a vendor specific property rather than abusing reg.
This has been explained in
https://lkml.org/lkml/2014/1/20/86
> > +
> > +Audio ports.
> > + There may be one or two audio ports.
> > + These ones must contain the following properties:
> > +
> > + - port-type: must be "i2s" or "spdif"
> > +
> > + - reg: 8 bits value which defines how the audio controller
> > + output is wired to the TDA998x input (audio pins)
>
> reg is 32-bits.
This port has only 8 significant bits as explained in
https://lkml.org/lkml/2015/1/7/362
> > +
> > +[1] Documentation/devicetree/bindings/graph.txt
> >
> > Example:
> >
> > @@ -26,4 +55,26 @@ Example:
> > interrupts = <27 2>;/* falling edge */
> > pinctrl-0 = <_camera>;
> > pinctrl-names = "default";
> > +
> > + port at 230145 {
> > + port-type = "rgb";
> > + reg = <0x230145>;
> > + hdmi_0: endpoint {
> > + remote-endpoint = <_0>;
> > + };
> > + };
> > + port at 3 { /* AP1 = I2S */
>
> Is 3 significant? What happened to 0-2?
The value after @ is the 'reg' value (= value of the port register).
> > + port-type = "i2s";
> > + reg = <0x03>;
> > + tda998x_i2s: endpoint {
> > + remote-endpoint = <_i2s>;
> > + };
> > + };
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2] drm/i2c: tda998x: Fix bad checksum of the HDMI AVI infoframe
On Tue, 28 Jul 2015 15:59:17 +0200
Jean-Francois Moine wrote:
> Using hdmi_avi_infoframe_pack() to create the AVI infoframe calculates
> the checksum of the frame and breaks the second calculation which is
> done in tda998x_write_if(). Then the HDMI AVI frame is wrong and
> the display device does not handle correctly the video frames.
>
> Fixes: 8c7a075da9f7980c ("use drm_hdmi_avi_infoframe_from_display_mode()")
> Signed-off-by: Jean-Francois Moine
> ---
> v2: add the Fixes: tag
> ---
> drivers/gpu/drm/i2c/tda998x_drv.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
> b/drivers/gpu/drm/i2c/tda998x_drv.c
> index fe1599d..424228b 100644
> --- a/drivers/gpu/drm/i2c/tda998x_drv.c
> +++ b/drivers/gpu/drm/i2c/tda998x_drv.c
> @@ -606,8 +606,6 @@ static void
> tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr,
>uint8_t *buf, size_t size)
> {
> - buf[PB(0)] = tda998x_cksum(buf, size);
> -
> reg_clear(priv, REG_DIP_IF_FLAGS, bit);
> reg_write_range(priv, addr, buf, size);
> reg_set(priv, REG_DIP_IF_FLAGS, bit);
> @@ -627,6 +625,8 @@ tda998x_write_aif(struct tda998x_priv *priv, struct
> tda998x_encoder_params *p)
> buf[PB(4)] = p->audio_frame[4];
> buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */
>
> + buf[PB(0)] = tda998x_cksum(buf, sizeof(buf));
> +
> tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf,
>sizeof(buf));
> }
Ping!
--
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
[PATCH v2] drm/i2c: tda998x: Fix bad checksum of the HDMI AVI infoframe
Using hdmi_avi_infoframe_pack() to create the AVI infoframe calculates
the checksum of the frame and breaks the second calculation which is
done in tda998x_write_if(). Then the HDMI AVI frame is wrong and
the display device does not handle correctly the video frames.
Fixes: 8c7a075da9f7980c ("use drm_hdmi_avi_infoframe_from_display_mode()")
Signed-off-by: Jean-Francois Moine
---
v2: add the Fixes: tag
---
drivers/gpu/drm/i2c/tda998x_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index fe1599d..424228b 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -606,8 +606,6 @@ static void
tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr,
uint8_t *buf, size_t size)
{
- buf[PB(0)] = tda998x_cksum(buf, size);
-
reg_clear(priv, REG_DIP_IF_FLAGS, bit);
reg_write_range(priv, addr, buf, size);
reg_set(priv, REG_DIP_IF_FLAGS, bit);
@@ -627,6 +625,8 @@ tda998x_write_aif(struct tda998x_priv *priv, struct
tda998x_encoder_params *p)
buf[PB(4)] = p->audio_frame[4];
buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */
+ buf[PB(0)] = tda998x_cksum(buf, sizeof(buf));
+
tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf,
sizeof(buf));
}
--
2.4.6
[PATCH RFC] drm/i2c: tda998x: dead-code or unhandled error condition ?
On Wed, 10 Jun 2015 14:58:48 +0200 Nicholas Mc Guire wrote: > event API conformance testing with coccinelle spatches are being > used to locate API usage inconsistencies this triggert with: > ./drivers/gpu/drm/i2c/tda998x_drv.c:1062 > incorrect check for negative return > > The return of wait_event_timeout is always >= 0, thus the negative > check was effectively being ignoring - as the timeout will be checked > a few lines below the error condition being checked here seems to be > wrong or this is simply dead code which would be my guess as the > timeout condition check covers the wait-queue related failure condition. > > Signed-off-by: Nicholas Mc Guire Acked-by: Jean-Francois Moine -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH] drm/i2c: tda998x: Fix bad checksum of the HDMI AVI infoframe
The commit 8c7a075da9f7980cc95ffcd7e6621d4a87f20f40
"use drm_hdmi_avi_infoframe_from_display_mode()"
also uses hdmi_avi_infoframe_pack() to create the AVI infoframe.
This function sets the checksum of the frame and this breks
the second calculation of the checksum done in tda998x_write_if().
Signed-off-by: Jean-Francois Moine
---
drivers/gpu/drm/i2c/tda998x_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index fe1599d..424228b 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -606,8 +606,6 @@ static void
tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr,
uint8_t *buf, size_t size)
{
- buf[PB(0)] = tda998x_cksum(buf, size);
-
reg_clear(priv, REG_DIP_IF_FLAGS, bit);
reg_write_range(priv, addr, buf, size);
reg_set(priv, REG_DIP_IF_FLAGS, bit);
@@ -627,6 +625,8 @@ tda998x_write_aif(struct tda998x_priv *priv, struct
tda998x_encoder_params *p)
buf[PB(4)] = p->audio_frame[4];
buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */
+ buf[PB(0)] = tda998x_cksum(buf, sizeof(buf));
+
tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf,
sizeof(buf));
}
--
2.1.4
drm/edid: sound/core: pcm_drm_eld.c compilation error in 4.2
The file sound/core/pcm_drm_eld.c which was added by the commit 838d1631b766529213684f07dd71cdf2e92f0623 ALSA: pcm: add DRM ELD helper lacks the function drm_eld_sad() which was defined by Russell's patch http://article.gmane.org/gmane.linux.ports.arm.kernel/411574 drm/edid: add function to help find SADs This patch has not been applied. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH early RFC 0/2] Implement ASoC HDMI codec library
On Wed, 13 May 2015 12:23:45 +0300 Jyri Sarha wrote: > Jean-Francois, would you consider trying the generic ASoC patch with > your HW, as I can not test the spdif functionality with mine? Hi Jyri, I am not sure to need all the stuff you coded. My tda998x CODEC is quite empty and it works fine in my system. If you look at my last patch request ([PATCH v12 6/6] ASoC: tda998x: add a codec to the HDMI transmitter - http://mailman.alsa-project.org/pipermail/alsa-devel/2015-May/091758.html), the code is much smaller than yours and does not ask for a structure constraint (+/* Has to be the first member of the hdmi endcoder's drvdata */). So, I'd rather see a real hdmi codec library, i.e. a set of common functions as Russell's DRM ELD helper, each specific hdmi codec being free about the mechanism used for the exchanges with the hdmi transmitter. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v10 0/9] ASoC: tda998x: add a codec to the HDMI transmitter
On Mon, 27 Apr 2015 20:25:02 +0200 Jean-Francois Moine wrote: > Using i2s and s/pdif at the same time with the simple card asks for a > patch as the one I submitted in february 2014 (ASoC: simple-card: DT > fix and multi DAI links extension). Sorry, the patch was "ASoC: simple-card: Add multi-CODEC support" submitted in january 2015: http://mailman.alsa-project.org/pipermail/alsa-devel/2015-January/085855.html -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v10 0/9] ASoC: tda998x: add a codec to the HDMI transmitter
On Mon, 27 Apr 2015 14:33:45 +0300 Jyri Sarha wrote: > Have you done anything about the tda998x audio support lately? > > I was thinking of taking a shot at this now that I finally seem to have > some time for it. However, if you are just about to send another series > I'll wait for that first and see what makes the most sense after that. > > My plan is to do something really simple first. No graph bindings or > anything fancy like that. Just a minimal dt-binding to for audio pin > configuration and use simple-card for the rest. I still try to make it > possible to support spdif and i2s at the same time, but I can not test > it as I do not have such HW. > > I also try to make the ASoC part as generic as possible, so that it > could be reused by other HDMI encoders with spdif or i2s interface. Hi Jyri, I was busy on an other work, so, I did not advance on the tda998x. If you look at the patch series, it contains 3 independant parts: - dynamic building of the DAIs in the kirkwood audio controller, - audio CODEC of the tda998x - DT card based on audio graph It seems that only the last part raised a problem. Otherwise, the simple card works fine with the 2 first parts. I am merging my patches in 4.1-rc1, and, as soon as I get an image on my screen :), I will resubmit a patch series but about the tda998x codec only. Using i2s and s/pdif at the same time with the simple card asks for a patch as the one I submitted in february 2014 (ASoC: simple-card: DT fix and multi DAI links extension). As I am using my DT card, I will not resubmit it. Eventually, the kirkwood patches are not critical. -- Ken ar c'hentañ| ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/
[PATCH v10 0/9] ASoC: tda998x: add a codec to the HDMI transmitter
Based on broonie/ASoC v10: - add the generic dt-card - define the audio ports from a DT graph of ports (Russell King) - reuse HDMI constants (Andrew Jackson - Jyri Sarha) - alloc rate_constraints in codec (Jyri Sarha) - fix bad number of channels (Jyri Sarha) - correct codec generation from config (Russell King - Jyri Sarha) - no module init/exit (Russell King) v9: - back to a TDA998x specific CODEC - more comments - change magic values to constants v8: - change some comments about the patches v7: - remove the change of the K predivider (Jyri Sarha) - add S24_3LE and S32_LE as possible audio formats (Jyri Sarha) - don't move the struct priv2 definition and use the slave encoder private data as the device private data (Russell King) - remove the useless request_module (Russell King/Mark Brown) - don't lock the HDMI module (Russell King) - use platform_device_unregister to remove the codec (Russell King) v6: - extend the HDMI CODEC instead of using a specific CODEC v5: - use the TDA998x private data instead of a specific area for the CODEC interface - the CODEC is TDA998x specific (Mark Brown) v4: - remove all the TDA998x specific stuff from the CODEC - move the EDID scan from the CODEC to the TDA998x - move the CODEC to sound/soc (Mark Brown) - update the audio_sample_rate from the EDID (Andrew Jackson) v3: fix bad rate (Andrew Jackson) v2: check double stream start (Mark Brown) Jean-Francois Moine (9): ASoC: kirkwood: dynamically build the DAI array ASoC: kirkwood: check the DAI type from the DAI name ASoC: kirkwood: accept the DAI definitions from a graph of ports drm/i2c: tda998x: Add support of a DT graph of ports drm/i2c: tda998x: Change drvdata for audio extension ASoC: tda998x: add a codec to the HDMI transmitter drm/i2c: tda998x: set cts_n according to the sample width ASoC: core: export snd_soc_get_dai_name ASoC: add generic dt-card support .../devicetree/bindings/drm/i2c/tda998x.txt| 51 .../devicetree/bindings/sound/mvebu-audio.txt | 30 +++ drivers/gpu/drm/i2c/tda998x_drv.c | 237 +- include/sound/soc.h| 2 + include/sound/tda998x.h| 32 +++ sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/tda998x.c | 175 + sound/soc/generic/Kconfig | 2 + sound/soc/generic/Makefile | 2 + sound/soc/generic/dt-card.c| 275 + sound/soc/kirkwood/kirkwood-i2s.c | 141 ++- sound/soc/kirkwood/kirkwood.h | 4 +- sound/soc/soc-core.c | 5 +- 14 files changed, 877 insertions(+), 86 deletions(-) create mode 100644 include/sound/tda998x.h create mode 100644 sound/soc/codecs/tda998x.c create mode 100644 sound/soc/generic/dt-card.c -- 2.1.4
[PATCH v10 9/9] ASoC: add generic dt-card support
To create simple cards, the syntax of the simple-card does not follow
the common binding of the device graphs
(Documentation/devicetree/bindings/graph.txt).
dt-card devices are created by audio controllers with themselves as the
root of the graph. The sound card is created according to the parameters
found in the tree.
Signed-off-by: Jean-Francois Moine
---
sound/soc/generic/Kconfig | 2 +
sound/soc/generic/Makefile | 2 +
sound/soc/generic/dt-card.c | 275
3 files changed, 279 insertions(+)
create mode 100644 sound/soc/generic/dt-card.c
diff --git a/sound/soc/generic/Kconfig b/sound/soc/generic/Kconfig
index 610f612..9c5e1e2 100644
--- a/sound/soc/generic/Kconfig
+++ b/sound/soc/generic/Kconfig
@@ -2,3 +2,5 @@ config SND_SIMPLE_CARD
tristate "ASoC Simple sound card support"
help
This option enables generic simple sound card support
+config SND_DT_CARD
+ tristate
diff --git a/sound/soc/generic/Makefile b/sound/soc/generic/Makefile
index 9c3b246..56834a9 100644
--- a/sound/soc/generic/Makefile
+++ b/sound/soc/generic/Makefile
@@ -1,3 +1,5 @@
snd-soc-simple-card-objs := simple-card.o
+snd-soc-dt-card-objs := dt-card.o
obj-$(CONFIG_SND_SIMPLE_CARD) += snd-soc-simple-card.o
+obj-$(CONFIG_SND_DT_CARD) += snd-soc-dt-card.o
diff --git a/sound/soc/generic/dt-card.c b/sound/soc/generic/dt-card.c
new file mode 100644
index 000..6a5de2f
--- /dev/null
+++ b/sound/soc/generic/dt-card.c
@@ -0,0 +1,275 @@
+/*
+ * ALSA SoC DT based sound card support
+ *
+ * Copyright (C) 2015 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+
+/* check if a node is an audio port */
+static int asoc_dt_card_is_audio_port(struct device_node *of_port)
+{
+ const char *name;
+ int ret;
+
+ if (!of_port->name ||
+ of_node_cmp(of_port->name, "port") != 0)
+ return 0;
+ ret = of_property_read_string(of_port,
+ "port-type",
+ );
+ if (!ret &&
+ (strcmp(name, "i2s") == 0 ||
+strcmp(name, "spdif") == 0))
+ return 1;
+ return 0;
+}
+
+/*
+ * Get the DAI number from the DT by counting the audio ports
+ * of the remote device node (codec).
+ */
+static int asoc_dt_card_get_dai_number(struct device_node *of_codec,
+ struct device_node *of_remote_endpoint)
+{
+ struct device_node *of_port, *of_endpoint;
+ int ndai;
+
+ ndai = 0;
+ for_each_child_of_node(of_codec, of_port) {
+ if (!asoc_dt_card_is_audio_port(of_port))
+ continue;
+ for_each_child_of_node(of_port, of_endpoint) {
+ if (!of_endpoint->name ||
+ of_node_cmp(of_endpoint->name, "endpoint") != 0)
+ continue;
+ if (of_endpoint == of_remote_endpoint) {
+ of_node_put(of_port);
+ of_node_put(of_endpoint);
+ return ndai;
+ }
+ }
+ ndai++;
+ }
+ return 0; /* should never be reached */
+}
+
+/*
+ * Parse a graph of audio ports
+ * @dev: Card device
+ * @of_cpu: Device node of the audio controller
+ * @card: Card definition
+ *
+ * Builds the DAI links of the card from the DT graph of audio ports
+ * starting from the audio controller.
+ * It does not handle the port groups.
+ * The CODEC device nodes in the DAI links must be dereferenced by the caller.
+ *
+ * Returns the number of DAI links or (< 0) on error
+ */
+static int asoc_dt_card_of_parse_graph(struct device *dev,
+ struct device_node *of_cpu,
+ struct snd_soc_card *card)
+{
+ struct device_node *of_codec, *of_port, *of_endpoint,
+ *of_remote_endpoint;
+ struct snd_soc_dai_link *link;
+ struct snd_soc_dai_link_component *component;
+ struct of_phandle_args args, args2;
+ int ret, ilink, icodec, nlinks, ncodecs;
+
+ /* count the number of DAI links */
+ nlinks = 0;
+ for_each_child_of_node(of_cpu, of_port) {
+ if (asoc_dt_card_is_audio_port(of_port))
+ nlinks++;
+ }
+
+ /* allocate the DAI link array */
+ link = devm_kzalloc(dev, sizeof(*link) * nlinks, GFP_KERNEL);
+ if (!link)
+ return -ENOMEM;
+ card->dai_link = link;
+
+ /* build the DAI links */
+ ilink = 0;
+
[PATCH v10 8/9] ASoC: core: export snd_soc_get_dai_name
snd_soc_get_dai_name() may be used to define a sound card with
a different syntax from the one of the simple-card.
Signed-off-by: Jean-Francois Moine
---
include/sound/soc.h | 2 ++
sound/soc/soc-core.c | 5 +++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/sound/soc.h b/include/sound/soc.h
index edd4a0a..7e783d6 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -1502,6 +1502,8 @@ int snd_soc_of_get_dai_name(struct device_node *of_node,
int snd_soc_of_get_dai_link_codecs(struct device *dev,
struct device_node *of_node,
struct snd_soc_dai_link *dai_link);
+int snd_soc_get_dai_name(struct of_phandle_args *args,
+const char **dai_name);
#include
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index ededb97..6a782ca 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -3418,8 +3418,8 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node
*np,
}
EXPORT_SYMBOL_GPL(snd_soc_of_parse_daifmt);
-static int snd_soc_get_dai_name(struct of_phandle_args *args,
- const char **dai_name)
+int snd_soc_get_dai_name(struct of_phandle_args *args,
+const char **dai_name)
{
struct snd_soc_component *pos;
int ret = -EPROBE_DEFER;
@@ -3465,6 +3465,7 @@ static int snd_soc_get_dai_name(struct of_phandle_args
*args,
mutex_unlock(_mutex);
return ret;
}
+EXPORT_SYMBOL_GPL(snd_soc_get_dai_name);
int snd_soc_of_get_dai_name(struct device_node *of_node,
const char **dai_name)
--
2.1.4
[PATCH v10 7/9] drm/i2c: tda998x: set cts_n according to the sample width
With I2S input, the CTS_N predivider depends on the audio sample width.
Signed-off-by: Jean-Francois Moine
---
drivers/gpu/drm/i2c/tda998x_drv.c | 21 ++---
include/sound/tda998x.h | 4 +++-
sound/soc/codecs/tda998x.c| 5 +++--
3 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index a2cfc11..adf34e0 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
@@ -663,7 +664,17 @@ tda998x_configure_audio(struct tda998x_priv *priv,
reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_I2S);
clksel_aip = AIP_CLKSEL_AIP_I2S;
clksel_fs = AIP_CLKSEL_FS_ACLK;
- cts_n = CTS_N_M(3) | CTS_N_K(3);
+
+ /* with I2S input, the CTS_N predivider depends on
+* the sample width */
+ switch (priv->audio.sample_format) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ cts_n = CTS_N_M(3) | CTS_N_K(1);
+ break;
+ default:
+ cts_n = CTS_N_M(3) | CTS_N_K(3);
+ break;
+ }
break;
default:
@@ -751,7 +762,8 @@ static int tda998x_get_audio_var(struct device *dev,
/* switch the audio port and initialize the audio parameters for streaming */
static int tda998x_set_audio_input(struct device *dev,
int port_index,
- unsigned sample_rate)
+ unsigned sample_rate,
+ int sample_format)
{
struct tda998x_priv *priv = dev_get_drvdata(dev);
struct tda998x_encoder_params *p = >params;
@@ -767,7 +779,8 @@ static int tda998x_set_audio_input(struct device *dev,
/* if same audio parameters, just enable the audio port */
if (p->audio_cfg == priv->audio.ports[port_index] &&
- p->audio_sample_rate == sample_rate) {
+ p->audio_sample_rate == sample_rate &&
+ priv->audio.sample_format == sample_format) {
reg_write(priv, REG_ENA_AP, p->audio_cfg);
return 0;
}
@@ -776,6 +789,7 @@ static int tda998x_set_audio_input(struct device *dev,
p->audio_clk_cfg = p->audio_format == AFMT_SPDIF ? 0 : 1;
p->audio_cfg = priv->audio.ports[port_index];
p->audio_sample_rate = sample_rate;
+ priv->audio.sample_format = sample_format;
tda998x_configure_audio(priv, >encoder->crtc->hwmode, p);
return 0;
}
@@ -1427,6 +1441,7 @@ static int tda998x_create(struct i2c_client *client,
struct tda998x_priv *priv)
priv->params.audio_frame[1] = 1;/* channels - 1 */
priv->params.audio_sample_rate = 48000; /* 48kHz */
+ priv->audio.sample_format = SNDRV_PCM_FORMAT_S24_LE;
priv->current_page = 0xff;
priv->hdmi = client;
diff --git a/include/sound/tda998x.h b/include/sound/tda998x.h
index b4b747b..a870c40 100644
--- a/include/sound/tda998x.h
+++ b/include/sound/tda998x.h
@@ -9,6 +9,7 @@
struct tda998x_audio_s {
u8 ports[2];/* AP value */
u8 port_types[2]; /* AFMT_xxx */
+ int sample_format;
#if IS_ENABLED(CONFIG_SND_SOC_TDA998X)
struct cea_sad cea_sad; /* Short Audio Descriptor */
void *codec_priv;
@@ -20,7 +21,8 @@ struct tda998x_ops_s {
struct tda998x_audio_s **tda998x_audio);
int (*set_audio_input)(struct device *dev,
int port_index,
- unsigned sample_rate);
+ unsigned sample_rate,
+ int sample_format);
};
int tda9998x_codec_register(struct device *dev,
diff --git a/sound/soc/codecs/tda998x.c b/sound/soc/codecs/tda998x.c
index 0a186e7..fece8d2 100644
--- a/sound/soc/codecs/tda998x.c
+++ b/sound/soc/codecs/tda998x.c
@@ -73,13 +73,14 @@ static int tda998x_codec_hw_params(struct snd_pcm_substream
*substream,
struct snd_soc_dai *dai)
{
return tda998x_ops->set_audio_input(dai->dev, dai->id,
- params_rate(params));
+ params_rate(params),
+ params_format(params));
}
static void tda998x_codec_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
- tda998x_ops->set_audio_input(dai->dev, PORT_NONE, 0);
+ tda998x_ops->set_audio_input(dai->dev, PORT_NONE, 0, 0);
}
static const struct snd_soc_dai_ops tda998x_codec_ops = {
--
2.1.4
[PATCH v10 6/9] ASoC: tda998x: add a codec to the HDMI transmitter
The tda998x CODEC maintains the audio format and rate constraints according
to the HDMI device parameters (EDID) and sets dynamically the input ports
in the TDA998x I2C driver on start/stop audio streaming.
Signed-off-by: Jean-Francois Moine
---
drivers/gpu/drm/i2c/tda998x_drv.c | 124 +++
include/sound/tda998x.h | 22 +
sound/soc/codecs/Kconfig | 5 ++
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/tda998x.c| 174 ++
5 files changed, 327 insertions(+)
create mode 100644 sound/soc/codecs/tda998x.c
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index b35f35f..a2cfc11 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -730,6 +731,104 @@ tda998x_configure_audio(struct tda998x_priv *priv,
tda998x_write_aif(priv, p);
}
+#if IS_ENABLED(CONFIG_SND_SOC_TDA998X)
+/* tda998x audio codec interface */
+
+/* return the audio parameters */
+static int tda998x_get_audio_var(struct device *dev,
+ struct tda998x_audio_s **tda998x_audio)
+{
+ struct tda998x_priv *priv = dev_get_drvdata(dev);
+
+ if (!priv->encoder->crtc
+|| !priv->is_hdmi_sink)
+ return -ENODEV;
+
+ *tda998x_audio = >audio;
+ return 0;
+}
+
+/* switch the audio port and initialize the audio parameters for streaming */
+static int tda998x_set_audio_input(struct device *dev,
+ int port_index,
+ unsigned sample_rate)
+{
+ struct tda998x_priv *priv = dev_get_drvdata(dev);
+ struct tda998x_encoder_params *p = >params;
+
+ if (!priv->encoder->crtc)
+ return -ENODEV;
+
+ /* if no port, just disable the audio port */
+ if (port_index == PORT_NONE) {
+ reg_write(priv, REG_ENA_AP, 0);
+ return 0;
+ }
+
+ /* if same audio parameters, just enable the audio port */
+ if (p->audio_cfg == priv->audio.ports[port_index] &&
+ p->audio_sample_rate == sample_rate) {
+ reg_write(priv, REG_ENA_AP, p->audio_cfg);
+ return 0;
+ }
+
+ p->audio_format = priv->audio.port_types[port_index];
+ p->audio_clk_cfg = p->audio_format == AFMT_SPDIF ? 0 : 1;
+ p->audio_cfg = priv->audio.ports[port_index];
+ p->audio_sample_rate = sample_rate;
+ tda998x_configure_audio(priv, >encoder->crtc->hwmode, p);
+ return 0;
+}
+
+/* get the audio capabilities from the EDID */
+static void tda998x_get_audio_caps(struct tda998x_priv *priv,
+ struct drm_connector *connector)
+{
+ u8 *eld = connector->eld;
+ u8 *sad;
+ int sad_count;
+ unsigned eld_ver, mnl;
+ u8 max_channels, rate_mask, fmt;
+
+ /* adjust the hw params from the ELD (EDID) */
+ eld_ver = eld[DRM_ELD_VER] >> DRM_ELD_VER_SHIFT;
+ if (eld_ver != 2 && eld_ver != 31)
+ return;
+
+ mnl = drm_eld_mnl(eld);
+ if (mnl > 16)
+ return;
+
+ sad_count = drm_eld_sad_count(eld);
+ sad = eld + DRM_ELD_CEA_SAD(mnl, 0);
+
+ /* Start from the basic audio settings */
+ max_channels = 1;
+ rate_mask = 0;
+ fmt = 0;
+ while (sad_count--) {
+ switch (sad[0] & 0x78) {
+ case 0x08: /* SAD uncompressed audio */
+ if ((sad[0] & 7) > max_channels)
+ max_channels = sad[0] & 7;
+ rate_mask |= sad[1];
+ fmt |= sad[2] & 0x07;
+ break;
+ }
+ sad += 3;
+ }
+
+ priv->audio.cea_sad.channels = max_channels;
+ priv->audio.cea_sad.freq = rate_mask;
+ priv->audio.cea_sad.format = fmt;
+}
+
+static struct tda998x_ops_s tda998x_codec_ops = {
+ .get_audio_var = tda998x_get_audio_var,
+ .set_audio_input = tda998x_set_audio_input,
+};
+#endif /* SND_SOC */
+
/* DRM encoder functions */
static void tda998x_encoder_set_config(struct tda998x_priv *priv,
@@ -749,6 +848,8 @@ static void tda998x_encoder_set_config(struct tda998x_priv
*priv,
(p->mirr_f ? VIP_CNTRL_2_MIRR_F : 0);
priv->params = *p;
+ priv->audio.port_types[0] = p->audio_format;
+ priv->audio.ports[0] = p->audio_cfg;
}
static void tda998x_encoder_dpms(struct tda998x_priv *priv, int mode)
@@ -1142,6 +1243,14 @@ tda998x_encoder_get_modes(struct tda998x_priv *priv,
drm_mode_connector_update_edid_property(connector, edid);
n = drm_add_
[PATCH v10 5/9] drm/i2c: tda998x: Change drvdata for audio extension
The device drvdata is used for component bind, but points to the
encoder/connector structure which is hidden from the slave encoder.
For audio extension, the slave encoder private data must be accessible,
so, this patch changes drvdata to the slave encoder private data and
sets it in case of slave encoder use.
Signed-off-by: Jean-Francois Moine
---
drivers/gpu/drm/i2c/tda998x_drv.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index cf245ce..b35f35f 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -1465,6 +1465,8 @@ static int tda998x_encoder_init(struct i2c_client *client,
encoder_slave->slave_priv = priv;
encoder_slave->slave_funcs = _encoder_slave_funcs;
+ dev_set_drvdata(>dev, priv);
+
return 0;
}
@@ -1591,7 +1593,7 @@ static int tda998x_bind(struct device *dev, struct device
*master, void *data)
if (!priv)
return -ENOMEM;
- dev_set_drvdata(dev, priv);
+ dev_set_drvdata(dev, >base);
priv->base.encoder = >encoder;
priv->connector.interlace_allowed = 1;
@@ -1641,7 +1643,9 @@ err_encoder:
static void tda998x_unbind(struct device *dev, struct device *master,
void *data)
{
- struct tda998x_priv2 *priv = dev_get_drvdata(dev);
+ struct tda998x_priv *priv_s = dev_get_drvdata(dev);
+ struct tda998x_priv2 *priv =
+ container_of(priv_s, struct tda998x_priv2, base);
drm_connector_cleanup(>connector);
drm_encoder_cleanup(>encoder);
--
2.1.4
[PATCH v10 4/9] drm/i2c: tda998x: Add support of a DT graph of ports
Two kinds of ports may be declared in a DT graph of ports: video and audio.
This patch accepts the port value from a video port as an alternative
to the video-ports property.
It also accepts audio ports in the case the transmitter is not used as
a slave encoder.
The new file include/sound/tda998x.h prepares to the definition of
a tda998x CODEC.
Signed-off-by: Jean-Francois Moine
---
.../devicetree/bindings/drm/i2c/tda998x.txt| 51 +
drivers/gpu/drm/i2c/tda998x_drv.c | 88 +++---
include/sound/tda998x.h| 8 ++
3 files changed, 138 insertions(+), 9 deletions(-)
create mode 100644 include/sound/tda998x.h
diff --git a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
index e9e4bce..35f6a80 100644
--- a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
+++ b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
@@ -16,6 +16,35 @@ Optional properties:
- video-ports: 24 bits value which defines how the video controller
output is wired to the TDA998x input - default: <0x230145>
+ This property is not used when ports are defined.
+
+Optional nodes:
+
+ - port: up to three ports.
+ The ports are defined according to [1].
+
+Video port.
+ There may be only one video port.
+ This one must contain the following property:
+
+ - port-type: must be "rgb"
+
+ and may contain the optional property:
+
+ - reg: 24 bits value which defines how the video controller
+ output is wired to the TDA998x input (video pins)
+ When absent, the default value is <0x230145>.
+
+Audio ports.
+ There may be one or two audio ports.
+ These ones must contain the following properties:
+
+ - port-type: must be "i2s" or "spdif"
+
+ - reg: 8 bits value which defines how the audio controller
+ output is wired to the TDA998x input (audio pins)
+
+[1] Documentation/devicetree/bindings/graph.txt
Example:
@@ -26,4 +55,26 @@ Example:
interrupts = <27 2>;/* falling edge */
pinctrl-0 = <_camera>;
pinctrl-names = "default";
+
+ port at 230145 {
+ port-type = "rgb";
+ reg = <0x230145>;
+ hdmi_0: endpoint {
+ remote-endpoint = <_0>;
+ };
+ };
+ port at 3 { /* AP1 = I2S */
+ port-type = "i2s";
+ reg = <0x03>;
+ tda998x_i2s: endpoint {
+ remote-endpoint = <_i2s>;
+ };
+ };
+ port at 4 { /* AP2 = S/PDIF */
+ port-type = "spdif";
+ reg = <0x04>;
+ tda998x_spdif: endpoint {
+ remote-endpoint = <_spdif1>;
+ };
+ };
};
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index d476279..cf245ce 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
@@ -44,6 +45,8 @@ struct tda998x_priv {
wait_queue_head_t wq_edid;
volatile int wq_edid_wait;
struct drm_encoder *encoder;
+
+ struct tda998x_audio_s audio;
};
#define to_tda998x_priv(x) ((struct tda998x_priv
*)to_encoder_slave(x)->slave_priv)
@@ -1250,9 +1253,57 @@ static struct drm_encoder_slave_funcs
tda998x_encoder_slave_funcs = {
/* I2C driver functions */
+static int tda998x_parse_ports(struct tda998x_priv *priv,
+ struct device_node *np)
+{
+ struct device_node *of_port;
+ const char *port_type;
+ int ret, audio_index, reg, afmt;
+
+ audio_index = 0;
+ for_each_child_of_node(np, of_port) {
+ if (!of_port->name
+|| of_node_cmp(of_port->name, "port") != 0)
+ continue;
+ ret = of_property_read_string(of_port, "port-type",
+ _type);
+ if (ret < 0)
+ continue;
+ ret = of_property_read_u32(of_port, "reg", );
+ if (strcmp(port_type, "rgb") == 0) {
+ if (!ret) { /* video reg is optional */
+ priv->vip_cntrl_0 = reg >> 16;
+ priv->vip_cntrl_1 = reg >> 8;
+
