[PATCH 3/3] drm/i915/display: Implement seamless mode switch

executed and it supports the mode. Cc: Vidya Srinivas Cc: Sean Paul Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_crtc.c | 10 +++ drivers/gpu/drm/i915/display/intel_display.c | 5 +- .../drm/i915/display/intel_display_debugfs.c | 5 +

[PATCH 1/3] drm: Add infrastructure to allow seamless mode switches

nge between old and new mode will return 0 otherwise it should return the appropried errno. So here adding basic drm infrastructure to that be supported by i915 and other drivers. Cc: Vidya Srinivas Cc: Sean Paul Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza --- drivers/gpu/d

[PATCH 2/3] drm/i915/display: Replace crtc_state's has_drrs by drrs_downclock_mode

behavior has has_drrs. Cc: Vidya Srinivas Cc: Sean Paul Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display_types.h | 4

[PATCH] drm/damage_helper: Fix handling of cursor dirty buffers

Cc: Rob Clark Cc: Deepak Rawat Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_damage_helper.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_damage_helper.c b/drivers/gpu/drm/drm_damage_helper.c inde

[PATCH] drm/dp_mst: Add missing drm parameters to recently added call to drm_dbg_kms()

e topology") Cc: Wayne Lin Cc: Lyude Paul Cc: dri-devel@lists.freedesktop.org Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_mst_topology.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/d

[PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec

drigo Vivi Cc: Jani Nikula Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- include/drm/drm_dp_helper.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 1e85c2021f2f..d6f6a084a190 10

[PATCH CI 1/4] drm: Add function to convert rect in 16.16 fixed format to regular format

@lists.freedesktop.org Cc: Gwan-gyeong Mun Reviewed-by: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- include/drm/drm_rect.h | 13 + 1 file changed, 13 insertions(+) diff --git a/include/drm/drm_rect.h b/include/drm/drm_rect.h index e7f4d24cdd00..39f2deee709c 100644 --- a

[PATCH v9 1/5] drm: Add function to convert rect in 16.16 fixed format to regular format

Much more clear to read one function call than four lines doing this conversion. v7: - function renamed - calculating width and height before truncate - inlined Cc: Ville Syrjälä Cc: dri-devel@lists.freedesktop.org Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- include/drm

[PATCH v7 1/5] drm: Add function to convert rect in 16.16 fixed format to regular format

Much more clear to read one function call than four lines doing this conversion. v7: - function renamed - calculating width and height before truncate - inlined Cc: Ville Syrjälä Cc: dri-devel@lists.freedesktop.org Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- include/drm

[PATCH v7 1/5] drm: Add function to convert rect in 16.16 fixed format to regular format

Much more clear to read one function call than four lines doing this conversion. v7: - function renamed - calculating width and height before truncate - inlined Cc: Ville Syrjälä Cc: dri-devel@lists.freedesktop.org Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- include/drm

[PATCH v6 1/5] drm: Add function to convert rect in 16.16 fixed format to regular format

Much more clear to read one function call than four lines doing this conversion. Cc: dri-devel@lists.freedesktop.org Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_rect.c | 15 +++ include/drm/drm_rect.h | 2 ++ 2 files changed, 17 insertions

[PATCH v5 1/6] drm/damage_helper: Check if damage clips has valid values

Cc: Simon Ser Cc: Gwan-gyeong Mun Cc: Sean Paul Cc: Fabio Estevam Cc: Deepak Rawat Cc: dri-devel@lists.freedesktop.org Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_atomic_helper.c | 4 +- drivers/gpu/drm/drm_damage_helper.c | 59 - include/drm

[PATCH] drm/damage_helper: Check if damage clips has valid values

@lists.freedesktop.org Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_atomic_helper.c | 4 ++- drivers/gpu/drm/drm_damage_helper.c | 49 +++-- include/drm/drm_damage_helper.h | 4 +-- 3 files changed, 45 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm

[PATCH] intel: sync i915_pciids.h with kernel

Two new patches landed in kernel adding new PCI ids: 123f62de419f ("drm/i915/rkl: Add RKL platform info and PCI ids") 52797a8e8529 ("drm/i915/ehl: Add new PCI ids") Cc: Matt Roper Signed-off-by: José Roberto de Souza --- intel/i915_pciids.h | 13 + 1 file ch

[PATCH] drm/mst: Fix possible NULL pointer dereference in drm_dp_mst_process_up_req()

drm_dp_mst_process_up_req() to return in the "if (!mstb)" right bellow. Fixes: 9408cc94eb04 ("drm/dp_mst: Handle UP requests asynchronously") Cc: Lyude Paul Cc: Sean Paul Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_mst_topology.c | 3 ++- 1 file changed, 2 inser

[PATCH v2 1/2] drm/i915/dc3co: Do the full calculation of DC3CO exit only once

This will calculaet the DC3CO exit delay only once per full modeset. Cc: Imre Deak Cc: Anshuman Gupta Reviewed-by: Anshuman Gupta Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_psr.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a

[PATCH v2 2/2] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed

would shutdown pipe, enable and train link. v2: only programming EXTLINE when DC3CO is enabled BSpec: 49196 Cc: Imre Deak Cc: Anshuman Gupta Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_ddi.c | 86 drivers/gpu/drm/i915/display/intel_disp

[PATCH 2/4] drm/mst: Some style improvements in drm_dp_mst_topology_mgr_set_mst()

Removing this lose code block and removing unnecessary bracket. Cc: Lyude Paul Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_mst_topology.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu

[PATCH 1/4] drm/mst: Don't do atomic checks over disabled managers

check") Cc: Mikita Lipski Cc: Alex Deucher Cc: Lyude Paul Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_mst_topology.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index 4b74193b

[PATCH 4/4] drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when disabling TRANS_DDI

José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_ddi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 32ea3c7e8b62..82e90f271974 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/dr

[PATCH 3/4] drm/i915/display: Remove useless call intel_dp_mst_encoder_cleanup()

This is a eDP function and it will always returns true for non-eDP ports. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_dp.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index

[PATCH v2 libdrm] intel: sync i915_pciids.h with kernel

s De Marchi Reviewed-by: Matt Roper (v1 EHL/JSL changes) Signed-off-by: José Roberto de Souza --- intel/i915_pciids.h | 31 ++- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h index b1f66b11..1d2c1221 100644 -

[PATCH libdrm] intel: sync i915_pciids.h with kernel

It is missing the new EHL/JSL PCI ids added in commit 651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids") Cc: James Ausmus Cc: Matt Roper Signed-off-by: José Roberto de Souza --- intel/i915_pciids.h | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/intel/i91

[PATCH CI 1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

Cc: Daniel Vetter Cc: Laurent Pinchart Cc: dri-devel@lists.freedesktop.org Cc: intel-...@lists.freedesktop.org Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/ast/ast_mode.c | 12 drivers/gpu/drm/drm_atomic_helper.c| 15 ++- drive

[PATCH CI 2/2] drm/connector: Allow max possible encoders to attach to a connector

Roberto de Souza --- .../gpu/drm/amd/amdgpu/amdgpu_connectors.c| 23 +- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 ++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 - drivers/gpu/drm/drm_client_modeset.c | 3 +- drivers/gpu/drm/drm_connector.c

[PATCH 1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

dri-devel@lists.freedesktop.org Cc: intel-...@lists.freedesktop.org Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/ast/ast_mode.c | 12 drivers/gpu/drm/drm_atomic_helper.c| 15 ++- drivers/gpu/drm/drm_crtc_helper.c | 17 - drive

[PATCH 2/2] drm/connector: Allow max possible encoders to attach to a connector

Roberto de Souza --- .../gpu/drm/amd/amdgpu/amdgpu_connectors.c| 23 +- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 ++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 - drivers/gpu/drm/drm_client_modeset.c | 3 +- drivers/gpu/drm/drm_connector.c

[PATCH 1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder

() that was renamed in commit 297e30b5d9b6 ("drm/atomic-helper: Unexport drm_atomic_helper_best_encoder"). Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Cc: Daniel Vetter Cc: Laurent Pinchart Cc: dri-devel@lists.freedesktop.org Cc: intel-...@lists.freedesktop.org Signed-off-by: José

[PATCH 2/2] drm/connector: Allow max possible encoders to attach to a connector

Pandiyan Signed-off-by: José Roberto de Souza --- .../gpu/drm/amd/amdgpu/amdgpu_connectors.c| 23 --- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +-- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 +++- drivers/gpu/drm/drm_client_modeset.c | 3 +- drivers/gpu/drm

[PATCH v2.1] drm/connector: Allow max possible encoders to attach to a connector

: Ville Syrjälä Cc: Alex Deucher Cc: dri-devel@lists.freedesktop.org Cc: intel-...@lists.freedesktop.org Cc: nouv...@lists.freedesktop.org Cc: amd-...@lists.freedesktop.org Signed-off-by: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- .../gpu/drm/amd/amdgpu/amdgpu_connectors.c

[PATCH v2] drm/connector: Allow max possible encoders to attach to a connector

: Ville Syrjälä Cc: Alex Deucher Cc: dri-devel@lists.freedesktop.org Cc: intel-...@lists.freedesktop.org Cc: nouv...@lists.freedesktop.org Cc: amd-...@lists.freedesktop.org Signed-off-by: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- .../gpu/drm/amd/amdgpu/amdgpu_connectors.c

[PATCH] drm/connector: Allow max possible encoders to attach to a connector

@lists.freedesktop.org Cc: intel-...@lists.freedesktop.org Cc: nouv...@lists.freedesktop.org Cc: amd-...@lists.freedesktop.org Signed-off-by: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- .../gpu/drm/amd/amdgpu/amdgpu_connectors.c| 23 +- drivers/gpu/drm/amd/amdgpu/dce_virtual.c

[PATCH v2 03/11] drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block

As we have a else block for the 'if (dev_priv->psr.psr2_enabled) {' and this bit is only set for PSR1 move it to that block to make it more easy to read. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 5

[PATCH v2 01/11] drm/i915: Disable PSR in Apple panels

karan Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_helper.c | 2 ++ drivers/gpu/drm/i915/intel_psr.c | 6 ++ include/drm/drm_dp_helper.h | 1 + 3 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c

[PATCH v2 02/11] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2

hinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 40ca6cc43cc4..8515f4a6f4f1 100644 ---

[PATCH v2 09/11] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking

Our frontbuffer tracking improved over the years + the WA #0884 helped us keep PSR2 enabled while triggering screen updates when necessary so this FIXME is not valid anymore. Acked-by: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915

[PATCH v2 07/11] drm/i915/psr: Check if resolution is supported by default SU granularity

Selective updates have a default granularity requirements as stated by eDP spec, so check if HW can match those requirements before enable PSR2. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 12 1 file changed

[PATCH v2 11/11] drm/i915/psr: Set the right frames values

sleep, so avoid as much as possible deep sleep will provide in overal more power savings as PSR2 sleep will save some power as memory will not be read in the idle frames and screen will be partialy updated without exit PSR2. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de

[PATCH v2 04/11] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch

eDP spec states 2 different bits to enable sink to trigger a interruption when there is a CRC mismatch. DP_PSR_CRC_VERIFICATION is for PSR only and DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only. Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza

[PATCH v2 08/11] drm/i915/psr: Check if source supports sink specific SU granularity

According to eDP spec, sink can required specific selective update granularity that source must comply. Here caching the value if required and checking if source supports it. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h

[PATCH v2 05/11] drm/i915/icl: Do not change reserved registers related to PSR2

For ICL the bit 12 of CHICKEN_TRANS is reserved so we should not touch it and as by default VSC_DATA_SEL_SOFTWARE_CONTROL is already unset in gen10 + GLK we can just drop it and fix for both gens. Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza

[PATCH v2 10/11] drm/i915: Improve PSR2 CTL macros

Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d3ef97915455..9e46da5032c0 100644 --- a/drivers/gpu/drm/i915

[PATCH v2 06/11] drm: Add the PSR SU granularity registers offsets

Source is required to comply to sink SU granularity when DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS, so adding the registers offsets. v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo) Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- include/drm

[PATCH 9/9] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking

Our frontbuffer tracking improved over the years + the WA #0884 helped us keep PSR2 enabled while triggering screen updates when necessary so this FIXME is not valid anymore. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 3

[PATCH 3/9] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch

eDP spec states 2 different bits to enable sink to trigger a interruption when there is a CRC mismatch. DP_PSR_CRC_VERIFICATION is for PSR only and DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu

[PATCH 5/9] drm: Add offset of PSR2 SU X granularity value

Source is required to comply to sink SU granularity when DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS, so adding the register here. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- include/drm/drm_dp_helper.h | 3 +++ 1 file changed, 3 insertions

[PATCH 7/9] drm/i915/psr: Rename PSR2 macros to better match meaning

. The previous names was really misleading and caused wrong values being set so better rename to make it clear. Also taking the oportunity to improve those macros. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h

[PATCH 6/9] drm/i915/psr: Check if source supports sink specific SU granularity

According to eDP spec, sink can required specific selective update granularity that source must comply. Here caching the value if required and checking source supports it. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h | 1

[PATCH 4/9] drm/i915/icl: Do not change reserved registers related to PSR2

For ICL the bit 12 of CHICKEN_TRANS is reserved so we should not touch it and as by default VSC_DATA_SEL_SOFTWARE_CONTROL is already unset in gen10 + GLK we can just drop it and fix for both gens. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu

[PATCH 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2

For PSR2 there is no register to tell HW to keep main link enabled while PSR2 is active, so don't configure sink DPCD with a misleading value. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 10 ++ 1 file chang

[PATCH 1/9] drm/i915: Disable PSR in Apple panels

i915 yet don't support PSR in Apple panels, so lets keep it disabled while we work on that. Fixes: 598c6cfe0690 (drm/i915/psr: Enable PSR1 on gen-9+ HW) Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_helper.c | 2 ++ drivers/gp

[PATCH 8/9] drm/i915/psr: Set the right frames values

will wait to activate PSR2, so lets keep using the sink sync latency. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915

[PATCH 2/2] drm/edid: Parse manufacturer id only once per sink

It was parsing the manufacturer id of the sink for each entry in quirk list. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_edid.c | 21 - 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c

[PATCH 1/2] drm/edid: Add and export function to parse manufacturer id

This function will be helpful to drivers that wants to add its own quirks to sinks. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_edid.c | 20 include/drm/drm_edid.h | 1 + 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm

[PATCH] drm: Do not call drm_dp_cec_set_edid() while registering DP connectors

disconnected. Cc: Hans Verkuil Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_cec.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_cec.c b/drivers/gpu/drm/drm_dp_cec.c index 8a718f85079a..b15cee85b702 100644 --- a/drivers/gpu/drm/drm_dp_cec.c +++ b/drivers/gpu

[PATCH 1/2] drm: Do not call drm_dp_cec_set_edid() while registering DP connectors

disconnected. Cc: Hans Verkuil Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_dp_cec.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_cec.c b/drivers/gpu/drm/drm_dp_cec.c index 8a718f85079a..b15cee85b702 100644 --- a/drivers/gpu/drm/drm_dp_cec.c +++ b/drivers/gpu

[PATCH 2/2] drm/i915: Do not get aux power for disconnected DP ports

For ICL type-c ports there is a aux power restriction, it can only be enabled while there is sink connected. BSpec: 21750 Cc: Maarten Lankhorst Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_dp.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions

[PATCH v3] drm: Return -EOPNOTSUPP in drm_setclientcap() when driver do not support KMS

Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_ioctl.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index 60dfbfae6a02..94bd872d56c4 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -306,6

[PATCH v2] drm: Return -EOPNOTSUPP in drm_setclientcap() when driver do not support KMS

All DRM_CLIENT capabilities are tied to KMS support, so returning -EOPNOTSUPP when KMS is not supported. v2: returning -EOPNOTSUPP(same value as posix ENOTSUP and available in uapi) instead of -ENOTSUPP Cc: Chris Wilson Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_ioctl.c

[PATCH] drm: Return -ENOTSUPP in drm_setclientcap() when driver do not support KMS

All DRM_CLIENT capabilities are tied to KMS support, so returning -ENOTSUPP when KMS is not supported. Cc: Chris Wilson Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_ioctl.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm

[PATCH 1/6] drm: Let userspace check if driver supports modeset

GPU accelerators usually don't have display block or the display driver part can be disable when building driver(for servers it save some resources) so it is important let userspace check this capability too. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/drm_ioctl.c | 3 +++ in

[PATCH 5/6] drm/i915: Do not call modeset related functions when display is disabled

, this is a initial work. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 69 - 1 file changed, 41 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index aacb467fe3ea..e109815cfa51

[PATCH 4/6] drm/i915: Move drm_vblank_init() to i915_load_modeset_init()

i915_load_modeset_init() is a more suitable place than i915_driver_load() as vblank is part of modeset API. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 19 +++ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915

[PATCH 3/6] drm/i915: Move out non-modeset calls from modeset init and cleanup

i915_load_modeset_init() and intel_modeset_cleanup() was initializing and cleaning up things that is not modeset only. This will make easy initialize drive without display part. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 56

[PATCH 2/6] drm/i915: Set PCH as NOP if display is disabled

() ... ... i915_driver_init_hw() intel_device_info_runtime_init() Cc: Jani Nikula Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915

[PATCH 6/6] drm/i915: Remove redundante checks for num_pipes == 0

This 'if's will always be false because of previous changes. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 12 +++- drivers/gpu/drm/i915/intel_audio.c | 3 --- drivers/gpu/drm/i915/intel_display.c | 3 --- drivers/gpu/drm/i915/intel_i2c.

[PATCH libdrm 1/2] intel: Introducing Whiskey Lake platform

code review but it will be handled as a CFL. This is a copy of merged i915's commit b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform") Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- intel/intel_chipset.h | 33 + 1 file ch

[PATCH libdrm 2/2] intel: Introducing Amber Lake platform

ut it will be handled as a KBL. This is a copy of merged i915's commit e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform") Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- intel/intel_chipset.h | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-)

[PATCH v3 07/10] drm/i915/psr: Use PSR2 macro for PSR2

Cosmetic change. Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm/i915/i915_reg.h | 3 ++- drivers/gpu/drm/i915/intel_psr.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm

[PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status

IGT tests could be improved with sink status, knowing for sure that hardware have activate or exit PSR. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm/i915/i915_debugfs.c | 29 + 1 file changed, 29

[PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source

For Geminilake and Cannonlake+ the Y-coordinate support must be enabled in PSR2_CTL too. Spec: 7713 and 7720 Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_psr.c

[PATCH v3 08/10] drm/i915/psr: Cache sink synchronization latency

This value do not change overtime so better cache it than fetch it every PSR enable. Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_psr.c | 28

[PATCH v3 06/10] drm/i915/psr: Do not override PSR2 sink support

. Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/intel_psr.c| 33 + 3 files changed, 21

[PATCH v3 04/10] drm/i915/psr: Tie PSR2 support to Y coordinate requirement

out Y coordinate). Also here renaming intel_dp_get_y_cord_status() to intel_dp_get_y_coord_required() as it more accurate to the name and function of bit according to eDP spec. Cc: Rodrigo Vivi Reviewed-by: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm

[PATCH v3 03/10] drm/i915/psr: Nuke aux frame sync

d-off-by: José Roberto de Souza --- v3: rebased drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/intel_psr.c | 24 +--- 2 files changed, 1 insertion(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 800230b

[PATCH v3 02/10] drm: Add DP last received PSR SDP VSC register and bits

This is a register to help debug what is in the last SDP VSC packet revived by sink. Signed-off-by: José Roberto de Souza Reviewed-by: Rodrigo Vivi --- v3: rebased include/drm/drm_dp_helper.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include

[PATCH v3 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed

In the 2 eDP1.4a pannels tested set or not set bit have no effect but is better set it and comply with specification. Signed-off-by: José Roberto de Souza Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi --- v3: rebased drivers/gpu/drm/i915/intel_psr.c | 11 ++- 1 file changed, 6

[PATCH v3 01/10] drm: Add DP PSR2 sink enable bit

To comply with eDP1.4a this bit should be set when enabling PSR2. Signed-off-by: José Roberto de Souza Reviewed-by: Rodrigo Vivi --- v3: rebased include/drm/drm_dp_helper.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index

[PATCH v2 03/10] drm/i915/psr: Nuke aux frame sync

d-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/intel_psr.c | 24 +--- 2 files changed, 1 insertion(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 800230ba1c3b..fade902

[PATCH v2 04/10] drm/i915/psr: Tie PSR2 support to Y coordinate requirement

out Y coordinate). Also here renaming intel_dp_get_y_cord_status() to intel_dp_get_y_coord_required() as it more accurate to the name and function of bit according to eDP spec. Cc: Rodrigo Vivi Reviewed-by: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h

[PATCH v2 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source

From: "Souza, Jose" For Geminilake and Cannonlake+ the Y-coordinate support must be enabled in PSR2_CTL too. Spec: 7713 and 7720 Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gp

[PATCH v2 06/10] drm/i915/psr: Do not override PSR2 sink support

. Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/intel_psr.c| 33 + 3 files changed, 21 insertions

[PATCH v2 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed

In the 2 eDP1.4a pannels tested set or not set bit have no effect but is better set it and comply with specification. Signed-off-by: José Roberto de Souza Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_psr.c | 11 ++- 1 file changed, 6 insertions

[PATCH v2 10/10] drm/i915/debugfs: Print sink PSR status

IGT tests could be improved with sink status, knowing for sure that hardware have activate or exit PSR. Cc: Dhinakaran Pandiyan Cc: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_debugfs.c | 29 + 1 file changed, 29 insertions

[PATCH v2 01/10] drm: Add DP PSR2 sink enable bit

To comply with eDP1.4a this bit should be set when enabling PSR2. Signed-off-by: José Roberto de Souza Reviewed-by: Rodrigo Vivi --- include/drm/drm_dp_helper.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 62903bae0221

[PATCH v2 08/10] drm/i915/psr: Cache sink synchronization latency

This value do not change overtime so better cache it than fetch it every PSR enable. Cc: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_psr.c | 28 2 files

[PATCH v2 02/10] drm: Add DP last received PSR SDP VSC register and bits

This is a register to help debug what is in the last SDP VSC packet revived by sink. Signed-off-by: José Roberto de Souza Reviewed-by: Rodrigo Vivi --- include/drm/drm_dp_helper.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm

[PATCH v2 07/10] drm/i915/psr: Use PSR2 macro for PSR2

Cosmetic change. Reviewed-by: Rodrigo Vivi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h | 3 ++- drivers/gpu/drm/i915/intel_psr.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH 2/2] drm: Add DP last received PSR SDP VSC register and bits

This is a register to help debug what is in the last SDP VSC packet revived by sink. Signed-off-by: José Roberto de Souza --- include/drm/drm_dp_helper.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 0bac0c7d0dec

[PATCH 1/2] drm: Add DP PSR2 sink enable bit

To comply with eDP1.4a this bit should be set when enabling PSR2. Signed-off-by: José Roberto de Souza --- include/drm/drm_dp_helper.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 62903bae0221..0bac0c7d0dec 100644 --- a

[PATCH] drm: Add PSR version 3 macro

eDP 1.4a specification defines PSR version 3, it PSR2 with the addition of Y-coordinate support when doing selective update. Signed-off-by: José Roberto de Souza --- include/drm/drm_dp_helper.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm