Re: [PATCH] drm/panel: jdi-fhd-r63452: make use of prepare_prev_first
Hi, On Tue, 23 Apr 2024 22:54:33 +0200, Barnabás Czémán wrote: > The DSI host must be enabled for the panel to be initialized in > prepare(). Set the prepare_prev_first flag to guarantee this. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm/panel: jdi-fhd-r63452: make use of prepare_prev_first https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/4edd73d174de5e8ec43f0de303f4a8b80e643529 -- Neil
Re: [PATCH v2] drm/bridge: adv7511: make it honour next bridge in DT
Hi, On Sun, 31 Mar 2024 23:45:48 +0300, Dmitry Baryshkov wrote: > DT bindings for adv7511 and adv7533 bridges specify HDMI output to be > present at the port@1. This allows board DT to add e.g. HDMI connector > nodes or any other next chained bridge. Make adv7511 driver discover > that bridge and attach it to the chain. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm/bridge: adv7511: make it honour next bridge in DT https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/14b3cdbd0e5b73824b7b2c7a4b1fbfd743044a5e -- Neil
Re: (subset) [PATCH 0/6] drm/panel: small fixes for visionox and novatek panel drivers
Hi, On Thu, 04 Apr 2024 13:07:58 +0300, Dmitry Baryshkov wrote: > While taking a glance at the novatek-nt36672e driver I stumbled upon a > call to unregister the DSI device for the panel, although it was not the > panel driver that registered the device. > > Remove this call and a similar call from the visionox-rm69299 driver. > While we are at it, also optimize regulator API calls in these two > drivers and in the novatek-nt36672a driver. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [3/6] drm/panel: novatek-nt36672e: stop setting register load before disable https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/302aeb946731923c4ff7cca093868e4148ebc701 [4/6] drm/panel: novatek-nt36672e: stop calling regulator_set_load manually https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/9dab1af1e7592d9317bf3857e8cf019120973053 [5/6] drm/panel: novatek-nt36672a: stop calling regulator_set_load manually https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/a8ee5f50a9d87f35ca80d6ea74ac07ae97d5a21b [6/6] drm/panel: visionox-rm69299: stop calling regulator_set_load manually https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/251e3c1fe15cb8bf71a834f863f6225b8164f7b8 -- Neil
Re: [PATCH 2/2] drm/panel/lg-sw43408: mark sw43408_backlight_ops as static
On 20/04/2024 04:41, Dmitry Baryshkov wrote: Fix sparse warning regarding symbol 'sw43408_backlight_ops' not being declared. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202404200739.hbwzvohr-...@intel.com/ Signed-off-by: Dmitry Baryshkov No fixed either ? --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/panel/panel-lg-sw43408.c index 115f4702d59f..2b3a73696dce 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -182,7 +182,7 @@ static int sw43408_backlight_update_status(struct backlight_device *bl) return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness); } -const struct backlight_ops sw43408_backlight_ops = { +static const struct backlight_ops sw43408_backlight_ops = { .update_status = sw43408_backlight_update_status, }; Reviewed-by: Neil Armstrong
Re: [PATCH 1/2] drm/panel/lg-sw43408: depends on CONFIG_DRM_DISPLAY_DP_HELPER
On 20/04/2024 04:41, Dmitry Baryshkov wrote: This panel driver uses DSC PPS functions and as such depends on the DRM_DISPLAY_DP_HELPER. Add missing dependency Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202404200800.kysryyli-...@intel.com/ No Fixes ? Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index ab67789e59a2..5e6692207beb 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -340,6 +340,7 @@ config DRM_PANEL_LG_SW43408 depends on OF depends on DRM_MIPI_DSI depends on BACKLIGHT_CLASS_DEVICE + depends on DRM_DISPLAY_DP_HELPER help Say Y here if you want to enable support for LG sw43408 panel. The panel has a 1080x2160@60Hz resolution and uses 24 bit RGB per Reviewed-by: Neil Armstrong
Re: [PATCH 6/6] drm/panel: visionox-rm69299: stop calling regulator_set_load manually
On 04/04/2024 12:08, Dmitry Baryshkov wrote: Use .init_load_uA part of the bulk regulator API instead of calling register_set_load() manually. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-visionox-rm69299.c | 16 ++-- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c b/drivers/gpu/drm/panel/panel-visionox-rm69299.c index b15ca56a09a7..272490b9565b 100644 --- a/drivers/gpu/drm/panel/panel-visionox-rm69299.c +++ b/drivers/gpu/drm/panel/panel-visionox-rm69299.c @@ -197,7 +197,9 @@ static int visionox_rm69299_probe(struct mipi_dsi_device *dsi) ctx->dsi = dsi; ctx->supplies[0].supply = "vdda"; + ctx->supplies[0].init_load_uA = 32000; ctx->supplies[1].supply = "vdd3p3"; + ctx->supplies[1].init_load_uA = 13200; ret = devm_regulator_bulk_get(ctx->panel.dev, ARRAY_SIZE(ctx->supplies), ctx->supplies); @@ -227,22 +229,8 @@ static int visionox_rm69299_probe(struct mipi_dsi_device *dsi) goto err_dsi_attach; } - ret = regulator_set_load(ctx->supplies[0].consumer, 32000); - if (ret) { - dev_err(dev, "regulator set load failed for vdda supply ret = %d\n", ret); - goto err_set_load; - } - - ret = regulator_set_load(ctx->supplies[1].consumer, 13200); - if (ret) { - dev_err(dev, "regulator set load failed for vdd3p3 supply ret = %d\n", ret); - goto err_set_load; - } - return 0; -err_set_load: - mipi_dsi_detach(dsi); err_dsi_attach: drm_panel_remove(>panel); return ret; Reviewed-by: Neil Armstrong
Re: [PATCH 5/6] drm/panel: novatek-nt36672a: stop calling regulator_set_load manually
On 04/04/2024 12:08, Dmitry Baryshkov wrote: Use .init_load_uA part of the bulk regulator API instead of calling register_set_load() manually. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c index 33fb3d715e54..3886372415c2 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c @@ -605,21 +605,16 @@ static int nt36672a_panel_add(struct nt36672a_panel *pinfo) struct device *dev = >link->dev; int i, ret; - for (i = 0; i < ARRAY_SIZE(pinfo->supplies); i++) + for (i = 0; i < ARRAY_SIZE(pinfo->supplies); i++) { pinfo->supplies[i].supply = nt36672a_regulator_names[i]; + pinfo->supplies[i].init_load_uA = nt36672a_regulator_enable_loads[i]; + } ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pinfo->supplies), pinfo->supplies); if (ret < 0) return dev_err_probe(dev, ret, "failed to get regulators\n"); - for (i = 0; i < ARRAY_SIZE(pinfo->supplies); i++) { - ret = regulator_set_load(pinfo->supplies[i].consumer, -nt36672a_regulator_enable_loads[i]); - if (ret) - return dev_err_probe(dev, ret, "failed to set regulator enable loads\n"); - } - pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(pinfo->reset_gpio)) return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio), Reviewed-by: Neil Armstrong
Re: [PATCH 3/6] drm/panel: novatek-nt36672e: stop setting register load before disable
On 04/04/2024 12:08, Dmitry Baryshkov wrote: It is pointless to set register load before disabling the register. This vote is going to be dropped as soon as the register is disabled. Drop these register_set_load calls. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-novatek-nt36672e.c | 17 - 1 file changed, 17 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672e.c b/drivers/gpu/drm/panel/panel-novatek-nt36672e.c index c39fe0fc5d69..9a870b9b6765 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672e.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672e.c @@ -25,12 +25,6 @@ static const unsigned long regulator_enable_loads[] = { 10, }; -static const unsigned long regulator_disable_loads[] = { - 80, - 100, - 100, -}; - struct panel_desc { const struct drm_display_mode *display_mode; u32 width_mm; @@ -385,20 +379,9 @@ static int nt36672e_power_off(struct nt36672e_panel *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; int ret = 0; - int i; gpiod_set_value(ctx->reset_gpio, 0); - for (i = 0; i < ARRAY_SIZE(ctx->supplies); i++) { - ret = regulator_set_load(ctx->supplies[i].consumer, - regulator_disable_loads[i]); - if (ret) { - dev_err(>dev, "regulator set load failed for supply %s: %d\n", - ctx->supplies[i].supply, ret); - return ret; - } - } - ret = regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); if (ret) dev_err(>dev, "regulator bulk disable failed: %d\n", ret); Reviewed-by: Neil Armstrong
Re: [PATCH] drm/panel: jdi-fhd-r63452: make use of prepare_prev_first
On 23/04/2024 22:54, Barnabás Czémán wrote: The DSI host must be enabled for the panel to be initialized in prepare(). Set the prepare_prev_first flag to guarantee this. Signed-off-by: Barnabás Czémán --- drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c index 3e0a8e0d58a0..483dc88d16d8 100644 --- a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c +++ b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c @@ -247,6 +247,7 @@ static int jdi_fhd_r63452_probe(struct mipi_dsi_device *dsi) drm_panel_init(>panel, dev, _fhd_r63452_panel_funcs, DRM_MODE_CONNECTOR_DSI); + ctx->panel.prepare_prev_first = true; ret = drm_panel_of_backlight(>panel); if (ret) --- base-commit: a59668a9397e7245b26e9be85d23f242ff757ae8 change-id: 20240423-jdi-fix-986a796a3101 Best regards, Reviewed-by: Neil Armstrong
Re: [PATCH v2] drm/bridge: adv7511: make it honour next bridge in DT
On 31/03/2024 22:45, Dmitry Baryshkov wrote: DT bindings for adv7511 and adv7533 bridges specify HDMI output to be present at the port@1. This allows board DT to add e.g. HDMI connector nodes or any other next chained bridge. Make adv7511 driver discover that bridge and attach it to the chain. Signed-off-by: Dmitry Baryshkov --- Changes in v2: - Fixed the absent next bridge usecase - Link to v1: https://lore.kernel.org/r/20240309-adv7511-next-bridge-v1-1-d1ad522ef...@linaro.org --- drivers/gpu/drm/bridge/adv7511/adv7511.h | 1 + drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 12 2 files changed, 13 insertions(+) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h index 39c9ece373b0..ea271f62b214 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511.h +++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h @@ -356,6 +356,7 @@ struct adv7511 { enum drm_connector_status status; bool powered; + struct drm_bridge *next_bridge; struct drm_display_mode curr_mode; unsigned int f_tmds; diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c index b5518ff97165..c50d994a33b5 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -946,6 +947,12 @@ static int adv7511_bridge_attach(struct drm_bridge *bridge, struct adv7511 *adv = bridge_to_adv7511(bridge); int ret = 0; + if (adv->next_bridge) { + ret = drm_bridge_attach(bridge->encoder, adv->next_bridge, bridge, flags); + if (ret) + return ret; + } + if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) { ret = adv7511_connector_init(adv); if (ret < 0) @@ -1216,6 +1223,11 @@ static int adv7511_probe(struct i2c_client *i2c) memset(_config, 0, sizeof(link_config)); + ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1, NULL, + >next_bridge); + if (ret && ret != -ENODEV) + return ret; + if (adv7511->info->link_config) ret = adv7511_parse_dt(dev->of_node, _config); else --- base-commit: 1843e16d2df9d98427ef8045589571749d627cf7 change-id: 20240309-adv7511-next-bridge-10d8bbe0544e Best regards, Indeed looks safer. Reviewed-by: Neil Armstrong Neil
Re: [PATCH] drm/bridge: adv7511: make it honour next bridge in DT
On 09/03/2024 16:33, Dmitry Baryshkov wrote: DT bindings for adv7511 and adv7533 bridges specify HDMI output to be present at the port@1. This allows board DT to add e.g. HDMI connector nodes or any other next chained bridge. Make adv7511 driver discover that bridge and attach it to the chain. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/bridge/adv7511/adv7511.h | 1 + drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 10 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h index 39c9ece373b0..ea271f62b214 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511.h +++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h @@ -356,6 +356,7 @@ struct adv7511 { enum drm_connector_status status; bool powered; + struct drm_bridge *next_bridge; struct drm_display_mode curr_mode; unsigned int f_tmds; diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c index b5518ff97165..4eea9e8fb603 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -946,6 +947,10 @@ static int adv7511_bridge_attach(struct drm_bridge *bridge, struct adv7511 *adv = bridge_to_adv7511(bridge); int ret = 0; + ret = drm_bridge_attach(bridge->encoder, adv->next_bridge, bridge, flags); + if (ret) + return ret; + if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) { ret = adv7511_connector_init(adv); if (ret < 0) @@ -1216,6 +1221,11 @@ static int adv7511_probe(struct i2c_client *i2c) memset(_config, 0, sizeof(link_config)); + ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1, NULL, + >next_bridge); + if (ret) + return ret; + if (adv7511->info->link_config) ret = adv7511_parse_dt(dev->of_node, _config); else --- base-commit: 1843e16d2df9d98427ef8045589571749d627cf7 change-id: 20240309-adv7511-next-bridge-10d8bbe0544e Best regards, Reviewed-by: Neil Armstrong Looks fine, I check most of the DT using this bridge and the port@1 seems correctly defined. LGTM. Neil
Re: (subset) [PATCH v8 0/4] LVDS Controller Support for SAM9X75 SoC
Hi, On Sun, 21 Apr 2024 06:40:46 +0530, Dharma Balasubiramani wrote: > This patch series introduces LVDS controller support for the SAM9X75 SoC. The > LVDS controller is designed to work with Microchip's sam9x7 series > System-on-Chip (SoC) devices, providing Low Voltage Differential Signaling > capabilities. > > Patch series Changelog: > - Include configs: at91: Enable LVDS serializer > - include all necessary To/Cc entries. > The Individual Changelogs are available on the respective patches. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/4] dt-bindings: display: bridge: add sam9x75-lvds binding https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/c24177ca3b27e5a7ddaab8d330cedecd7eb9244a [2/4] drm/bridge: add lvds controller support for sam9x7 https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/179b0769fc5fc193d7837bdcb6ddee118a0fa9b8 [3/4] MAINTAINERS: add SAM9X7 SoC's LVDS controller https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/e95752752eaf06c860811ac5ddf9badf6c1b43ca -- Neil
Re: (subset) [PATCH v12 0/7] drm/meson: add support for MIPI DSI Display
Hi, On Wed, 03 Apr 2024 09:46:31 +0200, Neil Armstrong wrote: > The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver > (ver 1.21a), > with a custom glue managing the IP resets, clock and data input similar to > the DW-HDMI > glue on the same Amlogic SoCs. > > This is a follow-up of v5 now the DRM patches are applied, the clk & DT > changes > remains for a full DSI support on G12A & SM1 platforms. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [4/7] drm/meson: gate px_clk when setting rate https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/5c9837374ecf55a1fa3b7622d365a0456960270f -- Neil
Re: [PATCH v12 4/7] drm/meson: gate px_clk when setting rate
Hi Martin, On 10/04/2024 21:34, Martin Blumenstingl wrote: Hi Neil, On Wed, Apr 3, 2024 at 9:46 AM Neil Armstrong wrote: Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver") Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c index a6bc1bdb3d0d..a10cff3ca1fe 100644 --- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c +++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c @@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + clk_disable_unprepare(mipi_dsi->px_clk); nit-pick: clk_disable(mipi_dsi->px_clk); should be enough here as my understanding is that we only need to {un,}prepare a clock once. ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); if (ret) { @@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + ret = clk_prepare_enable(mipi_dsi->px_clk); + if (ret) { + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); + return ret; If we ever hit this error case then there will be a lot of additional errors in the kernel log: - initially the clock is prepared and enabled in meson_dw_mipi_dsi_probe() by calling devm_clk_get_enabled() - we then disable the clock above (generally disabling a clock is expected to always succeed) - if the clock can NOT be re-enabled here we just log the error - in case a user tries to rmmod the driver (to modprobe it again) to try and recover from an error the automatic disabling of the pix_clk (based on devm_clk_get_enabled() where it was enabled initially) there will be a splat because the clock is already disabled (and enabled count is zero, so it cannot be disabled any further) For the 32-bit SoC video clocks I keep track of them being enabled or disabled, see [0], [1] and [2]. In my case this is important because we can run into cases where the PLL doesn't lock (I am not sure how likely this is for your case). It *seems* like we need to do something similar as dw_mipi_dsi_phy_init() can be called when changing the display resolution (or whenever drm_bridge_funcs.atomic_pre_enable) is called. To illustrate what I have in mind I attached a diff (it's based on this patch) - it's compile tested only as I have no DSI hardware. In case dw_mipi_dsi_phy_init() is called only once per device lifecycle things may get easier. PS: I'm so happy that we don't need any clock notifiers for this! So: good work with the clock driver bits. I checked and tested your patches and it doesn't work because the pc_clk needs to be disabled & prepared in order to correctly reset and setup again the video clock tree. dw_mipi_dsi_phy_init() is called at each DSI mode change, but it requires a full clock tree recalc and reset, so it's safer to keep the current design. I'll try to send a change to better handle the disable_unprepare() failure, but definitely only calling clk_disable() wasn't enough. Thanks, Neil Let me know what you think, Martin [0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.9-20240323/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179 [1] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.9-20240323/drivers/gpu/drm/meson/meson_vclk.c#L1077 [2] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.9-20240323/drivers/gpu/drm/meson/meson_vclk.c#L1053
Re: [PATCH v4 0/2] Add driver for Raydium RM69380-based DSI panels
Hi, On Wed, 17 Apr 2024 18:29:32 +0200, David Wronek wrote: > This patch adds support the 2560x1600@90Hz dual DSI command mode panel by > EDO in combination with a Raydium RM69380 driver IC. > > This driver IC can be found in the following devices: > * Lenovo Xiaoxin Pad Pro 2021 (TB-J716F) with EDO panel > * Lenovo Tab P11 Pro (TB-J706F) with EDO panel > * Robo & Kala 2-in-1 Laptop with Sharp panel > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/2] dt-bindings: display: panel: Add Raydium RM69380 https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/4f888782d30276b08a32fa3d9b5c13b7dc123e28 [2/2] drm/panel: Add driver for EDO RM69380 OLED panel https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/9a314ea512b7db9d38107ea0284b56f805b8fc9a -- Neil
Re: [PATCH v3 0/2] drm/panel: add Khadas TS050 V2 panel support
Hi, On Fri, 19 Apr 2024 09:48:50 +0800, Jacobe Zang wrote: > Khadas has update its TS050 panel, the only different between the newer and > older is timing squence. In patches, add new TS050 panel named "ts050v2" as > make it compatible with the old one. > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/2] dt-bindings: panel-simple-dsi: add Khadas TS050 V2 panel https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/0546e01d5a0269f02b4aa227f44b30a5a5558792 [2/2] drm/panel: add Khadas TS050 V2 panel support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/26f9339212db569310d4b0ef4284efcbb462a86f -- Neil
Re: [PATCH v2 0/2] drm/panel: add Khadas TS050 V2 panel support
Hi, On Mon, 15 Apr 2024 11:14:06 +0800, Jacobe Zang wrote: > Changes from v1 at [1]: > - Fix name from "newts050" to "ts050v2" > - Add specific description about controller change > > [1]https://patchwork.kernel.org/project/linux-amlogic/list/?series=842707 > > Jacobe Zang (2): > dt-bindings: panel-simple-dsi: add Khadas TS050 V2 panel bindings > drm/panel: add Khadas TS050 V2 panel support > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/2] dt-bindings: panel-simple-dsi: add Khadas TS050 V2 panel bindings (no commit info) [2/2] drm/panel: add Khadas TS050 V2 panel support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/26f9339212db569310d4b0ef4284efcbb462a86f -- Neil
Re: [PATCH v2 2/2] drm/panel: add Khadas TS050 V2 panel support
{0xcb, {0x02}, 0x01}, + {0xcc, {0x1e}, 0x01}, + {0xcd, {0x02}, 0x01}, + {0xce, {0x20}, 0x01}, + {0xcf, {0x02}, 0x01}, + {0xd0, {0x52}, 0x01}, + {0xd1, {0x02}, 0x01}, + {0xd2, {0x88}, 0x01}, + {0xd3, {0x02}, 0x01}, + {0xd4, {0xaa}, 0x01}, + {0xd5, {0x02}, 0x01}, + {0xd6, {0xd7}, 0x01}, + {0xd7, {0x02}, 0x01}, + {0xd8, {0xf7}, 0x01}, + {0xd9, {0x03}, 0x01}, + {0xda, {0x21}, 0x01}, + {0xdb, {0x03}, 0x01}, + {0xdc, {0x2e}, 0x01}, + {0xdd, {0x03}, 0x01}, + {0xde, {0x3d}, 0x01}, + {0xdf, {0x03}, 0x01}, + {0xe0, {0x4c}, 0x01}, + {0xe1, {0x03}, 0x01}, + {0xe2, {0x5e}, 0x01}, + {0xe3, {0x03}, 0x01}, + {0xe4, {0x71}, 0x01}, + {0xe5, {0x03}, 0x01}, + {0xe6, {0x86}, 0x01}, + {0xe7, {0x03}, 0x01}, + {0xe8, {0x94}, 0x01}, + {0xe9, {0x03}, 0x01}, + {0xea, {0xfa}, 0x01}, /* Select CMD2 Page0 (Undocumented) */ - {0xff, 0x01}, + {0xff, {0x01}, 0x01}, /* Reload CMD1: Don't reload default value to register */ - {0xfb, 0x01}, + {0xfb, {0x01}, 0x01}, /* Select CMD2 Page1 (Undocumented) */ - {0xff, 0x02}, + {0xff, {0x02}, 0x01}, /* Reload CMD1: Don't reload default value to register */ - {0xfb, 0x01}, + {0xfb, {0x01}, 0x01}, /* Select CMD2 Page3 (Undocumented) */ - {0xff, 0x04}, + {0xff, {0x04}, 0x01}, /* Reload CMD1: Don't reload default value to register */ - {0xfb, 0x01}, + {0xfb, {0x01}, 0x01}, /* Select CMD1 */ - {0xff, 0x00}, - {0xd3, 0x22}, /* RGBMIPICTRL: VSYNC back porch = 34 */ - {0xd4, 0x04}, /* RGBMIPICTRL: VSYNC front porch = 4 */ + {0xff, {0x00}, 0x01}, + {0xd3, {0x22}, 0x01}, /* RGBMIPICTRL: VSYNC back porch = 34 */ + {0xd4, {0x04}, 0x01}, /* RGBMIPICTRL: VSYNC front porch = 4 */ +}; + +struct khadas_ts050_panel_data ts050_panel_data = { + .init_code = (struct khadas_ts050_panel_cmd *)ts050_init_code, + .len = ARRAY_SIZE(ts050_init_code) +}; + +struct khadas_ts050_panel_data ts050v2_panel_data = { + .init_code = (struct khadas_ts050_panel_cmd *)ts050v2_init_code, + .len = ARRAY_SIZE(ts050v2_init_code) }; static inline @@ -613,10 +671,11 @@ static int khadas_ts050_panel_prepare(struct drm_panel *panel) msleep(100); - for (i = 0; i < ARRAY_SIZE(init_code); i++) { + for (i = 0; i < khadas_ts050->panel_data->len; i++) { err = mipi_dsi_dcs_write(khadas_ts050->link, -init_code[i].cmd, -_code[i].data, 1); + khadas_ts050->panel_data->init_code[i].cmd, + _ts050->panel_data->init_code[i].data, + khadas_ts050->panel_data->init_code[i].size); if (err < 0) { dev_err(panel->dev, "failed write cmds: %d\n", err); goto poweroff; @@ -762,7 +821,8 @@ static const struct drm_panel_funcs khadas_ts050_panel_funcs = { }; static const struct of_device_id khadas_ts050_of_match[] = { - { .compatible = "khadas,ts050", }, + { .compatible = "khadas,ts050",.data = _panel_data, }, + { .compatible = "khadas,ts050v2", .data = _panel_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, khadas_ts050_of_match); @@ -806,6 +866,13 @@ static int khadas_ts050_panel_probe(struct mipi_dsi_device *dsi) struct khadas_ts050_panel *khadas_ts050; int err; + const void *data = of_device_get_match_data(>dev); + + if (!data) { + dev_err(>dev, "No matching data\n"); + return -ENODEV; + } + dsi->lanes = 4; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | @@ -816,6 +883,7 @@ static int khadas_ts050_panel_probe(struct mipi_dsi_device *dsi) if (!khadas_ts050) return -ENOMEM; + khadas_ts050->panel_data = (struct khadas_ts050_panel_data *)data; mipi_dsi_set_drvdata(dsi, khadas_ts050); khadas_ts050->link = dsi; Reviewed-by: Neil Armstrong
Re: [PATCH v3 8/9] drm/panel: novatek-nt35950: Don't log an error when DSI host can't be found
On 15/04/2024 23:49, Nícolas F. R. A. Prado wrote: Given that failing to find a DSI host causes the driver to defer probe, make use of dev_err_probe() to log the reason. This makes the defer probe reason available and avoids alerting userspace about something that is not necessarily an error. Fixes: 623a3531e9cf ("drm/panel: Add driver for Novatek NT35950 DSI DriverIC panels") Suggested-by: AngeloGioacchino Del Regno Reviewed-by: Laurent Pinchart Signed-off-by: Nícolas F. R. A. Prado --- drivers/gpu/drm/panel/panel-novatek-nt35950.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35950.c b/drivers/gpu/drm/panel/panel-novatek-nt35950.c index 648ce9201426..028fdac293f7 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt35950.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt35950.c @@ -556,10 +556,8 @@ static int nt35950_probe(struct mipi_dsi_device *dsi) } dsi_r_host = of_find_mipi_dsi_host_by_node(dsi_r); of_node_put(dsi_r); - if (!dsi_r_host) { - dev_err(dev, "Cannot get secondary DSI host\n"); - return -EPROBE_DEFER; - } + if (!dsi_r_host) + return dev_err_probe(dev, -EPROBE_DEFER, "Cannot get secondary DSI host\n"); nt->dsi[1] = mipi_dsi_device_register_full(dsi_r_host, info); if (!nt->dsi[1]) { Reviewed-by: Neil Armstrong
Re: [PATCH 03/15] drm/panel-edp: switch to struct drm_edid
On 16/04/2024 15:22, Jani Nikula wrote: Prefer struct drm_edid based functions over struct edid. Signed-off-by: Jani Nikula --- Cc: Douglas Anderson Cc: Neil Armstrong Cc: Jessica Zhang Cc: Sam Ravnborg --- drivers/gpu/drm/panel/panel-edp.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c index d29bacf25c12..ece1e3553c1f 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -242,7 +242,7 @@ struct panel_edp { const struct edp_panel_entry *detected_panel; - struct edid *edid; + const struct drm_edid *drm_edid; struct drm_display_mode override_mode; @@ -617,13 +617,16 @@ static int panel_edp_get_modes(struct drm_panel *panel, if (p->ddc) { pm_runtime_get_sync(panel->dev); - if (!p->edid) - p->edid = drm_get_edid(connector, p->ddc); + if (!p->drm_edid) + p->drm_edid = drm_edid_read_ddc(connector, p->ddc); + + drm_edid_connector_update(connector, p->drm_edid); + /* * If both edid and hard-coded modes exists, skip edid modes to * avoid multiple preferred modes. */ - if (p->edid && !has_hard_coded_modes) { + if (p->drm_edid && !has_hard_coded_modes) { if (has_override_edid_mode) { /* * override_edid_mode is specified. Use @@ -632,7 +635,7 @@ static int panel_edp_get_modes(struct drm_panel *panel, num += panel_edp_override_edid_mode(p, connector, p->detected_panel->override_edid_mode); } else { - num += drm_add_edid_modes(connector, p->edid); + num += drm_edid_connector_add_modes(connector); } } @@ -981,8 +984,8 @@ static void panel_edp_remove(struct device *dev) if (panel->ddc && (!panel->aux || panel->ddc != >aux->ddc)) put_device(>ddc->dev); - kfree(panel->edid); - panel->edid = NULL; + drm_edid_free(panel->drm_edid); + panel->drm_edid = NULL; } static void panel_edp_shutdown(struct device *dev) Reviewed-by: Neil Armstrong
Re: [PATCH 02/15] drm/panel-samsung-atna33xc20: switch to struct drm_edid
On 16/04/2024 15:22, Jani Nikula wrote: Prefer struct drm_edid based functions over struct edid. Signed-off-by: Jani Nikula --- Cc: Neil Armstrong Cc: Jessica Zhang Cc: Sam Ravnborg --- drivers/gpu/drm/panel/panel-samsung-atna33xc20.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c b/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c index 6828a4f24d14..a9f0d214a900 100644 --- a/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c +++ b/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c @@ -36,7 +36,7 @@ struct atana33xc20_panel { struct gpio_desc *el_on3_gpio; struct drm_dp_aux *aux; - struct edid *edid; + const struct drm_edid *drm_edid; ktime_t powered_off_time; ktime_t powered_on_time; @@ -253,9 +253,12 @@ static int atana33xc20_get_modes(struct drm_panel *panel, pm_runtime_get_sync(panel->dev); - if (!p->edid) - p->edid = drm_get_edid(connector, _ep->aux->ddc); - num = drm_add_edid_modes(connector, p->edid); + if (!p->drm_edid) + p->drm_edid = drm_edid_read_ddc(connector, _ep->aux->ddc); + + drm_edid_connector_update(connector, p->drm_edid); + + num = drm_edid_connector_add_modes(connector); pm_runtime_mark_last_busy(panel->dev); pm_runtime_put_autosuspend(panel->dev); @@ -351,7 +354,7 @@ static void atana33xc20_remove(struct dp_aux_ep_device *aux_ep) drm_panel_disable(>base); drm_panel_unprepare(>base); - kfree(panel->edid); + drm_edid_free(panel->drm_edid); } static void atana33xc20_shutdown(struct dp_aux_ep_device *aux_ep) Reviewed-by: Neil Armstrong
Re: [PATCH 01/15] drm/panel: simple: switch to struct drm_edid
On 16/04/2024 15:22, Jani Nikula wrote: Prefer struct drm_edid based functions over struct edid. Signed-off-by: Jani Nikula --- Cc: Neil Armstrong Cc: Jessica Zhang Cc: Sam Ravnborg --- drivers/gpu/drm/panel/panel-simple.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 7215cf767898..d3264fa2f3ff 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -151,7 +151,7 @@ struct panel_simple { struct gpio_desc *enable_gpio; - struct edid *edid; + const struct drm_edid *drm_edid; struct drm_display_mode override_mode; @@ -309,8 +309,8 @@ static int panel_simple_suspend(struct device *dev) regulator_disable(p->supply); p->unprepared_time = ktime_get_boottime(); - kfree(p->edid); - p->edid = NULL; + drm_edid_free(p->drm_edid); + p->drm_edid = NULL; return 0; } @@ -399,11 +399,12 @@ static int panel_simple_get_modes(struct drm_panel *panel, if (p->ddc) { pm_runtime_get_sync(panel->dev); - if (!p->edid) - p->edid = drm_get_edid(connector, p->ddc); + if (!p->drm_edid) + p->drm_edid = drm_edid_read_ddc(connector, p->ddc); - if (p->edid) - num += drm_add_edid_modes(connector, p->edid); + drm_edid_connector_update(connector, p->drm_edid); + + num += drm_edid_connector_add_modes(connector); pm_runtime_mark_last_busy(panel->dev); pm_runtime_put_autosuspend(panel->dev); Reviewed-by: Neil Armstrong
Re: [PATCH v12 4/7] drm/meson: gate px_clk when setting rate
On 10/04/2024 21:34, Martin Blumenstingl wrote: Hi Neil, On Wed, Apr 3, 2024 at 9:46 AM Neil Armstrong wrote: Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver") Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c index a6bc1bdb3d0d..a10cff3ca1fe 100644 --- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c +++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c @@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + clk_disable_unprepare(mipi_dsi->px_clk); nit-pick: clk_disable(mipi_dsi->px_clk); should be enough here as my understanding is that we only need to {un,}prepare a clock once. ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); if (ret) { @@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + ret = clk_prepare_enable(mipi_dsi->px_clk); + if (ret) { + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); + return ret; If we ever hit this error case then there will be a lot of additional errors in the kernel log: - initially the clock is prepared and enabled in meson_dw_mipi_dsi_probe() by calling devm_clk_get_enabled() - we then disable the clock above (generally disabling a clock is expected to always succeed) - if the clock can NOT be re-enabled here we just log the error - in case a user tries to rmmod the driver (to modprobe it again) to try and recover from an error the automatic disabling of the pix_clk (based on devm_clk_get_enabled() where it was enabled initially) there will be a splat because the clock is already disabled (and enabled count is zero, so it cannot be disabled any further) For the 32-bit SoC video clocks I keep track of them being enabled or disabled, see [0], [1] and [2]. In my case this is important because we can run into cases where the PLL doesn't lock (I am not sure how likely this is for your case). It *seems* like we need to do something similar as dw_mipi_dsi_phy_init() can be called when changing the display resolution (or whenever drm_bridge_funcs.atomic_pre_enable) is called. To illustrate what I have in mind I attached a diff (it's based on this patch) - it's compile tested only as I have no DSI hardware. In case dw_mipi_dsi_phy_init() is called only once per device lifecycle things may get easier. Indeed your scheme looks good, I'll try it since indeed we only need to prepare it once in the lifetime of the driver. PS: I'm so happy that we don't need any clock notifiers for this! So: good work with the clock driver bits. Thx ! Let me know what you think, Martin [0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.9-20240323/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179 [1] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.9-20240323/drivers/gpu/drm/meson/meson_vclk.c#L1077 [2] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.9-20240323/drivers/gpu/drm/meson/meson_vclk.c#L1053
Re: [PATCH RESEND] drm/armada: drop unneeded MODULE_ALIAS
On 10/04/2024 10:22, Krzysztof Kozlowski wrote: The MODULE_DEVICE_TABLE already creates proper alias for platform driver. Having another MODULE_ALIAS causes the alias to be duplicated. Signed-off-by: Krzysztof Kozlowski --- Resent third time https://lore.kernel.org/all/20220407202443.23000-1-krzysztof.kozlow...@linaro.org/ Cc: Dmitry Baryshkov Cc: Neil Armstrong --- drivers/gpu/drm/armada/armada_drv.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c index e51ecc4f7ef4..f48e2cf8de43 100644 --- a/drivers/gpu/drm/armada/armada_drv.c +++ b/drivers/gpu/drm/armada/armada_drv.c @@ -283,4 +283,3 @@ module_exit(armada_drm_exit); MODULE_AUTHOR("Russell King "); MODULE_DESCRIPTION("Armada DRM Driver"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:armada-drm"); Reviewed-by: Neil Armstrong I think we'll need maxime or thomas ack to apply this via drm-misc-next Neil
Re: [PATCH RESEND] drm: use capital "OR" for multiple licenses in SPDX
On 10/04/2024 10:22, Krzysztof Kozlowski wrote: Documentation/process/license-rules.rst expects the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Signed-off-by: Krzysztof Kozlowski --- Resend... Cc: Dmitry Baryshkov Cc: Neil Armstrong --- drivers/gpu/drm/drm_client.c| 2 +- drivers/gpu/drm/drm_format_helper.c | 2 +- include/drm/drm_client.h| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c index 77fe217aeaf3..d8e3427ae205 100644 --- a/drivers/gpu/drm/drm_client.c +++ b/drivers/gpu/drm/drm_client.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT /* * Copyright 2018 Noralf Trønnes */ diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index b1be458ed4dd..2348135fb6c0 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT /* * Copyright (C) 2016 Noralf Trønnes * diff --git a/include/drm/drm_client.h b/include/drm/drm_client.h index bc0e66f9c425..1b907709115e 100644 --- a/include/drm/drm_client.h +++ b/include/drm/drm_client.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0 or MIT */ +/* SPDX-License-Identifier: GPL-2.0 OR MIT */ #ifndef _DRM_CLIENT_H_ #define _DRM_CLIENT_H_ Reviewed-by: Neil Armstrong I think we'll need maxime or thomas ack to apply this via drm-misc-next Neil
Re: [PATCH v11 0/7] drm/meson: add support for MIPI DSI Display
Hi, On Mon, 25 Mar 2024 12:09:46 +0100, Neil Armstrong wrote: > The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver > (ver 1.21a), > with a custom glue managing the IP resets, clock and data input similar to > the DW-HDMI > glue on the same Amlogic SoCs. > > This is a follow-up of v5 now the DRM patches are applied, the clk & DT > changes > remains for a full DSI support on G12A & SM1 platforms. > > [...] Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.10/arm64-dt) [1/7] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module https://git.kernel.org/amlogic/c/ef5a84d716042871599ff7c8ff571a6390b99718 [2/7] clk: meson: add vclk driver (no commit info) [3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF (no commit info) [4/7] drm/meson: gate px_clk when setting rate (no commit info) [5/7] arm64: meson: g12-common: add the MIPI DSI nodes https://git.kernel.org/amlogic/c/6f1c2a12ed1138c3e680935718672d361afee372 [6/7] arm64: meson: khadas-vim3l: add TS050 DSI panel overlay https://git.kernel.org/amlogic/c/2a885bad5ba4d553758d3f1689000cee8e6dae87 [7/7] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper https://git.kernel.org/amlogic/c/fde2d69c1626bebb3a8851909c912e582db1ca95 These changes has been applied on the intermediate git tree [1]. The v6.10/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers for inclusion in their intermediate git branches in order to be sent to Linus during the next merge window, or sooner if it's a set of fixes. In the cases of fixes, those will be merged in the current release candidate kernel and as soon they appear on the Linux master branch they will be backported to the previous Stable and Long-Stable kernels [2]. The intermediate git branches are merged daily in the linux-next tree [3], people are encouraged testing these pre-release kernels and report issues on the relevant mailing-lists. If problems are discovered on those changes, please submit a signed-off-by revert patch followed by a corrective changeset. [1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git [3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git -- Neil
Re: (subset) [PATCH v12 0/7] drm/meson: add support for MIPI DSI Display
Hi, On Wed, 03 Apr 2024 09:46:31 +0200, Neil Armstrong wrote: > The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver > (ver 1.21a), > with a custom glue managing the IP resets, clock and data input similar to > the DW-HDMI > glue on the same Amlogic SoCs. > > This is a follow-up of v5 now the DRM patches are applied, the clk & DT > changes > remains for a full DSI support on G12A & SM1 platforms. > > [...] Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.10/arm64-dt) [1/7] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module https://git.kernel.org/amlogic/c/ef5a84d716042871599ff7c8ff571a6390b99718 [5/7] arm64: meson: g12-common: add the MIPI DSI nodes https://git.kernel.org/amlogic/c/6f1c2a12ed1138c3e680935718672d361afee372 [6/7] arm64: meson: khadas-vim3l: add TS050 DSI panel overlay https://git.kernel.org/amlogic/c/2a885bad5ba4d553758d3f1689000cee8e6dae87 [7/7] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper https://git.kernel.org/amlogic/c/fde2d69c1626bebb3a8851909c912e582db1ca95 These changes has been applied on the intermediate git tree [1]. The v6.10/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers for inclusion in their intermediate git branches in order to be sent to Linus during the next merge window, or sooner if it's a set of fixes. In the cases of fixes, those will be merged in the current release candidate kernel and as soon they appear on the Linux master branch they will be backported to the previous Stable and Long-Stable kernels [2]. The intermediate git branches are merged daily in the linux-next tree [3], people are encouraged testing these pre-release kernels and report issues on the relevant mailing-lists. If problems are discovered on those changes, please submit a signed-off-by revert patch followed by a corrective changeset. [1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git [3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git -- Neil
Re: [PATCH 2/2] drm/panel: add New TS050 panel support
Hi Jacobe, On 09/04/2024 10:29, Jacobe Zang wrote: This add New TS050 Panel and make it compatible with old one. Signed-off-by: Jacobe Zang --- drivers/gpu/drm/panel/panel-khadas-ts050.c | 1112 +++- 1 file changed, 590 insertions(+), 522 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-khadas-ts050.c b/drivers/gpu/drm/panel/panel-khadas-ts050.c index b942a01622743..564b3c8ae4d91 100644 --- a/drivers/gpu/drm/panel/panel-khadas-ts050.c +++ b/drivers/gpu/drm/panel/panel-khadas-ts050.c @@ -25,6 +25,7 @@ struct khadas_ts050_panel { struct regulator *supply; struct gpio_desc *reset_gpio; struct gpio_desc *enable_gpio; + struct khadas_ts050_panel_data *panel_data; bool prepared; bool enabled; @@ -32,544 +33,601 @@ struct khadas_ts050_panel { struct khadas_ts050_panel_cmd { u8 cmd; - u8 data; + u8 data[55]; + u8 size; +}; + +struct khadas_ts050_panel_data { + struct khadas_ts050_panel_cmd *init_code; + int len; +}; + +static const struct khadas_ts050_panel_cmd new_ts050_init_code[] = { + {0xB9, {0xFF, 0x83, 0x99}, 0x03}, + {0xBA, {0x63, 0x23, 0x68, 0xCF}, 0x04}, + {0xD2, {0x55}, 0x01}, + {0xB1, {0x02, 0x04, 0x70, 0x90, 0x01, 0x32, 0x33, + 0x11, 0x11, 0x4D, 0x57, 0x56, 0x73, 0x02, 0x02}, 0x0f}, + {0xB2, {0x00, 0x80, 0x80, 0xAE, 0x0A, 0x0E, 0x75, 0x11, 0x00, 0x00, 0x00}, 0x0b}, + {0xB4, {0x00, 0xFF, 0x04, 0xA4, 0x02, 0xA0, 0x00, 0x00, 0x10, 0x00, 0x00, 0x02, + 0x00, 0x24, 0x02, 0x04, 0x0A, 0x21, 0x03, 0x00, 0x00, 0x08, 0xA6, 0x88, + 0x04, 0xA4, 0x02, 0xA0, 0x00, 0x00, 0x10, 0x00, 0x00, 0x02, 0x00, 0x24, + 0x02, 0x04, 0x0A, 0x00, 0x00, 0x08, 0xA6, 0x00, 0x08, 0x11}, 0x2e}, + {0xD3, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, + 0x18, 0x32, 0x10, 0x09, 0x00, 0x09, 0x32, + 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x11, 0x00, 0x02, 0x02, 0x03, 0x00, 0x00, 0x00, 0x0A, + 0x40}, 0x21}, + {0xD5, {0x18, 0x18, 0x18, 0x18, 0x21, 0x20, 0x18, 0x18, 0x19, 0x19, 0x19, + 0x19, 0x18, 0x18, 0x18, 0x18, 0x03, 0x02, 0x01, 0x00, 0x2F, 0x2F, + 0x30, 0x30, 0x31, 0x31, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18}, 0x20}, + {0xD6, {0x18, 0x18, 0x18, 0x18, 0x20, 0x21, 0x19, 0x19, 0x18, 0x18, 0x19, + 0x19, 0x18, 0x18, 0x18, 0x18, 0x00, 0x01, 0x02, 0x03, 0x2F, 0x2F, + 0x30, 0x30, 0x31, 0x31, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18}, 0x20}, + {0xD8, {0x0A, 0xBE, 0xFA, 0xA0, 0x0A, 0xBE, 0xFA, 0xA0}, 0x08}, + {0xBD, {0x01}, 0x01}, + {0xD8, {0x0F, 0xFF, 0xFF, 0xE0, 0x0F, 0xFF, 0xFF, 0xE0}, 0x08}, + {0xBD, {0x02}, 0x01}, + {0xD8, {0x0F, 0xFF, 0xFF, 0xE0, 0x0F, 0xFF, 0xFF, 0xE0}, 0x08}, + {0xBD, {0x00}, 0x01}, + {0xE0, {0x01, 0x35, 0x41, 0x3B, 0x79, 0x81, 0x8C, 0x85, 0x8E, + 0x95, 0x9B, 0xA0, 0xA4, 0xAB, 0xB1, 0xB3, 0xB7, 0xC5, 0xBD, 0xC5, + 0xB6, 0xC2, 0xC2, 0x62, 0x5D, 0x66, 0x73, 0x01, 0x35, 0x41, 0x3B, + 0x79, 0x81, 0x8C, 0x85, 0x8E, 0x95, 0x9B, 0xA0, 0xA4, 0xAB, 0xB1, + 0xB3, 0xB7, 0xB5, 0xBD, 0xC5, 0xB6, 0xC2, 0xC2, 0x62, 0x5D, 0x66, + 0x73}, 0x36}, + {0xB6, {0x97, 0x97}, 0x02}, + {0xCC, {0xC8}, 0x02}, + {0xBF, {0x40, 0x41, 0x50, 0x19}, 0x04}, + {0xC6, {0xFF, 0xF9}, 0x02}, + {0xC0, {0x25, 0x5A}, 0x02}, }; This init sequence looks very very close to the ltk050h3146w one in https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c#L247 could it probably be adding in this driver instead ? do you know which controller is used in this new panel ? Thanks, Neil /* Only the CMD1 User Command set is documented */ -static const struct khadas_ts050_panel_cmd init_code[] = { +static const struct khadas_ts050_panel_cmd ts050_init_code[] = { /* Select Unknown CMD Page (Undocumented) */ - {0xff, 0xee}, + {0xff, {0xee}, 0x01}, /* Reload CMD1: Don't reload default value to register */ - {0xfb, 0x01}, - {0x1f, 0x45}, - {0x24, 0x4f}, - {0x38, 0xc8}, - {0x39, 0x27}, - {0x1e, 0x77}, - {0x1d, 0x0f}, - {0x7e, 0x71}, - {0x7c, 0x03}, - {0xff, 0x00}, - {0xfb, 0x01}, - {0x35, 0x01}, + {0xfb, {0x01}, 0x01}, + {0x1f, {0x45}, 0x01}, + {0x24, {0x4f}, 0x01}, + {0x38, {0xc8}, 0x01}, + {0x39, {0x27}, 0x01}, + {0x1e, {0x77}, 0x01}, + {0x1d, {0x0f}, 0x01}, + {0x7e, {0x71}, 0x01}, + {0x7c, {0x03}, 0x01}, + {0xff, {0x00}, 0x01}, + {0xfb, {0x01}, 0x01}, + {0x35, {0x01}, 0x01}, /* Select CMD2 Page0 (Undocumented) */
Re: Khadas VIM3/3L New TS050 support patch
Hi Jacobe, On 08/04/2024 15:16, Jacobe Zang wrote: Subject: [PATCH] drm/panel: add New TS050 Panel support Hello all, I have made some changes to the panel-khadas-ts050.c. Here is a brief overview of what has been done: - Add dt-bindings in document. - Add New TS050 Panel timing sequence. - Make it compatible with the old TS050 panel. - The only difference between them is the timing, so I change the node in overlay to identify the specific panel. - Changes in DTS doesn't push, because preceding commits have not been merged. The proposed changes have been successfully run on Khadas VIM3/3L. Please find the patch attached/inline. You should read https://www.kernel.org/doc/html/v4.17/process/submitting-patches.html and perhaps use a tool like b4 (https://b4.docs.kernel.org/en/latest/) to send your patches in text only, you can follow https://www.marcusfolkesson.se/blog/use-b4-for-kernel-contributions/ for example. I'm afraid this patchset will be rejected and not reviewed if sent in this format with patches as attachments. Thanks, Neil Jacobe Zang (2): drm/panel: add New TS050 panel support dt-bindings: panel-simple-dsi: add New Khadas TS050 panel bindings drivers/gpu/drm/panel/panel-khadas-ts050.c | 1119 - Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++ --- Best Regards Jacobe 臧介皓 Amazing Khadas, Always Amazes You!
Re: [PATCH v12 2/7] clk: meson: add vclk driver
On 05/04/2024 09:00, Jerome Brunet wrote: On Thu 04 Apr 2024 at 18:59, Neil Armstrong wrote: On 04/04/2024 10:13, Jerome Brunet wrote: On Wed 03 Apr 2024 at 09:46, Neil Armstrong wrote: The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. The checkpatch warning is still there. Is it a choice or a mistake ? Documentation says "GPL v2" exists for historic reason which seems to hint "GPL" is preferred, and I suppose this is why checkpatch warns for it. Well I didn't see this warning, this is what I fixed: $ scripts/checkpatch.pl --strict drivers/clk/meson/vclk.c CHECK: Alignment should match open parenthesis #63: FILE: drivers/clk/meson/vclk.c:63: +static unsigned long meson_vclk_div_recalc_rate(struct clk_hw *hw, +unsigned long prate) CHECK: Alignment should match open parenthesis #73: FILE: drivers/clk/meson/vclk.c:73: +static int meson_vclk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) CHECK: Alignment should match open parenthesis #83: FILE: drivers/clk/meson/vclk.c:83: +static int meson_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) I would not ask a respin solely for this. It's nice to fix it but I was mostly after the warning TBH. It seems that checking a commit triggers an extra check $ scripts/checkpatch.pl --strict -G 1bac9f6aa3c3 WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #58: new file mode 100644 WARNING: Prefer "GPL" over "GPL v2" - see commit bf7fbeeae6db ("module: Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity") #203: FILE: drivers/clk/meson/vclk.c:141: +MODULE_LICENSE("GPL v2"); Hum, I'm running checkpatch against the mail itself, not the commit. I still get the warning Patch or commit seems to trigger more tests than a file directly, anyway I sent a follow-up patch: https://lore.kernel.org/all/20240408-amlogic-v6-9-upstream-fix-clk-module-license-v1-1-366ddc0f3...@linaro.org/ Thanks, Neil Neil Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/vclk.c | 141 + drivers/clk/meson/vclk.h | 51 4 files changed, 197 insertions(+) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 29ffd14d267b..8a9823789fa3 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_VCLK + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON_CLKC_UTILS tristate diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 9ee4b954c896..9ba43fe7a07a 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c new file mode 100644 index ..45dc216941ea --- /dev/null +++ b/drivers/clk/meson/vclk.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#include +#include "vclk.h" + +/* The VCLK gate has a supplementary reset bit to pulse after ungating */ + +static inline struct meson_vclk_gate_data * +clk_get_meson_vclk_gate_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_gate_data *)clk->data; +} + +static int meson_vclk_gate_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 1); + + /* Do a reset pulse */ + meson_parm_write(clk->map, >reset, 1); + meson_parm_write(clk->map, >reset, 0); + + return 0; +} + +static void meson_vclk_gate_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_
Re: [PATCH v12 2/7] clk: meson: add vclk driver
On 04/04/2024 10:13, Jerome Brunet wrote: On Wed 03 Apr 2024 at 09:46, Neil Armstrong wrote: The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. The checkpatch warning is still there. Is it a choice or a mistake ? Documentation says "GPL v2" exists for historic reason which seems to hint "GPL" is preferred, and I suppose this is why checkpatch warns for it. Well I didn't see this warning, this is what I fixed: $ scripts/checkpatch.pl --strict drivers/clk/meson/vclk.c CHECK: Alignment should match open parenthesis #63: FILE: drivers/clk/meson/vclk.c:63: +static unsigned long meson_vclk_div_recalc_rate(struct clk_hw *hw, +unsigned long prate) CHECK: Alignment should match open parenthesis #73: FILE: drivers/clk/meson/vclk.c:73: +static int meson_vclk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) CHECK: Alignment should match open parenthesis #83: FILE: drivers/clk/meson/vclk.c:83: +static int meson_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) It seems that checking a commit triggers an extra check $ scripts/checkpatch.pl --strict -G 1bac9f6aa3c3 WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #58: new file mode 100644 WARNING: Prefer "GPL" over "GPL v2" - see commit bf7fbeeae6db ("module: Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity") #203: FILE: drivers/clk/meson/vclk.c:141: +MODULE_LICENSE("GPL v2"); Neil Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/vclk.c | 141 + drivers/clk/meson/vclk.h | 51 4 files changed, 197 insertions(+) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 29ffd14d267b..8a9823789fa3 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_VCLK + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON_CLKC_UTILS tristate diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 9ee4b954c896..9ba43fe7a07a 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c new file mode 100644 index ..45dc216941ea --- /dev/null +++ b/drivers/clk/meson/vclk.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#include +#include "vclk.h" + +/* The VCLK gate has a supplementary reset bit to pulse after ungating */ + +static inline struct meson_vclk_gate_data * +clk_get_meson_vclk_gate_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_gate_data *)clk->data; +} + +static int meson_vclk_gate_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 1); + + /* Do a reset pulse */ + meson_parm_write(clk->map, >reset, 1); + meson_parm_write(clk->map, >reset, 0); + + return 0; +} + +static void meson_vclk_gate_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 0); +} + +static int meson_vclk_gate_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + return meson_parm_read(clk->map, >enable); +} + +const struct clk_ops meson_vclk_gate_ops = { + .enable = meson_vclk_gate_enable, + .disable = meson_vclk_ga
[PATCH v12 7/7] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper
This adds a basic devicetree for the MNT Reform2 DIY laptop when using a CM4 adapter and a BPI-CM4 module. Co-developed-by: Lukas F. Hartmann Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../meson-g12b-bananapi-cm4-mnt-reform2.dts| 384 + 2 files changed, 385 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 0b7961de3db7..d525e5123fbc 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3-ts050.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-mnt-reform2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts new file mode 100644 index ..003efed529ba --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Neil Armstrong + * Copyright 2023 MNT Research GmbH + */ + +/dts-v1/; + +#include "meson-g12b-bananapi-cm4.dtsi" +#include +#include +#include + +/ { + model = "MNT Reform 2 with BPI-CM4 Module"; + compatible = "mntre,reform2-cm4", "bananapi,bpi-cm4", "amlogic,a311d", "amlogic,g12b"; + chassis-type = "laptop"; + + aliases { + ethernet0 = + i2c0 = + i2c1 = + }; + + hdmi_connector: hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <_ao GPIOAO_7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-green { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + }; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "MNT-REFORM2-BPI-CM4"; + audio-widgets = "Headphone", "Headphone Jack", + "Speaker", "External Speaker", + "Microphone", "Mic Jack"; + audio-aux-devs = <_a>, <_b>, <_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", + "TDM_A Playback", "TDMOUT_A OUT", + "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "TDMIN_B IN 1", "TDM_B Capture", + "TDMIN_B IN 4", "TDM_B Loopback", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT", + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "External Speaker", "SPK_LP", + "External Speaker", "SPK_LN", + "External Speaker", "SPK_RP", + "External Speaker", "SPK_RN", + "L
[PATCH v12 4/7] drm/meson: gate px_clk when setting rate
Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver") Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c index a6bc1bdb3d0d..a10cff3ca1fe 100644 --- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c +++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c @@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + clk_disable_unprepare(mipi_dsi->px_clk); ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); if (ret) { @@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + ret = clk_prepare_enable(mipi_dsi->px_clk); + if (ret) { + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); + return ret; + } + switch (mipi_dsi->dsi_device->format) { case MIPI_DSI_FMT_RGB888: dpi_data_format = DPI_COLOR_24BIT; -- 2.34.1
[PATCH v12 5/7] arm64: meson: g12-common: add the MIPI DSI nodes
Add the MIPI DSI Analog & Digital PHY nodes and the DSI control nodes with proper port endpoint to the VPU. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 +++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 9d5eab6595d0..b058ed78faf0 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1663,9 +1663,28 @@ pwrc: power-controller { <25000>, <0>; /* Do Nothing */ }; + + mipi_analog_dphy: phy { + compatible = "amlogic,g12a-mipi-dphy-analog"; + #phy-cells = <0>; + status = "disabled"; + }; }; }; + mipi_dphy: phy@44000 { + compatible = "amlogic,axg-mipi-dphy"; + reg = <0x0 0x44000 0x0 0x2000>; + clocks = < CLKID_MIPI_DSI_PHY>; + clock-names = "pclk"; + resets = < RESET_MIPI_DSI_PHY>; + reset-names = "phy"; + phys = <_analog_dphy>; + phy-names = "analog"; + #phy-cells = <0>; + status = "disabled"; + }; + usb3_pcie_phy: phy@46000 { compatible = "amlogic,g12a-usb3-pcie-phy"; reg = <0x0 0x46000 0x0 0x2000>; @@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint { remote-endpoint = <_tx_in>; }; }; + + /* DPI output port */ + dpi_port: port@2 { + reg = <2>; + + dpi_out: endpoint { + remote-endpoint = <_dsi_in>; + }; + }; }; gic: interrupt-controller@ffc01000 { @@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 { amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; }; + mipi_dsi: dsi@7000 { + compatible = "amlogic,meson-g12a-dw-mipi-dsi"; + reg = <0x0 0x7000 0x0 0x1000>; + resets = < RESET_MIPI_DSI_HOST>; + reset-names = "top"; + clocks = < CLKID_MIPI_DSI_HOST>, +< CLKID_MIPI_DSI_PXCLK>, +< CLKID_CTS_ENCL>; + clock-names = "pclk", "bit", "px"; + phys = <_dphy>; + phy-names = "dphy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + assigned-clocks = < CLKID_MIPI_DSI_PXCLK_SEL>, +< CLKID_CTS_ENCL_SEL>, +< CLKID_VCLK2_SEL>; + assigned-clock-parents = < CLKID_GP0_PLL>, +< CLKID_VCLK2_DIV1>, +< CLKID_GP0_PLL>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* VPU VENC Input */ + mipi_dsi_venc_port: port@0 { + reg = <0>; + + mipi_dsi_in: endpoint { + remote-endpoint = <_out>; + }; + }; +
[PATCH v12 6/7] arm64: meson: khadas-vim3l: add TS050 DSI panel overlay
This add dtbo overlay to support the Khadas TS050 panel on the Khadas VIM3 & VIM3L boards. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/Makefile | 4 + .../boot/dts/amlogic/meson-khadas-vim3-ts050.dtso | 108 + 2 files changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 1ab160bf928a..0b7961de3db7 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3-ts050.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb @@ -76,6 +77,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m2-pro.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l-ts050.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-s905d3-libretech-cc.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb @@ -86,3 +88,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb # Overlays meson-g12a-fbx8am-brcm-dtbs:= meson-g12a-fbx8am.dtb meson-g12a-fbx8am-brcm.dtbo meson-g12a-fbx8am-realtek-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-realtek.dtbo +meson-g12b-a311d-khadas-vim3-ts050-dtbs := meson-g12b-a311d-khadas-vim3.dtb meson-khadas-vim3-ts050.dtbo +meson-sm1-khadas-vim3l-ts050-dtbs := meson-sm1-khadas-vim3l.dtb meson-khadas-vim3-ts050.dtbo diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso new file mode 100644 index ..a41b4e619580 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong + */ + +#include +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +/* + * Enable Khadas TS050 DSI Panel + Touch Controller + * on Khadas VIM3 (A311D) and VIM3L (S905D3) + */ + +&{/} { + panel_backlight: backlight { + compatible = "pwm-backlight"; + pwms = <_AO_cd 0 25000 0>; + brightness-levels = <0 255>; + num-interpolated-steps = <255>; + default-brightness-level = <200>; + }; +}; + + { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <_sda_a_pins>, <_sck_a_pins>; + pinctrl-names = "default"; + status = "okay"; + + touch-controller@38 { + compatible = "edt,edt-ft5206"; + reg = <0x38>; + interrupt-parent = <_intc>; + interrupts = ; + reset-gpios = <_expander 6 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <1920>; + status = "okay"; + }; +}; + +_dsi { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + assigned-clocks = < CLKID_GP0_PLL>, + < CLKID_MIPI_DSI_PXCLK_SEL>, + < CLKID_MIPI_DSI_PXCLK>, + < CLKID_CTS_ENCL_SEL>, + < CLKID_VCLK2_SEL>; + assigned-clock-parents = <0>, +< CLKID_GP0_PLL>, +<0>, +< CLKID_VCLK2_DIV1>, +< CLKID_GP0_PLL>; + assigned-clock-rates = <96000>, + <0>, + <96000>, + <0>, + <0>; + + panel@0 { + compatible = "khadas,ts050"; + reset-gpios = <_expander 0 GPIO_ACTIVE_LOW>; + enable-gpios = <_expander 1 GPIO_ACTIVE_HIGH>; + power-supply = <_3v3>; + backlight = <_backlight>; + reg = <0>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <_out_panel>; + }; + }; + }; + + ports { + #address-cells = <
[PATCH v12 3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
In order to setup the DSI clock, let's make the unused VCLK2 clock path configuration via CCF. The nocache option is removed from following clocks: - vclk2_sel - vclk2_input - vclk2_div - vclk2 - vclk_div1 - vclk2_div2_en - vclk2_div4_en - vclk2_div6_en - vclk2_div12_en - vclk2_div2 - vclk2_div4 - vclk2_div6 - vclk2_div12 - cts_encl_sel vclk2 and vclk2_div uses the newly introduced vclk regmap driver to handle the enable and reset bits. In order to set a rate on cts_encl via the vclk2 clock path, the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in order to keep CCF from selection a parent. The parents of cts_encl_sel & vclk2_sel are expected to be defined in DT or manually set by the display driver at some point. The following clock scheme is to be used for DSI: xtal \_ gp0_pll_dco \_ gp0_pll |- vclk2_sel | \_ vclk2_input | \_ vclk2_div |\_ vclk2 | \_ vclk2_div1 | \_ cts_encl_sel | \_ cts_encl -> to VPU LCD Encoder |- mipi_dsi_pxclk_sel \_ mipi_dsi_pxclk_div \_ mipi_dsi_pxclk -> to DSI controller The mipi_dsi_pxclk_div is set as bypass with a single /1 entry in div_table in order to use the same GP0 for mipi_dsi_pxclk and vclk2_input. The SET_RATE_PARENT is only set on the mipi_dsi_pxclk_sel clock so the DSI bitclock is the reference base clock to calculate the vclk2_div value when pixel clock is set on the cts_encl endpoint. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 1 + drivers/clk/meson/g12a.c | 76 ++- 2 files changed, 57 insertions(+), 20 deletions(-) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 8a9823789fa3..59a40a49f8e1 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -144,6 +144,7 @@ config COMMON_CLK_G12A select COMMON_CLK_MESON_EE_CLKC select COMMON_CLK_MESON_CPU_DYNDIV select COMMON_CLK_MESON_VID_PLL_DIV + select COMMON_CLK_MESON_VCLK select MFD_SYSCON help Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 90f4c6103014..df7e17c850d8 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -22,6 +22,7 @@ #include "clk-regmap.h" #include "clk-cpu-dyndiv.h" #include "vid-pll-div.h" +#include "vclk.h" #include "meson-eeclk.h" #include "g12a.h" @@ -3165,7 +3166,7 @@ static struct clk_regmap g12a_vclk2_sel = { .ops = _regmap_mux_ops, .parent_hws = g12a_vclk_parent_hws, .num_parents = ARRAY_SIZE(g12a_vclk_parent_hws), - .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_NO_REPARENT, }, }; @@ -3193,7 +3194,6 @@ static struct clk_regmap g12a_vclk2_input = { .ops = _regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { _vclk2_sel.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, }, }; @@ -3215,19 +3215,32 @@ static struct clk_regmap g12a_vclk_div = { }; static struct clk_regmap g12a_vclk2_div = { - .data = &(struct clk_regmap_div_data){ - .offset = HHI_VIID_CLK_DIV, - .shift = 0, - .width = 8, + .data = &(struct meson_vclk_div_data){ + .div = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 0, + .width = 8, + }, + .enable = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 16, + .width = 1, + }, + .reset = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 17, + .width = 1, + }, + .flags = CLK_DIVIDER_ROUND_CLOSEST, }, .hw.init = &(struct clk_init_data){ .name = "vclk2_div", - .ops = _regmap_divider_ops, + .ops = _vclk_div_ops, .parent_hws = (const struct clk_hw *[]) { _vclk2_input.hw }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_GATE, }, }; @@ -3246,16 +3259,24 @@ static struct clk_regmap g12a_vclk = { }; static struct clk_regmap g12a_vclk2 = { - .data = &(struct clk_regmap_gate_data){ - .offset = HHI_VIID_CLK_CNTL, - .bit_idx = 19, + .data = &(struct meson_vclk_gate_data){ + .enable = { + .
[PATCH v12 2/7] clk: meson: add vclk driver
The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/vclk.c | 141 + drivers/clk/meson/vclk.h | 51 4 files changed, 197 insertions(+) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 29ffd14d267b..8a9823789fa3 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_VCLK + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON_CLKC_UTILS tristate diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 9ee4b954c896..9ba43fe7a07a 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c new file mode 100644 index ..45dc216941ea --- /dev/null +++ b/drivers/clk/meson/vclk.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#include +#include "vclk.h" + +/* The VCLK gate has a supplementary reset bit to pulse after ungating */ + +static inline struct meson_vclk_gate_data * +clk_get_meson_vclk_gate_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_gate_data *)clk->data; +} + +static int meson_vclk_gate_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 1); + + /* Do a reset pulse */ + meson_parm_write(clk->map, >reset, 1); + meson_parm_write(clk->map, >reset, 0); + + return 0; +} + +static void meson_vclk_gate_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 0); +} + +static int meson_vclk_gate_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + return meson_parm_read(clk->map, >enable); +} + +const struct clk_ops meson_vclk_gate_ops = { + .enable = meson_vclk_gate_enable, + .disable = meson_vclk_gate_disable, + .is_enabled = meson_vclk_gate_is_enabled, +}; +EXPORT_SYMBOL_GPL(meson_vclk_gate_ops); + +/* The VCLK Divider has supplementary reset & enable bits */ + +static inline struct meson_vclk_div_data * +clk_get_meson_vclk_div_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_div_data *)clk->data; +} + +static unsigned long meson_vclk_div_recalc_rate(struct clk_hw *hw, + unsigned long prate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, >div), + vclk->table, vclk->flags, vclk->div.width); +} + +static int meson_vclk_div_determine_rate(struct clk_hw *hw, +struct clk_rate_request *req) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_determine_rate(hw, req, vclk->table, vclk->div.width, + vclk->flags); +} + +static int meson_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + int ret; + + ret = divider_get_val(rate, parent_rate, vclk->table, vclk->div.width, + vclk->flags); + if (ret <
[PATCH v12 1/7] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module
The MNT Reform 2 CM4 adapter can be populated with any Raspberry Pi CM4 compatible module such as a BPI-CM4 Module, document that. Acked-by: Conor Dooley Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 949537cea6be..b66b93b8bfd3 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -157,6 +157,7 @@ properties: items: - enum: - bananapi,bpi-cm4io + - mntre,reform2-cm4 - const: bananapi,bpi-cm4 - const: amlogic,a311d - const: amlogic,g12b -- 2.34.1
[PATCH v12 0/7] drm/meson: add support for MIPI DSI Display
The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom glue managing the IP resets, clock and data input similar to the DW-HDMI glue on the same Amlogic SoCs. This is a follow-up of v5 now the DRM patches are applied, the clk & DT changes remains for a full DSI support on G12A & SM1 platforms. The DW-MIPI-DSI transceiver + D-PHY are clocked by the GP0 PLL, and the ENCL encoder + VIU pixel reader by the VCLK2 clock using the HDMI PLL. The DW-MIPI-DSI transceiver gets this pixel stream as input clocked with the VCLK2 clock. An optional "MEAS" clock can be enabled to measure the delay between each vsync feeding the DW-MIPI-DSI transceiver. The clock setup has been redesigned to use CCF, a common PLL (GP0) and the VCLK2 clock path for DSI in preparation of full CCF support and possibly dual display with HDMI. The change from v5 is that now we use a "VCLK" driver instead of notifier and rely on CLK_SET_RATE_GATE to ensure the VCLK gate operation are called. Signed-off-by: Neil Armstrong --- Changes in v12: - fix parameters alignment in patch 2 - update g12a_mipi_dsi_pxclk_div_table comment with jerome's suggestions - fix dtbs overlay build, fix missed v11... thx khadas for reporting it off-list & testing - Link to v11: https://lore.kernel.org/r/20240325-amlogic-v6-4-upstream-dsi-ccf-vim3-v11-0-04f55de44...@linaro.org Changes in v11: - Rebased on v6.9-rc1 - Fixed overlay handling/creation - Link to v10: https://lore.kernel.org/r/20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5...@linaro.org Changes in v10: - Rename regmap_vclk to meson_clk and add _gate for the gate - Move COMMON_CLK_MESON_VCLK to following patch - Remove CLK_SET_RATE_PARENT from g12a_vclk2_sel, keep it only on mipi_dsi_pxclk_sel - Add more info on commit message to specify how clock setup is designed - Remove forgotten CLK_IGNORE_UNUSED on g12a_vclk2_input - Remove useless CLK_SET_RATE_PARENT on g12a_vclk2_div to stop propagatting rate _after_ vclk2_div - Remove invalid CLK_SET_RATE_GATE on g12a_vclk2 since it's not a divider... - Drop already applied patches - move Khadas TS050 changes as an overlay - Link to v9: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-0-95256ed13...@linaro.org Changes in v9: - Colledte reviewed-bys - Fixed patches 2 & 4, commit messages and bindings format - Link to v8: https://lore.kernel.org/r/20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-0-81e4aeeda...@linaro.org Changes in v8: - Switch vclk clk driver to parm as requested by Jerome - Added bindings fixes to amlogic,meson-axg-mipi-pcie-analog & amlogic,g12a-mipi-dphy-analog - Fixed DT errors in vim3 example and MNT Reform DT - Rebased on next-20231107, successfully tested on VIM3L - Link to v7: https://lore.kernel.org/r/20230803-amlogic-v6-4-upstream-dsi-ccf-vim3-v7-0-762219fc5...@linaro.org Changes in v7: - Added review tags - Fixed patch 5 thanks to George - Link to v6: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v6-0-fd2ac9845...@linaro.org Changes in v6: - dropped applied DRM patches - dropped clk private prefix patches - rebased on top of 20230607-topic-amlogic-upstream-clkid-public-migration-v2-0-38172d17c...@linaro.org - re-ordered/cleaned ENCL patches to match clkid public migration - Added new "vclk" driver - uses vclk driver instead of notifier - cleaned VCLK2 clk flags - add px_clk gating from DSI driver - Link to v5: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v5-0-56eb7a4d5...@linaro.org Changes in v5: - Aded PRIV all the G12 internal clk IDS to simplify public exposing - Fixed the DSI bindings - Fixed the DSI HSYNC/VSYNC polarity handling - Fixed the DSI clock setup - Fixed the DSI phy timings - Dropped components for DSI, only keeping it for HDMI - Added MNT Reform 2 CM4 DT - Dropped already applied PHY fix - Link to v4: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v4-0-2592c29ea...@linaro.org Changes from v3 at [3]: - switched all clk setup via CCF - using single PLL for DSI controller & ENCL encoder - added ENCL clocks to CCF - make the VCLK2 clocks configuration by CCF - fixed probe/bind of DSI controller to work with panels & bridges - added bit_clk to controller to it can setup the BIT clock aswell - added fix for components unbind - added fix for analog phy setup value - added TS050 timings fix - dropped previous clk control patch Changes from v2 at [2]: - Fixed patch 3 - Added reviews from Jagan - Rebased on v5.19-rc1 Changes from v1 at [1]: - fixed DSI host bindings - add reviewed-by tags for bindings - moved magic values to defines thanks to Martin's searches - added proper prefixes to defines - moved phy_configure to phy_init() dw-mipi-dsi callback - moved phy_on to a new phy_power_on() dw-mipi-dsi callback - correctly return phy_init/configure errors to callback return
Re: [PATCH] drm/meson: vclk: fix calculation of 59.94 fractional rates
Hi, On Tue, 09 Jan 2024 23:07:04 +, Christian Hewitt wrote: > Playing 4K media with 59.94 fractional rate (typically VP9) causes the screen > to lose > sync with the following error reported in the system log: > > [ 89.610280] Fatal Error, invalid HDMI vclk freq 593406 > > Modetest shows the following: > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm/meson: vclk: fix calculation of 59.94 fractional rates https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/bfbc68e4d8695497f858a45a142665e22a512ea3 -- Neil
Re: (subset) [PATCH 0/5] Add Support for RK3326 GameForce Chi
Hi, On Mon, 25 Mar 2024 08:49:54 -0500, Chris Morgan wrote: > From: Chris Morgan > > Add support for the GameForce Chi [1]. > > The GameForce Chi has the following hardware: > Tested: > - 3.5" dual lane 640x480 DSI display. > - 15 GPIO based face buttons. > - 2 ADC based face buttons. > - 1 ADC joystick (left) connected to internal SARADC. > - RGB LED arrays for key backlighting > - Dual internal speakers. > - Realtek RTL8723BS SDIO WiFi. > - Single SDMMC slot. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/5] dt-bindings: vendor-prefix: Add prefix for GameForce https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/59237fc04ee1c4cdf62ad5dba18244713970e36f [2/5] dt-bindings: display: Add GameForce Chi Panel https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/387974a21a63b1c7efcbc19c48b9930f6ef5ac63 [3/5] drm/panel: st7703: Add GameForce Chi Panel Support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/4c4f33be7e4d476566246e7166c54ef175287e00 -- Neil
Re: [PATCH v11 2/7] clk: meson: add vclk driver
On 29/03/2024 13:33, Jerome Brunet wrote: On Mon 25 Mar 2024 at 12:09, Neil Armstrong wrote: The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. checkpatch reports a few easy CHECKs and one WARNING. Could you please fix these ? Other than that, It looks OK. Ack thx Neil Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/vclk.c | 141 + drivers/clk/meson/vclk.h | 51 4 files changed, 197 insertions(+) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 29ffd14d267b..8a9823789fa3 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_VCLK + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON_CLKC_UTILS tristate diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 9ee4b954c896..9ba43fe7a07a 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c new file mode 100644 index ..3ea813a0a995 --- /dev/null +++ b/drivers/clk/meson/vclk.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#include +#include "vclk.h" + +/* The VCLK gate has a supplementary reset bit to pulse after ungating */ + +static inline struct meson_vclk_gate_data * +clk_get_meson_vclk_gate_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_gate_data *)clk->data; +} + +static int meson_vclk_gate_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 1); + + /* Do a reset pulse */ + meson_parm_write(clk->map, >reset, 1); + meson_parm_write(clk->map, >reset, 0); + + return 0; +} + +static void meson_vclk_gate_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 0); +} + +static int meson_vclk_gate_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + return meson_parm_read(clk->map, >enable); +} + +const struct clk_ops meson_vclk_gate_ops = { + .enable = meson_vclk_gate_enable, + .disable = meson_vclk_gate_disable, + .is_enabled = meson_vclk_gate_is_enabled, +}; +EXPORT_SYMBOL_GPL(meson_vclk_gate_ops); + +/* The VCLK Divider has supplementary reset & enable bits */ + +static inline struct meson_vclk_div_data * +clk_get_meson_vclk_div_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_div_data *)clk->data; +} + +static unsigned long meson_vclk_div_recalc_rate(struct clk_hw *hw, +unsigned long prate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, >div), + vclk->table, vclk->flags, vclk->div.width); +} + +static int meson_vclk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_determine_rate(hw, req, vclk->table, vclk->div.width, + vclk->flags); +} + +static int meson_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ +
Re: [PATCH v11 3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
On 29/03/2024 13:35, Jerome Brunet wrote: On Mon 25 Mar 2024 at 12:09, Neil Armstrong wrote: In order to setup the DSI clock, let's make the unused VCLK2 clock path configuration via CCF. The nocache option is removed from following clocks: - vclk2_sel - vclk2_input - vclk2_div - vclk2 - vclk_div1 - vclk2_div2_en - vclk2_div4_en - vclk2_div6_en - vclk2_div12_en - vclk2_div2 - vclk2_div4 - vclk2_div6 - vclk2_div12 - cts_encl_sel vclk2 and vclk2_div uses the newly introduced vclk regmap driver to handle the enable and reset bits. In order to set a rate on cts_encl via the vclk2 clock path, the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in order to keep CCF from selection a parent. The parents of cts_encl_sel & vclk2_sel are expected to be defined in DT or manually set by the display driver at some point. The following clock scheme is to be used for DSI: xtal \_ gp0_pll_dco \_ gp0_pll |- vclk2_sel | \_ vclk2_input | \_ vclk2_div |\_ vclk2 | \_ vclk2_div1 | \_ cts_encl_sel | \_ cts_encl-> to VPU LCD Encoder |- mipi_dsi_pxclk_sel \_ mipi_dsi_pxclk_div \_ mipi_dsi_pxclk -> to DSI controller The mipi_dsi_pxclk_div is set as bypass with a single /1 entry in div_table in order to use the same GP0 for mipi_dsi_pxclk and vclk2_input. The SET_RATE_PARENT is only set on the mipi_dsi_pxclk_sel clock so the DSI bitclock is the reference base clock to calculate the vclk2_div value when pixel clock is set on the cts_encl endpoint. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 1 + drivers/clk/meson/g12a.c | 72 ++- 2 files changed, 53 insertions(+), 20 deletions(-) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 8a9823789fa3..59a40a49f8e1 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -144,6 +144,7 @@ config COMMON_CLK_G12A select COMMON_CLK_MESON_EE_CLKC select COMMON_CLK_MESON_CPU_DYNDIV select COMMON_CLK_MESON_VID_PLL_DIV + select COMMON_CLK_MESON_VCLK select MFD_SYSCON help Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 90f4c6103014..083882e53b65 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -22,6 +22,7 @@ #include "clk-regmap.h" #include "clk-cpu-dyndiv.h" #include "vid-pll-div.h" +#include "vclk.h" #include "meson-eeclk.h" #include "g12a.h" @@ -3165,7 +3166,7 @@ static struct clk_regmap g12a_vclk2_sel = { .ops = _regmap_mux_ops, .parent_hws = g12a_vclk_parent_hws, .num_parents = ARRAY_SIZE(g12a_vclk_parent_hws), - .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_NO_REPARENT, }, }; @@ -3193,7 +3194,6 @@ static struct clk_regmap g12a_vclk2_input = { .ops = _regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { _vclk2_sel.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, }, }; @@ -3215,19 +3215,32 @@ static struct clk_regmap g12a_vclk_div = { }; static struct clk_regmap g12a_vclk2_div = { - .data = &(struct clk_regmap_div_data){ - .offset = HHI_VIID_CLK_DIV, - .shift = 0, - .width = 8, + .data = &(struct meson_vclk_div_data){ + .div = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 0, + .width = 8, + }, + .enable = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 16, + .width = 1, + }, + .reset = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 17, + .width = 1, + }, + .flags = CLK_DIVIDER_ROUND_CLOSEST, }, .hw.init = &(struct clk_init_data){ .name = "vclk2_div", - .ops = _regmap_divider_ops, + .ops = _vclk_div_ops, .parent_hws = (const struct clk_hw *[]) { _vclk2_input.hw }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_GATE, }, }; @@ -3246,16 +3259,24 @@ static struct clk_regmap g12a_vclk = { }; static struct clk_regmap g12a_vclk2 = { - .data = &(struct clk_regmap_gate_data){ - .offset = HHI_VIID_CLK_CNTL, - .bit_idx = 19, +
Re: [PATCH] drm/meson: vclk: fix calculation of 59.94 fractional rates
On 10/01/2024 00:07, Christian Hewitt wrote: Playing 4K media with 59.94 fractional rate (typically VP9) causes the screen to lose sync with the following error reported in the system log: [ 89.610280] Fatal Error, invalid HDMI vclk freq 593406 Modetest shows the following: 3840x2160 59.94 3840 4016 4104 4400 2160 2168 2178 2250 593407 flags: , , drm calculated value -^ Change the fractional rate calculation to stop DIV_ROUND_CLOSEST rounding down which results in vclk freq failing to match correctly. Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup") Signed-off-by: Christian Hewitt --- I'm unable to give a better mathematical description of the fix as I can barely read code. The change was inspired by [0] which I chanced upon while looking at how other dw-hdmi drivers handle fractional rates. [0] https://github.com/torvalds/linux/commit/4f510aa10468954b1da4e94689c38ac6ea8d3627 drivers/gpu/drm/meson/meson_vclk.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c index 2a82119eb58e..2a942dc6a6dc 100644 --- a/drivers/gpu/drm/meson/meson_vclk.c +++ b/drivers/gpu/drm/meson/meson_vclk.c @@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq, FREQ_1000_1001(params[i].pixel_freq)); DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n", i, params[i].phy_freq, -FREQ_1000_1001(params[i].phy_freq/10)*10); +FREQ_1000_1001(params[i].phy_freq/1000)*1000); /* Match strict frequency */ if (phy_freq == params[i].phy_freq && vclk_freq == params[i].vclk_freq) return MODE_OK; /* Match 1000/1001 variant */ - if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) && + if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/1000)*1000) && vclk_freq == FREQ_1000_1001(params[i].vclk_freq)) return MODE_OK; } @@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, for (freq = 0 ; params[freq].pixel_freq ; ++freq) { if ((phy_freq == params[freq].phy_freq || -phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) && +phy_freq == FREQ_1000_1001(params[freq].phy_freq/1000)*1000) && (vclk_freq == params[freq].vclk_freq || vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) { if (vclk_freq != params[freq].vclk_freq) Reviewed-by: Neil Armstrong
[PATCH v11 1/7] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module
The MNT Reform 2 CM4 adapter can be populated with any Raspberry Pi CM4 compatible module such as a BPI-CM4 Module, document that. Acked-by: Conor Dooley Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 949537cea6be..b66b93b8bfd3 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -157,6 +157,7 @@ properties: items: - enum: - bananapi,bpi-cm4io + - mntre,reform2-cm4 - const: bananapi,bpi-cm4 - const: amlogic,a311d - const: amlogic,g12b -- 2.34.1
[PATCH v11 2/7] clk: meson: add vclk driver
The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/vclk.c | 141 + drivers/clk/meson/vclk.h | 51 4 files changed, 197 insertions(+) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 29ffd14d267b..8a9823789fa3 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_VCLK + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON_CLKC_UTILS tristate diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 9ee4b954c896..9ba43fe7a07a 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c new file mode 100644 index ..3ea813a0a995 --- /dev/null +++ b/drivers/clk/meson/vclk.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#include +#include "vclk.h" + +/* The VCLK gate has a supplementary reset bit to pulse after ungating */ + +static inline struct meson_vclk_gate_data * +clk_get_meson_vclk_gate_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_gate_data *)clk->data; +} + +static int meson_vclk_gate_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 1); + + /* Do a reset pulse */ + meson_parm_write(clk->map, >reset, 1); + meson_parm_write(clk->map, >reset, 0); + + return 0; +} + +static void meson_vclk_gate_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, >enable, 0); +} + +static int meson_vclk_gate_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + return meson_parm_read(clk->map, >enable); +} + +const struct clk_ops meson_vclk_gate_ops = { + .enable = meson_vclk_gate_enable, + .disable = meson_vclk_gate_disable, + .is_enabled = meson_vclk_gate_is_enabled, +}; +EXPORT_SYMBOL_GPL(meson_vclk_gate_ops); + +/* The VCLK Divider has supplementary reset & enable bits */ + +static inline struct meson_vclk_div_data * +clk_get_meson_vclk_div_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_div_data *)clk->data; +} + +static unsigned long meson_vclk_div_recalc_rate(struct clk_hw *hw, +unsigned long prate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, >div), + vclk->table, vclk->flags, vclk->div.width); +} + +static int meson_vclk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_determine_rate(hw, req, vclk->table, vclk->div.width, + vclk->flags); +} + +static int meson_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + int ret; + + ret = divider_get_val(rate, parent_rate, vclk->table, vclk->div.width, + vclk->flags); +
[PATCH v11 7/7] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper
This adds a basic devicetree for the MNT Reform2 DIY laptop when using a CM4 adapter and a BPI-CM4 module. Co-developed-by: Lukas F. Hartmann Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../meson-g12b-bananapi-cm4-mnt-reform2.dts| 384 + 2 files changed, 385 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index bf723bec3e15..a89491bb72e8 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3-ts050.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-mnt-reform2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts new file mode 100644 index ..003efed529ba --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Neil Armstrong + * Copyright 2023 MNT Research GmbH + */ + +/dts-v1/; + +#include "meson-g12b-bananapi-cm4.dtsi" +#include +#include +#include + +/ { + model = "MNT Reform 2 with BPI-CM4 Module"; + compatible = "mntre,reform2-cm4", "bananapi,bpi-cm4", "amlogic,a311d", "amlogic,g12b"; + chassis-type = "laptop"; + + aliases { + ethernet0 = + i2c0 = + i2c1 = + }; + + hdmi_connector: hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <_ao GPIOAO_7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-green { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + }; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "MNT-REFORM2-BPI-CM4"; + audio-widgets = "Headphone", "Headphone Jack", + "Speaker", "External Speaker", + "Microphone", "Mic Jack"; + audio-aux-devs = <_a>, <_b>, <_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", + "TDM_A Playback", "TDMOUT_A OUT", + "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "TDMIN_B IN 1", "TDM_B Capture", + "TDMIN_B IN 4", "TDM_B Loopback", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT", + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "External Speaker", "SPK_LP", + "External Speaker", "SPK_LN", + "External Speaker", "SPK_RP", + "External Speaker", "SPK_RN", + "L
[PATCH v11 5/7] arm64: meson: g12-common: add the MIPI DSI nodes
Add the MIPI DSI Analog & Digital PHY nodes and the DSI control nodes with proper port endpoint to the VPU. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 +++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 9d5eab6595d0..b058ed78faf0 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1663,9 +1663,28 @@ pwrc: power-controller { <25000>, <0>; /* Do Nothing */ }; + + mipi_analog_dphy: phy { + compatible = "amlogic,g12a-mipi-dphy-analog"; + #phy-cells = <0>; + status = "disabled"; + }; }; }; + mipi_dphy: phy@44000 { + compatible = "amlogic,axg-mipi-dphy"; + reg = <0x0 0x44000 0x0 0x2000>; + clocks = < CLKID_MIPI_DSI_PHY>; + clock-names = "pclk"; + resets = < RESET_MIPI_DSI_PHY>; + reset-names = "phy"; + phys = <_analog_dphy>; + phy-names = "analog"; + #phy-cells = <0>; + status = "disabled"; + }; + usb3_pcie_phy: phy@46000 { compatible = "amlogic,g12a-usb3-pcie-phy"; reg = <0x0 0x46000 0x0 0x2000>; @@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint { remote-endpoint = <_tx_in>; }; }; + + /* DPI output port */ + dpi_port: port@2 { + reg = <2>; + + dpi_out: endpoint { + remote-endpoint = <_dsi_in>; + }; + }; }; gic: interrupt-controller@ffc01000 { @@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 { amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; }; + mipi_dsi: dsi@7000 { + compatible = "amlogic,meson-g12a-dw-mipi-dsi"; + reg = <0x0 0x7000 0x0 0x1000>; + resets = < RESET_MIPI_DSI_HOST>; + reset-names = "top"; + clocks = < CLKID_MIPI_DSI_HOST>, +< CLKID_MIPI_DSI_PXCLK>, +< CLKID_CTS_ENCL>; + clock-names = "pclk", "bit", "px"; + phys = <_dphy>; + phy-names = "dphy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + assigned-clocks = < CLKID_MIPI_DSI_PXCLK_SEL>, +< CLKID_CTS_ENCL_SEL>, +< CLKID_VCLK2_SEL>; + assigned-clock-parents = < CLKID_GP0_PLL>, +< CLKID_VCLK2_DIV1>, +< CLKID_GP0_PLL>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* VPU VENC Input */ + mipi_dsi_venc_port: port@0 { + reg = <0>; + + mipi_dsi_in: endpoint { + remote-endpoint = <_out>; + }; + }; +
[PATCH v11 6/7] arm64: meson: khadas-vim3l: add TS050 DSI panel overlay
This add dtbo overlay to support the Khadas TS050 panel on the Khadas VIM3 & VIM3L boards. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/Makefile | 4 + .../boot/dts/amlogic/meson-khadas-vim3-ts050.dtso | 108 + 2 files changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 1ab160bf928a..bf723bec3e15 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3-ts050.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb @@ -76,6 +77,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m2-pro.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l-ts050.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-s905d3-libretech-cc.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb @@ -86,3 +88,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb # Overlays meson-g12a-fbx8am-brcm-dtbs:= meson-g12a-fbx8am.dtb meson-g12a-fbx8am-brcm.dtbo meson-g12a-fbx8am-realtek-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-realtek.dtbo +meson-g12b-a311d-khadas-vim3-ts050 := meson-g12b-a311d-khadas-vim3.dtb meson-khadas-vim3-ts050.dtbo +meson-sm1-khadas-vim3l-ts050 := meson-sm1-khadas-vim3l.dtb meson-khadas-vim3-ts050.dtbo diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso new file mode 100644 index ..a41b4e619580 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong + */ + +#include +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +/* + * Enable Khadas TS050 DSI Panel + Touch Controller + * on Khadas VIM3 (A311D) and VIM3L (S905D3) + */ + +&{/} { + panel_backlight: backlight { + compatible = "pwm-backlight"; + pwms = <_AO_cd 0 25000 0>; + brightness-levels = <0 255>; + num-interpolated-steps = <255>; + default-brightness-level = <200>; + }; +}; + + { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <_sda_a_pins>, <_sck_a_pins>; + pinctrl-names = "default"; + status = "okay"; + + touch-controller@38 { + compatible = "edt,edt-ft5206"; + reg = <0x38>; + interrupt-parent = <_intc>; + interrupts = ; + reset-gpios = <_expander 6 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <1920>; + status = "okay"; + }; +}; + +_dsi { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + assigned-clocks = < CLKID_GP0_PLL>, + < CLKID_MIPI_DSI_PXCLK_SEL>, + < CLKID_MIPI_DSI_PXCLK>, + < CLKID_CTS_ENCL_SEL>, + < CLKID_VCLK2_SEL>; + assigned-clock-parents = <0>, +< CLKID_GP0_PLL>, +<0>, +< CLKID_VCLK2_DIV1>, +< CLKID_GP0_PLL>; + assigned-clock-rates = <96000>, + <0>, + <96000>, + <0>, + <0>; + + panel@0 { + compatible = "khadas,ts050"; + reset-gpios = <_expander 0 GPIO_ACTIVE_LOW>; + enable-gpios = <_expander 1 GPIO_ACTIVE_HIGH>; + power-supply = <_3v3>; + backlight = <_backlight>; + reg = <0>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <_out_panel>; + }; + }; + }; + + ports { + #address-cells = <1>; + #
[PATCH v11 4/7] drm/meson: gate px_clk when setting rate
Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver") Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c index a6bc1bdb3d0d..a10cff3ca1fe 100644 --- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c +++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c @@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + clk_disable_unprepare(mipi_dsi->px_clk); ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); if (ret) { @@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + ret = clk_prepare_enable(mipi_dsi->px_clk); + if (ret) { + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); + return ret; + } + switch (mipi_dsi->dsi_device->format) { case MIPI_DSI_FMT_RGB888: dpi_data_format = DPI_COLOR_24BIT; -- 2.34.1
[PATCH v11 3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
In order to setup the DSI clock, let's make the unused VCLK2 clock path configuration via CCF. The nocache option is removed from following clocks: - vclk2_sel - vclk2_input - vclk2_div - vclk2 - vclk_div1 - vclk2_div2_en - vclk2_div4_en - vclk2_div6_en - vclk2_div12_en - vclk2_div2 - vclk2_div4 - vclk2_div6 - vclk2_div12 - cts_encl_sel vclk2 and vclk2_div uses the newly introduced vclk regmap driver to handle the enable and reset bits. In order to set a rate on cts_encl via the vclk2 clock path, the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in order to keep CCF from selection a parent. The parents of cts_encl_sel & vclk2_sel are expected to be defined in DT or manually set by the display driver at some point. The following clock scheme is to be used for DSI: xtal \_ gp0_pll_dco \_ gp0_pll |- vclk2_sel | \_ vclk2_input | \_ vclk2_div |\_ vclk2 | \_ vclk2_div1 | \_ cts_encl_sel | \_ cts_encl -> to VPU LCD Encoder |- mipi_dsi_pxclk_sel \_ mipi_dsi_pxclk_div \_ mipi_dsi_pxclk -> to DSI controller The mipi_dsi_pxclk_div is set as bypass with a single /1 entry in div_table in order to use the same GP0 for mipi_dsi_pxclk and vclk2_input. The SET_RATE_PARENT is only set on the mipi_dsi_pxclk_sel clock so the DSI bitclock is the reference base clock to calculate the vclk2_div value when pixel clock is set on the cts_encl endpoint. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 1 + drivers/clk/meson/g12a.c | 72 ++- 2 files changed, 53 insertions(+), 20 deletions(-) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 8a9823789fa3..59a40a49f8e1 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -144,6 +144,7 @@ config COMMON_CLK_G12A select COMMON_CLK_MESON_EE_CLKC select COMMON_CLK_MESON_CPU_DYNDIV select COMMON_CLK_MESON_VID_PLL_DIV + select COMMON_CLK_MESON_VCLK select MFD_SYSCON help Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 90f4c6103014..083882e53b65 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -22,6 +22,7 @@ #include "clk-regmap.h" #include "clk-cpu-dyndiv.h" #include "vid-pll-div.h" +#include "vclk.h" #include "meson-eeclk.h" #include "g12a.h" @@ -3165,7 +3166,7 @@ static struct clk_regmap g12a_vclk2_sel = { .ops = _regmap_mux_ops, .parent_hws = g12a_vclk_parent_hws, .num_parents = ARRAY_SIZE(g12a_vclk_parent_hws), - .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_NO_REPARENT, }, }; @@ -3193,7 +3194,6 @@ static struct clk_regmap g12a_vclk2_input = { .ops = _regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { _vclk2_sel.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, }, }; @@ -3215,19 +3215,32 @@ static struct clk_regmap g12a_vclk_div = { }; static struct clk_regmap g12a_vclk2_div = { - .data = &(struct clk_regmap_div_data){ - .offset = HHI_VIID_CLK_DIV, - .shift = 0, - .width = 8, + .data = &(struct meson_vclk_div_data){ + .div = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 0, + .width = 8, + }, + .enable = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 16, + .width = 1, + }, + .reset = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 17, + .width = 1, + }, + .flags = CLK_DIVIDER_ROUND_CLOSEST, }, .hw.init = &(struct clk_init_data){ .name = "vclk2_div", - .ops = _regmap_divider_ops, + .ops = _vclk_div_ops, .parent_hws = (const struct clk_hw *[]) { _vclk2_input.hw }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_GATE, }, }; @@ -3246,16 +3259,24 @@ static struct clk_regmap g12a_vclk = { }; static struct clk_regmap g12a_vclk2 = { - .data = &(struct clk_regmap_gate_data){ - .offset = HHI_VIID_CLK_CNTL, - .bit_idx = 19, + .data = &(struct meson_vclk_gate_data){ + .enable = { + .
[PATCH v11 0/7] drm/meson: add support for MIPI DSI Display
The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom glue managing the IP resets, clock and data input similar to the DW-HDMI glue on the same Amlogic SoCs. This is a follow-up of v5 now the DRM patches are applied, the clk & DT changes remains for a full DSI support on G12A & SM1 platforms. The DW-MIPI-DSI transceiver + D-PHY are clocked by the GP0 PLL, and the ENCL encoder + VIU pixel reader by the VCLK2 clock using the HDMI PLL. The DW-MIPI-DSI transceiver gets this pixel stream as input clocked with the VCLK2 clock. An optional "MEAS" clock can be enabled to measure the delay between each vsync feeding the DW-MIPI-DSI transceiver. The clock setup has been redesigned to use CCF, a common PLL (GP0) and the VCLK2 clock path for DSI in preparation of full CCF support and possibly dual display with HDMI. The change from v5 is that now we use a "VCLK" driver instead of notifier and rely on CLK_SET_RATE_GATE to ensure the VCLK gate operation are called. Signed-off-by: Neil Armstrong --- Changes in v11: - Rebased on v6.9-rc1 - Fixed overlay handling/creation - Link to v10: https://lore.kernel.org/r/20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5...@linaro.org Changes in v10: - Rename regmap_vclk to meson_clk and add _gate for the gate - Move COMMON_CLK_MESON_VCLK to following patch - Remove CLK_SET_RATE_PARENT from g12a_vclk2_sel, keep it only on mipi_dsi_pxclk_sel - Add more info on commit message to specify how clock setup is designed - Remove forgotten CLK_IGNORE_UNUSED on g12a_vclk2_input - Remove useless CLK_SET_RATE_PARENT on g12a_vclk2_div to stop propagatting rate _after_ vclk2_div - Remove invalid CLK_SET_RATE_GATE on g12a_vclk2 since it's not a divider... - Drop already applied patches - move Khadas TS050 changes as an overlay - Link to v9: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-0-95256ed13...@linaro.org Changes in v9: - Colledte reviewed-bys - Fixed patches 2 & 4, commit messages and bindings format - Link to v8: https://lore.kernel.org/r/20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-0-81e4aeeda...@linaro.org Changes in v8: - Switch vclk clk driver to parm as requested by Jerome - Added bindings fixes to amlogic,meson-axg-mipi-pcie-analog & amlogic,g12a-mipi-dphy-analog - Fixed DT errors in vim3 example and MNT Reform DT - Rebased on next-20231107, successfully tested on VIM3L - Link to v7: https://lore.kernel.org/r/20230803-amlogic-v6-4-upstream-dsi-ccf-vim3-v7-0-762219fc5...@linaro.org Changes in v7: - Added review tags - Fixed patch 5 thanks to George - Link to v6: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v6-0-fd2ac9845...@linaro.org Changes in v6: - dropped applied DRM patches - dropped clk private prefix patches - rebased on top of 20230607-topic-amlogic-upstream-clkid-public-migration-v2-0-38172d17c...@linaro.org - re-ordered/cleaned ENCL patches to match clkid public migration - Added new "vclk" driver - uses vclk driver instead of notifier - cleaned VCLK2 clk flags - add px_clk gating from DSI driver - Link to v5: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v5-0-56eb7a4d5...@linaro.org Changes in v5: - Aded PRIV all the G12 internal clk IDS to simplify public exposing - Fixed the DSI bindings - Fixed the DSI HSYNC/VSYNC polarity handling - Fixed the DSI clock setup - Fixed the DSI phy timings - Dropped components for DSI, only keeping it for HDMI - Added MNT Reform 2 CM4 DT - Dropped already applied PHY fix - Link to v4: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v4-0-2592c29ea...@linaro.org Changes from v3 at [3]: - switched all clk setup via CCF - using single PLL for DSI controller & ENCL encoder - added ENCL clocks to CCF - make the VCLK2 clocks configuration by CCF - fixed probe/bind of DSI controller to work with panels & bridges - added bit_clk to controller to it can setup the BIT clock aswell - added fix for components unbind - added fix for analog phy setup value - added TS050 timings fix - dropped previous clk control patch Changes from v2 at [2]: - Fixed patch 3 - Added reviews from Jagan - Rebased on v5.19-rc1 Changes from v1 at [1]: - fixed DSI host bindings - add reviewed-by tags for bindings - moved magic values to defines thanks to Martin's searches - added proper prefixes to defines - moved phy_configure to phy_init() dw-mipi-dsi callback - moved phy_on to a new phy_power_on() dw-mipi-dsi callback - correctly return phy_init/configure errors to callback returns [1] https://lore.kernel.org/r/20200907081825.1654-1-narmstr...@baylibre.com [2] https://lore.kernel.org/r/20220120083357.1541262-1-narmstr...@baylibre.com [3] https://lore.kernel.org/r/20220617072723.1742668-1-narmstr...@baylibre.com --- Neil Armstrong (7): dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4
Re: [RESEND PATCH] dt-bindings: display: sony, td4353-jdi: allow width-mm and height-mm
Hi, On Mon, 25 Mar 2024 11:32:27 +0100, Krzysztof Kozlowski wrote: > Allow width and height properties from panel-common.yaml, already used > on some boards: > > sdm845-sony-xperia-tama-apollo.dtb: panel@0: 'height-mm', 'width-mm' do not > match any of the regexes: 'pinctrl-[0-9]+' > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] dt-bindings: display: sony, td4353-jdi: allow width-mm and height-mm https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/c8a0970321aeae4a5e807a5b323be9d48c6b5749 -- Neil
Re: [RESEND PATCH v4 1/3] dt-bindings: display: panel: add common dual-link schema
Hi, On Mon, 25 Mar 2024 11:36:09 +0100, Krzysztof Kozlowski wrote: > Add schema with common properties shared among dual-link panel ICs. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/3] dt-bindings: display: panel: add common dual-link schema https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/48a516363e294a4098622dd77a5ecd4ee924121f [2/3] dt-bindings: display: novatek, nt35950: define ports https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/1f6612e6852ecb053ce1e342d833ed7f395f7186 [3/3] dt-bindings: display: novatek, nt36523: define ports https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/90ed42ceda7667f5596d5e98530dd4119d786234 -- Neil
Re: [RESEND PATCH] dt-bindings: display: sony,td4353-jdi: allow width-mm and height-mm
Hi, On 25/03/2024 11:32, Krzysztof Kozlowski wrote: Allow width and height properties from panel-common.yaml, already used on some boards: sdm845-sony-xperia-tama-apollo.dtb: panel@0: 'height-mm', 'width-mm' do not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski --- Rob, could you pick up this one? Was on the list for almost a year. I'll take it, Neil .../devicetree/bindings/display/panel/sony,td4353-jdi.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml b/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml index b6b885b4c22d..07bce556ad40 100644 --- a/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml +++ b/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml @@ -23,6 +23,8 @@ properties: reg: true backlight: true + width-mm: true + height-mm: true vddio-supply: description: VDDIO 1.8V supply
Re: [PATCH] drm/panel: atna33xc20: Fix unbalanced regulator in the case HPD doesn't assert
On 20/03/2024 16:33, Doug Anderson wrote: Hi, On Thu, Mar 14, 2024 at 3:32 PM Jessica Zhang wrote: On 3/13/2024 2:12 PM, Douglas Anderson via B4 Relay wrote: From: Douglas Anderson When the atna33xc20 driver was first written the resume code never returned an error. If there was a problem waiting for HPD it just printed a warning and moved on. This changed in response to review feedback [1] on a future patch but I accidentally didn't account for rolling back the regulator enable in the error cases. Do so now. [1] https://lore.kernel.org/all/5f3cf3a6-1cc2-63e4-f76b-4ee686764...@linaro.org/ Fixes: 3b5765df375c ("drm/panel: atna33xc20: Take advantage of wait_hpd_asserted() in struct drm_dp_aux") Signed-off-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-samsung-atna33xc20.c | 22 +- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c b/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c index 76c2a8f6718c..9c336c71562b 100644 --- a/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c +++ b/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c @@ -109,19 +109,17 @@ static int atana33xc20_resume(struct device *dev) if (hpd_asserted < 0) ret = hpd_asserted; - if (ret) + if (ret) { dev_warn(dev, "Error waiting for HPD GPIO: %d\n", ret); - - return ret; - } - - if (p->aux->wait_hpd_asserted) { + goto error; + } + } else if (p->aux->wait_hpd_asserted) { Hi Doug, Acked-by: Jessica Zhang Pushed with Jessica's Ack to drm-misc-next. 5e842d55bad7 drm/panel: atna33xc20: Fix unbalanced regulator in the case HPD doesn't assert I chose drm-misc-next instead of drm-misc-fixes because this isn't super urgent and the patch would have to be modified on drm-misc-fixes because we don't have commit 8df1ddb5bf11 ("drm/dp: Don't attempt AUX transfers when eDP panels are not powered") there. Thx I wasn't really sure where to push this so I waited v6.9-rc1 to decide!
Re: [PATCH 0/2] Add POWERTIP PH128800T006-ZHC01 panel
Hi, On Mon, 18 Mar 2024 09:17:06 -0700, Nathan Morrisson wrote: > Add the device tree bindings, timings, and compatible string for the > POWERTIP PH128800T006-ZHC01 panel. > > Nathan Morrisson (2): > dt-bindings: display: simple: Add POWERTIP PH128800T-006-ZHC01 panel > drm/panel: simple: Add POWERTIP PH128800T006-ZHC01 panel entry > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/2] dt-bindings: display: simple: Add POWERTIP PH128800T-006-ZHC01 panel https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/3b2304cfeddd141523cb50cc1a3ba7624b865011 [2/2] drm/panel: simple: Add POWERTIP PH128800T006-ZHC01 panel entry https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/fd6aa8f2dcb7236e511c1a58d82c2a178170e6ff -- Neil
Re: [PATCH] drm: bridge: thc63lvd1024: Print error message when DT parsing fails
Hi, On Mon, 18 Mar 2024 18:06:01 +0200, Laurent Pinchart wrote: > Commit 00084f0c01bf ("drm: bridge: thc63lvd1024: Switch to use > of_graph_get_remote_node()") simplified the thc63lvd1024 driver by > replacing hand-rolled code with a helper function. While doing so, it > created an error code path at probe time without any error message, > potentially causing probe issues that get annoying to debug. Fix it by > adding an error message. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm: bridge: thc63lvd1024: Print error message when DT parsing fails https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/974652d7a90be7ae3b24779794a65bfb90980044 -- Neil
Re: [PATCH] drm: bridge: thc63lvd1024: Print error message when DT parsing fails
On 18/03/2024 20:23, Sui Jingfeng wrote: Hi, On 2024/3/19 02:04, Laurent Pinchart wrote: Improving core helpers is certainly a good idea, and if we do so, we can simplify drivers. What I'm concerned is that commit 00084f0c01bf creates a silent probe failure path, No, I can't agree here. It doesn't creates a silent probe failure path. It doesn't _in debug mode_, I agree with Laurent, having a verbose probe error should be kept. Neil Simply because 1) It is NOT silent. 2) It should be exist at product level kernel. which didn't exist before it. Again, it shouldn't be exist. Otherwise it hints us that there is ill-behavior-ed DT in the mainstream kernel or a specific product(or development board). If I were you, I would like to fix the boot failure first. In the earlier stage of my attempt to contribute, I also would like to enable debug output as much as possible. Just like you, the benefit is obvious: It really eliminate the pain on developing stage and when bugs happens. But I was told many many times that mainstream kernel is not for debug, it is for sound products. I bet you have seen some product level drivers print very less. I'm not understand why in the past, but I think I could understand something now. Probably because professional programmers really confident about what they have wrote. As they have been tested and/or reviewed thousands or ten thousands times. Enable this debug output by default can only prove to the community that you are not confident about something, either the community's reviewing power on DTS or your debug techniques. This is why this patch references it in the Fixes: tag, making sure that this patch will get backported to any stable kernel that includes commit 00084f0c01bf. No, I keep insist on my judgement. A fixes tag is only meant for cases where your patch fixes a bug. The bug should really be happened. All of the discussion ongoing here are just things imaginary about the *debug* phase and development phase. As far as I understand, this is business as usual. There's nothing personal here, and no judgement on the quality of your code. Please don't misunderstanding, I do cares the quality of my code. If it is really introduce a bug, I will responsible and help to solve. But this is not the case. Sorry. Signed-off-by: Laurent Pinchart --- drivers/gpu/drm/bridge/thc63lvd1024.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c b/drivers/gpu/drm/bridge/thc63lvd1024.c index 5f99f9724081..674efc489e3a 100644 --- a/drivers/gpu/drm/bridge/thc63lvd1024.c +++ b/drivers/gpu/drm/bridge/thc63lvd1024.c @@ -125,8 +125,11 @@ static int thc63_parse_dt(struct thc63_dev *thc63) remote = of_graph_get_remote_node(thc63->dev->of_node, THC63_RGB_OUT0, -1); - if (!remote) + if (!remote) { + dev_err(thc63->dev, "No remote endpoint for port@%u\n", + THC63_RGB_OUT0); return -ENODEV; + } An side effect of this patch is that we will add one more extra error message in the console. As the of_graph_get_remote_node() function already print one for us if I add '#define DEBUG 1' on the top of this source file. What's worse, it does not really tell us what's really the error is. It could be no valid endpoint or no valid remote node because of bad coding in DT, or It is also simply because the remove node(or device) is being disabled intentionally by adding 'status = "disabled"' clause. Therefore, the error printing code added here is very confusing in practice. It cannot really help for locating the root cause of the problem. After think about this more than twice, either help to improve the core of_graph_get_remote_node() function or just to drop this. This what I can tell as a ordinary reviewer. Despite you and/or other more advanced programmer & reviewer could override what I said though.
Re: [PATCH] drm: bridge: thc63lvd1024: Print error message when DT parsing fails
On 18/03/2024 17:06, Laurent Pinchart wrote: Commit 00084f0c01bf ("drm: bridge: thc63lvd1024: Switch to use of_graph_get_remote_node()") simplified the thc63lvd1024 driver by replacing hand-rolled code with a helper function. While doing so, it created an error code path at probe time without any error message, potentially causing probe issues that get annoying to debug. Fix it by adding an error message. Fixes: 00084f0c01bf ("drm: bridge: thc63lvd1024: Switch to use of_graph_get_remote_node()") Signed-off-by: Laurent Pinchart --- drivers/gpu/drm/bridge/thc63lvd1024.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c b/drivers/gpu/drm/bridge/thc63lvd1024.c index 5f99f9724081..674efc489e3a 100644 --- a/drivers/gpu/drm/bridge/thc63lvd1024.c +++ b/drivers/gpu/drm/bridge/thc63lvd1024.c @@ -125,8 +125,11 @@ static int thc63_parse_dt(struct thc63_dev *thc63) remote = of_graph_get_remote_node(thc63->dev->of_node, THC63_RGB_OUT0, -1); - if (!remote) + if (!remote) { + dev_err(thc63->dev, "No remote endpoint for port@%u\n", + THC63_RGB_OUT0); return -ENODEV; + } thc63->next = of_drm_find_bridge(remote); of_node_put(remote); base-commit: 00084f0c01bf3a2591d007010b196e048281c455 Reviewed-by: Neil Armstrong
Re: [PATCH v2] drm,fbdev: td043mtea1: Convert sprintf() family to sysfs_emit() family
Hi, On 19/03/2024 04:55, Li Zhijian wrote: Per filesystems/sysfs.rst, show() should only use sysfs_emit() or sysfs_emit_at() when formatting the value to be returned to user space. coccinelle complains that there are still a couple of functions that use snprintf(). Convert them to sysfs_emit(). sprintf() and scnprintf() will be converted as well if they have. Generally, this patch is generated by make coccicheck M= MODE=patch \ COCCI=scripts/coccinelle/api/device_attr_show.cocci No functional change intended Please split patches in 2, while the driver targets the same hw, they are not under the same subsystems. Neil CC: Neil Armstrong CC: Jessica Zhang CC: Sam Ravnborg CC: Maarten Lankhorst CC: Maxime Ripard CC: Thomas Zimmermann CC: David Airlie CC: Daniel Vetter CC: Helge Deller CC: linux-o...@vger.kernel.org CC: linux-fb...@vger.kernel.org CC: dri-devel@lists.freedesktop.org Signed-off-by: Li Zhijian --- V2: Fix missing '+' before '=' in drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c This is a part of the work "Fix coccicheck device_attr_show warnings"[1] Split them per subsystem so that the maintainer can review it easily [1] https://lore.kernel.org/lkml/20240116041129.3937800-1-lizhij...@fujitsu.com/ --- drivers/gpu/drm/panel/panel-tpo-td043mtea1.c| 13 - .../omap2/omapfb/displays/panel-tpo-td043mtea1.c| 12 2 files changed, 8 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c index cf4609bb9b1d..0983fe47eb5a 100644 --- a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c +++ b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c @@ -242,16 +242,11 @@ static ssize_t gamma_show(struct device *dev, struct device_attribute *attr, struct td043mtea1_panel *lcd = dev_get_drvdata(dev); ssize_t len = 0; unsigned int i; - int ret; - for (i = 0; i < ARRAY_SIZE(lcd->gamma); i++) { - ret = snprintf(buf + len, PAGE_SIZE - len, "%u ", - lcd->gamma[i]); - if (ret < 0) - return ret; - len += ret; - } - buf[len - 1] = '\n'; + for (i = 0; i < ARRAY_SIZE(lcd->gamma); i++) + len += sysfs_emit_at(buf, len, "%u ", lcd->gamma[i]); + if (len) + buf[len - 1] = '\n'; return len; } diff --git a/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c index 477789cff8e0..3624452e1dd0 100644 --- a/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c +++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c @@ -228,14 +228,10 @@ static ssize_t tpo_td043_gamma_show(struct device *dev, int ret; int i; - for (i = 0; i < ARRAY_SIZE(ddata->gamma); i++) { - ret = snprintf(buf + len, PAGE_SIZE - len, "%u ", - ddata->gamma[i]); - if (ret < 0) - return ret; - len += ret; - } - buf[len - 1] = '\n'; + for (i = 0; i < ARRAY_SIZE(ddata->gamma); i++) + len += sysfs_emit_at(buf, len, "%u ", ddata->gamma[i]); + if (len) + buf[len - 1] = '\n'; return len; }
Re: [PATCH] drm: bridge: thc63lvd1024: Switch to use of_graph_get_remote_node()
Hi, On Sun, 17 Mar 2024 01:28:00 +0800, Sui Jingfeng wrote: > To reduce boilerplate, use of_graph_get_remote_node() helper instead of > the hand-rolling code. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm: bridge: thc63lvd1024: Switch to use of_graph_get_remote_node() https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/00084f0c01bf3a2591d007010b196e048281c455 -- Neil
Re: [PATCH] drm: bridge: dw_hdmi: Switch to of_graph_get_remote_node()
Hi, On Sun, 17 Mar 2024 01:05:13 +0800, Sui Jingfeng wrote: > To reduce boilerplate, use of_graph_get_remote_node() helper instead of > the hand-rolling code. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm: bridge: dw_hdmi: Switch to of_graph_get_remote_node() https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/d576e5e235c9df1cdfe62db958b77c0b0023d08c -- Neil
Re: [PATCH] drm/bridge: it66121: Remove a duplicated invoke of of_device_is_available()
Hi, On Sun, 17 Mar 2024 01:44:19 +0800, Sui Jingfeng wrote: > The calling of of_device_is_available() in it66121_probe() is duplicated, > as the of_graph_get_remote_node() has already do the check for us. There > is no need to call it again, thus delete the later one. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm/bridge: it66121: Remove a duplicated invoke of of_device_is_available() https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/2c7d26555845ca5fb70353b4b77d8f6c4e32e54c -- Neil
Re: [PATCH] drm/bridge: ite66121: Register HPD interrupt handler only when 'client->irq > 0'
Hi, On Sun, 17 Mar 2024 00:05:36 +0800, Sui Jingfeng wrote: > If a specific design doesn't wire IT66121's interrupt signal output pin up > to the display controller side, then we should not register the interrupt > handler. Such a decision is valid usage, as we can fall back to polling > mode. So, don't make the assumption that a specific board always supports > HPD. Carry out a sanity check on 'client->irq' before using it, fall back > to polling mode if client->irq < 0 is true. Such a design increases the > overall flexibility. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm/bridge: ite66121: Register HPD interrupt handler only when 'client->irq > 0' https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/ba2d3e6709681b6c16ba8d65a23d72c706d82b5c -- Neil
Re: [PATCH] drm/panel: ilitek-ili9881c: Fix warning with GPIO controllers that sleep
Hi, On Sun, 17 Mar 2024 17:48:39 +0200, Laurent Pinchart wrote: > The ilitek-ili9881c controls the reset GPIO using the non-sleeping > gpiod_set_value() function. This complains loudly when the GPIO > controller needs to sleep. As the caller can sleep, use > gpiod_set_value_cansleep() to fix the issue. > > Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/1] drm/panel: ilitek-ili9881c: Fix warning with GPIO controllers that sleep https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/ee7860cd8b5763017f8dc785c2851fecb7a0c565 -- Neil
Re: [PATCH 0/2] drm/panel: Add Startek KD050HDFIA020-C020A support
Hi, On Sun, 17 Mar 2024 17:57:44 +0200, Laurent Pinchart wrote: > This small series adds support for the Startek KD050HDFIA020-C020A panel > to the ilitek-ili9881c driver. There's not much special here, patch 1/2 > addresses the DT binding and patch 2/2 the driver. Please see individual > patches for details. > > The series has been tested witha Compulab SB-UCM-iMX8MPLUS carrier > board. > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/2] dt-bindings: ili9881c: Add Startek KD050HDFIA020-C020A support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/77880bd4512e261372dfc3f49a5ed44fde9d3fa5 [2/2] drm/panel: ilitek-ili9881c: Add Startek KD050HDFIA020-C020A support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/9fb8aaff8eef56c1822e5267e52d4ab8ebb5b523 -- Neil
Re: [PATCH] Revert "drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE"
Hi, On Mon, 18 Mar 2024 15:16:21 +0100, Neil Armstrong wrote: > This reverts commit e3f18b0dd1db242791afbc3bd173026163ce0ccc. > > Selecting DRM_KMS_HELPER for DRM_PANEL_BRIDGE leads to: > WARNING: unmet direct dependencies detected for DRM_KMS_HELPER > Depends on [m]: HAS_IOMEM [=y] && DRM [=m] > ... > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-fixes) [1/1] Revert "drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE" https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/dbd9698830ebafcb6f3be6498fd4a6968dcbf89a -- Neil
[PATCH] Revert "drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE"
This reverts commit e3f18b0dd1db242791afbc3bd173026163ce0ccc. Selecting DRM_KMS_HELPER for DRM_PANEL_BRIDGE leads to: WARNING: unmet direct dependencies detected for DRM_KMS_HELPER Depends on [m]: HAS_IOMEM [=y] && DRM [=m] ... and builds with CONFIG_DRM=m will fail with the above kconfig warns and then multiple linker error. Reported-by: Imre Deak Reported-by: Jani Nikula Reported-by: Ville Syrjälä Fixes: e3f18b0dd1db ("drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE") Signed-off-by: Neil Armstrong --- drivers/gpu/drm/bridge/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 1d4f010af97b..efd996f6c138 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -8,7 +8,6 @@ config DRM_BRIDGE config DRM_PANEL_BRIDGE def_bool y depends on DRM_BRIDGE - select DRM_KMS_HELPER select DRM_PANEL help DRM bridge wrapper of DRM panels --- base-commit: e3f18b0dd1db242791afbc3bd173026163ce0ccc change-id: 20240318-revert-select-drm_kms_helper-for-drm_panel_bridge-0e4ad7c73496 Best regards, -- Neil Armstrong
Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
On 18/03/2024 14:41, Ville Syrjälä wrote: On Mon, Mar 18, 2024 at 12:52:10PM +0200, Jani Nikula wrote: On Mon, 18 Mar 2024, Neil Armstrong wrote: Hi, On Thu, 11 Jan 2024 13:38:04 +0100, Luca Weiss wrote: Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding bridge/panel.o to drm_kms_helper object, we need to select DRM_KMS_HELPER to make sure the file is actually getting built. Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not be properly available: [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-fixes) [1/1] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/e3f18b0dd1db242791afbc3bd173026163ce0ccc With my kernel config, e3f18b0dd1db ("drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE") leads to: WARNING: unmet direct dependencies detected for DRM_KMS_HELPER Depends on [m]: HAS_IOMEM [=y] && DRM [=m] ... All the defconfigs in drm-rerere also seem to fail here. Neil, are you using some weird .config, or did you not actually build test this before pushing? It definitely built fine, but my config test is not extensive and went through it, I'll send a revert patch ASAP. Neil PS. the drm-rerere defconfigs seem pretty outdated (eg. missing tons of panel drivers). Would be good if someone could update those to provide better coverage
Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
Hi, On Thu, 11 Jan 2024 13:38:04 +0100, Luca Weiss wrote: > Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding > bridge/panel.o to drm_kms_helper object, we need to select > DRM_KMS_HELPER to make sure the file is actually getting built. > > Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not > be properly available: > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-fixes) [1/1] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/e3f18b0dd1db242791afbc3bd173026163ce0ccc -- Neil
Re: [PATCH] drm/bridge: Select DRM_KMS_HELPER for DRM_PANEL_BRIDGE
On 08/03/2024 10:29, Luca Weiss wrote: On Sun Mar 3, 2024 at 9:37 PM CET, Dmitry Baryshkov wrote: On Thu, 29 Feb 2024 at 11:27, Luca Weiss wrote: On Wed Jan 17, 2024 at 9:59 AM CET, Luca Weiss wrote: On Mon Jan 15, 2024 at 9:43 AM CET, Neil Armstrong wrote: Hi Luca, On 11/01/2024 13:38, Luca Weiss wrote: Since the kconfig symbol of DRM_PANEL_BRIDGE is only adding bridge/panel.o to drm_kms_helper object, we need to select DRM_KMS_HELPER to make sure the file is actually getting built. Otherwise with certain defconfigs e.g. devm_drm_of_get_bridge will not be properly available: aarch64-linux-gnu-ld: drivers/phy/qualcomm/phy-qcom-qmp-combo.o: in function `qmp_combo_bridge_attach': drivers/phy/qualcomm/phy-qcom-qmp-combo.c:3204:(.text+0x8f4): undefined reference to `devm_drm_of_get_bridge' Signed-off-by: Luca Weiss --- I can see "depends on DRM_KMS_HELPER" was removed with commit 3c3384050d68 ("drm: Don't make DRM_PANEL_BRIDGE dependent on DRM_KMS_HELPERS") Could you please make sure that the usecase described in the mentioned commit message doesn't get broken by your change? Hi Neil, The problem fixed in that linked patch (3c3384050d68) is about fixing undefined reference errors with specific .config setups - similar to this patch. Since we're only adding a 'select' and not removing anything I don't see how it could cause new errors like that, and it does fix the one I'm describing. And also I checked again and I don't see any circular dependencies (something that was also mentioned in the linked patch), so apart from what I mentioned with that I'm not too familiar when 'select' should be used and when 'depend' should be used, it's good from my perspective. Sure, LGTM: Reviewed-by: Neil Armstrong Regards Luca I'm not too familiar with Kconfig but it feels more correct if PHY_QCOM_QMP_COMBO selects DRM_PANEL_BRIDGE that that's enough; and it doesn't also has to explicitly select DRM_KMS_HELPER because of how the objects are built in the Makefile. Alternatively solution to this patch could be adjusting this line in include/drm/drm_bridge.h: -#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE) +#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL_BRIDGE) && defined(CONFIG_DRM_KMS_HELPER) struct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *node, u32 port, u32 endpoint); .. and then selecting DRM_KMS_HELPER for PHY_QCOM_QMP_COMBO. But I think the solution in this patch is better. Let me know what you think. I think this is no more the case after on linux-next: 35921910bbd0 phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE But could you still check ? On next-20240117 the error happens in the aux-bridge file instead then. aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/aux-bridge.o: in function `drm_aux_bridge_probe': drivers/gpu/drm/bridge/aux-bridge.c:115:(.text+0xe0): undefined reference to `devm_drm_of_get_bridge' I'm attaching the defconfig with which I can reproduce this but it's really just DRM_KMS_HELPER=n and PHY_QCOM_QMP_COMBO=y I believe. Hi Neil, Ping on this patch Regards Luca Regards Luca Neil --- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index ac9ec5073619..ae782b427829 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -8,6 +8,7 @@ config DRM_BRIDGE config DRM_PANEL_BRIDGE def_bool y depends on DRM_BRIDGE + select DRM_KMS_HELPER select DRM_PANEL help DRM bridge wrapper of DRM panels --- base-commit: b9c3a1fa6fb324e691a03cf124b79f4842e65d76 change-id: 20240111-drm-panel-bridge-fixup-5c2977fb969f Best regards,
Re: [PATCH] drm/panel: ilitek-ili9881c: Fix warning with GPIO controllers that sleep
Hi Laurent, On 17/03/2024 16:48, Laurent Pinchart wrote: The ilitek-ili9881c controls the reset GPIO using the non-sleeping gpiod_set_value() function. This complains loudly when the GPIO controller needs to sleep. As the caller can sleep, use gpiod_set_value_cansleep() to fix the issue. Seems something buggy happened to the patchset, this patch doesn't appear in the cover letter and insn't numbered... Signed-off-by: Laurent Pinchart --- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c index 80b386f91320..084c37fa7348 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -1276,10 +1276,10 @@ static int ili9881c_prepare(struct drm_panel *panel) msleep(5); /* And reset it */ - gpiod_set_value(ctx->reset, 1); + gpiod_set_value_cansleep(ctx->reset, 1); msleep(20); - gpiod_set_value(ctx->reset, 0); + gpiod_set_value_cansleep(ctx->reset, 0); msleep(20); for (i = 0; i < ctx->desc->init_length; i++) { @@ -1334,7 +1334,7 @@ static int ili9881c_unprepare(struct drm_panel *panel) mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); regulator_disable(ctx->power); - gpiod_set_value(ctx->reset, 1); + gpiod_set_value_cansleep(ctx->reset, 1); return 0; } Anyway: Reviewed-by: Neil Armstrong
Re: [PATCH 2/2] drm/panel: ilitek-ili9881c: Add Startek KD050HDFIA020-C020A support
= 1280 + 10, + .vsync_end = 1280 + 10 + 10, + .vtotal = 1280 + 10 + 10 + 20, + + .width_mm = 62, + .height_mm = 110, +}; + static const struct drm_display_mode tl050hdv35_default_mode = { .clock = 59400, @@ -1345,6 +1558,14 @@ static const struct ili9881c_desc k101_im2byl02_desc = { .mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE, }; +static const struct ili9881c_desc kd050hdfia020_desc = { + .init = kd050hdfia020_init, + .init_length = ARRAY_SIZE(kd050hdfia020_init), + .mode = _default_mode, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_MODE_LPM, +}; + static const struct ili9881c_desc tl050hdv35_desc = { .init = tl050hdv35_init, .init_length = ARRAY_SIZE(tl050hdv35_init), @@ -1372,6 +1593,7 @@ static const struct ili9881c_desc am8001280g_desc = { static const struct of_device_id ili9881c_of_match[] = { { .compatible = "bananapi,lhr050h41", .data = _desc }, { .compatible = "feixin,k101-im2byl02", .data = _im2byl02_desc }, + { .compatible = "startek,kd050hdfia020", .data = _desc }, { .compatible = "tdo,tl050hdv35", .data = _desc }, { .compatible = "wanchanglong,w552946aba", .data = _desc }, { .compatible = "ampire,am8001280g", .data = _desc }, Reviewed-by: Neil Armstrong
Re: [PATCH v3 0/3] panel-simple: add support for Crystal Clear CMT430B19N00
From: Neil Armstrong Hi, On Wed, 13 Mar 2024 18:20:13 +0100, Jérémie Dautheribes wrote: > This patch series add support for the Crystal Clear Technology > CMT430B19N00 4.3" 480x272 TFT-LCD panel. > It also adds Crystal Clear Technology to vendor-prefixes.yaml. > > Please note that unfortunately there is no public datasheet available > for this panel. > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) [1/3] dt-bindings: Add Crystal Clear Technology vendor prefix https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/fe67bfbd23b0ccfaaa5de9f9176c6283c628cea1 [2/3] dt-bindings: display: simple: add support for Crystal Clear CMT430B19N00 https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/2fbb050335f8195b86ebcdf498a6c171bba10f8d [3/3] drm/panel: simple: add CMT430B19N00 LCD panel support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/751b58418250a56329d35de29329f547c43e7c7f -- Neil
Re: [PATCH v3 3/3] drm/panel: simple: add CMT430B19N00 LCD panel support
On 13/03/2024 18:20, Jérémie Dautheribes wrote: Add support for Crystal Clear Technology CMT430B19N00 4.3" 480x272 TFT-LCD panel. Suggested-by: Maxime Ripard Signed-off-by: Jérémie Dautheribes --- drivers/gpu/drm/panel/panel-simple.c | 29 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 20e3df1c59d4..d13c42d0f57b 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1457,6 +1457,32 @@ static const struct panel_desc boe_hv070wsa = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct display_timing cct_cmt430b19n00_timing = { + .pixelclock = { 800, 900, 1200 }, + .hactive = { 480, 480, 480 }, + .hfront_porch = { 2, 8, 75 }, + .hback_porch = { 3, 43, 43 }, + .hsync_len = { 2, 4, 75 }, + .vactive = { 272, 272, 272 }, + .vfront_porch = { 2, 8, 37 }, + .vback_porch = { 2, 12, 12 }, + .vsync_len = { 2, 4, 37 }, + .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW +}; + +static const struct panel_desc cct_cmt430b19n00 = { + .timings = _cmt430b19n00_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 95, + .height = 53, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { .clock = 9000, .hdisplay = 480, @@ -4402,6 +4428,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "boe,hv070wsa-100", .data = _hv070wsa + }, { + .compatible = "cct,cmt430b19n00", + .data = _cmt430b19n00, }, { .compatible = "cdtech,s043wq26h-ct7", .data = _s043wq26h_ct7, Reviewed-by: Neil Armstrong
Re: [PATCH v3 6/7] arm64: dts: qcom: sm8650: add GPU nodes
On 12/03/2024 01:20, Konrad Dybcio wrote: On 2/16/24 12:03, Neil Armstrong wrote: Add GPU nodes for the SM8650 platform. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++ 1 file changed, 166 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 62e6ae93a9a8..27dcef27b6ad 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2589,6 +2589,128 @@ tcsr: clock-controller@1fc { #reset-cells = <1>; }; + gpu: gpu@3d0 { + compatible = "qcom,adreno-43051401", "qcom,adreno"; + reg = <0x0 0x03d0 0x0 0x4>, + <0x0 0x03d9e000 0x0 0x1000>, + <0x0 0x03d61000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; + + interrupts = ; + + iommus = <_smmu 0 0x0>, + <_smmu 1 0x0>; + + operating-points-v2 = <_opp_table>; + + qcom,gmu = <>; + + status = "disabled"; + + zap-shader { + memory-region = <_micro_code_mem>; + }; + + /* Speedbin needs more work on A740+, keep only lower freqs */ + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-68000 { + opp-hz = /bits/ 64 <68000>; + opp-level = ; + }; I got a memo from krzk that we should be sorting OPPs low-to-high, could you please reorder these (and under gmu)? Ack, I also add 3 more OPPs that works with all speedbins. Neil Otherwise lgtm Konrad
Re: [PATCH 7/8] drm/bridge: lt9611uxc: use int for holding number of modes
On 08/03/2024 17:03, Jani Nikula wrote: lt9611uxc_connector_get_modes() propagates the return value of drm_edid_connector_add_modes() but stores the int temporarily in an unsigned int. Use the correct type. Cc: Andrzej Hajda Cc: Neil Armstrong Cc: Robert Foss Signed-off-by: Jani Nikula --- drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c b/drivers/gpu/drm/bridge/lontium-lt9611uxc.c index bcf8bccd86d6..f4f593ad8f79 100644 --- a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c +++ b/drivers/gpu/drm/bridge/lontium-lt9611uxc.c @@ -294,8 +294,8 @@ static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc, static int lt9611uxc_connector_get_modes(struct drm_connector *connector) { struct lt9611uxc *lt9611uxc = connector_to_lt9611uxc(connector); - unsigned int count; const struct drm_edid *drm_edid; + int count; drm_edid = drm_bridge_edid_read(>bridge, connector); drm_edid_connector_update(connector, drm_edid); Reviewed-by: Neil Armstrong
Re: [PATCH] drm/bridge: correct DRM_BRIDGE_OP_EDID documentation
On 10/03/2024 00:38, Dmitry Baryshkov wrote: While the commit d807ad80d811 ("drm/bridge: add ->edid_read hook and drm_bridge_edid_read()") and the commit 27b8f91c08d9 ("drm/bridge: remove ->get_edid callback") replaced ->get_edid() callback with the ->edid_read(), they failed to update documentation. Fix the drm_bridge docs to point to edid_read(). Fixes: 27b8f91c08d9 ("drm/bridge: remove ->get_edid callback") Signed-off-by: Dmitry Baryshkov --- include/drm/drm_bridge.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h index 3606e1a7f965..4baca0d9107b 100644 --- a/include/drm/drm_bridge.h +++ b/include/drm/drm_bridge.h @@ -541,7 +541,7 @@ struct drm_bridge_funcs { * The @get_modes callback is mostly intended to support non-probeable * displays such as many fixed panels. Bridges that support reading * EDID shall leave @get_modes unimplemented and implement the -* _bridge_funcs->get_edid callback instead. +* _bridge_funcs->edid_read callback instead. * * This callback is optional. Bridges that implement it shall set the * DRM_BRIDGE_OP_MODES flag in their _bridge->ops. @@ -687,7 +687,7 @@ enum drm_bridge_ops { /** * @DRM_BRIDGE_OP_EDID: The bridge can retrieve the EDID of the display * connected to its output. Bridges that set this flag shall implement -* the _bridge_funcs->get_edid callback. +* the _bridge_funcs->edid_read callback. */ DRM_BRIDGE_OP_EDID = BIT(1), /** --- base-commit: 1843e16d2df9d98427ef8045589571749d627cf7 change-id: 20240310-drm-bridge-fix-docs-0fd12bc6a041 Best regards, Reviewed-by: Neil Armstrong
Re: [PATCH 2/8] drm/panel: do not return negative error codes from drm_panel_get_modes()
On 08/03/2024 17:03, Jani Nikula wrote: None of the callers of drm_panel_get_modes() expect it to return negative error codes. Either they propagate the return value in their struct drm_connector_helper_funcs .get_modes() hook (which is also not supposed to return negative codes), or add it to other counts leading to bogus values. On the other hand, many of the struct drm_panel_funcs .get_modes() hooks do return negative error codes, so handle them gracefully instead of propagating further. Return 0 for no modes, whatever the reason. Cc: Neil Armstrong Cc: Jessica Zhang Cc: Sam Ravnborg Cc: sta...@vger.kernel.org Signed-off-by: Jani Nikula --- drivers/gpu/drm/drm_panel.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c index e814020bbcd3..cfbe020de54e 100644 --- a/drivers/gpu/drm/drm_panel.c +++ b/drivers/gpu/drm/drm_panel.c @@ -274,19 +274,24 @@ EXPORT_SYMBOL(drm_panel_disable); * The modes probed from the panel are automatically added to the connector * that the panel is attached to. * - * Return: The number of modes available from the panel on success or a - * negative error code on failure. + * Return: The number of modes available from the panel on success, or 0 on + * failure (no modes). */ int drm_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector) { if (!panel) - return -EINVAL; + return 0; - if (panel->funcs && panel->funcs->get_modes) - return panel->funcs->get_modes(panel, connector); + if (panel->funcs && panel->funcs->get_modes) { + int num; - return -EOPNOTSUPP; + num = panel->funcs->get_modes(panel, connector); + if (num > 0) + return num; + } + + return 0; } EXPORT_SYMBOL(drm_panel_get_modes); Reviewed-by: Neil Armstrong
Re: [PATCH v2 9/9] drm/panel: truly-nt35597: Don't log an error when DSI host can't be found
On 01/03/2024 10:37, AngeloGioacchino Del Regno wrote: Il 01/03/24 09:56, Laurent Pinchart ha scritto: On Fri, Mar 01, 2024 at 09:44:36AM +0100, AngeloGioacchino Del Regno wrote: Il 01/03/24 07:30, Laurent Pinchart ha scritto: On Thu, Feb 29, 2024 at 07:12:15PM -0500, Nícolas F. R. A. Prado wrote: Given that failing to find a DSI host causes the driver to defer probe, make use of dev_err_probe() to log the reason. This makes the defer probe reason available and avoids alerting userspace about something that is not necessarily an error. Suggested-by: AngeloGioacchino Del Regno Signed-off-by: Nícolas F. R. A. Prado --- drivers/gpu/drm/panel/panel-truly-nt35597.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-truly-nt35597.c b/drivers/gpu/drm/panel/panel-truly-nt35597.c index b73448cf349d..d447db912a61 100644 --- a/drivers/gpu/drm/panel/panel-truly-nt35597.c +++ b/drivers/gpu/drm/panel/panel-truly-nt35597.c @@ -550,10 +550,8 @@ static int truly_nt35597_probe(struct mipi_dsi_device *dsi) dsi1_host = of_find_mipi_dsi_host_by_node(dsi1); of_node_put(dsi1); - if (!dsi1_host) { - dev_err(dev, "failed to find dsi host\n"); - return -EPROBE_DEFER; - } + if (!dsi1_host) + return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"); return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"); With this addressed, I disagree. That's 87 columns, and the 80-col rule is long gone. It's still a maintainer's preference. I soft-enforce it in drivers I maintain. In this case I'll let Neil decide, as he's listed as the maintainer for drivers/gpu/drm/panel/. Yes, that's right. Comes down to personal opinion. There always was an exception for strings to go over the 80col, and I like it better as an one-liner. So I'm in favor with the initial proposal. Reviewed-by: Neil Armstrong Neil Cheers Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Laurent Pinchart /* register the second DSI device */ dsi1_device = mipi_dsi_device_register_full(dsi1_host, );
Re: [PATCH 1/3] dt-bindings: Add Crystal Clear Technology vendor prefix
Hi Jérémie, On 23/02/2024 19:22, Conor Dooley wrote: On Fri, Feb 23, 2024 at 02:45:15PM +0100, Jérémie Dautheribes wrote: Update Documentation/devicetree/bindings/vendor-prefixes.yaml to include "cct" as a vendor prefix for "Crystal Clear Technology". CCT is the vendor of the CMT430B19N00 TFT-LCD panel. Acked-by: Conor Dooley And add a Link: http://www.cct.com.my/ as that actually explains why "cct" is the right choice. Can you send a v2 with this change ? Thanks, Neil Cheers, Conor. Signed-off-by: Jérémie Dautheribes --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index fef2e12b504e..96e47742e250 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -248,6 +248,8 @@ patternProperties: description: Catalyst Semiconductor, Inc. "^cavium,.*": description: Cavium, Inc. + "^cct,.*": +description: Crystal Clear Technology Sdn. Bhd. "^cdns,.*": description: Cadence Design Systems Inc. "^cdtech,.*": -- 2.34.1
Re: (subset) [PATCH 0/3] drm/panel: Pixel 3a Panel
Hi, On Thu, 08 Feb 2024 19:16:41 -0500, Richard Acayan wrote: > This adds support for the AMS559NK06 panel with the S6E3FA7 display > controller and enables the display subsystem on the Pixel 3a. > > Richard Acayan (3): > dt-bindings: display: panel-simple-dsi: add s6e3fa7 ams559nk06 compat > drm/panel: add samsung s6e3fa7 panel driver > arm64: dts: qcom: sdm670-google-sargo: add panel > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) [1/3] dt-bindings: display: panel-simple-dsi: add s6e3fa7 ams559nk06 compat https://cgit.freedesktop.org/drm/drm-misc/commit/?id=2689b33b88641a3b9a8cc411a0c8094cbed7e871 [2/3] drm/panel: add samsung s6e3fa7 panel driver https://cgit.freedesktop.org/drm/drm-misc/commit/?id=bf0390e2c95bf630b22dddc7cde5f83762b658e5 -- Neil
Re: [PATCH] drm/dp: Don't attempt AUX transfers when eDP panels are not powered
On 28/02/2024 17:40, Doug Anderson wrote: Neil, On Thu, Feb 15, 2024 at 8:53 AM Neil Armstrong wrote: Hi Doug, On 15/02/2024 16:08, Doug Anderson wrote: Hi, On Thu, Feb 15, 2024 at 2:24 AM Jani Nikula wrote: On Wed, 14 Feb 2024, Doug Anderson wrote: Hi, On Tue, Feb 13, 2024 at 10:25 PM Hsin-Yi Wang wrote: On Wed, Feb 14, 2024 at 2:23 PM Douglas Anderson wrote: If an eDP panel is not powered on then any attempts to talk to it over the DP AUX channel will timeout. Unfortunately these attempts may be quite slow. Userspace can initiate these attempts either via a /dev/drm_dp_auxN device or via the created i2c device. Making the DP AUX drivers timeout faster is a difficult proposition. In theory we could just poll the panel's HPD line in the AUX transfer function and immediately return an error there. However, this is easier said than done. For one thing, there's no hard requirement to hook the HPD line up for eDP panels and it's OK to just delay a fixed amount. For another thing, the HPD line may not be fast to probe. On parade-ps8640 we need to wait for the bridge chip's firmware to boot before we can get the HPD line and this is a slow process. The fact that the transfers are taking so long to timeout is causing real problems. The open source fwupd daemon sometimes scans DP busses looking for devices whose firmware need updating. If it happens to scan while a panel is turned off this scan can take a long time. The fwupd daemon could try to be smarter and only scan when eDP panels are turned on, but we can also improve the behavior in the kernel. Let's let eDP panels drivers specify that a panel is turned off and then modify the common AUX transfer code not to attempt a transfer in this case. Signed-off-by: Douglas Anderson --- Reviewed-by: Hsin-Yi Wang Thanks for the review! Given that this touches core DRM code and that I never got confirmation that Jani's concerns were addressed with my previous response, I'm still going to wait a little while before applying. I'm on vacation for most of next week, but if there are no further replies between now and then I'll plan to apply this to "drm-misc-next" the week of Feb 26th. If someone else wants to apply this before I do then I certainly won't object. Jani: if you feel this needs more discussion or otherwise object to this patch landing then please yell. Likewise if anyone else in the community wants to throw in their opinion, feel free. Sorry for dropping the ball after my initial response. I simply have not had the time to look into this. It would be great to get, say, drm-misc maintainer ack on this before merging. It's not fair for me to stall this any longer, I'll trust their judgement. Reasonable? I'd be more than happy for one of the drm-misc maintainers to Ack. I'll move Maxime, Thomas, and Maarten to the "To:" line to see if that helps get through their filters. I'll like some test reports to be sure it doesn't break anything, then I'll be happy to give my ack ! Are you looking for any more test reports at this point? Eizan did some testing and provided a tag, though this was also on ChromeOS. Steev also tested on two non-ChromeOS environments and provided his tag. It's also been another two weeks of this being rolled out to some Chromebook users and I haven't heard any reports of problems. If somehow something was missed, I'm happy to follow-up and provide additional fixes if some report comes in later. Sure, thx I think you can apply it now Acked-by: Neil Armstrong Thanks, Neil Thanks! -Doug
Re: [PATCH] drm/bridge: anx7625: Don't log an error when DSI host can't be found
On 26/02/2024 22:20, Nícolas F. R. A. Prado wrote: Given that failing to find a DSI host causes the driver to defer probe, make use of dev_err_probe() to log the reason. This makes the defer probe reason available and avoids alerting userspace about something that is not necessarily an error. Fixes: 269332997a16 ("drm/bridge: anx7625: Return -EPROBE_DEFER if the dsi host was not found") Signed-off-by: Nícolas F. R. A. Prado --- drivers/gpu/drm/bridge/analogix/anx7625.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 29d91493b101..4ee5614a2623 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -2076,10 +2076,8 @@ static int anx7625_setup_dsi_device(struct anx7625_data *ctx) }; host = of_find_mipi_dsi_host_by_node(ctx->pdata.mipi_host_node); - if (!host) { - DRM_DEV_ERROR(dev, "fail to find dsi host.\n"); - return -EPROBE_DEFER; - } + if (!host) + return dev_err_probe(dev, -EPROBE_DEFER, "fail to find dsi host.\n"); dsi = devm_mipi_dsi_device_register_full(dev, host, ); if (IS_ERR(dsi)) { --- base-commit: 2ae0a045e6814c8c1d676d6153c605a65746aa29 change-id: 20240226-anx7625-defer-log-no-dsi-host-c3f9ccbcb287 Best regards, Reviewed-by: Neil Armstrong
Re: [PATCH] Revert "drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes"
On 27/02/2024 23:08, Dmitry Baryshkov wrote: This reverts commit e467e0bde881 ("drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes"). The commit changed the way how the MSM DP driver communicates HPD-related events to the userspace. The mentioned commit made some of the HPD events being reported earlier. This way userspace starts poking around. It interacts in a bad way with the dp_bridge_detect and the driver's state machine, ending up either with the very long delays during hotplug detection or even inability of the DP driver to report the display as connected. A proper fix will involve redesigning of the HPD handling in the MSM DP driver. It is underway, but it will be intrusive and can not be thought about as a simple fix for the issue. Thus, revert the offending commit. Fixes: e467e0bde881 ("drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes") Link: https://gitlab.freedesktop.org/drm/msm/-/issues/50 Reported-by: Johan Hovold Link: https://lore.kernel.org/r/zd3ypgmrprxv-...@hovoldconsulting.com/ Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 20 ++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index d37d599aec27..4c72124ffb5d 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -329,10 +329,26 @@ static const struct component_ops dp_display_comp_ops = { .unbind = dp_display_unbind, }; +static void dp_display_send_hpd_event(struct msm_dp *dp_display) +{ + struct dp_display_private *dp; + struct drm_connector *connector; + + dp = container_of(dp_display, struct dp_display_private, dp_display); + + connector = dp->dp_display.connector; + drm_helper_hpd_irq_event(connector->dev); +} + static int dp_display_send_hpd_notification(struct dp_display_private *dp, bool hpd) { - struct drm_bridge *bridge = dp->dp_display.bridge; + if ((hpd && dp->dp_display.link_ready) || + (!hpd && !dp->dp_display.link_ready)) { + drm_dbg_dp(dp->drm_dev, "HPD already %s\n", + (hpd ? "on" : "off")); + return 0; + } /* reset video pattern flag on disconnect */ if (!hpd) { @@ -348,7 +364,7 @@ static int dp_display_send_hpd_notification(struct dp_display_private *dp, drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n", dp->dp_display.connector_type, hpd); - drm_bridge_hpd_notify(bridge, dp->dp_display.link_ready); + dp_display_send_hpd_event(>dp_display); return 0; } Tested-by: Neil Armstrong # on SM8650-HDK
Re: [PATCH 3/3] drm/panel: simple: add CMT430B19N00 LCD panel support
On 23/02/2024 14:45, Jérémie Dautheribes wrote: Add support for Crystal Clear Technology CMT430B19N00 4.3" 480x272 TFT-LCD panel. Signed-off-by: Jérémie Dautheribes --- drivers/gpu/drm/panel/panel-simple.c | 29 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 20e3df1c59d4..b940220f56e2 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1457,6 +1457,32 @@ static const struct panel_desc boe_hv070wsa = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct drm_display_mode cct_cmt430b19n00_mode = { + .clock = 9000, + .hdisplay = 480, + .hsync_start = 480 + 43, + .hsync_end = 480 + 43 + 8, + .htotal = 480 + 43 + 8 + 4, + .vdisplay = 272, + .vsync_start = 272 + 12, + .vsync_end = 272 + 12 + 8, + .vtotal = 272 + 12 + 8 + 4, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, +}; + +static const struct panel_desc cct_cmt430b19n00 = { + .modes = _cmt430b19n00_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 95, + .height = 53, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { .clock = 9000, .hdisplay = 480, @@ -4402,6 +4428,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "boe,hv070wsa-100", .data = _hv070wsa + }, { + .compatible = "cct,cmt430b19n00", + .data = _cmt430b19n00, }, { .compatible = "cdtech,s043wq26h-ct7", .data = _s043wq26h_ct7, Reviewed-by: Neil Armstrong
Re: [PATCH 0/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free
On 23/02/2024 15:52, Johan Hovold wrote: On Fri, Feb 23, 2024 at 03:38:13PM +0100, Neil Armstrong wrote: On 23/02/2024 15:21, Johan Hovold wrote: But it is *not* standalone as I tried to explain above. So you have to drop it again as the later patches depend on it and cannot be merged (through a different tree) without it. drm-misc branches cannot be rebased, it must be reverted, but it can still be applied on drm-misc-next and I'll send a revert patch for drm-misc-fixes if needed, not a big deal. I thought you had all the acks you needed to take this through drm-misc, but we can wait a bit more if necessary (and there's no rush to get the first one in). If you want it to be in v6.9, it's too late since the last drm-misc-next PR has been sent yesterday (https://cgit.freedesktop.org/drm/drm-misc/tag/?h=drm-misc-next-2024-02-22) Please ping Thomas or Maxime, perhaps it's not too late since the drm-misc-next tree really closes on sunday. I don't want this in 6.9, this is needed for *6.8* as this fixes a DRM regression in 6.8-rc1 that breaks the display on machines like the X13s. If you guys can't sort this out in time, then perhaps Bjorn can take this through the Qualcomm tree instead (with DRM acks). But again, this is fixing a severe *regression* in 6.8-rc1. It can not wait for 6.9. Right, I can't apply them right now, I send a patchset ack so it can be applied ASAP, Thanks, Neil Johan
Re: [PATCH 0/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free
On 17/02/2024 16:02, Johan Hovold wrote: Starting with 6.8-rc1 the internal display sometimes fails to come up on machines like the Lenovo ThinkPad X13s and the logs indicate that this is due to a regression in the DRM subsystem [1]. This series fixes a race in the pmic_glink_altmode driver which was exposed / triggered by the transparent DRM bridges rework that went into 6.8-rc1 and that manifested itself as a bridge failing to attach and sometimes triggering a NULL-pointer dereference. The intermittent hard resets that have also been reported since 6.8-rc1 unfortunately still remains and suggests that we are dealing with two separate regressions. There is some indication that also the hard resets (e.g. due to register accesses to unclocked hardware) are also due to changes in the DRM subsystem as it happens around the time that the eDP panel and display controller would be initialised during boot (the runtime PM rework?). This remains to be verified, however. Included is also a fix for a related OF node reference leak in the aux-hpd driver found through inspection when reworking the driver. The use-after-free bug is triggered by a probe deferral and highlighted some further bugs in the involved drivers, which were registering child devices before deferring probe. This behaviour is not correct and can both trigger probe deferral loops and potentially also further issues with the DRM bridge implementation. This series can either go through the Qualcomm SoC tree (pmic_glink) or the DRM tree. The PHY patches do not depend on the rest of the series and could possibly be merged separately through the PHY tree. Whichever gets this to mainline the fastest. Johan [1] https://lore.kernel.org/lkml/zctvmlk4ztwcp...@hovoldconsulting.com/ Johan Hovold (5): drm/bridge: aux-hpd: fix OF node leaks drm/bridge: aux-hpd: separate allocation and registration soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free phy: qcom-qmp-combo: fix drm bridge registration phy: qcom-qmp-combo: fix type-c switch registration Rob Clark (1): soc: qcom: pmic_glink: Fix boot when QRTR=m drivers/gpu/drm/bridge/aux-hpd-bridge.c | 70 ++- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 16 +++--- drivers/soc/qcom/pmic_glink.c | 21 +++ drivers/soc/qcom/pmic_glink_altmode.c | 16 +- include/drm/bridge/aux-bridge.h | 15 + 5 files changed, 102 insertions(+), 36 deletions(-) For the serie: Acked-by: Neil Armstrong After an offline discussion, Dmitry, it's ok to push the remaining patches to drm-misc-fixes. Thanks, Neil
Re: [PATCH 0/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free
On 23/02/2024 15:21, Johan Hovold wrote: On Fri, Feb 23, 2024 at 02:52:28PM +0100, Neil Armstrong wrote: On 23/02/2024 13:51, Johan Hovold wrote: On Fri, Feb 23, 2024 at 12:03:10PM +0100, Neil Armstrong wrote: On 23/02/2024 12:02, Neil Armstrong wrote: Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-fixes) [1/6] drm/bridge: aux-hpd: fix OF node leaks https://cgit.freedesktop.org/drm/drm-misc/commit/?id=9ee485bdda68d6d3f5728cbe3150eb9013d7d22b [2/6] drm/bridge: aux-hpd: separate allocation and registration (no commit info) [3/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free (no commit info) [4/6] soc: qcom: pmic_glink: Fix boot when QRTR=m (no commit info) [5/6] phy: qcom-qmp-combo: fix drm bridge registration (no commit info) [6/6] phy: qcom-qmp-combo: fix type-c switch registration (no commit info) To clarify, I only applied patch 1 to drm-misc-fixes Ok, but can you please not do that? :) These patches should go in through the same tree to avoid conflicts. I discussed this with Bjorn and Dmitry the other day and the conclusion was that it was easiest to take all of these through DRM. I only applied patch 1, which is a standalone fix and goes into a separate tree, for the next patches it would be indeed simpler for them to go via drm-misc when they are properly acked. But it is *not* standalone as I tried to explain above. So you have to drop it again as the later patches depend on it and cannot be merged (through a different tree) without it. drm-misc branches cannot be rebased, it must be reverted, but it can still be applied on drm-misc-next and I'll send a revert patch for drm-misc-fixes if needed, not a big deal. I thought you had all the acks you needed to take this through drm-misc, but we can wait a bit more if necessary (and there's no rush to get the first one in). If you want it to be in v6.9, it's too late since the last drm-misc-next PR has been sent yesterday (https://cgit.freedesktop.org/drm/drm-misc/tag/?h=drm-misc-next-2024-02-22) Please ping Thomas or Maxime, perhaps it's not too late since the drm-misc-next tree really closes on sunday. Neil Johan
Re: [PATCH 0/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free
On 23/02/2024 13:51, Johan Hovold wrote: On Fri, Feb 23, 2024 at 12:03:10PM +0100, Neil Armstrong wrote: On 23/02/2024 12:02, Neil Armstrong wrote: Hi, On Sat, 17 Feb 2024 16:02:22 +0100, Johan Hovold wrote: Starting with 6.8-rc1 the internal display sometimes fails to come up on machines like the Lenovo ThinkPad X13s and the logs indicate that this is due to a regression in the DRM subsystem [1]. This series fixes a race in the pmic_glink_altmode driver which was exposed / triggered by the transparent DRM bridges rework that went into 6.8-rc1 and that manifested itself as a bridge failing to attach and sometimes triggering a NULL-pointer dereference. [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-fixes) [1/6] drm/bridge: aux-hpd: fix OF node leaks https://cgit.freedesktop.org/drm/drm-misc/commit/?id=9ee485bdda68d6d3f5728cbe3150eb9013d7d22b [2/6] drm/bridge: aux-hpd: separate allocation and registration (no commit info) [3/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free (no commit info) [4/6] soc: qcom: pmic_glink: Fix boot when QRTR=m (no commit info) [5/6] phy: qcom-qmp-combo: fix drm bridge registration (no commit info) [6/6] phy: qcom-qmp-combo: fix type-c switch registration (no commit info) To clarify, I only applied patch 1 to drm-misc-fixes Ok, but can you please not do that? :) These patches should go in through the same tree to avoid conflicts. I discussed this with Bjorn and Dmitry the other day and the conclusion was that it was easiest to take all of these through DRM. I only applied patch 1, which is a standalone fix and goes into a separate tree, for the next patches it would be indeed simpler for them to go via drm-misc when they are properly acked. Neil With Vinod acking the PHY patches, I believe you have what you need to merge the whole series now? Johan
Re: [PATCH 4/6] soc: qcom: pmic_glink: Fix boot when QRTR=m
On 17/02/2024 16:02, Johan Hovold wrote: From: Rob Clark We need to bail out before adding/removing devices if we are going to -EPROBE_DEFER. Otherwise boot can get stuck in a probe deferral loop due to a long-standing issue in driver core (see fbc35b45f9f6 ("Add documentation on meaning of -EPROBE_DEFER")). Deregistering the altmode child device can potentially also trigger bugs in the DRM bridge implementation, which does not expect bridges to go away. Suggested-by: Dmitry Baryshkov Signed-off-by: Rob Clark Link: https://lore.kernel.org/r/20231213210644.8702-1-robdcl...@gmail.com [ johan: rebase on 6.8-rc4, amend commit message and mention DRM ] Fixes: 58ef4ece1e41 ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver") Cc: sta...@vger.kernel.org # 6.3 Cc: Bjorn Andersson Signed-off-by: Johan Hovold --- drivers/soc/qcom/pmic_glink.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c index f4bfd24386f1..f913e9bd57ed 100644 --- a/drivers/soc/qcom/pmic_glink.c +++ b/drivers/soc/qcom/pmic_glink.c @@ -265,10 +265,17 @@ static int pmic_glink_probe(struct platform_device *pdev) pg->client_mask = *match_data; + pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg); + if (IS_ERR(pg->pdr)) { + ret = dev_err_probe(>dev, PTR_ERR(pg->pdr), + "failed to initialize pdr\n"); + return ret; + } + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) { ret = pmic_glink_add_aux_device(pg, >ucsi_aux, "ucsi"); if (ret) - return ret; + goto out_release_pdr_handle; } if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) { ret = pmic_glink_add_aux_device(pg, >altmode_aux, "altmode"); @@ -281,17 +288,11 @@ static int pmic_glink_probe(struct platform_device *pdev) goto out_release_altmode_aux; } - pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg); - if (IS_ERR(pg->pdr)) { - ret = dev_err_probe(>dev, PTR_ERR(pg->pdr), "failed to initialize pdr\n"); - goto out_release_aux_devices; - } - service = pdr_add_lookup(pg->pdr, "tms/servreg", "msm/adsp/charger_pd"); if (IS_ERR(service)) { ret = dev_err_probe(>dev, PTR_ERR(service), "failed adding pdr lookup for charger_pd\n"); - goto out_release_pdr_handle; + goto out_release_aux_devices; } mutex_lock(&__pmic_glink_lock); @@ -300,8 +301,6 @@ static int pmic_glink_probe(struct platform_device *pdev) return 0; -out_release_pdr_handle: - pdr_handle_release(pg->pdr); out_release_aux_devices: if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) pmic_glink_del_aux_device(pg, >ps_aux); @@ -311,6 +310,8 @@ static int pmic_glink_probe(struct platform_device *pdev) out_release_ucsi_aux: if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) pmic_glink_del_aux_device(pg, >ucsi_aux); +out_release_pdr_handle: + pdr_handle_release(pg->pdr); return ret; } Reviewed-by: Neil Armstrong
Re: [PATCH 0/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free
On 23/02/2024 12:02, Neil Armstrong wrote: Hi, On Sat, 17 Feb 2024 16:02:22 +0100, Johan Hovold wrote: Starting with 6.8-rc1 the internal display sometimes fails to come up on machines like the Lenovo ThinkPad X13s and the logs indicate that this is due to a regression in the DRM subsystem [1]. This series fixes a race in the pmic_glink_altmode driver which was exposed / triggered by the transparent DRM bridges rework that went into 6.8-rc1 and that manifested itself as a bridge failing to attach and sometimes triggering a NULL-pointer dereference. [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-fixes) [1/6] drm/bridge: aux-hpd: fix OF node leaks https://cgit.freedesktop.org/drm/drm-misc/commit/?id=9ee485bdda68d6d3f5728cbe3150eb9013d7d22b [2/6] drm/bridge: aux-hpd: separate allocation and registration (no commit info) [3/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free (no commit info) [4/6] soc: qcom: pmic_glink: Fix boot when QRTR=m (no commit info) [5/6] phy: qcom-qmp-combo: fix drm bridge registration (no commit info) [6/6] phy: qcom-qmp-combo: fix type-c switch registration (no commit info) To clarify, I only applied patch 1 to drm-misc-fixes Thanks, Neil
Re: [PATCH 0/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free
Hi, On Sat, 17 Feb 2024 16:02:22 +0100, Johan Hovold wrote: > Starting with 6.8-rc1 the internal display sometimes fails to come up on > machines like the Lenovo ThinkPad X13s and the logs indicate that this > is due to a regression in the DRM subsystem [1]. > > This series fixes a race in the pmic_glink_altmode driver which was > exposed / triggered by the transparent DRM bridges rework that went into > 6.8-rc1 and that manifested itself as a bridge failing to attach and > sometimes triggering a NULL-pointer dereference. > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-fixes) [1/6] drm/bridge: aux-hpd: fix OF node leaks https://cgit.freedesktop.org/drm/drm-misc/commit/?id=9ee485bdda68d6d3f5728cbe3150eb9013d7d22b [2/6] drm/bridge: aux-hpd: separate allocation and registration (no commit info) [3/6] soc: qcom: pmic_glink_altmode: fix drm bridge use-after-free (no commit info) [4/6] soc: qcom: pmic_glink: Fix boot when QRTR=m (no commit info) [5/6] phy: qcom-qmp-combo: fix drm bridge registration (no commit info) [6/6] phy: qcom-qmp-combo: fix type-c switch registration (no commit info) -- Neil
Re: [PATCH 1/6] drm/bridge: aux-hpd: fix OF node leaks
On 17/02/2024 16:02, Johan Hovold wrote: The two device node references taken during allocation need to be dropped when the auxiliary device is freed. Fixes: 6914968a0b52 ("drm/bridge: properly refcount DT nodes in aux bridge drivers") Cc: Dmitry Baryshkov Cc: Neil Armstrong Signed-off-by: Johan Hovold --- drivers/gpu/drm/bridge/aux-hpd-bridge.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/bridge/aux-hpd-bridge.c b/drivers/gpu/drm/bridge/aux-hpd-bridge.c index bb55f697a181..9e71daf95bde 100644 --- a/drivers/gpu/drm/bridge/aux-hpd-bridge.c +++ b/drivers/gpu/drm/bridge/aux-hpd-bridge.c @@ -25,6 +25,7 @@ static void drm_aux_hpd_bridge_release(struct device *dev) ida_free(_aux_hpd_bridge_ida, adev->id); of_node_put(adev->dev.platform_data); + of_node_put(adev->dev.of_node); kfree(adev); } @@ -74,6 +75,8 @@ struct device *drm_dp_hpd_bridge_register(struct device *parent, ret = auxiliary_device_init(adev); if (ret) { + of_node_put(adev->dev.platform_data); + of_node_put(adev->dev.of_node); ida_free(_aux_hpd_bridge_ida, adev->id); kfree(adev); return ERR_PTR(ret); Reviewed-by: Neil Armstrong
Re: [PATCH 1/6] drm/bridge: aux-hpd: fix OF node leaks
On 17/02/2024 16:02, Johan Hovold wrote: The two device node references taken during allocation need to be dropped when the auxiliary device is freed. Fixes: 6914968a0b52 ("drm/bridge: properly refcount DT nodes in aux bridge drivers") Cc: Dmitry Baryshkov Cc: Neil Armstrong Signed-off-by: Johan Hovold --- drivers/gpu/drm/bridge/aux-hpd-bridge.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/bridge/aux-hpd-bridge.c b/drivers/gpu/drm/bridge/aux-hpd-bridge.c index bb55f697a181..9e71daf95bde 100644 --- a/drivers/gpu/drm/bridge/aux-hpd-bridge.c +++ b/drivers/gpu/drm/bridge/aux-hpd-bridge.c @@ -25,6 +25,7 @@ static void drm_aux_hpd_bridge_release(struct device *dev) ida_free(_aux_hpd_bridge_ida, adev->id); of_node_put(adev->dev.platform_data); + of_node_put(adev->dev.of_node); kfree(adev); } @@ -74,6 +75,8 @@ struct device *drm_dp_hpd_bridge_register(struct device *parent, ret = auxiliary_device_init(adev); if (ret) { + of_node_put(adev->dev.platform_data); + of_node_put(adev->dev.of_node); ida_free(_aux_hpd_bridge_ida, adev->id); kfree(adev); return ERR_PTR(ret); Reviewed-by: Neil Armstrong
Re: [PATCH 8/9] arm64: dts: qcom: qcs6490-rb3gen2: Enable USB Type-C display
On 22/02/2024 00:19, Bjorn Andersson wrote: With MDSS, pmic_glink, and the redriver in place, wire up the various components to enable USB Type-C display on the RB3gen2. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 63 +++- 1 file changed, 61 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index 171ed979d55f..4bf1c6351467 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -149,7 +149,15 @@ port@1 { reg = <1>; pmic_glink_ss_in: endpoint { - remote-endpoint = <_1_dwc3_ss>; + remote-endpoint = <_usb_con_ss>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_sbu_in: endpoint { + remote-endpoint = <_usb_con_sbu>; }; }; }; @@ -476,6 +484,36 @@ typec-mux@1c { retimer-switch; orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + redriver_usb_con_ss: endpoint { + remote-endpoint = <_glink_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + redriver_phy_con_ss: endpoint { + remote-endpoint = <_dp_qmpphy_out>; + data-lanes = <0 1 2 3>; + }; + }; + + port@2 { + reg = <2>; + + redriver_usb_con_sbu: endpoint { + remote-endpoint = <_glink_sbu_in>; + }; + }; Nice to see the SBU switching works :-) Reviewed-by: Neil Armstrong + }; }; }; @@ -483,6 +521,15 @@ { status = "okay"; }; +_dp { + status = "okay"; +}; + +_dp_out { + data-lanes = <0 1>; + remote-endpoint = <_dp_qmpphy_dp_in>; +}; + _edp { status = "okay"; }; @@ -534,7 +581,7 @@ _1_dwc3_hs { }; _1_dwc3_ss { - remote-endpoint = <_glink_ss_in>; + remote-endpoint = <_dp_qmpphy_usb_ss_in>; }; _1_hsphy { @@ -554,6 +601,18 @@ _1_qmpphy { status = "okay"; }; +_dp_qmpphy_out { + remote-endpoint = <_phy_con_ss>; +}; + +_dp_qmpphy_usb_ss_in { + remote-endpoint = <_1_dwc3_ss>; +}; + +_dp_qmpphy_dp_in { + remote-endpoint = <_dp_out>; +}; + { memory-region = <_fw_mem>; };
Re: [PATCH 8/8] arm64: dts: qcom: qrb2210-rb1: Enable the GPU
On 19/02/2024 22:37, Konrad Dybcio wrote: On 19.02.2024 15:49, Dmitry Baryshkov wrote: On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote: Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol). Is it not? Sure, every electronic device is also a heater, I suppose.. I found this wording extremely funny though GPU (Graphics Processing Unit) isn't accurate either since it can also run compute shaders do to non graphics processing, so 3D Accelerator isn't that different. A proper term would be Vectorized Mathematical Computing Complex or something similar. Neil [1] https://docs.qualcomm.com/bundle/publicresource/87-61720-1_REV_A_QUALCOMM_ROBOTICS_RB1_PLATFORM__QUALCOMM_QRB2210__PRODUCT_BRIEF.pdf Signed-off-by: Konrad Dybcio With the exception of the commit message: :( Konrad Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 8 1 file changed, 8 insertions(+)
Re: [PATCH v2 1/2] dt-bindings: display: simple: Add boe,bp082wx1-100 8.2" panel
Hi, On Sun, 11 Feb 2024 13:16:58 +0200, Tony Lindgren wrote: > This panel is found on Motorola mapphone tablets mz607 to mz609. > > Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) [1/2] dt-bindings: display: simple: Add boe,bp082wx1-100 8.2" panel https://cgit.freedesktop.org/drm/drm-misc/commit/?id=763955fd6c93ad46cdb8a0dc620e7855b1ad2fe8 [2/2] drm/panel: simple: Add BOE BP082WX1-100 8.2" panel https://cgit.freedesktop.org/drm/drm-misc/commit/?id=dc90214ff58be575fdceb549f901506cdef5d093 -- Neil
Re: [PATCH] drm/panel: boe-tv101wum-nl6: make use of prepare_prev_first
Hi, On Fri, 16 Feb 2024 12:31:12 -0800, Douglas Anderson wrote: > The panel on sc7180-trogdor-wormdingler and > sc7180-trogdor-quackingstick hasn't been coming up since commit > 9e15123eca79 ("drm/msm/dsi: Stop unconditionally powering up DSI hosts > at modeset"). Let's add "prepare_prev_first" as has been done for many > other DSI panels. > > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) [1/1] drm/panel: boe-tv101wum-nl6: make use of prepare_prev_first https://cgit.freedesktop.org/drm/drm-misc/commit/?id=42a7a16bedc991190310a02dd202e29cfac52525 -- Neil