Re: [PATCH 0/5] drm: Aspect ratio fixes

2019-06-24 Thread Ville Syrjälä
On Fri, Jun 21, 2019 at 07:28:30PM -0400, Alex Deucher wrote: > On Thu, Jun 20, 2019 at 10:26 AM Ville Syrjala > wrote: > > > > From: Ville Syrjälä > > > > Ilia pointed out some oddball crap in the i915 aspect ratio handling. > > While looking at that I

Re: [Intel-gfx] [PATCH v3 3/4] drm/connector: Split out orientation quirk detection

2019-06-24 Thread Ville Syrjälä
t; drm_connector *connector, > void drm_connector_set_vrr_capable_property( > struct drm_connector *connector, bool capable); > int drm_connector_init_panel_orientation_property( > + struct drm_connector *connector); > +int drm_connector_init_panel_orientation_property_quirk( > struct drm_connector *connector, int width, int height); > int drm_connector_attach_max_bpc_property(struct drm_connector *connector, > int min, int max); > -- > 2.22.0.410.gd8fdbe21b5-goog > > ___ > Intel-gfx mailing list > intel-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel

Re: [PATCH 1/2] drm: Pretty print mode flags

2019-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 10:25:42PM +0200, Sam Ravnborg wrote: > Hi Ville. > > On Thu, Jun 20, 2019 at 09:50:48PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Decode the mode flags when printing the modeline so that I > > no longer have to de

Re: [PATCH] drm: Dump mode picture aspect ratio

2019-06-20 Thread Ville Syrjälä
On Thu, Jun 20, 2019 at 11:59:37AM -0400, Ilia Mirkin wrote: > On Thu, Jun 20, 2019 at 11:46 AM Ville Syrjala > wrote: > > > > From: Ville Syrjälä > > > > Currently the logs show nothing about the mode's aspect ratio. > > Include that information in the norma

Re: [RFC] Exposing plane type mask and handling 'all' planes

2019-06-19 Thread Ville Syrjälä
On Wed, Jun 19, 2019 at 06:49:11PM +0100, Emil Velikov wrote: > On Wed, 19 Jun 2019 at 17:33, Ville Syrjälä > wrote: > > > > On Wed, Jun 19, 2019 at 05:03:53PM +0100, Emil Velikov wrote: > > > Hi all, > > > > > > Recently I have been look

Re: [RFC] Exposing plane type mask and handling 'all' planes

2019-06-19 Thread Ville Syrjälä
h, that achieves the goal? > > Input and ideas from the Intel team and DRM community are very much > appreciated. > > Thanks > Emil > _______ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v7 00/16] Add Plane Color Properties

2019-06-19 Thread Ville Syrjälä
On Wed, Jun 19, 2019 at 12:33:33PM -0300, Ezequiel Garcia wrote: > On Wed, 2019-06-19 at 18:03 +0300, Ville Syrjälä wrote: > > On Wed, Jun 19, 2019 at 10:18:18AM -0300, Ezequiel Garcia wrote: > > > On Wed, 2019-06-19 at 06:20 +, Shankar, Uma wrote: > > >

Re: [v7 00/16] Add Plane Color Properties

2019-06-19 Thread Ville Syrjälä
at one place. Addressed Alexandru's review > > > > comments. > > > > > > > > v6: Rebase. Added support for ICL Color features. Enhanced Lut > > > > precision to accept input values in u32.32 format. This is needed for > > > > high

Re: Drop use of DRM_WAIT_ON() [Was: drm/drm_vblank: Change EINVAL by the correct errno]

2019-06-14 Thread Ville Syrjälä
- return -EINVAL; > > + return -EOPNOTSUPP; > > > > if (vblwait->request.type & _DRM_VBLANK_SIGNAL) > > - return -EINVAL; > > + return -EOPNOTSUPP; > > > > if (vblwait->request.type &am

Re: [Intel-gfx] [PATCH 03/16] drm/i915: stop using drm_pci_alloc

2019-06-14 Thread Ville Syrjälä
iltin_resv; > }; > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 5098228f1302..4f8b368ac4e2 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -10066,7 +10066,7 @@ static u32 intel_cursor_base(const struct > intel_plane_state *plane_state) > u32 base; > > if (INTEL_INFO(dev_priv)->display.cursor_needs_physical) > - base = obj->phys_handle->busaddr; > + base = obj->phys_handle; > else > base = intel_plane_ggtt_offset(plane_state); > > -- > 2.20.1 > > ___ > Intel-gfx mailing list > intel-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel

Re: [PATCH 1/3] drm: add debug print to update_vblank_count

2019-06-14 Thread Ville Syrjälä
lse { > /* some kind of default for drivers w/o accurate vbl > timestamping */ > diff = in_vblank_irq ? 1 : 0; > -- > 2.21.0 > > _______ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https:

Re: [PATCH 1/2] drm/dp: Add DP_DPCD_QUIRK_NO_SINK_COUNT

2019-06-14 Thread Ville Syrjälä
On Tue, May 28, 2019 at 05:06:49PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > CH7511 eDP->LVDS bridge doesn't seem to set SINK_COUNT properly > causing i915 to detect it as disconnected. Add a quirk to ignore > SINK_COUNT on these devices. > > Cc: David S.

Re: [Intel-gfx] [PATCH 3/4] drm/fb-helper: Set up gamma_lut during restore_fbdev_mode_atomic()

2019-06-11 Thread Ville Syrjälä
On Tue, Jun 11, 2019 at 07:55:45PM +0200, Daniel Vetter wrote: > On Tue, Jun 11, 2019 at 7:50 PM Ville Syrjälä > wrote: > > > > On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote: > > > On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Throw away the BIOS fb if has the wrong depth/bpp

2019-06-11 Thread Ville Syrjälä
On Fri, Jun 07, 2019 at 08:43:56PM +0200, Daniel Vetter wrote: > On Fri, Jun 07, 2019 at 07:26:11PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Respect the user's choice of depth/bpp for the fbdev framebuffer > > and throw out the fb we inherited

Re: [Intel-gfx] [PATCH 3/4] drm/fb-helper: Set up gamma_lut during restore_fbdev_mode_atomic()

2019-06-11 Thread Ville Syrjälä
On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote: > On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > i915 will now refuse to enable a C8 plane unless the gamma_lut > > is already enabled (to avoid scanni

Re: Linking ALSA playback devices and DRM connectors

2019-06-07 Thread Ville Syrjälä
s is fixed on all hardware or not. > > Ville, on this old Intel hw, is the single connector that gets the > audio configurable? The force-audio property can be used for that. That is, you can force audio off for all the connector where you don't want audio and then it should get automagically routed to the remaining connector. -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier

2019-06-06 Thread Ville Syrjälä
On Wed, May 29, 2019 at 06:50:40PM +0200, Mario Kleiner wrote: > On Wed, May 29, 2019 at 7:02 AM Ville Syrjala > wrote: > > > > From: Ville Syrjälä > > > > From VESA EDID implementation guide v1.0: > > "For EDID version 1 revision 2 or earlier data str

Re: [PATCH] drm/crc-debugfs: User irqsafe spinlock in drm_crtc_add_crc_entry

2019-06-06 Thread Ville Syrjälä
c: Tomeu Vizoso > Cc: Emil Velikov > Cc: Benjamin Gaignard > Signed-off-by: Daniel Vetter Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/drm_debugfs_crc.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/drm_debugfs

Re: [PATCH 2/3] drm/i915/dsi: Move vlv/icl_dphy_param_init call out of intel_dsi_vbt_init (v2)

2019-06-05 Thread Ville Syrjälä
, > otherwise they are completely unchanged. > > Signed-off-by: Hans de Goede Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/icl_dsi.c | 108 ++ > drivers/gpu/drm/i915/intel_dsi.h | 1 + > drivers/gpu/drm/i915/intel_dsi_vbt.c | 282 +--

Re: [PATCH 4/4] drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3)

2019-06-04 Thread Ville Syrjälä
intel_dsi->pclk = current_mode->clock; > + } I wonder if we should be checking whether the mode is otherwise identical to whatever we got from VBT? Though I suppose that shouldn't really happen. The whole dsi clock handling is a proper mess, but

Re: [PATCH 2/4] drm/i915/dsi: Move logging of DSI VBT parameters to a helper function

2019-06-04 Thread Ville Syrjälä
On Fri, May 24, 2019 at 06:30:18PM +0200, Hans de Goede wrote: > This is a preparation patch for moving the calling of *_dphy_param_init() > out of intel_dsi_vbt_init. > > Signed-off-by: Hans de Goede Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/in

Re: [PATCH 3/4] drm/i915/dsi: Move vlv/icl_dphy_param_init call out of intel_dsi_vbt_init

2019-06-04 Thread Ville Syrjälä
915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c > index fce8b58f7f93..3329ccf3b346 100644 > --- a/drivers/gpu/drm/i915/vlv_dsi.c > +++ b/drivers/gpu/drm/i915/vlv_dsi.c > @@ -1782,6 +1782,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) > goto err; >

Re: [PATCH 2/2] drm/i915/dsi: Use a fuzzy check for burst mode clock check

2019-06-04 Thread Ville Syrjälä
mipi_config->target_burst_mode_freq = bitrate; Maybe should squash these patches together to make the stable backport less painful? Anyways, seems OK to me. Reviewed-by: Ville Syrjälä > + > if (mipi_config->target_burst_mode_freq < bitrate) { >

Re: Linking ALSA playback devices and DRM connectors

2019-06-04 Thread Ville Syrjälä
correcponding drm connector is added/removed. If we don't want to/can't add such pcm devices then we'd need to dynamically change the symlinks/whatever whenever an MST stream is started/stopped. And probably we should do the same for SST/HDMI as well, if for no other reason than to make sure userspace is prepared for it even if they didn't test with MST. -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH libdrm 00/10] Add C8, 30bpp and FP16 support to modetest

2019-06-04 Thread Ville Syrjälä
add FP16 format support > > > > tests/modetest/buffers.c | 13 ++ > > tests/modetest/modetest.c | 109 -- > > tests/util/format.c | 7 + > > tests/util/pattern.c | 432 +- > > tests/util/pattern.h | 7 +

Re: [PATCH] drm/komeda: Added AFBC support for komeda driver

2019-05-27 Thread Ville Syrjälä
On Mon, May 27, 2019 at 06:51:18AM +, james qian wang (Arm Technology China) wrote: > On Fri, May 24, 2019 at 03:12:26PM +0300, Ville Syrjälä wrote: > > On Fri, May 24, 2019 at 11:10:09AM +, Brian Starkey wrote: > > > Hi, > > > > > > On Tue, May 21,

Re: [PATCH] drm/komeda: Added AFBC support for komeda driver

2019-05-24 Thread Ville Syrjälä
ver unlikely) some broken userspace might start to depend on the ability to create framebuffers with crap modifiers, which could later break if you change the way you handle the modifiers. Then you're stuck between the rock and hard place because you can't break existing userspace but you still want to change the way modifiers are handled in the kernel. Best not give userspace too much rope IMO. Two ways to go about that: 1) drm_any_plane_has_format() (assumes your .format_mod_supported() does its job properly) 2) roll your own -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] drm: assure aux_dev is nonzero before using it

2019-05-24 Thread Ville Syrjälä
ng us further away from the > > root cause. > > That's a very good question. > > > Also, can you reproduce this on a recent upstream kernel? The aux device > > nodes were introduced in kernel v4.6. Whatever you reproduced on v3.10 > > is pretty much irrelevant fo

Re: [v11 00/12] Add HDR Metadata Parsing and handling in DRM layer

2019-05-22 Thread Ville Syrjälä
te HDR infoframe and send to panel > drm/i915:Enabled Modeset when HDR Infoframe changes > drm/i915: Added DRM Infoframe handling for BYT/CHT > video/hdmi: Add Unpack function for DRM infoframe > drm/i915: Add state readout for DRM infoframe > > Ville Syrjälä (2): > dr

Re: [v11 05/12] drm/i915: Attach HDR metadata property to connector

2019-05-17 Thread Ville Syrjälä
if (!HAS_GMCH(dev_priv)) > drm_connector_attach_max_bpc_property(connector, 8, 12); > -- > 1.9.1 -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v11 06/12] drm/i915: Write HDR infoframe and send to panel

2019-05-17 Thread Ville Syrjälä
te->infoframes.drm); > } > > void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable) > @@ -2386,6 +2425,11 @@ int intel_hdmi_compute_config(struct intel_encoder > *encoder, > return -EINVAL; > } > > + if (!intel_hdmi_compute_drm_infoframe(encoder, pipe_config, > conn_state)) { > + DRM_DEBUG_KMS("bad DRM infoframe\n"); > + return -EINVAL; > + } > + > return 0; > } > > -- > 1.9.1 -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v11 08/12] drm/i915: Enable infoframes on GLK+ for HDR

2019-05-17 Thread Ville Syrjälä
On Thu, May 16, 2019 at 07:40:13PM +0530, Uma Shankar wrote: > From: Ville Syrjälä > > This patch enables infoframes on GLK+ to be > used to send HDR metadata to HDMI sink. > > v2: Addressed Shashank's review comment. > > v3: Addressed Shashank's review comment. >

Re: [PATCH v3 04/10] drm: Convert connector_helper_funcs->atomic_check to accept drm_atomic_state

2019-05-16 Thread Ville Syrjälä
s awesome! Can't quite tell if that's irony or not. Anyways, this has been suggested before but no volunteers stepped forward. > drm_atomic_state is indeed not a state, but a transaction representing > how we go from the old to the new state. On a semi-related topic, I've occasionally pondered about moving mode_changed & co. from the obj states to the top level state/transaction (maybe stored as a bitmask). But that would definitely not be a trivial sed job. -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v10 09/12] drm/i915:Enabled Modeset when HDR Infoframe changes

2019-05-16 Thread Ville Syrjälä
On Thu, May 16, 2019 at 10:54:14AM +, Shankar, Uma wrote: > > > >-Original Message- > >From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf > >Of Ville > >Syrjälä > >Sent: Thursday, May 16, 2019 12:57 AM > >To: Shank

Re: [v10 01/12] drm: Add HDR source metadata property

2019-05-15 Thread Ville Syrjälä
On Wed, May 15, 2019 at 07:33:10PM +, Jonas Karlman wrote: > On 2019-05-15 21:10, Ville Syrjälä wrote: > > On Tue, May 14, 2019 at 11:06:23PM +0530, Uma Shankar wrote: > >> This patch adds a blob property to get HDR metadata > >> information from userspace

Re: [v10 03/12] drm: Parse HDR metadata info from EDID

2019-05-15 Thread Ville Syrjälä
udio(struct drm_connector *connector, const u8 *db) > { > @@ -4461,6 +4508,8 @@ static void drm_parse_cea_ext(struct drm_connector > *connector, > drm_parse_y420cmdb_bitmap(connector, db); > if (cea_db_is_vcdb(db)) > dr

Re: [v10 12/12] drm/i915: Add state readout for DRM infoframe

2019-05-15 Thread Ville Syrjälä
E_CONF_CHECK_INFOFRAME(spd); > PIPE_CONF_CHECK_INFOFRAME(hdmi); > + PIPE_CONF_CHECK_INFOFRAME(drm); > > #undef PIPE_CONF_CHECK_X > #undef PIPE_CONF_CHECK_I > -- > 1.9.1 -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v10 09/12] drm/i915:Enabled Modeset when HDR Infoframe changes

2019-05-15 Thread Ville Syrjälä
On Tue, May 14, 2019 at 11:06:31PM +0530, Uma Shankar wrote: > This patch enables modeset whenever HDR metadata > needs to be updated to sink. > > v2: Addressed Shashank's review comments. > > v3: Added Shashank's RB. > > v4: Addressed Ville's review comments. > >

Re: [v10 04/12] drm: Enable HDR infoframe support

2019-05-15 Thread Ville Syrjälä
es > into one. > > v8: Addressed Jonas Karlman review comments. > > v9: Addressed Jonas Karlman review comments. > > Signed-off-by: Uma Shankar > Signed-off-by: Ville Syrjälä > Reviewed-by: Shashank Sharma > --- > drivers/gpu/drm/drm_edid.c | 43 +++ >

Re: [v10 01/12] drm: Add HDR source metadata property

2019-05-15 Thread Ville Syrjälä
void *buffer, size_t size); > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h > index 83cd163..997a7e0 100644 > --- a/include/uapi/drm/drm_mode.h > +++ b/include/uapi/drm/drm_mode.h > @@ -630,6 +630,29 @@ struct drm_color_lut { >

Re: [v9 04/13] drm: Enable HDR infoframe support

2019-05-14 Thread Ville Syrjälä
t; > > > v6: Fixed checkpatch warnings with --strict option. Addressed > > Shashank's review comments and added his RB. > > > > v7: Addressed Brian Starkey's review comments. Merged 2 patches > > into one. > > > > v8: Addressed Jonas

Re: [v9 03/13] drm: Parse HDR metadata info from EDID

2019-05-14 Thread Ville Syrjälä
On Tue, May 14, 2019 at 09:49:03AM +, Shankar, Uma wrote: > > > >-Original Message----- > >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > >Sent: Tuesday, May 14, 2019 12:49 AM > >To: Shankar, Uma > >Cc: intel-...@lists.freedesktop.

Re: [Intel-gfx] [v9 13/13] drm/i915: Add state readout for DRM infoframe

2019-05-13 Thread Ville Syrjälä
pipe_config, > + HDMI_INFOFRAME_TYPE_DRM, > + _config->infoframes.drm); Dead code. > } > > static void intel_enable_hdmi_audio(struct intel_encoder *encoder, > -- > 1.9

Re: [v9 12/13] video/hdmi: Add Unpack function for DRM infoframe

2019-05-13 Thread Ville Syrjälä
On Thu, May 09, 2019 at 12:08:52AM +0530, Uma Shankar wrote: > Added unpack function for DRM infoframe for dynamic > range and mastering infoframe readout. > > Suggested-by: Ville Syrjälä > Signed-off-by: Uma Shankar > --- > driv

Re: [v9 08/13] drm/i915: Enable infoframes on GLK+ for HDR

2019-05-13 Thread Ville Syrjälä
On Thu, May 09, 2019 at 12:08:48AM +0530, Uma Shankar wrote: > From: Ville Syrjälä > > This patch enables infoframes on GLK+ to be > used to send HDR metadata to HDMI sink. > > v2: Addressed Shashank's review comment. > > v3: Addressed Shashank's review comment. >

Re: [v9 10/13] drm/i915: Set Infoframe for non modeset case for HDR

2019-05-13 Thread Ville Syrjälä
| > VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW | > -- > 1.9.1 > > ___ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v9 06/13] drm/i915: Write HDR infoframe and send to panel

2019-05-13 Thread Ville Syrjälä
el_hdmi_compute_drm_infoframe(encoder, pipe_config, > + conn_state)) { > + DRM_DEBUG_KMS("bad DRM infoframe\n"); > + return -EINVAL; > + } > + } > + > return 0; > } > > -- > 1.9.1 > > ___ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [v9 03/13] drm: Parse HDR metadata info from EDID

2019-05-13 Thread Ville Syrjälä
or, const u8 *db) > { > @@ -4461,6 +4511,8 @@ static void drm_parse_cea_ext(struct drm_connector > *connector, > drm_parse_y420cmdb_bitmap(connector, db); > if (cea_db_is_vcdb(db)) > drm_parse_vcdb(connector, db); > +

Re: [PATCH v2 4/6] drm/fourcc: Pass the format_info pointer to drm_format_plane_cpp

2019-05-13 Thread Ville Syrjälä
On Sun, May 12, 2019 at 07:30:54PM +0200, Maxime Ripard wrote: > Hi Ville, > > On Fri, May 10, 2019 at 07:00:31PM +0300, Ville Syrjälä wrote: > > On Fri, May 10, 2019 at 01:08:49PM +0200, Maxime Ripard wrote: > > > So far, the drm_format_plane_cpp function was o

Re: [PATCH v2 4/6] drm/fourcc: Pass the format_info pointer to drm_format_plane_cpp

2019-05-10 Thread Ville Syrjälä
tter pattern and remove the extra lookup while being a > bit more consistent. In order to be extra consistent, also rename that > function to drm_format_info_plane_cpp and to a static function in the > header to match the current policy. Is there any point keeping the function at all? It's just

Re: [PATCH v6 5/6] drm/i915/dp: Change a link bandwidth computation for DP

2019-05-08 Thread Ville Syrjälä
.DB17. > Add a setting of dynamic range bit to vsc_sdp.DB17. > Change Content Type bit to "Graphics" from "Not defined". > Change a dividing of pipe_bpp to muliplying to constant values on a > switch-case statement. > > Cc: Ville Syrjälä > Signed-off-by:

Re: [PATCH v6 3/6] drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format

2019-05-08 Thread Ville Syrjälä
tel_dp_get_m_n(struct intel_crtc *crtc, > struct intel_crtc_state *pipe_config); > void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state, > enum link_m_n_set m_n); > +void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp, > +

Re: [PATCH v6 2/6] drm: Add a VSC structure for handling Pixel Encoding/Colorimetry Formats

2019-05-08 Thread Ville Syrjälä
*/ > + u8 DB18; /* Content Type */ > + u8 DB19_31[13]; /* Reserved */ > +} __packed; Isn't this the same thing we have for edp already? Just rename the edp struct and add the missing stuff? > + > #define EDP_VSC_PSR_STATE_ACTIVE (1<<0) > #define EDP_VS

Re: [v8 01/10] drm: Add HDR source metadata property

2019-05-07 Thread Ville Syrjälä
On Tue, May 07, 2019 at 01:25:42PM +0300, Ville Syrjälä wrote: > On Tue, May 07, 2019 at 09:03:45AM +, Shankar, Uma wrote: > > > > > > >-Original Message- > > >From: Jonas Karlman [mailto:jo...@kwiboo.se] > > >Sent: Saturday, May 4,

Re: [v8 01/10] drm: Add HDR source metadata property

2019-05-07 Thread Ville Syrjälä
x, y; > + } white_point; > + __u16 max_display_mastering_luminance; > + __u16 min_display_mastering_luminance; > + __u16 max_cll; > + __u16 max_fall; > +}; > + > +struct hdr_output_metadata { > + __u32 metadata_type; > + uni

Re: [v8 08/10] drm/i915:Enabled Modeset when HDR Infoframe changes

2019-05-07 Thread Ville Syrjälä
On Tue, Apr 09, 2019 at 10:14:42PM +0530, Uma Shankar wrote: > This patch enables modeset whenever HDR metadata > needs to be updated to sink. > > v2: Addressed Shashank's review comments. > > v3: Added Shashank's RB. > > Signed-off-by: Ville Syrjälä > Signed-off-

Re: [v8 01/10] drm: Add HDR source metadata property

2019-05-07 Thread Ville Syrjälä
861.G spec */ > >> +struct hdr_static_metadata { > >> + __u8 eotf; > >> + __u8 metadata_type; > >> + __u16 max_cll; > >> + __u16 max_fall; > >> + __u16 min_cll; > >> +}; > >> + > >> +struct hdr_sin

Re: [PATCH] drm/atomic-helper: Bump vblank timeout to 100 ms

2019-04-30 Thread Ville Syrjälä
d duration, but it's generally indicative of a programming error of some sort, so as long as it's long enough I think we're good. Reviewed-by: Ville Syrjälä > > WARN(!ret, "[CRTC:%d:%s] vblank wait timed out\n", >crtc->base.id,

Re: [PATCH 2/3] drm/dp_mst: Expose build_mst_prop_path()

2019-04-24 Thread Ville Syrjälä
an aux struct > that they've initialized. I'm not sure how I can reliably get the > drm_connector from that. On i915 the aux is a child of the connector, so no extra attributes/links needed. Maybe other drivers should/could follow that apporach as well? -- Ville Syrjälä In

Re: [PATCH 1/3] drm/dp: Use non-cyclic idr

2019-04-23 Thread Ville Syrjälä
-by: Leo Li I don't recall any specific reason for the cyclic variant, so Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/drm_dp_aux_dev.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/drm_dp_aux_dev.c > b/drivers/gpu/drm/drm_dp_au

Re: [PATCH 2/3] drm/dp_mst: Expose build_mst_prop_path()

2019-04-23 Thread Ville Syrjälä
opology.o and drm_dp_aux_dev.o both end up in drm_kms_helper.ko, so the answer is no. Reviewed-by: Ville Syrjälä > @@ -1202,7 +1202,7 @@ static void drm_dp_add_port(struct drm_dp_mst_branch > *mstb, > if (created && !port->input) { > char prop

Re: [v3 0/7] Add Multi Segment Gamma Support

2019-04-18 Thread Ville Syrjälä
On Thu, Apr 18, 2019 at 09:13:04AM +0200, Daniel Vetter wrote: > On Wed, Apr 17, 2019 at 02:57:31PM +0300, Ville Syrjälä wrote: > > On Wed, Apr 17, 2019 at 09:28:19AM +0200, Daniel Vetter wrote: > > > On Fri, Apr 12, 2019 at 03:50:56PM +0530, Uma Shankar wrote: > > >

Re: [PULL] drm-intel-next

2019-04-18 Thread Ville Syrjälä
On Thu, Apr 18, 2019 at 11:04:26AM +0300, Joonas Lahtinen wrote: > - Suppress spurious combo PHY B warning (Vile) That's putting it a bit strong :) -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org ht

Re: [PATCH 2/2] drm/dp_mst: Register aux-dev nodes for MST ports

2019-04-17 Thread Ville Syrjälä
On Tue, Apr 16, 2019 at 06:22:33PM -0400, Lyude Paul wrote: > On Fri, 2019-04-12 at 12:05 -0400, sunpeng...@amd.com wrote: > > From: Ville Syrjälä > > > > Expose AUX devices for MST ports, similar to how they are exposed for > > SST. > > > > The registe

Re: [v3 0/7] Add Multi Segment Gamma Support

2019-04-17 Thread Ville Syrjälä
s for Multi Segmented gamma > > drm/i915/icl: Add support for multi segmented gamma mode > > drm/i915: Attach gamma mode property > > drm: Add Client Cap for advance gamma mode > > drm/i915: Enable advance gamma mode > > > > Ville Syrjälä (2): > > dr

Re: [RFC 0/2] Add AUX device entries for DP MST devices

2019-04-16 Thread Ville Syrjälä
m not sure if > there's a better way of handling this besides exposing all the > downstream ports: If it works, great. If not, just don't use it? Yeah, I think that's fine. It's really meant for debugging anyway so doesn't really matter if we expose something that's not guaranteed to work.

Re: [Intel-gfx] [v3 6/7] drm: Add Client Cap for advance gamma mode

2019-04-16 Thread Ville Syrjälä
> > > > > > > fre 2019-04-12 klockan 15:51 +0530 skrev Uma Shankar: > > > > > Introduced a client cap for advance cap mode > > > > > capability. Userspace should set this to get > > > > > to be able to use the new gamma_mode property. >

Re: [Intel-gfx] [v3 6/7] drm: Add Client Cap for advance gamma mode

2019-04-15 Thread Ville Syrjälä
w gamma_mode property. > > > > If this is not set, driver will work in legacy > > mode. > > > > Suggested-by: Ville Syrjälä > > Signed-off-by: Uma Shankar > > Nack, this doesn't seem like a sensible idea. We already guard it > behind the gamma mode property. Userspace sho

Re: [PATCH v1] drm: Do not allow to set NOFB for active primary plane

2019-04-15 Thread Ville Syrjälä
>fb->base.id, plane->base.id, plane->name, > -- > 2.17.1 > > ___ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 1/2] drm/fimd: use DRM_ERROR instead of DRM_INFO in error case

2019-04-15 Thread Ville Syrjälä
return -EINVAL; > } > > -- > 2.7.4 > > ___ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [RFC 0/2] Add AUX device entries for DP MST devices

2019-04-12 Thread Ville Syrjälä
gt; drm/dp_mst: Use non-cyclic idr, add suffix option for aux device > > Ville Syrjälä (1): > drm/dp_mst: Register aux-dev nodes for MST ports > > drivers/gpu/drm/drm_crtc_helper_internal.h | 5 +- > drivers/gpu/drm/drm_dp_aux_dev.c | 21 -- > drivers/gpu/

Re: [Intel-gfx] [v2 0/7] Add Multi Segment Gamma Support

2019-04-10 Thread Ville Syrjälä
On Wed, Apr 10, 2019 at 01:20:44PM +, Shankar, Uma wrote: > > > >-Original Message- > >From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf > >Of Ville > >Syrjälä > >Sent: Monday, April 8, 2019 9:38 PM > >To: Shankar,

Re: [PATCH] drm/gma500: Add CedarView LVDS blacklist

2019-04-10 Thread Ville Syrjälä
sequences. Is > > >>> there perhaps a better dmi string to match against? > > >> > > >> No there are no better DMI strings to match against I'm afraid. > > > > > > I did load default settings in BIOS setup

Re: [Intel-gfx] colorkey support for intel i915 gpu driver

2019-04-09 Thread Ville Syrjälä
ge- > From: Jim Zhang > Sent: Tuesday, April 9, 2019 10:18 AM > To: 'Ville Syrjälä' > Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org > Subject: RE: [Intel-gfx] colorkey support for intel i915 gpu driver > > If I go with pre-configured colorkey, do I

Re: [Intel-gfx] colorkey support for intel i915 gpu driver

2019-04-09 Thread Ville Syrjälä
interrupt > and change colorkey. That performance affection could be acceptable Interrupts don't matter for this. > > Thanks > > Jim > > Caterpillar: Confidential Green > > -Original Message- > From: Ville Syrjälä > Sent: Tuesday, April 9,

Re: [Intel-gfx] colorkey support for intel i915 gpu driver

2019-04-09 Thread Ville Syrjälä
gt; > > Caterpillar: Confidential Green > > -----Original Message- > From: Ville Syrjälä > Sent: Tuesday, April 9, 2019 8:57 AM > To: Jim Zhang > Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org > Subject: Re: [Intel-gfx] colorkey support for intel i9

Re: [Intel-gfx] colorkey support for intel i915 gpu driver

2019-04-09 Thread Ville Syrjälä
> > Caterpillar: Confidential Green > > -Original Message- > From: Ville Syrjälä > Sent: Tuesday, April 9, 2019 8:57 AM > To: Jim Zhang > Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org > Subject: Re: [Intel-gfx] colorkey support for in

Re: [Intel-gfx] colorkey support for intel i915 gpu driver

2019-04-09 Thread Ville Syrjälä
On Tue, Apr 09, 2019 at 04:46:24PM +0300, Ville Syrjälä wrote: > On Tue, Apr 09, 2019 at 01:29:41PM +, Jim Zhang wrote: > > Villie: > > > > What is Intel's plan for the colorkey patch? Does Intel have any plan to > > review and release? > > There is no r

Re: colorkey support for intel i915 gpu driver

2019-04-09 Thread Ville Syrjälä
eone reviews it :) > If I go with custom ioctl, and my custom ioctl will only used in Baytrail > product, could it be atomic for Baytrail only? No. We would need to define a new api for it. > > Thanks, > > Jim > > > Caterpillar: Confidential Green > > -----Origina

Re: [Intel-gfx] [v2 0/7] Add Multi Segment Gamma Support

2019-04-08 Thread Ville Syrjälä
On Mon, Apr 08, 2019 at 03:59:51PM +, Shankar, Uma wrote: > > > >-Original Message- > >From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf > >Of Ville > >Syrjälä > >Sent: Monday, April 8, 2019 9:15 PM > >To: Shankar,

Re: [Intel-gfx] [v2 0/7] Add Multi Segment Gamma Support

2019-04-08 Thread Ville Syrjälä
On Mon, Apr 08, 2019 at 03:40:39PM +, Shankar, Uma wrote: > > > >-Original Message----- > >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > >Sent: Monday, April 8, 2019 8:27 PM > >To: Shankar, Uma > >Cc: dcasta...@chromium.org; intel-.

Re: [Intel-gfx] [v2 0/7] Add Multi Segment Gamma Support

2019-04-08 Thread Ville Syrjälä
On Mon, Apr 08, 2019 at 02:40:51PM +, Shankar, Uma wrote: > > > >-Original Message----- > >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > >Sent: Monday, April 8, 2019 6:01 PM > >To: Shankar, Uma > >Cc: dcasta...@chromium.org; intel-.

Re: [Intel-gfx] [v2 0/7] Add Multi Segment Gamma Support

2019-04-08 Thread Ville Syrjälä
On Mon, Apr 08, 2019 at 12:26:23PM +, Shankar, Uma wrote: > > > >-Original Message- > >From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf > >Of Ville > >Syrjälä > >Sent: Friday, April 5, 2019 9:42 PM > >To: Shankar,

Re: [Intel-gfx] [v2 5/7] drm/i915/icl: Add support for multi segmented gamma mode

2019-04-08 Thread Ville Syrjälä
gamma_mode |= PRE_CSC_GAMMA_ENABLE; > > @@ -1048,6 +1200,9 @@ static u32 icl_gamma_mode(const struct intel_crtc_state > *crtc_state) > if (!crtc_state->base.gamma_lut || > crtc_state_is_legacy_gamma(crtc_state)) > gamma_mode |= GAMMA_MODE_MODE_8BIT; >

Re: [v2 2/7] drm/i915: Define color lut range structure

2019-04-08 Thread Ville Syrjälä
On Mon, Apr 01, 2019 at 11:00:06PM +0530, Uma Shankar wrote: > From: Ville Syrjälä > > This defines the color lut ranges for 10bit and multi > segmented gamma range for ICL. > > Signed-off-by: Ville Syrjälä > Signed-off-by: Uma Shankar > --- > drivers/gpu/d

Re: [Intel-gfx] [v2 0/7] Add Multi Segment Gamma Support

2019-04-05 Thread Ville Syrjälä
l: Add support for multi segmented gamma mode > drm/i915: Add gamma mode caps property > drm/i915: Attach gamma mode property > > Ville Syrjälä (2): > drm: Add gamma mode caps property > drm/i915: Define color lut range structure > > drivers/gpu/drm/drm_atomic_uapi

Re: Assistance with a problem related to GEM and Atomic Commit inside vkms

2019-04-05 Thread Ville Syrjälä
+0.03] do_syscall_64+0x5b/0x170 > [ +0.03] entry_SYSCALL_64_after_hwframe+0x44/0xa9 > [ +0.02] RIP: 0033:0x7f286677580b > [ +0.01] Code: 0f 1e fa 48 8b 05 55 b6 0c 00 64 c7 00 26 00 00 00 48 c7 > c0 ff > > Notice that Vaddr became NULL for some reason that I cannot understand. Just missing the .prepare_writeback_job() hook? -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 5/8] drm: rcar-du: Implement interfaces to set clu and lut using drm data structures

2019-04-04 Thread Ville Syrjälä
ctm->matrix[0], ctm->matrix[1], > > +ctm->matrix[2]); > > + > > + g_val = rcar_du_cmm_scalar_product > > + (r, g, b, > > +

Re: [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-03 Thread Ville Syrjälä
On Wed, Apr 03, 2019 at 12:07:35PM -0700, Manasi Navare wrote: > On Wed, Apr 03, 2019 at 09:55:56PM +0300, Ville Syrjälä wrote: > > On Wed, Apr 03, 2019 at 11:37:21AM -0700, Manasi Navare wrote: > > > On Wed, Apr 03, 2019 at 03:14:51PM +0300, Ville Syrjälä wrote: > > > &

Re: [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-03 Thread Ville Syrjälä
On Wed, Apr 03, 2019 at 11:37:21AM -0700, Manasi Navare wrote: > On Wed, Apr 03, 2019 at 03:14:51PM +0300, Ville Syrjälä wrote: > > On Tue, Apr 02, 2019 at 02:52:34PM -0700, Manasi Navare wrote: > > > For certain eDP 1.4 panels, we need to use max lane count for the > > &g

Re: [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

2019-04-03 Thread Ville Syrjälä
e lane count + rate combo works. > > Cc: Clint Taylor > Cc: Ville Syrjälä > Tested-by: Albert Astals Cid > Tested-by: Emanuele Panigati > Tested-by: Ralgor > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 > Signed-off-by: Manasi Navare > --- > dri

Re: [PATCH v2 1/5] drm: Add helpers to kick off self refresh mode in drivers

2019-04-02 Thread Ville Syrjälä
plicate sr state into connectors, since it's all > > > > > fairly explit already in all three state transitions. > > > > > > > > To be fair, only one of these is exclusive to asymmetry, and it's the > > > > one that > > >

Re: colorkey support for intel i915 gpu driver

2019-04-02 Thread Ville Syrjälä
a generic property based API that never really went anywhere. It's a rather difficult problem making this generic as each hardware has its own peculiar way of specifying colorkeying. The main problem with the custom ioctl is that it's not atomic with other screen updates. So, what k

Re: [PATCH] drm/gamma: Clarify gamma lut uapi

2019-03-29 Thread Ville Syrjälä
fect > rounding of 0x. > > Cc: Uma Shankar > Cc: Ville Syrjälä > Cc: Shashank Sharma > Cc: "Kumar, Kiran S" > Cc: Kausal Malladi > Cc: Lionel Landwerlin > Cc: Matt Roper > Cc: Rob Bradford > Cc: Daniel Stone > Cc: Stefan Schake > Cc: Eric

Re: [v6 12/13] drm/i915: Set Infoframe for non modeset case for HDR

2019-03-29 Thread Ville Syrjälä
> > _______ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 07/11] drm/fbdevdrm: Add DRM <-> fbdev pixel-format conversion

2019-03-27 Thread Ville Syrjälä
On Wed, Mar 27, 2019 at 09:28:49AM +0100, Thomas Zimmermann wrote: > Hi > > Am 26.03.19 um 17:29 schrieb Ville Syrjälä: > >> + > >> +static bool is_c8(const struct fb_info* fb_info) > >> +{ > >> + return fb_info->var.bits_per_pixel == 8; > >&

Re: [PATCH 11/11] drm/fbdevdrm: Detect and validate display modes

2019-03-26 Thread Ville Syrjälä
gt;fb_info); > + if (!ret) > + ++num_modes; > + } > + > + if (!num_modes) { > + > + /* DRM backporting notes: we go through all modes in the > + * fb_info's mode list and convert each to a DRM modes. If > + * you convert an fbdev driver to DRM, replace this code > + * with an actual hardware query. This will usually involve > + * reading the monitor EDID via DDC. > + */ > + > + list_for_each(pos, >fb_info->modelist) { fbdev has a modelist? I guess it does. But not exposed to userspace, which is probably the reason I never realized this. -- Ville Syrjälä Intel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 07/11] drm/fbdevdrm: Add DRM <-> fbdev pixel-format conversion

2019-03-26 Thread Ville Syrjälä
o) > +{ > + return (fb_info->var.bits_per_pixel == 16) && > +(fb_info->var.red.offset == 0) && > +(fb_info->var.red.length == 5) && > +(fb_info->var.green.offset == 5) && >

Re: [PATCH] drm/doc: Drop "content type" from the legacy kms property table

2019-03-26 Thread Ville Syrjälä
> Cc: Hans Verkuil > Cc: Daniel Vetter > Cc: Stanislav Lisovskiy > Cc: Ville Syrjälä > Signed-off-by: Daniel Vetter Reviewed-by: Ville Syrjälä > --- > Documentation/gpu/kms-properties.csv | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/Documentation/gp

Re: [RFC PATCH 18/20] lib: image-formats: Add v4l2 formats support

2019-03-22 Thread Ville Syrjälä
On Fri, Mar 22, 2019 at 02:24:29PM -0400, Nicolas Dufresne wrote: > Le jeudi 21 mars 2019 à 23:44 +0200, Ville Syrjälä a écrit : > > On Thu, Mar 21, 2019 at 03:14:06PM -0400, Nicolas Dufresne wrote: > > > Le jeudi 21 mars 2019 à 18:35 +0200, Ville Syrjälä a écrit : > > >

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