-by: Rodrigo Vivi
Acked-by: Ivan Briano
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 16 --
.../gpu/drm/i915/gem/i915_gem_context_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_context_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_rps.c | 4
as per review suggestions (Rodrigo, Tvrtko).
Also, use flag bits in intel_context as it allows finer control for
toggling per engine if needed (Tvrtko).
v3: Minor review comments (Tvrtko)
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: Sushma Venkatesh Reddy
Acked-by: Rodrigo Vivi
Signed-off-by: Vinay
as per review suggestions (Rodrigo, Tvrtko).
Also, use flag bits in intel_context as it allows finer control for
toggling per engine if needed (Tvrtko).
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: Sushma Venkatesh Reddy
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gem
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 8 +++
.../gpu/drm/i915/gem/i915_gem_context_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_rps.c | 8 +++
.../drm/i915/gt/uc/abi/guc_actions_slpc_abi.h | 21 +++
drivers/gpu/drm/i915
an official WA soon so adding a FIXME in the comments.
v2: Make the new ranges watertight to address BAT failures and update
commit message (Matt R).
Reviewed-by: Matt Roper
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/intel_uncore.c | 5 -
1 file changed, 4 insertions(+), 1 deletion
form sleep states and a H2G is triggered. A forcewake
ensures those sleep states have been fully exited and further
processing occurs as expected.
This will have an official WA soon so adding a FIXME in the comments.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/intel_uncore.c | 5 +++
We read RENDER_HEAD as a part of the flush. If GT is in
deeper sleep states, this could lead to read errors since we are
not using a forcewake. Safer to read a shadowed register instead.
Cc: John Harrison
Cc: Daniele Ceraolo Spurio
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt
tions")
Suggested-by: Alan Previn
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 7090e4be29cb..58dc0dab9
-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index ba4c2422b340..86a04afff64b 100644
--- a/drivers/gpu/drm/i915/gt
This bit does not cause an explicit L3 flush. We already use
PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
Cc: Nirmoy Das
Cc: Mikka Kuoppala
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
://github.com/XinfengZhang/libva/commit/3d90d18c67609a73121bb71b20ee4776b54b61a7
Cc: Rodrigo Vivi
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 9 ++---
drivers/gpu/drm/i915/i915_request.c | 3 ++-
drivers/gpu/drm/i915/i915_request.h | 1 +
include
("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 22 +
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
/drm/intel/-/issues/8736
Fixes: 55f9720dbf23 ("drm/i915/guc/slpc: Provide sysfs for efficient freq")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_s
GuC load takes longer sometimes due to GT frequency not ramping up.
Add perf_limit_reasons to the existing warn print to see if frequency
is being throttled.
v2: Review comments (Ashutosh)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 8 +---
1 file
GuC load takes longer sometimes due to GT frequency not ramping up.
Add perf_limit_reasons to the existing warn print to see if frequency
is being throttled.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
ld restore the cached
min freq (via H2G) for it to take effect.
v2: Clarify commit message (Ashutosh)
Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Reviewed-by: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_s
c: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index
://gitlab.freedesktop.org/drm/intel/-/issues/7632
Reviewed-by: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 5 -
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 ++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt
rps_boost debugfs shows host turbo related info. This is not valid
when SLPC is enabled. guc_slpc_info already shows the number of boosts.
Add num_waiters there as well and disable rps_boost when SLPC is
enabled.
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7632
Signed-off-by: Vinay
Use the new efficient frequency toggling interface. Also
create a helper function to restore the frequencies after
the test is done.
v2: Restore max freq first and then min.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 42 ++---
1 file
gle efficient freq usage in SLPC selftest and checkpatch fixes
v5: Review comments (Andi) and add a separate patch for selftest updates
Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
Reviewed-by: Rodrigo Vivi
Reviewed-by: A
Use the new efficient frequency toggling interface. Also
create a helper function to restore the frequencies after
the test is done.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 42 ++---
1 file changed, 37 insertions(+), 5 deletions(-)
diff
gle efficient freq usage in SLPC selftest and checkpatch fixes
v5: Review comments (Andi) and add a separate patch for selftest updates
Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
Reviewed-by: Rodrigo Vivi
Reviewed-by: A
gle efficient freq usage in SLPC selftest and checkpatch fixes
Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
Reviewed-by: Rodrigo Vivi
Reviewed-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt_sysf
c: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 35 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 43 ++-
drivers/gpu/drm/i915/gt/uc/intel_guc_
it through this interface.
v2: Keep just one interface to toggle sysfs. With this, user will
be completely responsible for toggling efficient frequency if need
be. There will be no implicit disabling when user sets min < RP1 (Ashutosh)
Signed-off-by: Vinay Belgaumkar
Fixes: 95ccf312a1e4 ("drm/
it through this interface. Another way
to disable it is to set min frequency below the efficient level.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 35 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 49 ++-
drivers/gpu/drm/i915/gt/uc
Use hex format so that it is easier to decode.
Fixes: fe5979665f64 ('Add perf_limit_reasons in debugfs')
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt
like MTL.
Fixes: a8a4f0467d70 ("drm/i915: Fix CFI violations in gt_sysfs")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 47 +++--
1 file changed, 6 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sys
: Check softlimits instead of platform limits (Riana)
v3: More review comments (Ashutosh)
v4: No need to use saved_min_freq and other comments (Ashutosh)
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7030
Acked-by: Nirmoy Das
Reviewed-by: Riana Tauro
Signed-off-by: Vinay Belgaumkar
in the worker thread (Tvrtko)
v3: Check requested freq in dec_waiters as well
v4: Only check min_softlimit against boost_freq. Limit this
optimization for server parts for now.
v5: min_softlimit can be greater than boost (Ashutosh)
Reviewed-by: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers
in the worker thread (Tvrtko)
v3: Check requested freq in dec_waiters as well
v4: Only check min_softlimit against boost_freq. Limit this
optimization for server parts for now.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 8 +++-
1 file changed, 7 insertions(+), 1
thread (Tvrtko)
v3: Check requested freq in dec_waiters as well
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 3 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 14 +++---
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
thread (Tvrtko)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 3 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 7 ++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
b/drivers/gpu/drm/i915/gt/intel_rps.c
Waitboost (when SLPC is enabled) results in a H2G message. This can result
in thousands of messages during a stress test and fill up an already full
CTB. There is no need to request for RP0 if GuC is already requesting the
same.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt
: Check softlimits instead of platform limits (Riana)
v3: More review comments (Ashutosh)
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7030
Acked-by: Nirmoy Das
Reviewed-by: Riana Tauro
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 40
: Check softlimits instead of platform limits(Riana)
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7030
Acked-by: Nirmoy Das
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 40 +--
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 29
-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 40 +--
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 29 ++
.../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 3 ++
3 files changed, 60 insertions(+), 12 deletions(-)
diff --git a/drivers
Read the values stored in the SLPC structures. Remove the
fields that are no longer valid (like RPS interrupts) as
well.
v2: Move all functionality changes to this patch (Jani)
v3: Fix compile warning and if condition (Jani)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt
Move it to the RPS source file.
v2: Separate out code movement and functional changes (Jani)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 157 +
drivers/gpu/drm/i915/gt/intel_rps.c | 163 ++
drivers/gpu/drm/i915
Remove the RPS related information that is not valid when
SLPC is enabled.
v2: Add version numbers and address other comments (Jani)
v3: Fix compile warning
Signed-off-by: Vinay Belgaumkar
Vinay Belgaumkar (2):
drm/i915: Add a wrapper for frequency debugfs
drm/i915/slpc: Update
Read the values stored in the SLPC structures. Remove the
fields that are no longer valid (like RPS interrupts) as
well.
v2: Move all functionality changes to this patch (Jani)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 46 -
1 file
Move it to the RPS source file.
v2: Separate out code movement and functional changes (Jani)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 157 +
drivers/gpu/drm/i915/gt/intel_rps.c | 163 ++
drivers/gpu/drm/i915
Remove the RPS related information that is not valid when
SLPC is enabled.
v2: Add version numbers and address other comments (Jani)
Signed-off-by: Vinay Belgaumkar
Vinay Belgaumkar (2):
drm/i915: Add a wrapper for frequency debugfs
drm/i915/slpc: Update the frequency debugfs
drivers/gpu
Read the values stored in the SLPC structures. Remove the
fields that are no longer valid (like RPS interrupts) as
well.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/drivers/gpu/drm
Move it to the RPS source file.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 157 +---
drivers/gpu/drm/i915/gt/intel_rps.c | 169 ++
drivers/gpu/drm/i915/gt/intel_rps.h | 3 +
3 files changed, 173
Remove the RPS related information that is not valid when
SLPC is enabled.
Signed-off-by: Vinay Belgaumkar
Vinay Belgaumkar (2):
drm/i915: Add a wrapper for frequency debugfs
drm/i915/slpc: Update the frequency debugfs
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 157
Create a wrapper to print out the frequency debugfs for
SLPC and non-SLPC cases. Most of the RPS related information
is no longer valid when SLPC is enabled.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 157 +-
drivers/gpu/drm/i915/gt
it afterwards.
BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/5468
Cc: Rodrigo Vivi
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 7 ++-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 9 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 66
/4016
Bug: https://gitlab.freedesktop.org/drm/intel/issues/5468
Bug: https://gitlab.freedesktop.org/drm/intel/issues/5831
Cc: Rodrigo Vivi
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 15 +++
lib/igt_pm.h | 1 +
tests/i915/i915_pm_rps.c | 29
frequency usage enabled as expected.
v2: Address review comments (Rodrigo)
BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/5468
Cc: Rodrigo Vivi
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 7 ++-
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 66
frequency usage enabled as expected.
BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/5468
Cc: Rodrigo Vivi
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 3 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 66 +++--
drivers/gpu/drm/i915
/i915/guc/slpc: Cache platform frequency limits")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 52 -
1 file changed, 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_sl
live_rps_control is failing in BAT on a TGL. Increase the
time we wait for actual frequency to change, and see if this
is just a matter of slowness.
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/1759
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 3 ++-
1
r comments (Ashutosh)
Fixes commit 8ee2c227822e ("drm/i915/guc/slpc: Add SLPC selftest")
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 323
1 file changed, 155 insertions(+), 168 deletions(-)
diff --git a/dri
selftest")
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 324
1 file changed, 157 insertions(+), 167 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c
b/drivers/gpu/drm/i915/gt/selftest_slpc.
-blocking
H2G call instead, which returns as soon as the message is
successfully transmitted.
v2: Use drm_notice to report any errors that might occur while
sending the waitboost H2G request (Tvrtko)
v3: Add drm_notice inside force_min_freq (Ashutosh)
Cc: Ashutosh Dixit
Signed-off-by: Vinay
We have seen multiple RC6 issues where it is useful to know
which global forcewake bits are set. Add this to the 'drpc'
debugfs output.
v2: Review comments (Ashutosh)
Reviewed-by: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 8 ++--
1
We have seen multiple RC6 issues where it is useful to know
which global forcewake bits are set. Add this to the 'drpc'
debugfs output.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff
optimize the selftest by using a common run_test function to avoid
code duplication. Rename the "clamp" tests to vary_max_freq and vary_min_freq.
v2: Fix compile warning
Fixes 8ee2c227822e ("drm/i915/guc/slpc: Add SLPC selftest")
Signed-off-by: Vinay Belgaumkar
---
dri
optimize the selftest by using a common run_test function to avoid
code duplication. Rename the "clamp" tests to vary_max_freq and vary_min_freq.
Fixes 8ee2c227822e ("drm/i915/guc/slpc: Add SLPC selftest")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/s
-blocking
H2G call instead, which returns as soon as the message is
successfully transmitted.
v2: Use drm_notice to report any errors that might occur while
sending the waitboost H2G request (Tvrtko)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 44
To avoid false positives in error injection cases.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
index
-blocking
H2G call instead, which returns as soon as the message is
successfully transmitted.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 38 -
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc
This will ensure we don't have false positives when we run
error injection tests.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 42 ++---
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc
This will ensure correct values for Gen12+ platforms.
v2: Rebase
Cc: Matt Roper
Reviewed-by: Matt Roper
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc
SLPC unset param H2G only needs one parameter - the id of the
param.
Fixes: 025cb07bebfa ("drm/i915/guc/slpc: Cache platform frequency limits")
Suggested-by: Umesh Nerlige Ramappa
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 +-
1 file
This will ensure correct values for Gen12+ platforms.
Cc: Matt Roper
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt
/i915/guc/slpc: Add SLPC selftest)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 104
1 file changed, 52 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c
b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index
,
but we need to manually do that for the non-SLPC path.
We don't need a manual override in the SLPC disabled case, just
use the intel_rps_set function to ensure consistent RPS state.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 59
,
but we need to manually do that for the non-SLPC path.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 59 +++
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 9
drivers/gpu/drm/i915/i915_reg.h
to sleep
longer, aka race-to-idle. This is more evident at lower frequencies, so
let's look to bump the frequency if we think we will benefit by sleeping
longer at the higher frequency and so conserving power.
Signed-off-by: Chris Wilson
Cc: Vinay Belgaumkar
Cc: Tvrtko Ursulin
---
drivers/gpu/drm
the frequency low. Instead, when considering the
contribution, consider the contribution over the entire engine group
(capacity).
Signed-off-by: Chris Wilson
Cc: Vinay Belgaumkar
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_rps.c | 48 -
1 file changed, 34
of
the context's execution.
Signed-off-by: Chris Wilson
Cc: Vinay Belgaumkar
Cc: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 80 ---
1 file changed, 52 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/drivers/gpu/drm
evaluation to "race to idle" harder.
Cc: Tvrtko Ursulin
Cc: Vinay Belgaumkar
Signed-off-by: Chris Wilson
Chris Wilson (3):
drm/i915/gt: Spread virtual engines over idle engines
drm/i915/gt: Compare average group occupancy for RPS evaluation
drm/i915/gt: Improve "race-
It's possible that i915 might get wedged between a boost
and un-boost. Validate the i915-GuC connection before trying
to send a H2G to change the min frequency.
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/4464
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm
to guc_slpc_info and changes for worker function
v3: Review comments (Ashutosh)
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 47 +
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
which can boost freq from within
an interrupt context as well.
v3: No need to check against requested freq before scheduling boost
work (Ashutosh)
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 25 +
drivers/gpu/drm/i915/gt
context. Initialize the
worker function during SLPC init as well. Had to move intel_guc_slpc_init
a few lines below to accomodate this.
v2: Add a workqueue to handle waitboost
v3: Code review comments (Ashutosh)
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc
value as long as it is between [min, RP0].
v2: Add a worker thread to perform freq boost.
v3: Address comments (Ashutosh)
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
Vinay Belgaumkar (3):
drm/i915/guc/slpc: Define and initialize boost frequency
drm/i915/guc/slpc: Add waitboost
to guc_slpc_info and changes for worker function
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 47 +
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 29 +
drivers/gpu
context. Initialize the
worker function during SLPC init as well. Had to move intel_guc_slpc_init
a few lines below to accomodate this.
v2: Add a workqueue to handle waitboost
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 101
which can boost freq from within
an interrupt context as well.
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 26 +
drivers/gpu/drm/i915/gt/intel_rps.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 19
can
adjust it to any specific value as long as it is between [min, RP0].
v2: Add a worker thread to perform freq boost.
Cc: Ashutosh Dixit
Signed-off-by: Vinay Belgaumkar
Vinay Belgaumkar (3):
drm/i915/guc/slpc: Define and initialize boost frequency
drm/i915/guc/slpc: Add waitboost functionalit
Add a helper to sort through the SLPC/RPS cases of get/set methods.
Boost frequency will be modified as long as it is within the constraints
of RP0 and if it is different from the existing one. We will set min
freq to boost only if there is an active waiter.
Signed-off-by: Vinay Belgaumkar
Add helpers in RPS code for handling SLPC and non-SLPC cases.
When a boost is requested in the SLPC case, we can ask GuC to ramp
up the frequency by setting the minimum frequency to RP0. Reset the
frequency back to the min softlimit when there are no more waiters.
Signed-off-by: Vinay Belgaumkar
Boost frequency is initialized at RP0. Also define num_waiters
which can track the pending boost requests. This is set to 0 when
we enable SLPC.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 10 ++
drivers/gpu/drm/i915/gt/uc
to finish quickly. We achieve this on SLPC by setting the min frequency,
SLPC will set that as the requested frequency.
Like before, boost frequency is configurable through sysfs, so we can
adjust it to any specific value as long as it is between [min, RP0].
Signed-off-by: Vinay Belgaumk
Seeing these errors when GT is likely in suspend state-
"RPM wakelock ref not held during HW access"
Ensure GT is awake before trying to access HW registers. Avoid
reading the register if that is not the case.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel
Wajdeczko
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gt/intel_rc6.c | 47 +++
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 6 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.c| 1 +
drivers/gpu/drm/i915/gt/uc
.
v2: Address review comments (Michal W)
v3: Checkpatch() corrections
v4: Remove unnecessary header file (Matthew Brost)
v5: checkpatch() and define const for 50/3 (Matthew Brost)
Reviewed-by: Matthew Brost
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_rps.c | 1
/max SLPC functions. Also check for
boundary conditions before setting them.
v3: Address review comments (Michal W)
v4: Add helper for host part of intel_rps_set_freq helpers (Michal W)
v5: checkpatch()
Reviewed-by: Michal Wajdeczko
Acked-by: Michal Wajdeczko
Signed-off-by: Vinay Belgaumkar
Formatting (Michal W)
v4: Add separate function to parse rp values (Michal W)
v5: Perform range checking for set min/max (Michal W)
v6: checkpatch() and rename static functions (Michal W)
v7: check ret code while setting SLPC limits (Michal W)
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/
failure (Michal W)
v4: Move decode_min/max_freq to this patch
Reviewed-by: Michal Wajdeczko
Signed-off-by: Vinay Belgaumkar
Signed-off-by: Sundaresan Sujaritha
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 76 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 +
2 files
This interrupt is enabled during RPS initialization, and
now needs to be done by SLPC code. It allows ARAT timer
expiry interrupts to get forwarded to GuC.
v2: Fix comment (Matthew Brost)
v3: checkpatch()
Reviewed-by: Matthew Brost
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt
-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 89 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 +
2 files changed, 91 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index
function to intel_guc_slpc_print_info() (Michal W)
v5: checkpatch()
Reviewed-by: Michal Wajdeczko
Signed-off-by: Vinay Belgaumkar
Signed-off-by: Sundaresan Sujaritha
---
.../gpu/drm/i915/gt/uc/intel_guc_debugfs.c| 22 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 29
Allocate data structures for SLPC and functions for
initializing on host side.
v2: Address review comments (Michal W)
v3: Remove unnecessary header includes (Michal W)
v4: Rebase
v5: Move allocation of shared data into slpc_init() (Michal W)
Reviewed-by: Michal Wajdeczko
Signed-off-by: Vinay
-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index b6338742a594..48cbd800ca54 100644
--- a/drivers/gpu/drm/i915/gt/uc
)
v4: Optimize the stringify function and other comments (Michal W)
v5: Enable slpc as well before declaring GuC submission status (Michal W)
v6: Checkpatch()
Reviewed-by: Michal Wajdeczko
Signed-off-by: Vinay Belgaumkar
Signed-off-by: Sundaresan Sujaritha
---
drivers/gpu/drm/i915/gt/uc
1 - 100 of 179 matches
Mail list logo
