Re: [DPU PATCH] drm/msm: remove support for seamless modes
On Tue, Jun 12, 2018 at 05:49:03PM -0700, Abhinav Kumar wrote:
> Seamless modes are ones which do not require a display
> to be turned OFF/ON between mode switches.
>
> Remove support for seamless modes from DPU for now.
>
> This will be added later based on additional requirements.
>
> This change depends on the DPU custom property removal series:
> - https://patchwork.freedesktop.org/series/44592/
Pushed to dpu-staging/for-next, thanks
Sean
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 31
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 106
> +---
> drivers/gpu/drm/msm/msm_kms.h | 44
> include/uapi/drm/drm_mode.h | 1 -
> 4 files changed, 3 insertions(+), 179 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index 4616a62..9ca8325 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -591,22 +591,6 @@ static void dpu_crtc_destroy(struct drm_crtc *crtc)
> kfree(dpu_crtc);
> }
>
> -static bool dpu_crtc_mode_fixup(struct drm_crtc *crtc,
> - const struct drm_display_mode *mode,
> - struct drm_display_mode *adjusted_mode)
> -{
> - DPU_DEBUG("\n");
> -
> - if ((msm_is_mode_seamless(adjusted_mode) ||
> - msm_is_mode_seamless_vrr(adjusted_mode)) &&
> - (!crtc->enabled)) {
> - DPU_ERROR("crtc state prevents seamless transition\n");
> - return false;
> - }
> -
> - return true;
> -}
> -
> static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
> struct dpu_plane_state *pstate)
> {
> @@ -1728,12 +1712,6 @@ static void dpu_crtc_disable(struct drm_crtc *crtc)
> mode = >base.adjusted_mode;
> priv = crtc->dev->dev_private;
>
> - if (msm_is_mode_seamless(mode) || msm_is_mode_seamless_vrr(mode) ||
> - msm_is_mode_seamless_dms(mode)) {
> - DPU_DEBUG("Seamless mode is being applied, skip disable\n");
> - return;
> - }
> -
> DPU_DEBUG("crtc%d\n", crtc->base.id);
>
> if (dpu_kms_is_suspend_state(crtc->dev))
> @@ -1817,12 +1795,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
> DPU_EVT32_VERBOSE(DRMID(crtc));
> dpu_crtc = to_dpu_crtc(crtc);
>
> - if (msm_is_mode_seamless(>state->adjusted_mode) ||
> - msm_is_mode_seamless_vrr(>state->adjusted_mode)) {
> - DPU_DEBUG("Skipping crtc enable, seamless mode\n");
> - return;
> - }
> -
> drm_for_each_encoder(encoder, crtc->dev) {
> if (encoder->crtc != crtc)
> continue;
> @@ -1857,8 +1829,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
> DPU_POWER_EVENT_PRE_DISABLE,
> dpu_crtc_handle_power_event, crtc, dpu_crtc->name);
>
> - if (msm_needs_vblank_pre_modeset(>state->adjusted_mode))
> - drm_crtc_wait_one_vblank(crtc);
> }
>
> struct plane_state {
> @@ -2497,7 +2467,6 @@ static void dpu_crtc_early_unregister(struct drm_crtc
> *crtc)
> };
>
> static const struct drm_crtc_helper_funcs dpu_crtc_helper_funcs = {
> - .mode_fixup = dpu_crtc_mode_fixup,
> .disable = dpu_crtc_disable,
> .atomic_enable = dpu_crtc_enable,
> .atomic_check = dpu_crtc_atomic_check,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 7dd609c..11a1045 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -96,15 +96,6 @@
> * IDLE is expected when IDLE_PC has run, and PRE_OFF did nothing.
> * PRE_OFF is expected when PRE_STOP was executed during the ON state.
> * Resource state should be in OFF at the end of the event.
> - * @DPU_ENC_RC_EVENT_PRE_MODESET:
> - * This event happens at NORMAL priority from a work item.
> - * Event signals that there is a seamless mode switch is in prgoress. A
> - * client needs to turn of only irq - leave clocks ON to reduce the mode
> - * switch latency.
> - * @DPU_ENC_RC_EVENT_POST_MODESET:
> - * This event happens at NORMAL priority from a work item.
> - * Event signals that seamless mode switch is complete and resources are
> - * acquired. Clients wants to turn on the irq again.
> * @DPU_ENC_RC_EVENT_ENTER_IDLE:
> * This event happens at NORMAL priority from a work item.
> * Event signals that there were no frame updates for IDLE_TIMEOUT time.
> @@ -116,8 +107,6 @@ enum dpu_enc_rc_events {
> DPU_ENC_RC_EVENT_FRAME_DONE,
> DPU_ENC_RC_EVENT_PRE_STOP,
> DPU_ENC_RC_EVENT_STOP,
> - DPU_ENC_RC_EVENT_PRE_MODESET,
> - DPU_ENC_RC_EVENT_POST_MODESET,
> DPU_ENC_RC_EVENT_ENTER_IDLE
> };
>
> @@ -133,7 +122,6 @@ enum dpu_enc_rc_states {
> DPU_ENC_RC_STATE_OFF,
>
[DPU PATCH] drm/msm: remove support for seamless modes
Seamless modes are ones which do not require a display
to be turned OFF/ON between mode switches.
Remove support for seamless modes from DPU for now.
This will be added later based on additional requirements.
This change depends on the DPU custom property removal series:
- https://patchwork.freedesktop.org/series/44592/
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 31
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 106 +---
drivers/gpu/drm/msm/msm_kms.h | 44
include/uapi/drm/drm_mode.h | 1 -
4 files changed, 3 insertions(+), 179 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 4616a62..9ca8325 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -591,22 +591,6 @@ static void dpu_crtc_destroy(struct drm_crtc *crtc)
kfree(dpu_crtc);
}
-static bool dpu_crtc_mode_fixup(struct drm_crtc *crtc,
- const struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
-{
- DPU_DEBUG("\n");
-
- if ((msm_is_mode_seamless(adjusted_mode) ||
- msm_is_mode_seamless_vrr(adjusted_mode)) &&
- (!crtc->enabled)) {
- DPU_ERROR("crtc state prevents seamless transition\n");
- return false;
- }
-
- return true;
-}
-
static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
struct dpu_plane_state *pstate)
{
@@ -1728,12 +1712,6 @@ static void dpu_crtc_disable(struct drm_crtc *crtc)
mode = >base.adjusted_mode;
priv = crtc->dev->dev_private;
- if (msm_is_mode_seamless(mode) || msm_is_mode_seamless_vrr(mode) ||
- msm_is_mode_seamless_dms(mode)) {
- DPU_DEBUG("Seamless mode is being applied, skip disable\n");
- return;
- }
-
DPU_DEBUG("crtc%d\n", crtc->base.id);
if (dpu_kms_is_suspend_state(crtc->dev))
@@ -1817,12 +1795,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
DPU_EVT32_VERBOSE(DRMID(crtc));
dpu_crtc = to_dpu_crtc(crtc);
- if (msm_is_mode_seamless(>state->adjusted_mode) ||
- msm_is_mode_seamless_vrr(>state->adjusted_mode)) {
- DPU_DEBUG("Skipping crtc enable, seamless mode\n");
- return;
- }
-
drm_for_each_encoder(encoder, crtc->dev) {
if (encoder->crtc != crtc)
continue;
@@ -1857,8 +1829,6 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
DPU_POWER_EVENT_PRE_DISABLE,
dpu_crtc_handle_power_event, crtc, dpu_crtc->name);
- if (msm_needs_vblank_pre_modeset(>state->adjusted_mode))
- drm_crtc_wait_one_vblank(crtc);
}
struct plane_state {
@@ -2497,7 +2467,6 @@ static void dpu_crtc_early_unregister(struct drm_crtc
*crtc)
};
static const struct drm_crtc_helper_funcs dpu_crtc_helper_funcs = {
- .mode_fixup = dpu_crtc_mode_fixup,
.disable = dpu_crtc_disable,
.atomic_enable = dpu_crtc_enable,
.atomic_check = dpu_crtc_atomic_check,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 7dd609c..11a1045 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -96,15 +96,6 @@
* IDLE is expected when IDLE_PC has run, and PRE_OFF did nothing.
* PRE_OFF is expected when PRE_STOP was executed during the ON state.
* Resource state should be in OFF at the end of the event.
- * @DPU_ENC_RC_EVENT_PRE_MODESET:
- * This event happens at NORMAL priority from a work item.
- * Event signals that there is a seamless mode switch is in prgoress. A
- * client needs to turn of only irq - leave clocks ON to reduce the mode
- * switch latency.
- * @DPU_ENC_RC_EVENT_POST_MODESET:
- * This event happens at NORMAL priority from a work item.
- * Event signals that seamless mode switch is complete and resources are
- * acquired. Clients wants to turn on the irq again.
* @DPU_ENC_RC_EVENT_ENTER_IDLE:
* This event happens at NORMAL priority from a work item.
* Event signals that there were no frame updates for IDLE_TIMEOUT time.
@@ -116,8 +107,6 @@ enum dpu_enc_rc_events {
DPU_ENC_RC_EVENT_FRAME_DONE,
DPU_ENC_RC_EVENT_PRE_STOP,
DPU_ENC_RC_EVENT_STOP,
- DPU_ENC_RC_EVENT_PRE_MODESET,
- DPU_ENC_RC_EVENT_POST_MODESET,
DPU_ENC_RC_EVENT_ENTER_IDLE
};
@@ -133,7 +122,6 @@ enum dpu_enc_rc_states {
DPU_ENC_RC_STATE_OFF,
DPU_ENC_RC_STATE_PRE_OFF,
DPU_ENC_RC_STATE_ON,
- DPU_ENC_RC_STATE_MODESET,
DPU_ENC_RC_STATE_IDLE
};
@@ -809,7 +797,6 @@ static int dpu_encoder_resource_control(struct drm_encoder
*drm_enc,
struct
